Commit | Line | Data |
---|---|---|
51129dfe IS |
1 | (pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort-ff.dsn"\r |
2 | (parser\r | |
3 | (string_quote ")\r | |
4 | (space_in_quoted_tokens on)\r | |
5 | (host_cad "KiCad's Pcbnew")\r | |
6 | (host_version "(5.0.1)-3")\r | |
7 | )\r | |
8 | (resolution um 10)\r | |
9 | (unit um)\r | |
10 | (structure\r | |
11 | (layer F.Cu\r | |
12 | (type signal)\r | |
13 | (property\r | |
14 | (index 0)\r | |
15 | )\r | |
16 | )\r | |
17 | (layer B.Cu\r | |
18 | (type signal)\r | |
19 | (property\r | |
20 | (index 1)\r | |
21 | )\r | |
22 | )\r | |
23 | (boundary\r | |
24 | (path pcb 0 187690 -154670 106410 -154670 106410 -28940 187690 -28940\r | |
25 | 187690 -154670)\r | |
26 | )\r | |
27 | (via "Via[0-1]_600:400_um")\r | |
28 | (rule\r | |
29 | (width 250)\r | |
30 | (clearance 200.1)\r | |
31 | (clearance 200.1 (type default_smd))\r | |
32 | (clearance 50 (type smd_smd))\r | |
33 | )\r | |
34 | )\r | |
35 | (placement\r | |
36 | (component MountingHole:MountingHole_2.2mm_M2\r | |
37 | (place H3 110220 -32750 front 0 (PN MountingHole))\r | |
38 | (place H1 183880 -32750 front 0 (PN MountingHole))\r | |
39 | (place H2 110220 -150860 front 0 (PN MountingHole))\r | |
40 | (place H4 183880 -150860 front 0 (PN MountingHole))\r | |
41 | )\r | |
42 | (component ".pretty:NEW-640456-8"\r | |
43 | (place J2 174790 -61112.4 front 90 (PN "640456-8"))\r | |
44 | (place J3 142617 -61112.4 front 90 (PN "640456-8"))\r | |
45 | (place J4 126530 -61112.4 front 90 (PN "640456-8"))\r | |
46 | (place J5 158480 -61112.4 front 90 (PN "640456-8"))\r | |
47 | (place J6 126530 -83972 front 90 (PN "640456-8"))\r | |
48 | (place J1 174790 -83972 front 90 (PN "640456-8"))\r | |
49 | )\r | |
50 | (component "kicad-library:NEW-DIP254P762X508-16"\r | |
51 | (place U7 154470 -128422 front 0 (PN 74166))\r | |
52 | (place U8 168440 -128422 front 0 (PN 74166))\r | |
53 | (place U1 160820 -83972 front 0 (PN 4504))\r | |
54 | (place U2 140500 -66192.4 front 180 (PN 4504))\r | |
55 | (place U3 140500 -106832 front 0 (PN 74166))\r | |
56 | (place U4 140500 -128422 front 0 (PN 74166))\r | |
57 | (place U5 154470 -106604 front 0 (PN 74166))\r | |
58 | (place U6 168440 -106832 front 0 (PN 74166))\r | |
59 | )\r | |
60 | (component "digikey-footprints:USE-SIP-9_P2.54mm"\r | |
61 | (place RN1 139430 -134350 front 0 (PN "4609X-101-103LF"))\r | |
62 | (place RN2 134350 -61942.9 front 90 (PN "4609X-101-103LF"))\r | |
63 | (place RN3 149590 -61942.9 front 90 (PN "4609X-101-103LF"))\r | |
64 | (place RN5 139430 -140700 front 0 (PN "4609X-101-103LF"))\r | |
65 | (place RN6 139430 -147050 front 0 (PN "4609X-101-103LF"))\r | |
66 | (place RN4 166100 -61942.9 front 90 (PN "4609X-101-103LF"))\r | |
67 | )\r | |
68 | (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r | |
69 | (place P8 173520 -89052 front 0 (PN BeagleBone_Black_Header))\r | |
70 | (place P9 125260 -89052 front 0 (PN BeagleBone_Black_Header))\r | |
71 | )\r | |
72 | )\r | |
73 | (library\r | |
74 | (image MountingHole:MountingHole_2.2mm_M2\r | |
75 | (outline (path signal 50 2450 0 2373.03 -609.29 2146.95 -1180.3 1785.97 -1677.14\r | |
76 | 1312.78 -2068.6 757.092 -2330.09 153.837 -2445.16 -459.084 -2406.6\r | |
77 | -1043.16 -2216.83 -1561.69 -1887.76 -1982.09 -1440.07 -2277.95 -901.905\r | |
78 | -2430.68 -307.066 -2430.68 307.066 -2277.95 901.905 -1982.09 1440.07\r | |
79 | -1561.69 1887.76 -1043.16 2216.83 -459.084 2406.6 153.837 2445.16\r | |
80 | 757.092 2330.09 1312.78 2068.6 1785.97 1677.14 2146.95 1180.3\r | |
81 | 2373.03 609.29 2450 0))\r | |
82 | (outline (path signal 150 2200 0 2118.42 -593.553 1879.72 -1143.09 1501.62 -1607.84\r | |
83 | 1012.14 -1953.35 447.603 -2153.99 -150.133 -2194.87 -736.735 -2072.97\r | |
84 | -1268.7 -1797.33 -1706.57 -1388.39 -2017.87 -876.482 -2179.51 -299.567\r | |
85 | -2179.51 299.567 -2017.87 876.482 -1706.57 1388.39 -1268.7 1797.33\r | |
86 | -736.735 2072.97 -150.133 2194.87 447.603 2153.99 1012.14 1953.35\r | |
87 | 1501.62 1607.84 1879.72 1143.09 2118.42 593.553 2200 0))\r | |
88 | (keepout "" (circle F.Cu 2200))\r | |
89 | (keepout "" (circle B.Cu 2200))\r | |
90 | )\r | |
91 | (image ".pretty:NEW-640456-8"\r | |
92 | (outline (path signal 152.4 18161 -1905 18088.2 -2128.95 17897.7 -2267.35 17662.3 -2267.35\r | |
93 | 17471.8 -2128.95 17399 -1905 17471.8 -1681.05 17662.3 -1542.65\r | |
94 | 17897.7 -1542.65 18088.2 -1681.05 18161 -1905))\r | |
95 | (outline (path signal 152.4 20193 0 20120.2 -223.946 19929.7 -362.353 19694.3 -362.353\r | |
96 | 19503.8 -223.946 19431 0 19503.8 223.946 19694.3 362.353\r | |
97 | 19929.7 362.353 20120.2 223.946 20193 0))\r | |
98 | (outline (path signal 152.4 20193 0 20120.2 -223.946 19929.7 -362.353 19694.3 -362.353\r | |
99 | 19503.8 -223.946 19431 0 19503.8 223.946 19694.3 362.353\r | |
100 | 19929.7 362.353 20120.2 223.946 20193 0))\r | |
101 | (outline (path signal 152.4 19050 3302 -1270 3302))\r | |
102 | (outline (path signal 152.4 19050 -2413 19050 3302))\r | |
103 | (outline (path signal 152.4 -1270 -2413 19050 -2413))\r | |
104 | (outline (path signal 152.4 -1270 3302 -1270 -2413))\r | |
105 | (outline (path signal 152.4 19304 3556 -1524 3556))\r | |
106 | (outline (path signal 152.4 19304 -2667 19304 3556))\r | |
107 | (outline (path signal 152.4 -1524 -2667 19304 -2667))\r | |
108 | (outline (path signal 152.4 -1524 3556 -1524 -2667))\r | |
109 | (outline (path signal 152.4 -1270 3302 -1270 -2413))\r | |
110 | (outline (path signal 152.4 19050 3302 -1270 3302))\r | |
111 | (outline (path signal 152.4 19050 -2413 19050 3302))\r | |
112 | (outline (path signal 152.4 -1270 -2413 19050 -2413))\r | |
113 | (outline (path signal 152.4 -1397 3429 -1397 -2540))\r | |
114 | (outline (path signal 152.4 19177 3429 -1397 3429))\r | |
115 | (outline (path signal 152.4 19177 -2540 19177 3429))\r | |
116 | (outline (path signal 152.4 -1397 -2540 19177 -2540))\r | |
117 | (pin Round[A]Pad_1524_um 8 0 0)\r | |
118 | (pin Round[A]Pad_1524_um 7 2540 0)\r | |
119 | (pin Round[A]Pad_1524_um 6 5080 0)\r | |
120 | (pin Round[A]Pad_1524_um 5 7620 0)\r | |
121 | (pin Round[A]Pad_1524_um 4 10160 0)\r | |
122 | (pin Round[A]Pad_1524_um 3 12700 0)\r | |
123 | (pin Round[A]Pad_1524_um 2 15240 0)\r | |
124 | (pin Round[A]Pad_1524_um 1 17780 0)\r | |
125 | )\r | |
126 | (image "kicad-library:NEW-DIP254P762X508-16"\r | |
127 | (outline (path signal 152.4 -7112 18745.2 -7112 -965.2))\r | |
128 | (outline (path signal 152.4 -4114.8 18745.2 -7112 18745.2))\r | |
129 | (outline (path signal 152.4 -3505.2 18745.2 -4114.8 18745.2))\r | |
130 | (outline (path signal 152.4 -508 18745.2 -3505.2 18745.2))\r | |
131 | (outline (path signal 152.4 -508 -965.2 -508 18745.2))\r | |
132 | (outline (path signal 152.4 -7112 -965.2 -508 -965.2))\r | |
133 | (outline (path signal 152.4 558.8 18338.8 -508 18338.8))\r | |
134 | (outline (path signal 152.4 558.8 17221.2 558.8 18338.8))\r | |
135 | (outline (path signal 152.4 -508 17221.2 558.8 17221.2))\r | |
136 | (outline (path signal 152.4 -508 18338.8 -508 17221.2))\r | |
137 | (outline (path signal 152.4 558.8 15798.8 -508 15798.8))\r | |
138 | (outline (path signal 152.4 558.8 14681.2 558.8 15798.8))\r | |
139 | (outline (path signal 152.4 -508 14681.2 558.8 14681.2))\r | |
140 | (outline (path signal 152.4 -508 15798.8 -508 14681.2))\r | |
141 | (outline (path signal 152.4 558.8 13258.8 -508 13258.8))\r | |
142 | (outline (path signal 152.4 558.8 12141.2 558.8 13258.8))\r | |
143 | (outline (path signal 152.4 -508 12141.2 558.8 12141.2))\r | |
144 | (outline (path signal 152.4 -508 13258.8 -508 12141.2))\r | |
145 | (outline (path signal 152.4 558.8 10718.8 -508 10718.8))\r | |
146 | (outline (path signal 152.4 558.8 9601.2 558.8 10718.8))\r | |
147 | (outline (path signal 152.4 -508 9601.2 558.8 9601.2))\r | |
148 | (outline (path signal 152.4 -508 10718.8 -508 9601.2))\r | |
149 | (outline (path signal 152.4 558.8 8178.8 -508 8178.8))\r | |
150 | (outline (path signal 152.4 558.8 7061.2 558.8 8178.8))\r | |
151 | (outline (path signal 152.4 -508 7061.2 558.8 7061.2))\r | |
152 | (outline (path signal 152.4 -508 8178.8 -508 7061.2))\r | |
153 | (outline (path signal 152.4 558.8 5638.8 -508 5638.8))\r | |
154 | (outline (path signal 152.4 558.8 4521.2 558.8 5638.8))\r | |
155 | (outline (path signal 152.4 -508 4521.2 558.8 4521.2))\r | |
156 | (outline (path signal 152.4 -508 5638.8 -508 4521.2))\r | |
157 | (outline (path signal 152.4 558.8 3098.8 -508 3098.8))\r | |
158 | (outline (path signal 152.4 558.8 1981.2 558.8 3098.8))\r | |
159 | (outline (path signal 152.4 -508 1981.2 558.8 1981.2))\r | |
160 | (outline (path signal 152.4 -508 3098.8 -508 1981.2))\r | |
161 | (outline (path signal 152.4 558.8 558.8 -508 558.8))\r | |
162 | (outline (path signal 152.4 558.8 -558.8 558.8 558.8))\r | |
163 | (outline (path signal 152.4 -508 -558.8 558.8 -558.8))\r | |
164 | (outline (path signal 152.4 -508 558.8 -508 -558.8))\r | |
165 | (outline (path signal 152.4 -8178.8 -558.8 -7112 -558.8))\r | |
166 | (outline (path signal 152.4 -8178.8 558.8 -8178.8 -558.8))\r | |
167 | (outline (path signal 152.4 -7112 558.8 -8178.8 558.8))\r | |
168 | (outline (path signal 152.4 -7112 -558.8 -7112 558.8))\r | |
169 | (outline (path signal 152.4 -8178.8 1981.2 -7112 1981.2))\r | |
170 | (outline (path signal 152.4 -8178.8 3098.8 -8178.8 1981.2))\r | |
171 | (outline (path signal 152.4 -7112 3098.8 -8178.8 3098.8))\r | |
172 | (outline (path signal 152.4 -7112 1981.2 -7112 3098.8))\r | |
173 | (outline (path signal 152.4 -8178.8 4521.2 -7112 4521.2))\r | |
174 | (outline (path signal 152.4 -8178.8 5638.8 -8178.8 4521.2))\r | |
175 | (outline (path signal 152.4 -7112 5638.8 -8178.8 5638.8))\r | |
176 | (outline (path signal 152.4 -7112 4521.2 -7112 5638.8))\r | |
177 | (outline (path signal 152.4 -8178.8 7061.2 -7112 7061.2))\r | |
178 | (outline (path signal 152.4 -8178.8 8178.8 -8178.8 7061.2))\r | |
179 | (outline (path signal 152.4 -7112 8178.8 -8178.8 8178.8))\r | |
180 | (outline (path signal 152.4 -7112 7061.2 -7112 8178.8))\r | |
181 | (outline (path signal 152.4 -8178.8 9601.2 -7112 9601.2))\r | |
182 | (outline (path signal 152.4 -8178.8 10718.8 -8178.8 9601.2))\r | |
183 | (outline (path signal 152.4 -7112 10718.8 -8178.8 10718.8))\r | |
184 | (outline (path signal 152.4 -7112 9601.2 -7112 10718.8))\r | |
185 | (outline (path signal 152.4 -8178.8 12141.2 -7112 12141.2))\r | |
186 | (outline (path signal 152.4 -8178.8 13258.8 -8178.8 12141.2))\r | |
187 | (outline (path signal 152.4 -7112 13258.8 -8178.8 13258.8))\r | |
188 | (outline (path signal 152.4 -7112 12141.2 -7112 13258.8))\r | |
189 | (outline (path signal 152.4 -8178.8 14681.2 -7112 14681.2))\r | |
190 | (outline (path signal 152.4 -8178.8 15798.8 -8178.8 14681.2))\r | |
191 | (outline (path signal 152.4 -7112 15798.8 -8178.8 15798.8))\r | |
192 | (outline (path signal 152.4 -7112 14681.2 -7112 15798.8))\r | |
193 | (outline (path signal 152.4 -8178.8 17221.2 -7112 17221.2))\r | |
194 | (outline (path signal 152.4 -8178.8 18338.8 -8178.8 17221.2))\r | |
195 | (outline (path signal 152.4 -7112 18338.8 -8178.8 18338.8))\r | |
196 | (outline (path signal 152.4 -7112 17221.2 -7112 18338.8))\r | |
197 | (outline (path signal 152.4 -4114.8 18745.2 -6299.2 18745.2))\r | |
198 | (outline (path signal 152.4 -3505.2 18745.2 -4114.8 18745.2))\r | |
199 | (outline (path signal 152.4 -889 18745.2 -3505.2 18745.2))\r | |
200 | (outline (path signal 152.4 -6731 -965.2 -889 -965.2))\r | |
201 | (pin Round[A]Pad_1676.4_um 16 0 17780)\r | |
202 | (pin Round[A]Pad_1676.4_um 15 0 15240)\r | |
203 | (pin Round[A]Pad_1676.4_um 14 0 12700)\r | |
204 | (pin Round[A]Pad_1676.4_um 13 0 10160)\r | |
205 | (pin Round[A]Pad_1676.4_um 12 0 7620)\r | |
206 | (pin Round[A]Pad_1676.4_um 11 0 5080)\r | |
207 | (pin Round[A]Pad_1676.4_um 10 0 2540)\r | |
208 | (pin Round[A]Pad_1676.4_um 9 0 0)\r | |
209 | (pin Round[A]Pad_1676.4_um 8 -7620 0)\r | |
210 | (pin Round[A]Pad_1676.4_um 7 -7620 2540)\r | |
211 | (pin Round[A]Pad_1676.4_um 6 -7620 5080)\r | |
212 | (pin Round[A]Pad_1676.4_um 5 -7620 7620)\r | |
213 | (pin Round[A]Pad_1676.4_um 4 -7620 10160)\r | |
214 | (pin Round[A]Pad_1676.4_um 3 -7620 12700)\r | |
215 | (pin Round[A]Pad_1676.4_um 2 -7620 15240)\r | |
216 | (pin Rect[A]Pad_1676.4x1676.4_um 1 -7620 17780)\r | |
217 | )\r | |
218 | (image "digikey-footprints:USE-SIP-9_P2.54mm"\r | |
219 | (outline (path signal 100 -1240 1250 21570 1250))\r | |
220 | (outline (path signal 100 -1240 -1250 21570 -1250))\r | |
221 | (outline (path signal 100 -1240 1250 -1240 -1250))\r | |
222 | (outline (path signal 100 21570 1250 21570 -1250))\r | |
223 | (outline (path signal 100 -1400 -1400 -900 -1400))\r | |
224 | (outline (path signal 100 -1400 1400 -1400 -1400))\r | |
225 | (outline (path signal 100 -900 1400 -1400 1400))\r | |
226 | (outline (path signal 100 21700 1400 21200 1400))\r | |
227 | (outline (path signal 100 21700 1400 21700 900))\r | |
228 | (outline (path signal 100 21700 -1400 21700 -900))\r | |
229 | (outline (path signal 100 21700 -1400 21200 -1400))\r | |
230 | (outline (path signal 50 -1490 1500 -1490 -1500))\r | |
231 | (outline (path signal 50 21820 1500 21820 -1500))\r | |
232 | (outline (path signal 50 21820 1500 -1490 1500))\r | |
233 | (outline (path signal 50 21820 -1500 -1490 -1500))\r | |
234 | (pin Round[A]Pad_1810_um 9 20320 0)\r | |
235 | (pin Round[A]Pad_1810_um 8 17780 0)\r | |
236 | (pin Round[A]Pad_1810_um 7 15240 0)\r | |
237 | (pin Round[A]Pad_1810_um 6 12700 0)\r | |
238 | (pin Round[A]Pad_1810_um 5 10160 0)\r | |
239 | (pin Round[A]Pad_1810_um 4 7620 0)\r | |
240 | (pin Round[A]Pad_1810_um 3 5080 0)\r | |
241 | (pin Round[A]Pad_1810_um 2 2540 0)\r | |
242 | (pin Rect[A]Pad_1810x1810_um 1 0 0)\r | |
243 | )\r | |
244 | (image Socket_BeagleBone_Black:Socket_BeagleBone_Black\r | |
245 | (outline (path signal 150 -1550 1550 -1550 0))\r | |
246 | (outline (path signal 150 1270 -1270 -1270 -1270))\r | |
247 | (outline (path signal 150 1270 1270 1270 -1270))\r | |
248 | (outline (path signal 150 0 1550 -1550 1550))\r | |
249 | (outline (path signal 150 3810 1270 1270 1270))\r | |
250 | (outline (path signal 150 3810 -57150 -1270 -57150))\r | |
251 | (outline (path signal 150 -1270 -57150 -1270 -1270))\r | |
252 | (outline (path signal 150 3810 -57150 3810 1270))\r | |
253 | (outline (path signal 50 -1750 -57650 4300 -57650))\r | |
254 | (outline (path signal 50 -1750 1750 4300 1750))\r | |
255 | (outline (path signal 50 4300 1750 4300 -57650))\r | |
256 | (outline (path signal 50 -1750 1750 -1750 -57650))\r | |
257 | (pin Oval[A]Pad_1727.2x1727.2_um 46 2540 -55880)\r | |
258 | (pin Oval[A]Pad_1727.2x1727.2_um 45 0 -55880)\r | |
259 | (pin Oval[A]Pad_1727.2x1727.2_um 44 2540 -53340)\r | |
260 | (pin Oval[A]Pad_1727.2x1727.2_um 43 0 -53340)\r | |
261 | (pin Oval[A]Pad_1727.2x1727.2_um 42 2540 -50800)\r | |
262 | (pin Oval[A]Pad_1727.2x1727.2_um 41 0 -50800)\r | |
263 | (pin Oval[A]Pad_1727.2x1727.2_um 40 2540 -48260)\r | |
264 | (pin Oval[A]Pad_1727.2x1727.2_um 39 0 -48260)\r | |
265 | (pin Oval[A]Pad_1727.2x1727.2_um 38 2540 -45720)\r | |
266 | (pin Oval[A]Pad_1727.2x1727.2_um 37 0 -45720)\r | |
267 | (pin Oval[A]Pad_1727.2x1727.2_um 36 2540 -43180)\r | |
268 | (pin Oval[A]Pad_1727.2x1727.2_um 35 0 -43180)\r | |
269 | (pin Oval[A]Pad_1727.2x1727.2_um 34 2540 -40640)\r | |
270 | (pin Oval[A]Pad_1727.2x1727.2_um 33 0 -40640)\r | |
271 | (pin Oval[A]Pad_1727.2x1727.2_um 32 2540 -38100)\r | |
272 | (pin Oval[A]Pad_1727.2x1727.2_um 31 0 -38100)\r | |
273 | (pin Oval[A]Pad_1727.2x1727.2_um 30 2540 -35560)\r | |
274 | (pin Oval[A]Pad_1727.2x1727.2_um 29 0 -35560)\r | |
275 | (pin Oval[A]Pad_1727.2x1727.2_um 28 2540 -33020)\r | |
276 | (pin Oval[A]Pad_1727.2x1727.2_um 27 0 -33020)\r | |
277 | (pin Oval[A]Pad_1727.2x1727.2_um 26 2540 -30480)\r | |
278 | (pin Oval[A]Pad_1727.2x1727.2_um 25 0 -30480)\r | |
279 | (pin Oval[A]Pad_1727.2x1727.2_um 24 2540 -27940)\r | |
280 | (pin Oval[A]Pad_1727.2x1727.2_um 23 0 -27940)\r | |
281 | (pin Oval[A]Pad_1727.2x1727.2_um 22 2540 -25400)\r | |
282 | (pin Oval[A]Pad_1727.2x1727.2_um 21 0 -25400)\r | |
283 | (pin Oval[A]Pad_1727.2x1727.2_um 20 2540 -22860)\r | |
284 | (pin Oval[A]Pad_1727.2x1727.2_um 19 0 -22860)\r | |
285 | (pin Oval[A]Pad_1727.2x1727.2_um 18 2540 -20320)\r | |
286 | (pin Oval[A]Pad_1727.2x1727.2_um 17 0 -20320)\r | |
287 | (pin Oval[A]Pad_1727.2x1727.2_um 16 2540 -17780)\r | |
288 | (pin Oval[A]Pad_1727.2x1727.2_um 15 0 -17780)\r | |
289 | (pin Oval[A]Pad_1727.2x1727.2_um 14 2540 -15240)\r | |
290 | (pin Oval[A]Pad_1727.2x1727.2_um 13 0 -15240)\r | |
291 | (pin Oval[A]Pad_1727.2x1727.2_um 12 2540 -12700)\r | |
292 | (pin Oval[A]Pad_1727.2x1727.2_um 11 0 -12700)\r | |
293 | (pin Oval[A]Pad_1727.2x1727.2_um 10 2540 -10160)\r | |
294 | (pin Oval[A]Pad_1727.2x1727.2_um 9 0 -10160)\r | |
295 | (pin Oval[A]Pad_1727.2x1727.2_um 8 2540 -7620)\r | |
296 | (pin Oval[A]Pad_1727.2x1727.2_um 7 0 -7620)\r | |
297 | (pin Oval[A]Pad_1727.2x1727.2_um 6 2540 -5080)\r | |
298 | (pin Oval[A]Pad_1727.2x1727.2_um 5 0 -5080)\r | |
299 | (pin Oval[A]Pad_1727.2x1727.2_um 4 2540 -2540)\r | |
300 | (pin Oval[A]Pad_1727.2x1727.2_um 3 0 -2540)\r | |
301 | (pin Oval[A]Pad_1727.2x1727.2_um 2 2540 0)\r | |
302 | (pin Rect[A]Pad_1727.2x1727.2_um 1 0 0)\r | |
303 | )\r | |
304 | (padstack Round[A]Pad_1524_um\r | |
305 | (shape (circle F.Cu 1524))\r | |
306 | (shape (circle B.Cu 1524))\r | |
307 | (attach off)\r | |
308 | )\r | |
309 | (padstack Round[A]Pad_1676.4_um\r | |
310 | (shape (circle F.Cu 1676.4))\r | |
311 | (shape (circle B.Cu 1676.4))\r | |
312 | (attach off)\r | |
313 | )\r | |
314 | (padstack Round[A]Pad_1810_um\r | |
315 | (shape (circle F.Cu 1810))\r | |
316 | (shape (circle B.Cu 1810))\r | |
317 | (attach off)\r | |
318 | )\r | |
319 | (padstack Oval[A]Pad_1727.2x1727.2_um\r | |
320 | (shape (path F.Cu 1727.2 0 0 0 0))\r | |
321 | (shape (path B.Cu 1727.2 0 0 0 0))\r | |
322 | (attach off)\r | |
323 | )\r | |
324 | (padstack Rect[A]Pad_1676.4x1676.4_um\r | |
325 | (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r | |
326 | (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r | |
327 | (attach off)\r | |
328 | )\r | |
329 | (padstack Rect[A]Pad_1727.2x1727.2_um\r | |
330 | (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r | |
331 | (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r | |
332 | (attach off)\r | |
333 | )\r | |
334 | (padstack Rect[A]Pad_1810x1810_um\r | |
335 | (shape (rect F.Cu -905 -905 905 905))\r | |
336 | (shape (rect B.Cu -905 -905 905 905))\r | |
337 | (attach off)\r | |
338 | )\r | |
339 | (padstack "Via[0-1]_600:400_um"\r | |
340 | (shape (circle F.Cu 600))\r | |
341 | (shape (circle B.Cu 600))\r | |
342 | (attach off)\r | |
343 | )\r | |
344 | )\r | |
345 | (network\r | |
346 | (net "Net-(P8-Pad3)"\r | |
347 | (pins P8-3)\r | |
348 | )\r | |
349 | (net "Net-(P8-Pad7)"\r | |
350 | (pins P8-7)\r | |
351 | )\r | |
352 | (net "Net-(P8-Pad8)"\r | |
353 | (pins P8-8)\r | |
354 | )\r | |
355 | (net "Net-(P8-Pad9)"\r | |
356 | (pins P8-9)\r | |
357 | )\r | |
358 | (net "Net-(P8-Pad10)"\r | |
359 | (pins P8-10)\r | |
360 | )\r | |
361 | (net "Net-(P8-Pad13)"\r | |
362 | (pins P8-13)\r | |
363 | )\r | |
364 | (net "Net-(P8-Pad19)"\r | |
365 | (pins P8-19)\r | |
366 | )\r | |
367 | (net "Net-(P8-Pad20)"\r | |
368 | (pins P8-20)\r | |
369 | )\r | |
370 | (net "Net-(P8-Pad21)"\r | |
371 | (pins P8-21)\r | |
372 | )\r | |
373 | (net "Net-(P8-Pad22)"\r | |
374 | (pins P8-22)\r | |
375 | )\r | |
376 | (net "Net-(P8-Pad23)"\r | |
377 | (pins P8-23)\r | |
378 | )\r | |
379 | (net "Net-(P8-Pad24)"\r | |
380 | (pins P8-24)\r | |
381 | )\r | |
382 | (net "Net-(P8-Pad25)"\r | |
383 | (pins P8-25)\r | |
384 | )\r | |
385 | (net "Net-(P8-Pad26)"\r | |
386 | (pins P8-26)\r | |
387 | )\r | |
388 | (net "Net-(P8-Pad27)"\r | |
389 | (pins P8-27)\r | |
390 | )\r | |
391 | (net "Net-(P8-Pad28)"\r | |
392 | (pins P8-28)\r | |
393 | )\r | |
394 | (net "Net-(P8-Pad29)"\r | |
395 | (pins P8-29)\r | |
396 | )\r | |
397 | (net "Net-(P8-Pad30)"\r | |
398 | (pins P8-30)\r | |
399 | )\r | |
400 | (net "Net-(P8-Pad31)"\r | |
401 | (pins P8-31)\r | |
402 | )\r | |
403 | (net "Net-(P8-Pad32)"\r | |
404 | (pins P8-32)\r | |
405 | )\r | |
406 | (net "Net-(P8-Pad33)"\r | |
407 | (pins P8-33)\r | |
408 | )\r | |
409 | (net "Net-(P8-Pad34)"\r | |
410 | (pins P8-34)\r | |
411 | )\r | |
412 | (net "Net-(P8-Pad35)"\r | |
413 | (pins P8-35)\r | |
414 | )\r | |
415 | (net "Net-(P8-Pad36)"\r | |
416 | (pins P8-36)\r | |
417 | )\r | |
418 | (net "Net-(P8-Pad37)"\r | |
419 | (pins P8-37)\r | |
420 | )\r | |
421 | (net "Net-(P8-Pad38)"\r | |
422 | (pins P8-38)\r | |
423 | )\r | |
424 | (net "Net-(P8-Pad39)"\r | |
425 | (pins P8-39)\r | |
426 | )\r | |
427 | (net "Net-(P8-Pad40)"\r | |
428 | (pins P8-40)\r | |
429 | )\r | |
430 | (net "Net-(P8-Pad41)"\r | |
431 | (pins P8-41)\r | |
432 | )\r | |
433 | (net "Net-(P8-Pad42)"\r | |
434 | (pins P8-42)\r | |
435 | )\r | |
436 | (net "Net-(P8-Pad44)"\r | |
437 | (pins P8-44)\r | |
438 | )\r | |
439 | (net "Net-(P8-Pad46)"\r | |
440 | (pins P8-46)\r | |
441 | )\r | |
442 | (net "Net-(P9-Pad11)"\r | |
443 | (pins P9-11)\r | |
444 | )\r | |
445 | (net "Net-(P9-Pad12)"\r | |
446 | (pins P9-12)\r | |
447 | )\r | |
448 | (net "Net-(P9-Pad13)"\r | |
449 | (pins P9-13)\r | |
450 | )\r | |
451 | (net "Net-(P9-Pad14)"\r | |
452 | (pins P9-14)\r | |
453 | )\r | |
454 | (net "Net-(P9-Pad15)"\r | |
455 | (pins P9-15)\r | |
456 | )\r | |
457 | (net "Net-(P9-Pad16)"\r | |
458 | (pins P9-16)\r | |
459 | )\r | |
460 | (net "Net-(P9-Pad17)"\r | |
461 | (pins P9-17)\r | |
462 | )\r | |
463 | (net "Net-(P9-Pad18)"\r | |
464 | (pins P9-18)\r | |
465 | )\r | |
466 | (net "Net-(P9-Pad19)"\r | |
467 | (pins P9-19)\r | |
468 | )\r | |
469 | (net "Net-(P9-Pad20)"\r | |
470 | (pins P9-20)\r | |
471 | )\r | |
472 | (net "Net-(P9-Pad21)"\r | |
473 | (pins P9-21)\r | |
474 | )\r | |
475 | (net "Net-(P9-Pad22)"\r | |
476 | (pins P9-22)\r | |
477 | )\r | |
478 | (net "Net-(P9-Pad23)"\r | |
479 | (pins P9-23)\r | |
480 | )\r | |
481 | (net "Net-(P9-Pad24)"\r | |
482 | (pins P9-24)\r | |
483 | )\r | |
484 | (net "Net-(P9-Pad25)"\r | |
485 | (pins P9-25)\r | |
486 | )\r | |
487 | (net "Net-(P9-Pad26)"\r | |
488 | (pins P9-26)\r | |
489 | )\r | |
490 | (net "Net-(P9-Pad27)"\r | |
491 | (pins P9-27)\r | |
492 | )\r | |
493 | (net "Net-(P9-Pad28)"\r | |
494 | (pins P9-28)\r | |
495 | )\r | |
496 | (net "Net-(P9-Pad29)"\r | |
497 | (pins P9-29)\r | |
498 | )\r | |
499 | (net "Net-(P9-Pad30)"\r | |
500 | (pins P9-30)\r | |
501 | )\r | |
502 | (net "Net-(P9-Pad31)"\r | |
503 | (pins P9-31)\r | |
504 | )\r | |
505 | (net "Net-(P9-Pad33)"\r | |
506 | (pins P9-33)\r | |
507 | )\r | |
508 | (net "Net-(P9-Pad35)"\r | |
509 | (pins P9-35)\r | |
510 | )\r | |
511 | (net "Net-(P9-Pad36)"\r | |
512 | (pins P9-36)\r | |
513 | )\r | |
514 | (net "Net-(P9-Pad37)"\r | |
515 | (pins P9-37)\r | |
516 | )\r | |
517 | (net "Net-(P9-Pad38)"\r | |
518 | (pins P9-38)\r | |
519 | )\r | |
520 | (net "Net-(P9-Pad39)"\r | |
521 | (pins P9-39)\r | |
522 | )\r | |
523 | (net "Net-(P9-Pad40)"\r | |
524 | (pins P9-40)\r | |
525 | )\r | |
526 | (net "Net-(P9-Pad41)"\r | |
527 | (pins P9-41)\r | |
528 | )\r | |
529 | (net "Net-(P9-Pad42)"\r | |
530 | (pins P9-42)\r | |
531 | )\r | |
532 | (net PWR_BUT\r | |
533 | (pins P9-9)\r | |
534 | )\r | |
535 | (net SYS_RESETN\r | |
536 | (pins P9-10)\r | |
537 | )\r | |
538 | (net VDD_ADC\r | |
539 | (pins P9-32)\r | |
540 | )\r | |
541 | (net GNDA_ADC\r | |
542 | (pins P9-34)\r | |
543 | )\r | |
544 | (net SR1_CLR\r | |
545 | (pins U2-9 P8-17)\r | |
546 | )\r | |
547 | (net SR1_SHLD\r | |
548 | (pins U2-7 P8-15)\r | |
549 | )\r | |
550 | (net SR1_CLK\r | |
551 | (pins U2-3 P8-11)\r | |
552 | )\r | |
553 | (net SR1_CLKINH\r | |
554 | (pins U2-5 P8-5)\r | |
555 | )\r | |
556 | (net SR1_QH_T\r | |
557 | (pins U1-2 P8-4)\r | |
558 | )\r | |
559 | (net 5v\r | |
560 | (pins U7-16 U8-16 U1-1 U2-16 U3-16 U4-16 U5-16 U6-16 P9-8 P9-7 P9-6 P9-5)\r | |
561 | )\r | |
562 | (net BB3.3\r | |
563 | (pins U1-16 U2-1)\r | |
564 | )\r | |
565 | (net SR1_QH\r | |
566 | (pins U1-3 U3-13)\r | |
567 | )\r | |
568 | (net SR1_CLR_T\r | |
569 | (pins U7-9 U8-9 U2-10 U3-9 U4-9 U5-9 U6-9)\r | |
570 | )\r | |
571 | (net SR1_SHLD_T\r | |
572 | (pins U7-15 U8-15 U2-6 U3-15 U4-15 U5-15 U6-15)\r | |
573 | )\r | |
574 | (net SR1_CLKINH_T\r | |
575 | (pins U7-6 U8-6 U2-4 U3-6 U4-6 U5-6 U6-6)\r | |
576 | )\r | |
577 | (net SR1_CLK_T\r | |
578 | (pins U7-7 U8-7 U2-2 U3-7 U4-7 U5-7 U6-7)\r | |
579 | )\r | |
580 | (net 7SEG_CLK\r | |
581 | (pins U2-11 P8-45)\r | |
582 | )\r | |
583 | (net 7SEG_DIO\r | |
584 | (pins U2-14 P8-43)\r | |
585 | )\r | |
586 | (net SR6_QH_T\r | |
587 | (pins U1-15 P8-18)\r | |
588 | )\r | |
589 | (net SR5_QH_T\r | |
590 | (pins U1-12 P8-16)\r | |
591 | )\r | |
592 | (net SR4_QH_T\r | |
593 | (pins U1-10 P8-14)\r | |
594 | )\r | |
595 | (net SR3_QH_T\r | |
596 | (pins U1-6 P8-12)\r | |
597 | )\r | |
598 | (net SR2_QH_T\r | |
599 | (pins P8-6)\r | |
600 | )\r | |
601 | (net +3V3\r | |
602 | (pins P9-4 P9-3)\r | |
603 | )\r | |
604 | (net SR2_QH__T\r | |
605 | (pins U1-4)\r | |
606 | )\r | |
607 | (net SR2_QH\r | |
608 | (pins U7-13 U1-5)\r | |
609 | )\r | |
610 | (net SR3_QH\r | |
611 | (pins U8-13 U1-7)\r | |
612 | )\r | |
613 | (net SR4_QH\r | |
614 | (pins U1-9 U6-13)\r | |
615 | )\r | |
616 | (net SR5_QH\r | |
617 | (pins U1-11 U5-13)\r | |
618 | )\r | |
619 | (net SR6_QH\r | |
620 | (pins U1-14 U4-13)\r | |
621 | )\r | |
622 | (net 7SEG_DIO_T\r | |
623 | (pins U2-15)\r | |
624 | )\r | |
625 | (net 7SEG_CLK_T\r | |
626 | (pins U2-12)\r | |
627 | )\r | |
628 | (net e8r\r | |
629 | (pins J5-1 U3-2 RN4-9)\r | |
630 | )\r | |
631 | (net e7r\r | |
632 | (pins J5-2 U3-3 RN4-8)\r | |
633 | )\r | |
634 | (net e6r\r | |
635 | (pins J5-3 U3-4 RN4-7)\r | |
636 | )\r | |
637 | (net e5r\r | |
638 | (pins J5-4 U3-5 RN4-6)\r | |
639 | )\r | |
640 | (net e4r\r | |
641 | (pins J5-5 U3-10 RN4-5)\r | |
642 | )\r | |
643 | (net e3r\r | |
644 | (pins J5-6 U3-11 RN4-4)\r | |
645 | )\r | |
646 | (net e2r\r | |
647 | (pins J5-7 U3-12 RN4-3)\r | |
648 | )\r | |
649 | (net e1r\r | |
650 | (pins J5-8 U3-14 RN4-2)\r | |
651 | )\r | |
652 | (net a1r\r | |
653 | (pins J1-8 U4-14 RN1-2)\r | |
654 | )\r | |
655 | (net a2r\r | |
656 | (pins J1-7 U4-12 RN1-3)\r | |
657 | )\r | |
658 | (net a3r\r | |
659 | (pins J1-6 U4-11 RN1-4)\r | |
660 | )\r | |
661 | (net a4r\r | |
662 | (pins J1-5 U4-10 RN1-5)\r | |
663 | )\r | |
664 | (net a5r\r | |
665 | (pins J1-4 U4-5 RN1-6)\r | |
666 | )\r | |
667 | (net a6r\r | |
668 | (pins J1-3 U4-4 RN1-7)\r | |
669 | )\r | |
670 | (net a7r\r | |
671 | (pins J1-2 U4-3 RN1-8)\r | |
672 | )\r | |
673 | (net a8r\r | |
674 | (pins J1-1 U4-2 RN1-9)\r | |
675 | )\r | |
676 | (net b8r\r | |
677 | (pins J2-1 U5-2 RN3-9)\r | |
678 | )\r | |
679 | (net b7r\r | |
680 | (pins J2-2 U5-3 RN3-8)\r | |
681 | )\r | |
682 | (net b6r\r | |
683 | (pins J2-3 U5-4 RN3-7)\r | |
684 | )\r | |
685 | (net b5r\r | |
686 | (pins J2-4 U5-5 RN3-6)\r | |
687 | )\r | |
688 | (net b4r\r | |
689 | (pins J2-5 U5-10 RN3-5)\r | |
690 | )\r | |
691 | (net b3r\r | |
692 | (pins J2-6 U5-11 RN3-4)\r | |
693 | )\r | |
694 | (net b2r\r | |
695 | (pins J2-7 U5-12 RN3-3)\r | |
696 | )\r | |
697 | (net b1r\r | |
698 | (pins J2-8 U5-14 RN3-2)\r | |
699 | )\r | |
700 | (net c1r\r | |
701 | (pins J3-8 U6-14 RN5-2)\r | |
702 | )\r | |
703 | (net c2r\r | |
704 | (pins J3-7 U6-12 RN5-3)\r | |
705 | )\r | |
706 | (net c3r\r | |
707 | (pins J3-6 U6-11 RN5-4)\r | |
708 | )\r | |
709 | (net c4r\r | |
710 | (pins J3-5 U6-10 RN5-5)\r | |
711 | )\r | |
712 | (net c5r\r | |
713 | (pins J3-4 U6-5 RN5-6)\r | |
714 | )\r | |
715 | (net c6r\r | |
716 | (pins J3-3 U6-4 RN5-7)\r | |
717 | )\r | |
718 | (net c7r\r | |
719 | (pins J3-2 U6-3 RN5-8)\r | |
720 | )\r | |
721 | (net c8r\r | |
722 | (pins J3-1 U6-2 RN5-9)\r | |
723 | )\r | |
724 | (net d8r\r | |
725 | (pins J4-1 U7-2 RN2-9)\r | |
726 | )\r | |
727 | (net d7r\r | |
728 | (pins J4-2 U7-3 RN2-8)\r | |
729 | )\r | |
730 | (net d6r\r | |
731 | (pins J4-3 U7-4 RN2-7)\r | |
732 | )\r | |
733 | (net d5r\r | |
734 | (pins J4-4 U7-5 RN2-6)\r | |
735 | )\r | |
736 | (net d4r\r | |
737 | (pins J4-5 U7-10 RN2-5)\r | |
738 | )\r | |
739 | (net d3r\r | |
740 | (pins J4-6 U7-11 RN2-4)\r | |
741 | )\r | |
742 | (net d2r\r | |
743 | (pins J4-7 U7-12 RN2-3)\r | |
744 | )\r | |
745 | (net d1r\r | |
746 | (pins J4-8 U7-14 RN2-2)\r | |
747 | )\r | |
748 | (net f1r\r | |
749 | (pins J6-8 U8-14 RN6-2)\r | |
750 | )\r | |
751 | (net f2r\r | |
752 | (pins J6-7 U8-12 RN6-3)\r | |
753 | )\r | |
754 | (net f3r\r | |
755 | (pins J6-6 U8-11 RN6-4)\r | |
756 | )\r | |
757 | (net f4r\r | |
758 | (pins J6-5 U8-10 RN6-5)\r | |
759 | )\r | |
760 | (net f5r\r | |
761 | (pins J6-4 U8-5 RN6-6)\r | |
762 | )\r | |
763 | (net f6r\r | |
764 | (pins J6-3 U8-4 RN6-7)\r | |
765 | )\r | |
766 | (net f7r\r | |
767 | (pins J6-2 U8-3 RN6-8)\r | |
768 | )\r | |
769 | (net f8r\r | |
770 | (pins J6-1 U8-2 RN6-9)\r | |
771 | )\r | |
772 | (net "Net-(P8-Pad2)"\r | |
773 | (pins P8-2)\r | |
774 | )\r | |
775 | (net "Net-(P8-Pad1)"\r | |
776 | (pins P8-1)\r | |
777 | )\r | |
778 | (net GNDD\r | |
779 | (pins P9-46 P9-45 P9-44 P9-43)\r | |
780 | )\r | |
781 | (net GND\r | |
782 | (pins U7-8 U7-1 U8-8 U8-1 U1-13 U1-8 U2-13 U2-8 U3-8 U3-1 U4-8 U4-1 U5-8 U5-1\r | |
783 | U6-8 U6-1 RN1-1 RN2-1 RN3-1 RN5-1 RN6-1 RN4-1 P9-2)\r | |
784 | )\r | |
785 | (net "Net-(P9-Pad1)"\r | |
786 | (pins P9-1)\r | |
787 | )\r | |
788 | (class kicad_default "" +3V3 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T\r | |
789 | BB3.3 GND GNDA_ADC GNDD "Net-(P8-Pad1)" "Net-(P8-Pad10)" "Net-(P8-Pad13)"\r | |
790 | "Net-(P8-Pad19)" "Net-(P8-Pad2)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)"\r | |
791 | "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)"\r | |
792 | "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)"\r | |
793 | "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)"\r | |
794 | "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)"\r | |
795 | "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)"\r | |
796 | "Net-(P8-Pad44)" "Net-(P8-Pad46)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)"\r | |
797 | "Net-(P9-Pad1)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)"\r | |
798 | "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"\r | |
799 | "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)"\r | |
800 | "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"\r | |
801 | "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)"\r | |
802 | "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"\r | |
803 | "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)"\r | |
804 | "Net-(P9-Pad41)" "Net-(P9-Pad42)" PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T\r | |
805 | SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SR2_QH\r | |
806 | SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH SR4_QH_T SR5_QH SR5_QH_T SR6_QH\r | |
807 | SR6_QH_T SYS_RESETN VDD_ADC a1r a2r a3r a4r a5r a6r a7r a8r b1r b2r\r | |
808 | b3r b4r b5r b6r b7r b8r c1r c2r c3r c4r c5r c6r c7r c8r d1r d2r d3r\r | |
809 | d4r d5r d6r d7r d8r e1r e2r e3r e4r e5r e6r e7r e8r f1r f2r f3r f4r\r | |
810 | f5r f6r f7r f8r\r | |
811 | (circuit\r | |
812 | (use_via Via[0-1]_600:400_um)\r | |
813 | )\r | |
814 | (rule\r | |
815 | (width 250)\r | |
816 | (clearance 200.1)\r | |
817 | )\r | |
818 | )\r | |
819 | )\r | |
820 | (wiring\r | |
821 | )\r | |
822 | )\r |