cf3c20ae |
1 | /* $OpenBSD: omusbtll.c,v 1.2 2013/11/06 19:03:07 syl Exp $ */ |
2 | /* |
3 | * Copyright (c) 2010 Dale Rahn <drahn@openbsd.org> |
4 | * |
5 | * Permission to use, copy, modify, and distribute this software for any |
6 | * purpose with or without fee is hereby granted, provided that the above |
7 | * copyright notice and this permission notice appear in all copies. |
8 | * |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
16 | */ |
17 | |
18 | #include <sys/param.h> |
19 | #include <sys/systm.h> |
20 | #include <sys/queue.h> |
21 | #include <sys/device.h> |
22 | #include <sys/malloc.h> |
23 | #include <sys/evcount.h> |
24 | #include <machine/bus.h> |
25 | #include <machine/intr.h> |
26 | #include <armv7/armv7/armv7var.h> |
27 | #include <armv7/omap/prcmvar.h> |
28 | |
29 | /* registers */ |
30 | #define USBTLL_REVISION 0x0000 |
31 | #define USBTLL_SYSCONFIG 0x0010 |
32 | #define USBTLL_SYSSTATUS 0x0014 |
33 | #define USBTLL_IRQSTATUS 0x0018 |
34 | #define USBTLL_IRQENABLE 0x001C |
35 | #define USBTLL_SHARED_CONF 0x0030 |
36 | #define USBTLL_SHARED_CONF_USB_90D_DDR_EN (1<<6) |
37 | #define USBTLL_SHARED_CONF_USB_180D_SDR_EN (1<<5) |
38 | #define USBTLL_SHARED_CONF_USB_DIVRATIO_SH 2 |
39 | #define USBTLL_SHARED_CONF_FCLK_REQ (1<<1) |
40 | #define USBTLL_SHARED_CONF_FCLK_IS_ON (1<<0) |
41 | |
42 | #define USBTLL_CHANNEL_CONF_(i) (0x0040 + (0x04 * (i))) |
43 | #define USBTLL_CHANNEL_CONF_FSLSLINESTATE_SH 28 |
44 | #define USBTLL_CHANNEL_CONF_FSLSMODE_SH 24 |
45 | #define USBTLL_CHANNEL_CONF_TESTTXSE0 (1<<20) |
46 | #define USBTLL_CHANNEL_CONF_TESTTXDAT (1<<19) |
47 | #define USBTLL_CHANNEL_CONF_TESTTXEN (1<<18) |
48 | #define USBTLL_CHANNEL_CONF_TESTEN (1<<17) |
49 | #define USBTLL_CHANNEL_CONF_DRVVBUS (1<<16) |
50 | #define USBTLL_CHANNEL_CONF_CHRGVBUS (1<<15) |
51 | #define USBTLL_CHANNEL_CONF_ULPINOBITSTUFF (1<<11) |
52 | #define USBTLL_CHANNEL_CONF_ULPIAUTOIDLE (1<<10) |
53 | #define USBTLL_CHANNEL_CONF_UTMIAUTOIDLE (1<<9) |
54 | #define USBTLL_CHANNEL_CONF_ULPIDDRMODE (1<<8) |
55 | #define USBTLL_CHANNEL_CONF_LPIOUTCLKMODE (1<<7) |
56 | #define USBTLL_CHANNEL_CONF_TLLFULLSPEED (1<<6) |
57 | #define USBTLL_CHANNEL_CONF_TLLCONNECT (1<<5) |
58 | #define USBTLL_CHANNEL_CONF_TLLATTACH (1<<4) |
59 | #define USBTLL_CHANNEL_CONF_UTMIISADEV (1<<3) |
60 | #define USBTLL_CHANNEL_CONF_CHANMODE_SH 1 |
61 | #define USBTLL_CHANNEL_CONF_CHANEN (1<<0) |
62 | |
63 | /* |
64 | ULPI_VENDOR_ID_LO_(i) (0x0800 + (0x100 * (i))) |
65 | ULPI_VENDOR_ID_HI_(i) (0x0801 + (0x100 * (i))) |
66 | ULPI_PRODUCT_ID_LO_(i) (0x0802 + (0x100 * (i))) |
67 | ULPI_PRODUCT_ID_HI_(i) (0x0803 + (0x100 * (i))) |
68 | ULPI_FUNCTION_CTRL_(i) (0x0804 + (0x100 * (i))) |
69 | ULPI_FUNCTION_CTRL_SET_(i) (0x0805 + (0x100 * (i))) |
70 | ULPI_FUNCTION_CTRL_CLR_(i) (0x0806 + (0x100 * (i))) |
71 | ULPI_INTERFACE_CTRL_(i) (0x0807 + (0x100 * (i))) |
72 | ULPI_INTERFACE_CTRL_SET_(i) (0x0808 + (0x100 * (i))) |
73 | ULPI_INTERFACE_CTRL_CLR_(i) (0x0809 + (0x100 * (i))) |
74 | ULPI_OTG_CTRL_(i) (0x080A + (0x100 * (i))) |
75 | ULPI_OTG_CTRL_SET_(i) (0x080B + (0x100 * (i))) |
76 | ULPI_OTG_CTRL_CLR_(i) (0x080C + (0x100 * (i))) |
77 | ULPI_USB_INT_EN_RISE_(i) (0x080D + (0x100 * (i))) |
78 | ULPI_USB_INT_EN_RISE_SET_(i) (0x080E + (0x100 * (i))) |
79 | ULPI_USB_INT_EN_RISE_CLR_(i) (0x080F + (0x100 * (i))) |
80 | ULPI_USB_INT_EN_FALL_(i) (0x0810 + (0x100 * (i))) |
81 | ULPI_USB_INT_EN_FALL_SET_(i) (0x0811 + (0x100 * (i))) |
82 | ULPI_USB_INT_EN_FALL_CLR_(i) (0x0812 + (0x100 * (i))) |
83 | ULPI_USB_INT_STATUS_(i) (0x0813 + (0x100 * (i))) |
84 | ULPI_USB_INT_LATCH_(i) (0x0814 + (0x100 * (i))) |
85 | */ |
86 | |
87 | struct omusbtll_softc { |
88 | struct device sc_dev; |
89 | bus_space_tag_t sc_iot; |
90 | bus_space_handle_t sc_ioh; |
91 | }; |
92 | |
93 | void omusbtll_attach(struct device *parent, struct device *self, void *args); |
94 | void omusbtll_init(uint32_t channel_mask); |
95 | |
96 | struct cfattach omusbtll_ca = { |
97 | sizeof (struct omusbtll_softc), NULL, omusbtll_attach |
98 | }; |
99 | |
100 | struct cfdriver omusbtll_cd = { |
101 | NULL, "omusbtll", DV_DULL |
102 | }; |
103 | |
104 | struct omusbtll_softc *omusbtll_sc; |
105 | void |
106 | omusbtll_attach(struct device *parent, struct device *self, void *args) |
107 | { |
108 | struct omusbtll_softc *sc = (struct omusbtll_softc *) self; |
109 | struct armv7_attach_args *aa = args; |
110 | u_int32_t rev; |
111 | |
112 | sc->sc_iot = aa->aa_iot; |
113 | if (bus_space_map(sc->sc_iot, aa->aa_dev->mem[0].addr, |
114 | aa->aa_dev->mem[0].size, 0, &sc->sc_ioh)) { |
115 | printf("%s: bus_space_map failed!\n", __func__); |
116 | return; |
117 | } |
118 | |
119 | #if 0 |
120 | prcm_enablemodule(PRCM_USBHOST1); |
121 | prcm_enablemodule(PRCM_USBHOST2); |
122 | #endif |
123 | prcm_enablemodule(PRCM_USBTLL); |
124 | |
125 | delay(10000); |
126 | |
127 | //return; |
128 | #if 1 |
129 | rev = bus_space_read_1(sc->sc_iot, sc->sc_ioh, USBTLL_SYSCONFIG); |
130 | |
131 | printf(" rev %d.%d\n", rev >> 4 & 0xf, rev & 0xf); |
132 | #endif |
133 | |
134 | omusbtll_sc = sc; |
135 | |
136 | omusbtll_init(0x3); |
137 | } |
138 | |
139 | |
140 | void omusbtll_init(uint32_t channel_mask) |
141 | { |
142 | int i; |
143 | uint32_t val; |
144 | /* global reacharound */ |
145 | struct omusbtll_softc *sc = omusbtll_sc; |
146 | |
147 | for(i = 0; i < 3; i++) { |
148 | val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, |
149 | USBTLL_CHANNEL_CONF_(i)); |
150 | val &= ~(USBTLL_CHANNEL_CONF_ULPINOBITSTUFF | |
151 | USBTLL_CHANNEL_CONF_ULPIAUTOIDLE | |
152 | USBTLL_CHANNEL_CONF_ULPIDDRMODE); |
153 | bus_space_write_4(sc->sc_iot, sc->sc_ioh, |
154 | USBTLL_CHANNEL_CONF_(i), val); |
155 | } |
156 | |
157 | val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, USBTLL_SHARED_CONF); |
158 | val |= (USBTLL_SHARED_CONF_USB_180D_SDR_EN | |
159 | (1 << USBTLL_SHARED_CONF_USB_DIVRATIO_SH) | |
160 | USBTLL_SHARED_CONF_FCLK_IS_ON); |
161 | val &= ~(USBTLL_SHARED_CONF_USB_90D_DDR_EN); |
162 | bus_space_write_4(sc->sc_iot, sc->sc_ioh, USBTLL_SHARED_CONF, val); |
163 | |
164 | for (i = 0; i < 3; i++) { |
165 | if (channel_mask & (1<<i)) { |
166 | val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, |
167 | USBTLL_CHANNEL_CONF_(i)); |
168 | |
169 | val |= USBTLL_CHANNEL_CONF_CHANEN; |
170 | bus_space_write_4(sc->sc_iot, sc->sc_ioh, |
171 | USBTLL_CHANNEL_CONF_(i), val); |
172 | printf("usbtll enabling %d\n", i); |
173 | } |
174 | } |
175 | } |