cf3c20ae |
1 | /* $OpenBSD: ti_iicreg.h,v 1.1 2013/11/24 15:00:22 rapha Exp $ */ |
2 | /* $NetBSD: ti_iicreg.h,v 1.1 2013/04/17 14:33:06 bouyer Exp $ */ |
3 | |
4 | /* |
5 | * Copyright (c) 2013 Manuel Bouyer. All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * |
16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | */ |
27 | |
28 | /* register definitions for the i2c controller found in the |
29 | * Texas Instrument AM335x SOC |
30 | */ |
31 | |
32 | #ifndef _AM335XIICREG_H |
33 | #define _AM335XIICREG_H |
34 | |
35 | #define AM335X_I2C_REVNB_LO 0x00 |
36 | #define I2C_REVNB_LO_RTL(x) (((x) >> 11) & 0x01f) |
37 | #define I2C_REVNB_LO_MAJOR(x) (((x) >> 8) & 0x007) |
38 | #define I2C_REVNB_LO_CUSTOM(x) (((x) >> 6) & 0x003) |
39 | #define I2C_REVNB_LO_MINOR(x) (((x) >> 0) & 0x01f) |
40 | #define AM335X_I2C_REVNB_HI 0x04 |
41 | #define I2C_REVNB_HI_SCHEME(x) (((x) >> 14) & 0x003) |
42 | #define I2C_REVNB_HI_FUNC(x) (((x) >> 0) & 0xfff) |
43 | #define AM335X_I2C_SYSC 0x10 |
44 | #define I2C_SYSC_CLKACTIVITY_OCP 0x0010 |
45 | #define I2C_SYSC_CLKACTIVITY_SYSTEM 0x0020 |
46 | #define I2C_SYSC_IDLE_MASK 0x0018 |
47 | #define I2C_SYSC_IDLE_FORCE 0x0000 |
48 | #define I2C_SYSC_IDLE_SMART 0x0010 |
49 | #define I2C_SYSC_IDLE_NONE 0x0008 |
50 | #define I2C_SYSC_ENAWAKEUP 0x0004 |
51 | #define I2C_SYSC_SRST 0x0002 |
52 | #define I2C_SYSC_AUTOIDLE 0x0001 |
53 | #define AM335X_I2C_IRQSTATUS_RAW 0x24 |
54 | #define AM335X_I2C_IRQSTATUS 0x28 |
55 | #define AM335X_I2C_IRQENABLE_SET 0x2C |
56 | #define AM335X_I2C_IRQENABLE_CLR 0x30 |
57 | #define AM335X_I2C_WE 0x34 |
58 | #define I2C_IRQSTATUS_XDR 0x4000 |
59 | #define I2C_IRQSTATUS_RDR 0x2000 |
60 | #define I2C_IRQSTATUS_BB 0x1000 |
61 | #define I2C_IRQSTATUS_ROVR 0x0800 |
62 | #define I2C_IRQSTATUS_XUDF 0x0400 |
63 | #define I2C_IRQSTATUS_AAS 0x0200 |
64 | #define I2C_IRQSTATUS_BF 0x0100 |
65 | #define I2C_IRQSTATUS_AERR 0x0080 |
66 | #define I2C_IRQSTATUS_STC 0x0040 |
67 | #define I2C_IRQSTATUS_GC 0x0020 |
68 | #define I2C_IRQSTATUS_XRDY 0x0010 |
69 | #define I2C_IRQSTATUS_RRDY 0x0008 |
70 | #define I2C_IRQSTATUS_ARDY 0x0004 |
71 | #define I2C_IRQSTATUS_NACK 0x0002 |
72 | #define I2C_IRQSTATUS_AL 0x0001 |
73 | #define AM335X_I2C_DMARXENABLE_SET 0x38 |
74 | #define AM335X_I2C_DMATXENABLE_SET 0x3C |
75 | #define AM335X_I2C_DMARXENABLE_CLR 0x40 |
76 | #define I2C_DMARXENABLE 0x0001 |
77 | #define AM335X_I2C_DMATXENABLE_CLR 0x44 |
78 | #define I2C_DMATXENABLE 0x0001 |
79 | #define AM335X_I2C_DMARXWAKE_EN 0x48 |
80 | /* use same bits as IRQ */ |
81 | #define AM335X_I2C_DMATXWAKE_EN 0x4C |
82 | /* use same bits as IRQ */ |
83 | #define AM335X_I2C_SYSS 0x90 |
84 | #define I2C_SYSS_RDONE 0x0001 |
85 | #define AM335X_I2C_BUF 0x94 |
86 | #define I2C_BUF_RDMA_EN 0x8000 |
87 | #define I2C_BUF_RXFIFO_CLR 0x4000 |
88 | #define I2C_BUF_RXTRSH_MASK 0x3f00 |
89 | #define I2C_BUF_RXTRSH(x) ((x) << 8) |
90 | #define I2C_BUF_XDMA_EN 0x0080 |
91 | #define I2C_BUF_TXFIFO_CLR 0x0040 |
92 | #define I2C_BUF_TXTRSH_MASK 0x003f |
93 | #define I2C_BUF_TXTRSH(x) ((x) << 0) |
94 | #define AM335X_I2C_CNT 0x98 |
95 | #define I2C_CNT_MASK 0xffff |
96 | #define AM335X_I2C_DATA 0x9C |
97 | #define I2C_DATA_MASK 0x00ff |
98 | #define AM335X_I2C_CON 0xA4 |
99 | #define I2C_CON_EN 0x8000 |
100 | #define I2C_CON_STB 0x0800 |
101 | #define I2C_CON_MST 0x0400 |
102 | #define I2C_CON_TRX 0x0200 |
103 | #define I2C_CON_XSA 0x0100 |
104 | #define I2C_CON_XOA0 0x0080 |
105 | #define I2C_CON_XOA1 0x0040 |
106 | #define I2C_CON_XOA2 0x0020 |
107 | #define I2C_CON_XOA3 0x0010 |
108 | #define I2C_CON_STP 0x0002 |
109 | #define I2C_CON_STT 0x0001 |
110 | #define AM335X_I2C_OA 0xA8 |
111 | #define I2C_OA_MASK 0x03ff |
112 | #define AM335X_I2C_SA 0xAC |
113 | #define I2C_SA_MASK 0x03ff |
114 | #define AM335X_I2C_PSC 0xB0 |
115 | #define I2C_PSC_MASK 0x000f |
116 | #define AM335X_I2C_SCLL 0xB4 |
117 | #define I2C_SCLL_MASK 0x000f |
118 | #define AM335X_I2C_SCLH 0xB8 |
119 | #define I2C_SCLH_MASK 0x000f |
120 | #define AM335X_I2C_SYSTEST 0xBC |
121 | #define AM335X_I2C_BUFSTAT 0xC0 |
122 | #define I2C_BUFSTAT_FIFODEPTH(x) (((x) >> 14) & 0x03) |
123 | #define I2C_BUFSTAT_RXSTAT(x) (((x) >> 8) & 0x3f) |
124 | #define I2C_BUFSTAT_TXSTAT(x) (((x) >> 0) & 0x3f) |
125 | #define AM335X_I2C_OA1 0xC4 |
126 | #define AM335X_I2C_OA2 0xC8 |
127 | #define AM335X_I2C_OA3 0xCC |
128 | /* same bits as I2C_OA */ |
129 | #define AM335X_I2C_ACTOA 0xD0 |
130 | #define AM335X_I2C_SBLOCK 0xD4 |
131 | #define I2C_ACTOA_OA3_ACT 0x0008 |
132 | #define I2C_ACTOA_OA2_ACT 0x0004 |
133 | #define I2C_ACTOA_OA1_ACT 0x0002 |
134 | #define I2C_ACTOA_OA0_ACT 0x0001 |
135 | |
136 | #endif /* _AM335XIICREG_H */ |