update config, add cheats to amusbss, bind to intr in ammusb

[bbb-usb.git] / src / sys / arch / armv7 / omap / ammusb.c

/*
 * Copyright (c) 2017 Ian Sutton <ian@ce.gl>
 * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/rwlock.h>

#include <machine/intr.h>

#include <dev/ofw/openfirm.h>
#include <dev/ofw/fdt.h>
#include <machine/fdt.h>

#include <dev/usb/usb.h>
#include <dev/usb/usbdi.h>
#include <dev/usb/usbdivar.h>
#include <dev/usb/usb_mem.h>
#include <dev/usb/ehcireg.h>
#include <dev/usb/ehcivar.h>

#include <armv7/omap/prcmvar.h>
#include <armv7/omap/sitara_cm.h>

#include <arm/simplebus/simplebusvar.h>

#define DEVNAME(_s) ((_s)->sc_dev.dv_xname)

#define AMMUSB_DEBUG /* XXX */

#ifdef AMMUSB_DEBUG
int ammusb_debug = 20;
#define DPRINTF(n,s)		do { if ((n) <= ammusb_debug) printf s; } while (0)
#else
#define DPRINTF(n,s)		do {}
#endif

#define HREAD4(sc, handle, reg)							\
	(bus_space_read_4((sc)->sc_iot, (handle), (reg)))
#define HWRITE4(sc, handle, reg, val)						\
	bus_space_write_4((sc)->sc_iot, (handle), (reg), (val))
#define HSET4(sc, handle, reg, bits)						\
	HWRITE4((sc), (handle), (reg), HREAD4((sc), (reg)) | (bits))
#define HCLR4(sc, handle, reg, bits)						\
	HWRITE4((sc), (handle), (reg), HREAD4((sc), (reg)) & ~(bits))

enum OTG_STATE {
	OTG_HOST,
	OTG_CLIENT,
};

struct ammusb_softc {
	struct device		sc_dev;
	bus_space_tag_t		sc_iot;
	void			*sc_ih;

	bus_space_handle_t	sc_ioh_ctl;
	bus_size_t		sc_ios_ctl;
	bus_space_handle_t	sc_ioh_core;
	bus_size_t		sc_ios_core;
	bus_space_handle_t	sc_ioh_phy;
	bus_size_t		sc_ios_phy;

	char			sc_phys[32];
	enum OTG_STATE		sc_otg_state;
};

/*  core decl */
int  ammusb_match(struct device *, void *, void *);
void ammusb_attach(struct device *, struct device *, void *);
int  ammusb_detach(struct device *, int);
int  ammusb_intr(void *);
void ammusb_reset(struct ammusb_softc *);

/*  debug decl */
void ammusb_preg(uint32_t, char *, struct ammusb_softc *);
void ammusb_dumpregs(struct ammusb_softc *);

/*  core/iomux.c def */
struct cfattach ammusb_ca = {
	sizeof (struct ammusb_softc), ammusb_match, ammusb_attach, ammusb_detach
};

struct cfdriver ammusb_cd = {
	NULL, "ammusb", DV_DULL
};

int
ammusb_match(struct device *parent, void *v, void *aux)
{
	struct fdt_attach_args *faa = aux;
	return OF_is_compatible(faa->fa_node, "ti,musb-am33xx");
}

void
ammusb_attach(struct device *parent, struct device *self, void *args)
{
	struct ammusb_softc 	*sc = (struct ammusb_softc *) self;
	struct fdt_attach_args *faa = args;

	uint32_t rev, phy_reg[2];
	int phy_node = -1, irq;

	sc->sc_iot = faa->fa_iot;

	/* find our corresponding PHY regs */
	if ((phy_node = OF_getnodebyphandle(0x3c)) == -1) {
	    printf(": couldn't find PHY\n");
	    return;
	}

	OF_getpropintarray(phy_node, "reg", phy_reg, sizeof(phy_reg));

	if (bus_space_map(sc->sc_iot, phy_reg[0], phy_reg[1], 0,
	    &sc->sc_ioh_phy))
		panic("%s: bus_space_map failed!", __func__);
	if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, faa->fa_reg[0].size, 0,
	    &sc->sc_ioh_core))
		panic("%s: bus_space_map failed!", __func__);
	if (bus_space_map(sc->sc_iot, faa->fa_reg[1].addr, faa->fa_reg[1].size, 0,
	    &sc->sc_ioh_ctl))
		panic("%s: bus_space_map failed!", __func__);

	irq = faa->fa_intr[0];
	sc->sc_ih = arm_intr_establish(irq, IPL_BIO, ammusb_intr, sc, DEVNAME(sc));

	/* not the right revision number XXX */
	rev = HREAD4(sc, sc->sc_ioh_ctl, 0x0);
	printf(": rev %d.%d\n", rev >> 4 &0xf, rev & 0xf);

	sc->sc_ih = arm_intr_establish_fdt(faa->fa_node, IPL_USB, ehci_intr,
	    &sc->sc_dev, DEVNAME(sc));

	/* XXX set OTG state here */
}

int
ammusb_detach(struct device *self, int flags)
{
	return 0; /* XXX */
}

int 
ammusb_intr(void * arg)
{
	return 0; /* XXX */
}