[bbb-usb.git] / src / sys / arch / armv7 / omap / amusbss.c

/*
 * Copyright (c) 2017 Ian Sutton <ian@ce.gl>
 * Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * USB subsystem driver for am335x. Derived from FreeBSD version.
 */

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/kernel.h>

#include <dev/ofw/openfirm.h>
#include <dev/ofw/fdt.h>

#include <machine/fdt.h>

#include <arm/simplebus/simplebusvar.h>

#include <armv7/omap/prcmvar.h>

#define DEVNAME(_s) ((_s)->sc_dev.dv_xname)

#define AMUSBSS_DEBUG /* XXX */

#ifdef AMUSBSS_DEBUG
int amusbss_debug = 20;
#define DPRINTF(n,s)		do { if ((n) <= amusbss_debug) printf s; } while (0)
#else
#define DPRINTF(n,s)		do {}
#endif

#define HREAD4(sc, reg)							\
	(bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
#define HWRITE4(sc, reg, val)						\
	bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
#define HSET4(sc, reg, bits)						\
	HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
#define HCLR4(sc, reg, bits)						\
	HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))

#define	USBSS_REVREG		0x00
#define	USBSS_SYSCONFIG		0x10
#define		USBSS_SYSCONFIG_SRESET		1

#define USBCTRL_REV		0x00
#define USBCTRL_CTRL		0x14
#define USBCTRL_STAT		0x18
#define USBCTRL_IRQ_STAT0	0x30
#define		IRQ_STAT0_RXSHIFT	16
#define		IRQ_STAT0_TXSHIFT	0
#define USBCTRL_IRQ_STAT1	0x34
#define 	IRQ_STAT1_DRVVBUS	(1 << 8)
#define USBCTRL_INTEN_SET0	0x38
#define USBCTRL_INTEN_SET1	0x3C
#define 	USBCTRL_INTEN_USB_ALL	0x1ff
#define 	USBCTRL_INTEN_USB_SOF	(1 << 3)
#define USBCTRL_INTEN_CLR0	0x40
#define USBCTRL_INTEN_CLR1	0x44
#define USBCTRL_UTMI		0xE0
#define		USBCTRL_UTMI_FSDATAEXT		(1 << 1)
#define USBCTRL_MODE		0xE8
#define 	USBCTRL_MODE_IDDIG		(1 << 8)
#define 	USBCTRL_MODE_IDDIGMUX		(1 << 7)

struct amusbss_softc {
	struct device		sc_dev;
//	struct simplebus_softc	sc_sbus;
	bus_space_tag_t		sc_iot;
	void			*sc_ih;
	bus_dma_tag_t		sc_dmat;
	bus_space_handle_t	sc_ioh;
	bus_size_t		sc_ios;
	bus_space_handle_t	sc_ioh_dma_ctl;
	bus_size_t		sc_ios_dma_ctl;
	bus_space_handle_t	sc_ioh_dma_sched;
	bus_size_t		sc_ios_dma_sched;
	bus_space_handle_t	sc_ioh_queue;
	bus_size_t		sc_ios_queue;
};

/* XXX figure out what to do instead of this XXX */
extern void simplebus_attach_node(struct device *, int);

/* core decl */
int  amusbss_match(struct device *, void *, void *);
void amusbss_attach(struct device *, struct device *, void *);
int  amusbss_detach(struct device *, int);
void amusbss_reset(struct amusbss_softc *);

void amusbss_map_dma(int);

/* debug decl */
void amusbss_preg(uint32_t, char *, struct amusbss_softc *);
void amusbss_dumpregs(struct amusbss_softc *);

/*  core/iomux.c defs */
struct cfattach amusbss_ca = {
	sizeof (struct amusbss_softc), amusbss_match, amusbss_attach, amusbss_detach
};

struct cfdriver amusbss_cd = {
	NULL, "amusbss", DV_DULL
};

int
amusbss_match(struct device *parent, void *v, void *aux)
{
	struct fdt_attach_args *faa = aux;
	return OF_is_compatible(faa->fa_node, "ti,am33xx-usb");
}

void
amusbss_attach(struct device *parent, struct device *self, void *args)
{
	struct amusbss_softc 	*sc = (struct amusbss_softc *) self;
	struct fdt_attach_args 	*faa = args;
	int i, node;
	uint32_t rev;

	sc->sc_iot = faa->fa_iot;
	if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, faa->fa_reg[0].size, 0,
	    &sc->sc_ioh))
		panic("%s: bus_space_map failed!", __func__);

	sc->sc_ios = faa->fa_reg[0].size;

	/* Enable device clocks */
	prcm_enablemodule(PRCM_USB);

	/* Reset USB subsystem, USB0 and USB1 */
	HWRITE4(sc, USBSS_SYSCONFIG, USBSS_SYSCONFIG_SRESET);
	delay(100);
	i = 10;
	while (HREAD4(sc, USBSS_SYSCONFIG) & USBSS_SYSCONFIG_SRESET) {
	    delay(100);
	    if (i-- == 0) {
		printf(": reset timeout.\n");
		return;
	    }
	}

	rev = HREAD4(sc, USBSS_REVREG);
	printf(": rev %d.%d\n", rev >> 4 &0xf, rev & 0xf);

	//faa->fa_node = node;
	//simplebus_attach(parent, &sc->sc_sbus.sc_dev, faa);

	/* Walk FDT child nodes to attach ammusb devices, map DMA controllers */
	for (node = OF_child(faa->fa_node); node > 0; node = OF_peer(node)) {
	    if (OF_is_compatible(node, "ti,am3359-cppi41")) {
		amusbss_map_dma(node);
	    } else {
		simplebus_attach_node(parent, node);
	    }
	}
}

int
amusbss_detach(struct device *self, int flags)
{
	struct amusbss_softc *sc = (struct amusbss_softc *) self;

	bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);

	if (sc->sc_ioh_dma_ctl)
	    bus_space_unmap(sc->sc_iot, sc->sc_ioh_dma_ctl, sc->sc_ios_dma_ctl);
	if (sc->sc_ioh_dma_sched)
	    bus_space_unmap(sc->sc_iot, sc->sc_ioh_dma_sched, sc->sc_ios_dma_sched);
	if (sc->sc_ioh_queue)
	    bus_space_unmap(sc->sc_iot, sc->sc_ioh_queue, sc->sc_ios_queue);

	return 0;
}

void
amusbss_map_dma(int node)
{
	/* XXX TODO */
}
Commit	Line	Data
efe0ef7b	1	/*
	2	* Copyright (c) 2017 Ian Sutton <ian@ce.gl>
	3	* Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
	4	*
	5	* Redistribution and use in source and binary forms, with or without
	6	* modification, are permitted provided that the following conditions
	7	* are met:
	8	* 1. Redistributions of source code must retain the above copyright
	9	* notice, this list of conditions and the following disclaimer.
	10	* 2. Redistributions in binary form must reproduce the above copyright
	11	* notice, this list of conditions and the following disclaimer in the
	12	* documentation and/or other materials provided with the distribution.
	13	*
	14	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
	15	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	16	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	17	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
	18	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	19	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
	20	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
	21	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
	22	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
	23	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
	24	* SUCH DAMAGE.
dd3fbf43	25	*
dd3fbf43	26	* USB subsystem driver for am335x. Derived from FreeBSD version.
efe0ef7b	27	*/
	28
	29	#include <sys/param.h>
	30	#include <sys/systm.h>
	31	#include <sys/device.h>
	32	#include <sys/kernel.h>
	33
	34	#include <dev/ofw/openfirm.h>
	35	#include <dev/ofw/fdt.h>
	36
	37	#include <machine/fdt.h>
	38
	39	#include <arm/simplebus/simplebusvar.h>
	40
	41	#include <armv7/omap/prcmvar.h>
	42
	43	#define DEVNAME(_s) ((_s)->sc_dev.dv_xname)
	44
	45	#define AMUSBSS_DEBUG /* XXX */
	46
	47	#ifdef AMUSBSS_DEBUG
	48	int amusbss_debug = 20;
	49	#define DPRINTF(n,s) do { if ((n) <= amusbss_debug) printf s; } while (0)
	50	#else
	51	#define DPRINTF(n,s) do {}
	52	#endif
	53
	54	#define HREAD4(sc, reg) \
	55	(bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
	56	#define HWRITE4(sc, reg, val) \
	57	bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
	58	#define HSET4(sc, reg, bits) \
	59	HWRITE4((sc), (reg), HREAD4((sc), (reg)) \| (bits))
	60	#define HCLR4(sc, reg, bits) \
	61	HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
	62
	63	#define USBSS_REVREG 0x00
	64	#define USBSS_SYSCONFIG 0x10
	65	#define USBSS_SYSCONFIG_SRESET 1
	66
	67	#define USBCTRL_REV 0x00
	68	#define USBCTRL_CTRL 0x14
	69	#define USBCTRL_STAT 0x18
	70	#define USBCTRL_IRQ_STAT0 0x30
	71	#define IRQ_STAT0_RXSHIFT 16
	72	#define IRQ_STAT0_TXSHIFT 0
	73	#define USBCTRL_IRQ_STAT1 0x34
	74	#define IRQ_STAT1_DRVVBUS (1 << 8)
	75	#define USBCTRL_INTEN_SET0 0x38
	76	#define USBCTRL_INTEN_SET1 0x3C
	77	#define USBCTRL_INTEN_USB_ALL 0x1ff
	78	#define USBCTRL_INTEN_USB_SOF (1 << 3)
	79	#define USBCTRL_INTEN_CLR0 0x40
	80	#define USBCTRL_INTEN_CLR1 0x44
	81	#define USBCTRL_UTMI 0xE0
	82	#define USBCTRL_UTMI_FSDATAEXT (1 << 1)
	83	#define USBCTRL_MODE 0xE8
	84	#define USBCTRL_MODE_IDDIG (1 << 8)
	85	#define USBCTRL_MODE_IDDIGMUX (1 << 7)
	86
	87	struct amusbss_softc {
	88	struct device sc_dev;
22caf3ce	89	// struct simplebus_softc sc_sbus;
efe0ef7b	90	bus_space_tag_t sc_iot;
dceeb2f4	91	void *sc_ih;
dceeb2f4	92	bus_dma_tag_t sc_dmat;
efe0ef7b	93	bus_space_handle_t sc_ioh;
dceeb2f4	94	bus_size_t sc_ios;
	95	bus_space_handle_t sc_ioh_dma_ctl;
	96	bus_size_t sc_ios_dma_ctl;
	97	bus_space_handle_t sc_ioh_dma_sched;
	98	bus_size_t sc_ios_dma_sched;
	99	bus_space_handle_t sc_ioh_queue;
	100	bus_size_t sc_ios_queue;
efe0ef7b	101	};
efe0ef7b	102
22caf3ce	103	/* XXX figure out what to do instead of this XXX */
	104	extern void simplebus_attach_node(struct device *, int);
	105
dd3fbf43	106	/* core decl */
efe0ef7b	107	int amusbss_match(struct device , void , void *);
	108	void amusbss_attach(struct device , struct device , void *);
	109	int amusbss_detach(struct device *, int);
	110	void amusbss_reset(struct amusbss_softc *);
	111
dceeb2f4	112	void amusbss_map_dma(int);
dceeb2f4	113
dd3fbf43	114	/* debug decl */
efe0ef7b	115	void amusbss_preg(uint32_t, char , struct amusbss_softc );
	116	void amusbss_dumpregs(struct amusbss_softc *);
	117
dd3fbf43	118	/* core/iomux.c defs */
efe0ef7b	119	struct cfattach amusbss_ca = {
	120	sizeof (struct amusbss_softc), amusbss_match, amusbss_attach, amusbss_detach
	121	};
	122
	123	struct cfdriver amusbss_cd = {
	124	NULL, "amusbss", DV_DULL
	125	};
	126
	127	int
	128	amusbss_match(struct device parent, void v, void *aux)
	129	{
	130	struct fdt_attach_args *faa = aux;
efe0ef7b	131	return OF_is_compatible(faa->fa_node, "ti,am33xx-usb");
	132	}
	133
	134	void
	135	amusbss_attach(struct device parent, struct device self, void *args)
	136	{
	137	struct amusbss_softc sc = (struct amusbss_softc ) self;
	138	struct fdt_attach_args *faa = args;
efe0ef7b	139	int i, node;
	140	uint32_t rev;
	141
efe0ef7b	142	sc->sc_iot = faa->fa_iot;
	143	if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, faa->fa_reg[0].size, 0,
	144	&sc->sc_ioh))
	145	panic("%s: bus_space_map failed!", __func__);
	146
dceeb2f4	147	sc->sc_ios = faa->fa_reg[0].size;
dceeb2f4	148
efe0ef7b	149	/* Enable device clocks */
	150	prcm_enablemodule(PRCM_USB);
	151
	152	/* Reset USB subsystem, USB0 and USB1 */
	153	HWRITE4(sc, USBSS_SYSCONFIG, USBSS_SYSCONFIG_SRESET);
	154	delay(100);
	155	i = 10;
	156	while (HREAD4(sc, USBSS_SYSCONFIG) & USBSS_SYSCONFIG_SRESET) {
	157	delay(100);
	158	if (i-- == 0) {
	159	printf(": reset timeout.\n");
	160	return;
	161	}
	162	}
	163
	164	rev = HREAD4(sc, USBSS_REVREG);
	165	printf(": rev %d.%d\n", rev >> 4 &0xf, rev & 0xf);
	166
22caf3ce	167	//faa->fa_node = node;
	168	//simplebus_attach(parent, &sc->sc_sbus.sc_dev, faa);
	169
dceeb2f4	170	/* Walk FDT child nodes to attach ammusb devices, map DMA controllers */
	171	for (node = OF_child(faa->fa_node); node > 0; node = OF_peer(node)) {
	172	if (OF_is_compatible(node, "ti,am3359-cppi41")) {
	173	amusbss_map_dma(node);
	174	} else {
	175	simplebus_attach_node(parent, node);
	176	}
	177	}
efe0ef7b	178	}
	179
	180	int
	181	amusbss_detach(struct device *self, int flags)
	182	{
dceeb2f4	183	struct amusbss_softc sc = (struct amusbss_softc ) self;
	184
	185	bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
	186
	187	if (sc->sc_ioh_dma_ctl)
	188	bus_space_unmap(sc->sc_iot, sc->sc_ioh_dma_ctl, sc->sc_ios_dma_ctl);
	189	if (sc->sc_ioh_dma_sched)
	190	bus_space_unmap(sc->sc_iot, sc->sc_ioh_dma_sched, sc->sc_ios_dma_sched);
	191	if (sc->sc_ioh_queue)
	192	bus_space_unmap(sc->sc_iot, sc->sc_ioh_queue, sc->sc_ios_queue);
	193
	194	return 0;
efe0ef7b	195	}
efe0ef7b	196
dceeb2f4	197	void
	198	amusbss_map_dma(int node)
	199	{
	200	/* XXX TODO */
	201	}