src/sys/arch/armv7/omap/ammusb.c

   1 /*
   2  * Copyright (c) 2017 Ian Sutton <ian@ce.gl>
   3  * Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  */
  26
  27 #include <sys/param.h>
  28 #include <sys/systm.h>
  29 #include <sys/device.h>
  30 #include <sys/kernel.h>
  31
  32 #include <dev/ofw/openfirm.h>
  33 #include <dev/ofw/fdt.h>
  34
  35 #include <machine/fdt.h>
  36
  37 #include <armv7/omap/prcmvar.h>
  38 #include <armv7/omap/sitara_cm.h>
  39
  40 #include <arm/simplebus/simplebusvar.h>
  41
  42 #define DEVNAME(_s) ((_s)->sc_dev.dv_xname)
  43
  44 #define AMMUSB_DEBUG /* XXX */
  45
  46 #ifdef AMMUSB_DEBUG
  47 int ammusb_debug = 20;
  48 #define DPRINTF(n,s)            do { if ((n) <= ammusb_debug) printf s; } while (0)
  49 #else
  50 #define DPRINTF(n,s)            do {}
  51 #endif
  52
  53 #define HREAD4(sc, handle, reg)                                                 \
  54         (bus_space_read_4((sc)->sc_iot, (handle), (reg)))
  55 #define HWRITE4(sc, handle, reg, val)                                           \
  56         bus_space_write_4((sc)->sc_iot, (handle), (reg), (val))
  57 #define HSET4(sc, handle, reg, bits)                                            \
  58         HWRITE4((sc), (handle), (reg), HREAD4((sc), (reg)) | (bits))
  59 #define HCLR4(sc, handle, reg, bits)                                            \
  60         HWRITE4((sc), (handle), (reg), HREAD4((sc), (reg)) & ~(bits))
  61
  62 enum OTG_STATE {
  63         OTG_HOST,
  64         OTG_CLIENT,
  65 };
  66
  67 struct ammusb_softc {
  68         struct device           sc_dev;
  69         bus_space_tag_t         sc_iot;
  70         void                    *sc_ih;
  71
  72         bus_space_handle_t      sc_ioh_ctl;
  73         bus_size_t              sc_ios_ctl;
  74         bus_space_handle_t      sc_ioh_core;
  75         bus_size_t              sc_ios_core;
  76         bus_space_handle_t      sc_ioh_phy;
  77         bus_size_t              sc_ios_phy;
  78
  79         char                    sc_phys[32];
  80         enum OTG_STATE          sc_otg_state;
  81 };
  82
  83 /*  core decl */
  84 int  ammusb_match(struct device *, void *, void *);
  85 void ammusb_attach(struct device *, struct device *, void *);
  86 int  ammusb_detach(struct device *, int);
  87 int  ammusb_intr(void *);
  88 void ammusb_reset(struct ammusb_softc *);
  89
  90 /*  debug decl */
  91 void ammusb_preg(uint32_t, char *, struct ammusb_softc *);
  92 void ammusb_dumpregs(struct ammusb_softc *);
  93
  94 /*  core/iomux.c def */
  95 struct cfattach ammusb_ca = {
  96         sizeof (struct ammusb_softc), ammusb_match, ammusb_attach, ammusb_detach
  97 };
  98
  99 struct cfdriver ammusb_cd = {
 100         NULL, "ammusb", DV_DULL
 101 };
 102
 103 int
 104 ammusb_match(struct device *parent, void *v, void *aux)
 105 {
 106         struct fdt_attach_args *faa = aux;
 107         return OF_is_compatible(faa->fa_node, "ti,musb-am33xx");
 108 }
 109
 110 void
 111 ammusb_attach(struct device *parent, struct device *self, void *args)
 112 {
 113         struct ammusb_softc     *sc = (struct ammusb_softc *) self;
 114         struct fdt_attach_args *faa = args;
 115
 116         uint32_t rev, phy_reg[2];
 117         int phy_node;
 118
 119         phy_node = -1;
 120
 121         sc->sc_iot = faa->fa_iot;
 122
 123         /* find our corresponding PHY regs */
 124         if ((phy_node = OF_getnodebyphandle(0x3c)) == -1) {
 125             printf(": couldn't find PHY\n");
 126             return;
 127         }
 128
 129         OF_getpropintarray(phy_node, "reg", phy_reg, sizeof(phy_reg));
 130
 131         if (bus_space_map(sc->sc_iot, phy_reg[0], phy_reg[1], 0,
 132             &sc->sc_ioh_phy))
 133                 panic("%s: bus_space_map failed!", __func__);
 134         if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, faa->fa_reg[0].size, 0,
 135             &sc->sc_ioh_core))
 136                 panic("%s: bus_space_map failed!", __func__);
 137         if (bus_space_map(sc->sc_iot, faa->fa_reg[1].addr, faa->fa_reg[1].size, 0,
 138             &sc->sc_ioh_ctl))
 139                 panic("%s: bus_space_map failed!", __func__);
 140
 141         rev = HREAD4(sc, sc->sc_ioh_ctl, 0x0);
 142         printf(": rev %d.%d\n", rev >> 4 &0xf, rev & 0xf);
 143 }
 144
 145 int
 146 ammusb_detach(struct device *self, int flags)
 147 {
 148         return 0; /* XXX */
 149 }
 150
 151 int
 152 ammusb_intr(void * arg)
 153 {
 154         return 0; /* XXX */
 155 }