src/sys/arch/armv7/omap/amusbss.c

   1 /*
   2  * Copyright (c) 2017 Ian Sutton <ian@ce.gl>
   3  * Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * USB subsystem driver for am335x. Derived from FreeBSD version.
  27  */
  28
  29 #include <sys/param.h>
  30 #include <sys/systm.h>
  31 #include <sys/device.h>
  32 #include <sys/kernel.h>
  33
  34 #include <dev/ofw/openfirm.h>
  35 #include <dev/ofw/fdt.h>
  36
  37 #include <machine/fdt.h>
  38
  39 #include <arm/simplebus/simplebusvar.h>
  40
  41 #include <armv7/omap/prcmvar.h>
  42
  43 #define DEVNAME(_s) ((_s)->sc_dev.dv_xname)
  44
  45 #define AMUSBSS_DEBUG /* XXX */
  46
  47 #ifdef AMUSBSS_DEBUG
  48 int amusbss_debug = 20;
  49 #define DPRINTF(n,s)            do { if ((n) <= amusbss_debug) printf s; } while (0)
  50 #else
  51 #define DPRINTF(n,s)            do {}
  52 #endif
  53
  54 #define HREAD4(sc, reg)                                                 \
  55         (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
  56 #define HWRITE4(sc, reg, val)                                           \
  57         bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
  58 #define HSET4(sc, reg, bits)                                            \
  59         HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
  60 #define HCLR4(sc, reg, bits)                                            \
  61         HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
  62
  63 #define USBSS_REVREG            0x00
  64 #define USBSS_SYSCONFIG         0x10
  65 #define         USBSS_SYSCONFIG_SRESET          1
  66
  67 #define USBCTRL_REV             0x00
  68 #define USBCTRL_CTRL            0x14
  69 #define USBCTRL_STAT            0x18
  70 #define USBCTRL_IRQ_STAT0       0x30
  71 #define         IRQ_STAT0_RXSHIFT       16
  72 #define         IRQ_STAT0_TXSHIFT       0
  73 #define USBCTRL_IRQ_STAT1       0x34
  74 #define         IRQ_STAT1_DRVVBUS       (1 << 8)
  75 #define USBCTRL_INTEN_SET0      0x38
  76 #define USBCTRL_INTEN_SET1      0x3C
  77 #define         USBCTRL_INTEN_USB_ALL   0x1ff
  78 #define         USBCTRL_INTEN_USB_SOF   (1 << 3)
  79 #define USBCTRL_INTEN_CLR0      0x40
  80 #define USBCTRL_INTEN_CLR1      0x44
  81 #define USBCTRL_UTMI            0xE0
  82 #define         USBCTRL_UTMI_FSDATAEXT          (1 << 1)
  83 #define USBCTRL_MODE            0xE8
  84 #define         USBCTRL_MODE_IDDIG              (1 << 8)
  85 #define         USBCTRL_MODE_IDDIGMUX           (1 << 7)
  86
  87 struct amusbss_softc {
  88         struct device           sc_dev;
  89 //      struct simplebus_softc  sc_sbus;
  90         bus_space_tag_t         sc_iot;
  91         void                    *sc_ih;
  92         bus_dma_tag_t           sc_dmat;
  93         bus_space_handle_t      sc_ioh;
  94         bus_size_t              sc_ios;
  95         bus_space_handle_t      sc_ioh_dma_ctl;
  96         bus_size_t              sc_ios_dma_ctl;
  97         bus_space_handle_t      sc_ioh_dma_sched;
  98         bus_size_t              sc_ios_dma_sched;
  99         bus_space_handle_t      sc_ioh_queue;
 100         bus_size_t              sc_ios_queue;
 101 };
 102
 103 /* XXX figure out what to do instead of this XXX */
 104 extern void simplebus_attach_node(struct device *, int);
 105
 106 /* core decl */
 107 int  amusbss_match(struct device *, void *, void *);
 108 void amusbss_attach(struct device *, struct device *, void *);
 109 int  amusbss_detach(struct device *, int);
 110 void amusbss_reset(struct amusbss_softc *);
 111
 112 void amusbss_map_dma(int);
 113
 114 /* debug decl */
 115 void amusbss_preg(uint32_t, char *, struct amusbss_softc *);
 116 void amusbss_dumpregs(struct amusbss_softc *);
 117
 118 /*  core/iomux.c defs */
 119 struct cfattach amusbss_ca = {
 120         sizeof (struct amusbss_softc), amusbss_match, amusbss_attach, amusbss_detach
 121 };
 122
 123 struct cfdriver amusbss_cd = {
 124         NULL, "amusbss", DV_DULL
 125 };
 126
 127 int
 128 amusbss_match(struct device *parent, void *v, void *aux)
 129 {
 130         struct fdt_attach_args *faa = aux;
 131         return OF_is_compatible(faa->fa_node, "ti,am33xx-usb");
 132 }
 133
 134 void
 135 amusbss_attach(struct device *parent, struct device *self, void *args)
 136 {
 137         struct amusbss_softc    *sc = (struct amusbss_softc *) self;
 138         struct fdt_attach_args  *faa = args;
 139         int i, node;
 140         uint32_t rev;
 141
 142         sc->sc_iot = faa->fa_iot;
 143         if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, faa->fa_reg[0].size, 0,
 144             &sc->sc_ioh))
 145                 panic("%s: bus_space_map failed!", __func__);
 146
 147         sc->sc_ios = faa->fa_reg[0].size;
 148
 149         /* Enable device clocks */
 150         prcm_enablemodule(PRCM_USB);
 151
 152         /* Reset USB subsystem, USB0 and USB1 */
 153         HWRITE4(sc, USBSS_SYSCONFIG, USBSS_SYSCONFIG_SRESET);
 154         delay(100);
 155         i = 10;
 156         while (HREAD4(sc, USBSS_SYSCONFIG) & USBSS_SYSCONFIG_SRESET) {
 157             delay(100);
 158             if (i-- == 0) {
 159                 printf(": reset timeout.\n");
 160                 return;
 161             }
 162         }
 163
 164         rev = HREAD4(sc, USBSS_REVREG);
 165         printf(": rev %d.%d\n", rev >> 4 &0xf, rev & 0xf);
 166
 167         //faa->fa_node = node;
 168         //simplebus_attach(parent, &sc->sc_sbus.sc_dev, faa);
 169
 170         /* Walk FDT child nodes to attach ammusb devices, map DMA controllers */
 171         for (node = OF_child(faa->fa_node); node > 0; node = OF_peer(node)) {
 172             if (OF_is_compatible(node, "ti,am3359-cppi41")) {
 173                 amusbss_map_dma(node);
 174             } else {
 175                 simplebus_attach_node(parent, node);
 176             }
 177         }
 178 }
 179
 180 int
 181 amusbss_detach(struct device *self, int flags)
 182 {
 183         struct amusbss_softc *sc = (struct amusbss_softc *) self;
 184
 185         bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
 186
 187         if (sc->sc_ioh_dma_ctl)
 188             bus_space_unmap(sc->sc_iot, sc->sc_ioh_dma_ctl, sc->sc_ios_dma_ctl);
 189         if (sc->sc_ioh_dma_sched)
 190             bus_space_unmap(sc->sc_iot, sc->sc_ioh_dma_sched, sc->sc_ios_dma_sched);
 191         if (sc->sc_ioh_queue)
 192             bus_space_unmap(sc->sc_iot, sc->sc_ioh_queue, sc->sc_ios_queue);
 193
 194         return 0;
 195 }
 196
 197 void
 198 amusbss_map_dma(int node)
 199 {
 200         /* XXX TODO */
 201 }