| 1 | (pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort2.dsn"\r |
| 2 | (parser\r |
| 3 | (string_quote ")\r |
| 4 | (space_in_quoted_tokens on)\r |
| 5 | (host_cad "KiCad's Pcbnew")\r |
| 6 | (host_version "(5.0.1)-3")\r |
| 7 | )\r |
| 8 | (resolution um 10)\r |
| 9 | (unit um)\r |
| 10 | (structure\r |
| 11 | (layer F.Cu\r |
| 12 | (type signal)\r |
| 13 | (property\r |
| 14 | (index 0)\r |
| 15 | )\r |
| 16 | )\r |
| 17 | (layer In1.Cu\r |
| 18 | (type signal)\r |
| 19 | (property\r |
| 20 | (index 1)\r |
| 21 | )\r |
| 22 | )\r |
| 23 | (layer In2.Cu\r |
| 24 | (type signal)\r |
| 25 | (property\r |
| 26 | (index 2)\r |
| 27 | )\r |
| 28 | )\r |
| 29 | (layer B.Cu\r |
| 30 | (type signal)\r |
| 31 | (property\r |
| 32 | (index 3)\r |
| 33 | )\r |
| 34 | )\r |
| 35 | (boundary\r |
| 36 | (path pcb 0 135420 -64287.4 153200 -64287.4 153200 -49682.4 169075 -49682.4\r |
| 37 | 169075 -116357 168995 -117779 168757 -119183 168362 -120552\r |
| 38 | 167817 -121868 167128 -123114 166304 -124276 165355 -125338\r |
| 39 | 164293 -126287 163132 -127111 161885 -127800 160570 -128345\r |
| 40 | 159201 -128739 157797 -128978 156375 -129057 127165 -129057\r |
| 41 | 125743 -128978 124339 -128739 122971 -128345 121655 -127800\r |
| 42 | 120408 -127111 119247 -126287 118185 -125338 117236 -124276\r |
| 43 | 116412 -123114 115723 -121868 115178 -120552 114784 -119183\r |
| 44 | 114545 -117779 114465 -116357 114465 -49047.4 114543 -48054\r |
| 45 | 114776 -47085.1 115157 -46164.6 115678 -45315 116325 -44557.3\r |
| 46 | 117083 -43910.1 117932 -43389.5 118853 -43008.2 119822 -42775.6\r |
| 47 | 120815 -42697.4 135420 -42697.4 135420 -64287.4)\r |
| 48 | )\r |
| 49 | (via "Via[0-3]_600:400_um")\r |
| 50 | (rule\r |
| 51 | (width 250)\r |
| 52 | (clearance 200.1)\r |
| 53 | (clearance 200.1 (type default_smd))\r |
| 54 | (clearance 50 (type smd_smd))\r |
| 55 | )\r |
| 56 | )\r |
| 57 | (placement\r |
| 58 | (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r |
| 59 | (place P8 164630 -62382.4 front 0 (PN BeagleBone_Black_Header))\r |
| 60 | (place P9 116370 -62382.4 front 0 (PN BeagleBone_Black_Header))\r |
| 61 | )\r |
| 62 | (component "DIP254P762X508-16N:DIP254P762X508-16N"\r |
| 63 | (place U1 143040 -34442.4 front 0 (PN 4504))\r |
| 64 | (place U2 196825 -61517.5 front 0 (PN 4504))\r |
| 65 | )\r |
| 66 | (component "SN74HC166N:DIP254P762X508-16"\r |
| 67 | (place U3 228130 -36982.4 front 0 (PN 74166))\r |
| 68 | )\r |
| 69 | )\r |
| 70 | (library\r |
| 71 | (image Socket_BeagleBone_Black:Socket_BeagleBone_Black\r |
| 72 | (outline (path signal 150 -1550 1550 -1550 0))\r |
| 73 | (outline (path signal 150 1270 -1270 -1270 -1270))\r |
| 74 | (outline (path signal 150 1270 1270 1270 -1270))\r |
| 75 | (outline (path signal 150 0 1550 -1550 1550))\r |
| 76 | (outline (path signal 150 3810 1270 1270 1270))\r |
| 77 | (outline (path signal 150 3810 -57150 -1270 -57150))\r |
| 78 | (outline (path signal 150 -1270 -57150 -1270 -1270))\r |
| 79 | (outline (path signal 150 3810 -57150 3810 1270))\r |
| 80 | (outline (path signal 50 -1750 -57650 4300 -57650))\r |
| 81 | (outline (path signal 50 -1750 1750 4300 1750))\r |
| 82 | (outline (path signal 50 4300 1750 4300 -57650))\r |
| 83 | (outline (path signal 50 -1750 1750 -1750 -57650))\r |
| 84 | (pin Oval[A]Pad_1727.2x1727.2_um 46 2540 -55880)\r |
| 85 | (pin Oval[A]Pad_1727.2x1727.2_um 45 0 -55880)\r |
| 86 | (pin Oval[A]Pad_1727.2x1727.2_um 44 2540 -53340)\r |
| 87 | (pin Oval[A]Pad_1727.2x1727.2_um 43 0 -53340)\r |
| 88 | (pin Oval[A]Pad_1727.2x1727.2_um 42 2540 -50800)\r |
| 89 | (pin Oval[A]Pad_1727.2x1727.2_um 41 0 -50800)\r |
| 90 | (pin Oval[A]Pad_1727.2x1727.2_um 40 2540 -48260)\r |
| 91 | (pin Oval[A]Pad_1727.2x1727.2_um 39 0 -48260)\r |
| 92 | (pin Oval[A]Pad_1727.2x1727.2_um 38 2540 -45720)\r |
| 93 | (pin Oval[A]Pad_1727.2x1727.2_um 37 0 -45720)\r |
| 94 | (pin Oval[A]Pad_1727.2x1727.2_um 36 2540 -43180)\r |
| 95 | (pin Oval[A]Pad_1727.2x1727.2_um 35 0 -43180)\r |
| 96 | (pin Oval[A]Pad_1727.2x1727.2_um 34 2540 -40640)\r |
| 97 | (pin Oval[A]Pad_1727.2x1727.2_um 33 0 -40640)\r |
| 98 | (pin Oval[A]Pad_1727.2x1727.2_um 32 2540 -38100)\r |
| 99 | (pin Oval[A]Pad_1727.2x1727.2_um 31 0 -38100)\r |
| 100 | (pin Oval[A]Pad_1727.2x1727.2_um 30 2540 -35560)\r |
| 101 | (pin Oval[A]Pad_1727.2x1727.2_um 29 0 -35560)\r |
| 102 | (pin Oval[A]Pad_1727.2x1727.2_um 28 2540 -33020)\r |
| 103 | (pin Oval[A]Pad_1727.2x1727.2_um 27 0 -33020)\r |
| 104 | (pin Oval[A]Pad_1727.2x1727.2_um 26 2540 -30480)\r |
| 105 | (pin Oval[A]Pad_1727.2x1727.2_um 25 0 -30480)\r |
| 106 | (pin Oval[A]Pad_1727.2x1727.2_um 24 2540 -27940)\r |
| 107 | (pin Oval[A]Pad_1727.2x1727.2_um 23 0 -27940)\r |
| 108 | (pin Oval[A]Pad_1727.2x1727.2_um 22 2540 -25400)\r |
| 109 | (pin Oval[A]Pad_1727.2x1727.2_um 21 0 -25400)\r |
| 110 | (pin Oval[A]Pad_1727.2x1727.2_um 20 2540 -22860)\r |
| 111 | (pin Oval[A]Pad_1727.2x1727.2_um 19 0 -22860)\r |
| 112 | (pin Oval[A]Pad_1727.2x1727.2_um 18 2540 -20320)\r |
| 113 | (pin Oval[A]Pad_1727.2x1727.2_um 17 0 -20320)\r |
| 114 | (pin Oval[A]Pad_1727.2x1727.2_um 16 2540 -17780)\r |
| 115 | (pin Oval[A]Pad_1727.2x1727.2_um 15 0 -17780)\r |
| 116 | (pin Oval[A]Pad_1727.2x1727.2_um 14 2540 -15240)\r |
| 117 | (pin Oval[A]Pad_1727.2x1727.2_um 13 0 -15240)\r |
| 118 | (pin Oval[A]Pad_1727.2x1727.2_um 12 2540 -12700)\r |
| 119 | (pin Oval[A]Pad_1727.2x1727.2_um 11 0 -12700)\r |
| 120 | (pin Oval[A]Pad_1727.2x1727.2_um 10 2540 -10160)\r |
| 121 | (pin Oval[A]Pad_1727.2x1727.2_um 9 0 -10160)\r |
| 122 | (pin Oval[A]Pad_1727.2x1727.2_um 8 2540 -7620)\r |
| 123 | (pin Oval[A]Pad_1727.2x1727.2_um 7 0 -7620)\r |
| 124 | (pin Oval[A]Pad_1727.2x1727.2_um 6 2540 -5080)\r |
| 125 | (pin Oval[A]Pad_1727.2x1727.2_um 5 0 -5080)\r |
| 126 | (pin Oval[A]Pad_1727.2x1727.2_um 4 2540 -2540)\r |
| 127 | (pin Oval[A]Pad_1727.2x1727.2_um 3 0 -2540)\r |
| 128 | (pin Oval[A]Pad_1727.2x1727.2_um 2 2540 0)\r |
| 129 | (pin Rect[A]Pad_1727.2x1727.2_um 1 0 0)\r |
| 130 | )\r |
| 131 | (image "DIP254P762X508-16N:DIP254P762X508-16N"\r |
| 132 | (outline (path signal 0 -7112 18745.2 -7112 -965.2))\r |
| 133 | (outline (path signal 0 -4114.8 18745.2 -7112 18745.2))\r |
| 134 | (outline (path signal 0 -3505.2 18745.2 -4114.8 18745.2))\r |
| 135 | (outline (path signal 0 -508 18745.2 -3505.2 18745.2))\r |
| 136 | (outline (path signal 0 -508 -965.2 -508 18745.2))\r |
| 137 | (outline (path signal 0 -7112 -965.2 -508 -965.2))\r |
| 138 | (outline (path signal 0 558.8 18338.8 -508 18338.8))\r |
| 139 | (outline (path signal 0 558.8 17221.2 558.8 18338.8))\r |
| 140 | (outline (path signal 0 -508 17221.2 558.8 17221.2))\r |
| 141 | (outline (path signal 0 -508 18338.8 -508 17221.2))\r |
| 142 | (outline (path signal 0 558.8 15798.8 -508 15798.8))\r |
| 143 | (outline (path signal 0 558.8 14681.2 558.8 15798.8))\r |
| 144 | (outline (path signal 0 -508 14681.2 558.8 14681.2))\r |
| 145 | (outline (path signal 0 -508 15798.8 -508 14681.2))\r |
| 146 | (outline (path signal 0 558.8 13258.8 -508 13258.8))\r |
| 147 | (outline (path signal 0 558.8 12141.2 558.8 13258.8))\r |
| 148 | (outline (path signal 0 -508 12141.2 558.8 12141.2))\r |
| 149 | (outline (path signal 0 -508 13258.8 -508 12141.2))\r |
| 150 | (outline (path signal 0 558.8 10718.8 -508 10718.8))\r |
| 151 | (outline (path signal 0 558.8 9601.2 558.8 10718.8))\r |
| 152 | (outline (path signal 0 -508 9601.2 558.8 9601.2))\r |
| 153 | (outline (path signal 0 -508 10718.8 -508 9601.2))\r |
| 154 | (outline (path signal 0 558.8 8178.8 -508 8178.8))\r |
| 155 | (outline (path signal 0 558.8 7061.2 558.8 8178.8))\r |
| 156 | (outline (path signal 0 -508 7061.2 558.8 7061.2))\r |
| 157 | (outline (path signal 0 -508 8178.8 -508 7061.2))\r |
| 158 | (outline (path signal 0 558.8 5638.8 -508 5638.8))\r |
| 159 | (outline (path signal 0 558.8 4521.2 558.8 5638.8))\r |
| 160 | (outline (path signal 0 -508 4521.2 558.8 4521.2))\r |
| 161 | (outline (path signal 0 -508 5638.8 -508 4521.2))\r |
| 162 | (outline (path signal 0 558.8 3098.8 -508 3098.8))\r |
| 163 | (outline (path signal 0 558.8 1981.2 558.8 3098.8))\r |
| 164 | (outline (path signal 0 -508 1981.2 558.8 1981.2))\r |
| 165 | (outline (path signal 0 -508 3098.8 -508 1981.2))\r |
| 166 | (outline (path signal 0 558.8 558.8 -508 558.8))\r |
| 167 | (outline (path signal 0 558.8 -558.8 558.8 558.8))\r |
| 168 | (outline (path signal 0 -508 -558.8 558.8 -558.8))\r |
| 169 | (outline (path signal 0 -508 558.8 -508 -558.8))\r |
| 170 | (outline (path signal 0 -8178.8 -558.8 -7112 -558.8))\r |
| 171 | (outline (path signal 0 -8178.8 558.8 -8178.8 -558.8))\r |
| 172 | (outline (path signal 0 -7112 558.8 -8178.8 558.8))\r |
| 173 | (outline (path signal 0 -7112 -558.8 -7112 558.8))\r |
| 174 | (outline (path signal 0 -8178.8 1981.2 -7112 1981.2))\r |
| 175 | (outline (path signal 0 -8178.8 3098.8 -8178.8 1981.2))\r |
| 176 | (outline (path signal 0 -7112 3098.8 -8178.8 3098.8))\r |
| 177 | (outline (path signal 0 -7112 1981.2 -7112 3098.8))\r |
| 178 | (outline (path signal 0 -8178.8 4521.2 -7112 4521.2))\r |
| 179 | (outline (path signal 0 -8178.8 5638.8 -8178.8 4521.2))\r |
| 180 | (outline (path signal 0 -7112 5638.8 -8178.8 5638.8))\r |
| 181 | (outline (path signal 0 -7112 4521.2 -7112 5638.8))\r |
| 182 | (outline (path signal 0 -8178.8 7061.2 -7112 7061.2))\r |
| 183 | (outline (path signal 0 -8178.8 8178.8 -8178.8 7061.2))\r |
| 184 | (outline (path signal 0 -7112 8178.8 -8178.8 8178.8))\r |
| 185 | (outline (path signal 0 -7112 7061.2 -7112 8178.8))\r |
| 186 | (outline (path signal 0 -8178.8 9601.2 -7112 9601.2))\r |
| 187 | (outline (path signal 0 -8178.8 10718.8 -8178.8 9601.2))\r |
| 188 | (outline (path signal 0 -7112 10718.8 -8178.8 10718.8))\r |
| 189 | (outline (path signal 0 -7112 9601.2 -7112 10718.8))\r |
| 190 | (outline (path signal 0 -8178.8 12141.2 -7112 12141.2))\r |
| 191 | (outline (path signal 0 -8178.8 13258.8 -8178.8 12141.2))\r |
| 192 | (outline (path signal 0 -7112 13258.8 -8178.8 13258.8))\r |
| 193 | (outline (path signal 0 -7112 12141.2 -7112 13258.8))\r |
| 194 | (outline (path signal 0 -8178.8 14681.2 -7112 14681.2))\r |
| 195 | (outline (path signal 0 -8178.8 15798.8 -8178.8 14681.2))\r |
| 196 | (outline (path signal 0 -7112 15798.8 -8178.8 15798.8))\r |
| 197 | (outline (path signal 0 -7112 14681.2 -7112 15798.8))\r |
| 198 | (outline (path signal 0 -8178.8 17221.2 -7112 17221.2))\r |
| 199 | (outline (path signal 0 -8178.8 18338.8 -8178.8 17221.2))\r |
| 200 | (outline (path signal 0 -7112 18338.8 -8178.8 18338.8))\r |
| 201 | (outline (path signal 0 -7112 17221.2 -7112 18338.8))\r |
| 202 | (outline (path signal 152.4 -4114.8 18745.2 -6299.2 18745.2))\r |
| 203 | (outline (path signal 152.4 -3505.2 18745.2 -4114.8 18745.2))\r |
| 204 | (outline (path signal 152.4 -889 18745.2 -3505.2 18745.2))\r |
| 205 | (outline (path signal 152.4 -6731 -965.2 -889 -965.2))\r |
| 206 | (pin Round[A]Pad_1676.4_um 16 0 17780)\r |
| 207 | (pin Round[A]Pad_1676.4_um 15 0 15240)\r |
| 208 | (pin Round[A]Pad_1676.4_um 14 0 12700)\r |
| 209 | (pin Round[A]Pad_1676.4_um 13 0 10160)\r |
| 210 | (pin Round[A]Pad_1676.4_um 12 0 7620)\r |
| 211 | (pin Round[A]Pad_1676.4_um 11 0 5080)\r |
| 212 | (pin Round[A]Pad_1676.4_um 10 0 2540)\r |
| 213 | (pin Round[A]Pad_1676.4_um 9 0 0)\r |
| 214 | (pin Round[A]Pad_1676.4_um 8 -7620 0)\r |
| 215 | (pin Round[A]Pad_1676.4_um 7 -7620 2540)\r |
| 216 | (pin Round[A]Pad_1676.4_um 6 -7620 5080)\r |
| 217 | (pin Round[A]Pad_1676.4_um 5 -7620 7620)\r |
| 218 | (pin Round[A]Pad_1676.4_um 4 -7620 10160)\r |
| 219 | (pin Round[A]Pad_1676.4_um 3 -7620 12700)\r |
| 220 | (pin Round[A]Pad_1676.4_um 2 -7620 15240)\r |
| 221 | (pin Rect[A]Pad_1676.4x1676.4_um 1 -7620 17780)\r |
| 222 | )\r |
| 223 | (image "SN74HC166N:DIP254P762X508-16"\r |
| 224 | (outline (path signal 152.4 -7112 18745.2 -7112 -965.2))\r |
| 225 | (outline (path signal 152.4 -4114.8 18745.2 -7112 18745.2))\r |
| 226 | (outline (path signal 152.4 -3505.2 18745.2 -4114.8 18745.2))\r |
| 227 | (outline (path signal 152.4 -508 18745.2 -3505.2 18745.2))\r |
| 228 | (outline (path signal 152.4 -508 -965.2 -508 18745.2))\r |
| 229 | (outline (path signal 152.4 -7112 -965.2 -508 -965.2))\r |
| 230 | (outline (path signal 152.4 558.8 18338.8 -508 18338.8))\r |
| 231 | (outline (path signal 152.4 558.8 17221.2 558.8 18338.8))\r |
| 232 | (outline (path signal 152.4 -508 17221.2 558.8 17221.2))\r |
| 233 | (outline (path signal 152.4 -508 18338.8 -508 17221.2))\r |
| 234 | (outline (path signal 152.4 558.8 15798.8 -508 15798.8))\r |
| 235 | (outline (path signal 152.4 558.8 14681.2 558.8 15798.8))\r |
| 236 | (outline (path signal 152.4 -508 14681.2 558.8 14681.2))\r |
| 237 | (outline (path signal 152.4 -508 15798.8 -508 14681.2))\r |
| 238 | (outline (path signal 152.4 558.8 13258.8 -508 13258.8))\r |
| 239 | (outline (path signal 152.4 558.8 12141.2 558.8 13258.8))\r |
| 240 | (outline (path signal 152.4 -508 12141.2 558.8 12141.2))\r |
| 241 | (outline (path signal 152.4 -508 13258.8 -508 12141.2))\r |
| 242 | (outline (path signal 152.4 558.8 10718.8 -508 10718.8))\r |
| 243 | (outline (path signal 152.4 558.8 9601.2 558.8 10718.8))\r |
| 244 | (outline (path signal 152.4 -508 9601.2 558.8 9601.2))\r |
| 245 | (outline (path signal 152.4 -508 10718.8 -508 9601.2))\r |
| 246 | (outline (path signal 152.4 558.8 8178.8 -508 8178.8))\r |
| 247 | (outline (path signal 152.4 558.8 7061.2 558.8 8178.8))\r |
| 248 | (outline (path signal 152.4 -508 7061.2 558.8 7061.2))\r |
| 249 | (outline (path signal 152.4 -508 8178.8 -508 7061.2))\r |
| 250 | (outline (path signal 152.4 558.8 5638.8 -508 5638.8))\r |
| 251 | (outline (path signal 152.4 558.8 4521.2 558.8 5638.8))\r |
| 252 | (outline (path signal 152.4 -508 4521.2 558.8 4521.2))\r |
| 253 | (outline (path signal 152.4 -508 5638.8 -508 4521.2))\r |
| 254 | (outline (path signal 152.4 558.8 3098.8 -508 3098.8))\r |
| 255 | (outline (path signal 152.4 558.8 1981.2 558.8 3098.8))\r |
| 256 | (outline (path signal 152.4 -508 1981.2 558.8 1981.2))\r |
| 257 | (outline (path signal 152.4 -508 3098.8 -508 1981.2))\r |
| 258 | (outline (path signal 152.4 558.8 558.8 -508 558.8))\r |
| 259 | (outline (path signal 152.4 558.8 -558.8 558.8 558.8))\r |
| 260 | (outline (path signal 152.4 -508 -558.8 558.8 -558.8))\r |
| 261 | (outline (path signal 152.4 -508 558.8 -508 -558.8))\r |
| 262 | (outline (path signal 152.4 -8178.8 -558.8 -7112 -558.8))\r |
| 263 | (outline (path signal 152.4 -8178.8 558.8 -8178.8 -558.8))\r |
| 264 | (outline (path signal 152.4 -7112 558.8 -8178.8 558.8))\r |
| 265 | (outline (path signal 152.4 -7112 -558.8 -7112 558.8))\r |
| 266 | (outline (path signal 152.4 -8178.8 1981.2 -7112 1981.2))\r |
| 267 | (outline (path signal 152.4 -8178.8 3098.8 -8178.8 1981.2))\r |
| 268 | (outline (path signal 152.4 -7112 3098.8 -8178.8 3098.8))\r |
| 269 | (outline (path signal 152.4 -7112 1981.2 -7112 3098.8))\r |
| 270 | (outline (path signal 152.4 -8178.8 4521.2 -7112 4521.2))\r |
| 271 | (outline (path signal 152.4 -8178.8 5638.8 -8178.8 4521.2))\r |
| 272 | (outline (path signal 152.4 -7112 5638.8 -8178.8 5638.8))\r |
| 273 | (outline (path signal 152.4 -7112 4521.2 -7112 5638.8))\r |
| 274 | (outline (path signal 152.4 -8178.8 7061.2 -7112 7061.2))\r |
| 275 | (outline (path signal 152.4 -8178.8 8178.8 -8178.8 7061.2))\r |
| 276 | (outline (path signal 152.4 -7112 8178.8 -8178.8 8178.8))\r |
| 277 | (outline (path signal 152.4 -7112 7061.2 -7112 8178.8))\r |
| 278 | (outline (path signal 152.4 -8178.8 9601.2 -7112 9601.2))\r |
| 279 | (outline (path signal 152.4 -8178.8 10718.8 -8178.8 9601.2))\r |
| 280 | (outline (path signal 152.4 -7112 10718.8 -8178.8 10718.8))\r |
| 281 | (outline (path signal 152.4 -7112 9601.2 -7112 10718.8))\r |
| 282 | (outline (path signal 152.4 -8178.8 12141.2 -7112 12141.2))\r |
| 283 | (outline (path signal 152.4 -8178.8 13258.8 -8178.8 12141.2))\r |
| 284 | (outline (path signal 152.4 -7112 13258.8 -8178.8 13258.8))\r |
| 285 | (outline (path signal 152.4 -7112 12141.2 -7112 13258.8))\r |
| 286 | (outline (path signal 152.4 -8178.8 14681.2 -7112 14681.2))\r |
| 287 | (outline (path signal 152.4 -8178.8 15798.8 -8178.8 14681.2))\r |
| 288 | (outline (path signal 152.4 -7112 15798.8 -8178.8 15798.8))\r |
| 289 | (outline (path signal 152.4 -7112 14681.2 -7112 15798.8))\r |
| 290 | (outline (path signal 152.4 -8178.8 17221.2 -7112 17221.2))\r |
| 291 | (outline (path signal 152.4 -8178.8 18338.8 -8178.8 17221.2))\r |
| 292 | (outline (path signal 152.4 -7112 18338.8 -8178.8 18338.8))\r |
| 293 | (outline (path signal 152.4 -7112 17221.2 -7112 18338.8))\r |
| 294 | (outline (path signal 152.4 -4114.8 18745.2 -6299.2 18745.2))\r |
| 295 | (outline (path signal 152.4 -3505.2 18745.2 -4114.8 18745.2))\r |
| 296 | (outline (path signal 152.4 -889 18745.2 -3505.2 18745.2))\r |
| 297 | (outline (path signal 152.4 -6731 -965.2 -889 -965.2))\r |
| 298 | (pin Round[A]Pad_1676.4_um 16 0 17780)\r |
| 299 | (pin Round[A]Pad_1676.4_um 15 0 15240)\r |
| 300 | (pin Round[A]Pad_1676.4_um 14 0 12700)\r |
| 301 | (pin Round[A]Pad_1676.4_um 13 0 10160)\r |
| 302 | (pin Round[A]Pad_1676.4_um 12 0 7620)\r |
| 303 | (pin Round[A]Pad_1676.4_um 11 0 5080)\r |
| 304 | (pin Round[A]Pad_1676.4_um 10 0 2540)\r |
| 305 | (pin Round[A]Pad_1676.4_um 9 0 0)\r |
| 306 | (pin Round[A]Pad_1676.4_um 8 -7620 0)\r |
| 307 | (pin Round[A]Pad_1676.4_um 7 -7620 2540)\r |
| 308 | (pin Round[A]Pad_1676.4_um 6 -7620 5080)\r |
| 309 | (pin Round[A]Pad_1676.4_um 5 -7620 7620)\r |
| 310 | (pin Round[A]Pad_1676.4_um 4 -7620 10160)\r |
| 311 | (pin Round[A]Pad_1676.4_um 3 -7620 12700)\r |
| 312 | (pin Round[A]Pad_1676.4_um 2 -7620 15240)\r |
| 313 | (pin Rect[A]Pad_1676.4x1676.4_um 1 -7620 17780)\r |
| 314 | )\r |
| 315 | (padstack Round[A]Pad_1676.4_um\r |
| 316 | (shape (circle F.Cu 1676.4))\r |
| 317 | (shape (circle In1.Cu 1676.4))\r |
| 318 | (shape (circle In2.Cu 1676.4))\r |
| 319 | (shape (circle B.Cu 1676.4))\r |
| 320 | (attach off)\r |
| 321 | )\r |
| 322 | (padstack Oval[A]Pad_1727.2x1727.2_um\r |
| 323 | (shape (path F.Cu 1727.2 0 0 0 0))\r |
| 324 | (shape (path In1.Cu 1727.2 0 0 0 0))\r |
| 325 | (shape (path In2.Cu 1727.2 0 0 0 0))\r |
| 326 | (shape (path B.Cu 1727.2 0 0 0 0))\r |
| 327 | (attach off)\r |
| 328 | )\r |
| 329 | (padstack Rect[A]Pad_1676.4x1676.4_um\r |
| 330 | (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r |
| 331 | (shape (rect In1.Cu -838.2 -838.2 838.2 838.2))\r |
| 332 | (shape (rect In2.Cu -838.2 -838.2 838.2 838.2))\r |
| 333 | (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r |
| 334 | (attach off)\r |
| 335 | )\r |
| 336 | (padstack Rect[A]Pad_1727.2x1727.2_um\r |
| 337 | (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r |
| 338 | (shape (rect In1.Cu -863.6 -863.6 863.6 863.6))\r |
| 339 | (shape (rect In2.Cu -863.6 -863.6 863.6 863.6))\r |
| 340 | (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r |
| 341 | (attach off)\r |
| 342 | )\r |
| 343 | (padstack "Via[0-3]_600:400_um"\r |
| 344 | (shape (circle F.Cu 600))\r |
| 345 | (shape (circle In1.Cu 600))\r |
| 346 | (shape (circle In2.Cu 600))\r |
| 347 | (shape (circle B.Cu 600))\r |
| 348 | (attach off)\r |
| 349 | )\r |
| 350 | )\r |
| 351 | (network\r |
| 352 | (net "Net-(P8-Pad3)"\r |
| 353 | (pins P8-3)\r |
| 354 | )\r |
| 355 | (net "Net-(P8-Pad6)"\r |
| 356 | (pins P8-6)\r |
| 357 | )\r |
| 358 | (net "Net-(P8-Pad7)"\r |
| 359 | (pins P8-7)\r |
| 360 | )\r |
| 361 | (net "Net-(P8-Pad8)"\r |
| 362 | (pins P8-8)\r |
| 363 | )\r |
| 364 | (net "Net-(P8-Pad9)"\r |
| 365 | (pins P8-9)\r |
| 366 | )\r |
| 367 | (net "Net-(P8-Pad10)"\r |
| 368 | (pins P8-10)\r |
| 369 | )\r |
| 370 | (net "Net-(P8-Pad12)"\r |
| 371 | (pins P8-12)\r |
| 372 | )\r |
| 373 | (net "Net-(P8-Pad13)"\r |
| 374 | (pins P8-13)\r |
| 375 | )\r |
| 376 | (net "Net-(P8-Pad14)"\r |
| 377 | (pins P8-14)\r |
| 378 | )\r |
| 379 | (net "Net-(P8-Pad16)"\r |
| 380 | (pins P8-16)\r |
| 381 | )\r |
| 382 | (net "Net-(P8-Pad18)"\r |
| 383 | (pins P8-18)\r |
| 384 | )\r |
| 385 | (net "Net-(P8-Pad19)"\r |
| 386 | (pins P8-19)\r |
| 387 | )\r |
| 388 | (net "Net-(P8-Pad20)"\r |
| 389 | (pins P8-20)\r |
| 390 | )\r |
| 391 | (net "Net-(P8-Pad21)"\r |
| 392 | (pins P8-21)\r |
| 393 | )\r |
| 394 | (net "Net-(P8-Pad22)"\r |
| 395 | (pins P8-22)\r |
| 396 | )\r |
| 397 | (net "Net-(P8-Pad23)"\r |
| 398 | (pins P8-23)\r |
| 399 | )\r |
| 400 | (net "Net-(P8-Pad24)"\r |
| 401 | (pins P8-24)\r |
| 402 | )\r |
| 403 | (net "Net-(P8-Pad25)"\r |
| 404 | (pins P8-25)\r |
| 405 | )\r |
| 406 | (net "Net-(P8-Pad26)"\r |
| 407 | (pins P8-26)\r |
| 408 | )\r |
| 409 | (net "Net-(P8-Pad27)"\r |
| 410 | (pins P8-27)\r |
| 411 | )\r |
| 412 | (net "Net-(P8-Pad28)"\r |
| 413 | (pins P8-28)\r |
| 414 | )\r |
| 415 | (net "Net-(P8-Pad29)"\r |
| 416 | (pins P8-29)\r |
| 417 | )\r |
| 418 | (net "Net-(P8-Pad30)"\r |
| 419 | (pins P8-30)\r |
| 420 | )\r |
| 421 | (net "Net-(P8-Pad31)"\r |
| 422 | (pins P8-31)\r |
| 423 | )\r |
| 424 | (net "Net-(P8-Pad32)"\r |
| 425 | (pins P8-32)\r |
| 426 | )\r |
| 427 | (net "Net-(P8-Pad33)"\r |
| 428 | (pins P8-33)\r |
| 429 | )\r |
| 430 | (net "Net-(P8-Pad34)"\r |
| 431 | (pins P8-34)\r |
| 432 | )\r |
| 433 | (net "Net-(P8-Pad35)"\r |
| 434 | (pins P8-35)\r |
| 435 | )\r |
| 436 | (net "Net-(P8-Pad36)"\r |
| 437 | (pins P8-36)\r |
| 438 | )\r |
| 439 | (net "Net-(P8-Pad37)"\r |
| 440 | (pins P8-37)\r |
| 441 | )\r |
| 442 | (net "Net-(P8-Pad38)"\r |
| 443 | (pins P8-38)\r |
| 444 | )\r |
| 445 | (net "Net-(P8-Pad39)"\r |
| 446 | (pins P8-39)\r |
| 447 | )\r |
| 448 | (net "Net-(P8-Pad40)"\r |
| 449 | (pins P8-40)\r |
| 450 | )\r |
| 451 | (net "Net-(P8-Pad41)"\r |
| 452 | (pins P8-41)\r |
| 453 | )\r |
| 454 | (net "Net-(P8-Pad42)"\r |
| 455 | (pins P8-42)\r |
| 456 | )\r |
| 457 | (net "Net-(P8-Pad43)"\r |
| 458 | (pins P8-43)\r |
| 459 | )\r |
| 460 | (net "Net-(P8-Pad44)"\r |
| 461 | (pins P8-44)\r |
| 462 | )\r |
| 463 | (net "Net-(P8-Pad45)"\r |
| 464 | (pins P8-45)\r |
| 465 | )\r |
| 466 | (net "Net-(P8-Pad46)"\r |
| 467 | (pins P8-46)\r |
| 468 | )\r |
| 469 | (net "Net-(P9-Pad11)"\r |
| 470 | (pins P9-11)\r |
| 471 | )\r |
| 472 | (net "Net-(P9-Pad12)"\r |
| 473 | (pins P9-12)\r |
| 474 | )\r |
| 475 | (net "Net-(P9-Pad13)"\r |
| 476 | (pins P9-13)\r |
| 477 | )\r |
| 478 | (net "Net-(P9-Pad14)"\r |
| 479 | (pins P9-14)\r |
| 480 | )\r |
| 481 | (net "Net-(P9-Pad15)"\r |
| 482 | (pins P9-15)\r |
| 483 | )\r |
| 484 | (net "Net-(P9-Pad16)"\r |
| 485 | (pins P9-16)\r |
| 486 | )\r |
| 487 | (net "Net-(P9-Pad17)"\r |
| 488 | (pins P9-17)\r |
| 489 | )\r |
| 490 | (net "Net-(P9-Pad18)"\r |
| 491 | (pins P9-18)\r |
| 492 | )\r |
| 493 | (net "Net-(P9-Pad19)"\r |
| 494 | (pins P9-19)\r |
| 495 | )\r |
| 496 | (net "Net-(P9-Pad20)"\r |
| 497 | (pins P9-20)\r |
| 498 | )\r |
| 499 | (net "Net-(P9-Pad21)"\r |
| 500 | (pins P9-21)\r |
| 501 | )\r |
| 502 | (net "Net-(P9-Pad22)"\r |
| 503 | (pins P9-22)\r |
| 504 | )\r |
| 505 | (net "Net-(P9-Pad23)"\r |
| 506 | (pins P9-23)\r |
| 507 | )\r |
| 508 | (net "Net-(P9-Pad24)"\r |
| 509 | (pins P9-24)\r |
| 510 | )\r |
| 511 | (net "Net-(P9-Pad25)"\r |
| 512 | (pins P9-25)\r |
| 513 | )\r |
| 514 | (net "Net-(P9-Pad26)"\r |
| 515 | (pins P9-26)\r |
| 516 | )\r |
| 517 | (net "Net-(P9-Pad27)"\r |
| 518 | (pins P9-27)\r |
| 519 | )\r |
| 520 | (net "Net-(P9-Pad28)"\r |
| 521 | (pins P9-28)\r |
| 522 | )\r |
| 523 | (net "Net-(P9-Pad29)"\r |
| 524 | (pins P9-29)\r |
| 525 | )\r |
| 526 | (net "Net-(P9-Pad30)"\r |
| 527 | (pins P9-30)\r |
| 528 | )\r |
| 529 | (net "Net-(P9-Pad31)"\r |
| 530 | (pins P9-31)\r |
| 531 | )\r |
| 532 | (net "Net-(P9-Pad33)"\r |
| 533 | (pins P9-33)\r |
| 534 | )\r |
| 535 | (net "Net-(P9-Pad35)"\r |
| 536 | (pins P9-35)\r |
| 537 | )\r |
| 538 | (net "Net-(P9-Pad36)"\r |
| 539 | (pins P9-36)\r |
| 540 | )\r |
| 541 | (net "Net-(P9-Pad37)"\r |
| 542 | (pins P9-37)\r |
| 543 | )\r |
| 544 | (net "Net-(P9-Pad38)"\r |
| 545 | (pins P9-38)\r |
| 546 | )\r |
| 547 | (net "Net-(P9-Pad39)"\r |
| 548 | (pins P9-39)\r |
| 549 | )\r |
| 550 | (net "Net-(P9-Pad40)"\r |
| 551 | (pins P9-40)\r |
| 552 | )\r |
| 553 | (net "Net-(P9-Pad41)"\r |
| 554 | (pins P9-41)\r |
| 555 | )\r |
| 556 | (net "Net-(P9-Pad42)"\r |
| 557 | (pins P9-42)\r |
| 558 | )\r |
| 559 | (net GNDD\r |
| 560 | (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-13 U1-8 U2-13 U2-8 U3-8\r |
| 561 | U3-1)\r |
| 562 | )\r |
| 563 | (net +3V3\r |
| 564 | (pins P9-4 P9-3 U1-16 U2-1)\r |
| 565 | )\r |
| 566 | (net +5V\r |
| 567 | (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16)\r |
| 568 | )\r |
| 569 | (net PWR_BUT\r |
| 570 | (pins P9-9)\r |
| 571 | )\r |
| 572 | (net SYS_RESETN\r |
| 573 | (pins P9-10)\r |
| 574 | )\r |
| 575 | (net VDD_ADC\r |
| 576 | (pins P9-32)\r |
| 577 | )\r |
| 578 | (net GNDA_ADC\r |
| 579 | (pins P9-34)\r |
| 580 | )\r |
| 581 | (net /GPIO1_7_SR_QH\r |
| 582 | (pins P8-4 U1-2)\r |
| 583 | )\r |
| 584 | (net /GPIO1_2_SR_CLKINH\r |
| 585 | (pins P8-5 U2-5)\r |
| 586 | )\r |
| 587 | (net /GPIO1_13_SR_CLK\r |
| 588 | (pins P8-11 U2-3)\r |
| 589 | )\r |
| 590 | (net /GPIO1_15_SR_SHLD\r |
| 591 | (pins P8-15 U2-7)\r |
| 592 | )\r |
| 593 | (net /GPIO0_27_SR_CLR\r |
| 594 | (pins P8-17 U2-9)\r |
| 595 | )\r |
| 596 | (net "Net-(U1-Pad3)"\r |
| 597 | (pins U1-3 U3-13)\r |
| 598 | )\r |
| 599 | (net "Net-(U1-Pad4)"\r |
| 600 | (pins U1-4)\r |
| 601 | )\r |
| 602 | (net "Net-(U1-Pad5)"\r |
| 603 | (pins U1-5)\r |
| 604 | )\r |
| 605 | (net "Net-(U1-Pad6)"\r |
| 606 | (pins U1-6)\r |
| 607 | )\r |
| 608 | (net "Net-(U1-Pad7)"\r |
| 609 | (pins U1-7)\r |
| 610 | )\r |
| 611 | (net "Net-(U1-Pad9)"\r |
| 612 | (pins U1-9)\r |
| 613 | )\r |
| 614 | (net "Net-(U1-Pad10)"\r |
| 615 | (pins U1-10)\r |
| 616 | )\r |
| 617 | (net "Net-(U1-Pad11)"\r |
| 618 | (pins U1-11)\r |
| 619 | )\r |
| 620 | (net "Net-(U1-Pad12)"\r |
| 621 | (pins U1-12)\r |
| 622 | )\r |
| 623 | (net "Net-(U1-Pad14)"\r |
| 624 | (pins U1-14)\r |
| 625 | )\r |
| 626 | (net "Net-(U1-Pad15)"\r |
| 627 | (pins U1-15)\r |
| 628 | )\r |
| 629 | (net "Net-(U2-Pad15)"\r |
| 630 | (pins U2-15)\r |
| 631 | )\r |
| 632 | (net "Net-(U2-Pad14)"\r |
| 633 | (pins U2-14)\r |
| 634 | )\r |
| 635 | (net "Net-(U2-Pad12)"\r |
| 636 | (pins U2-12)\r |
| 637 | )\r |
| 638 | (net "Net-(U2-Pad11)"\r |
| 639 | (pins U2-11)\r |
| 640 | )\r |
| 641 | (net "Net-(U2-Pad10)"\r |
| 642 | (pins U2-10 U3-9)\r |
| 643 | )\r |
| 644 | (net "Net-(U2-Pad6)"\r |
| 645 | (pins U2-6 U3-15)\r |
| 646 | )\r |
| 647 | (net "Net-(U2-Pad4)"\r |
| 648 | (pins U2-4 U3-6)\r |
| 649 | )\r |
| 650 | (net "Net-(U2-Pad2)"\r |
| 651 | (pins U2-2 U3-7)\r |
| 652 | )\r |
| 653 | (net "Net-(U3-Pad2)"\r |
| 654 | (pins U3-2)\r |
| 655 | )\r |
| 656 | (net "Net-(U3-Pad3)"\r |
| 657 | (pins U3-3)\r |
| 658 | )\r |
| 659 | (net "Net-(U3-Pad4)"\r |
| 660 | (pins U3-4)\r |
| 661 | )\r |
| 662 | (net "Net-(U3-Pad5)"\r |
| 663 | (pins U3-5)\r |
| 664 | )\r |
| 665 | (net "Net-(U3-Pad10)"\r |
| 666 | (pins U3-10)\r |
| 667 | )\r |
| 668 | (net "Net-(U3-Pad11)"\r |
| 669 | (pins U3-11)\r |
| 670 | )\r |
| 671 | (net "Net-(U3-Pad12)"\r |
| 672 | (pins U3-12)\r |
| 673 | )\r |
| 674 | (net "Net-(U3-Pad14)"\r |
| 675 | (pins U3-14)\r |
| 676 | )\r |
| 677 | (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD\r |
| 678 | /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH GNDA_ADC GNDD "Net-(P8-Pad10)" "Net-(P8-Pad11)"\r |
| 679 | "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad15)"\r |
| 680 | "Net-(P8-Pad16)" "Net-(P8-Pad17)" "Net-(P8-Pad18)" "Net-(P8-Pad19)"\r |
| 681 | "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)"\r |
| 682 | "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)"\r |
| 683 | "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)"\r |
| 684 | "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)"\r |
| 685 | "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)"\r |
| 686 | "Net-(P8-Pad4)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)"\r |
| 687 | "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad5)" "Net-(P8-Pad6)"\r |
| 688 | "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)"\r |
| 689 | "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)"\r |
| 690 | "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)"\r |
| 691 | "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)"\r |
| 692 | "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)"\r |
| 693 | "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)"\r |
| 694 | "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)"\r |
| 695 | "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)"\r |
| 696 | "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)" "Net-(U1-Pad14)"\r |
| 697 | "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" "Net-(U1-Pad6)"\r |
| 698 | "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)" "Net-(U2-Pad12)"\r |
| 699 | "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)" "Net-(U2-Pad6)"\r |
| 700 | "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)"\r |
| 701 | "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PWR_BUT\r |
| 702 | SYS_5V SYS_RESETN VDD_ADC\r |
| 703 | (circuit\r |
| 704 | (use_via Via[0-3]_600:400_um)\r |
| 705 | )\r |
| 706 | (rule\r |
| 707 | (width 250)\r |
| 708 | (clearance 200.1)\r |
| 709 | )\r |
| 710 | )\r |
| 711 | )\r |
| 712 | (wiring\r |
| 713 | )\r |
| 714 | )\r |