From 51129dfe1cfe91dd2786e0b2c1d9bd5c36b9ff6a Mon Sep 17 00:00:00 2001 From: Ian Sutton Date: Fri, 28 Dec 2018 12:17:12 -0600 Subject: [PATCH] init --- .pretty/DIP254P762X508-16.kicad_mod | 100 + .pretty/NEW-640456-8.kicad_mod | 49 + 166new.pretty/DIP254P762X508-16.kicad_mod | 100 + 4605x.stp | 5008 ++ 4609x.stp | 7924 ++++ .../Socket_BeagleBone_Black.wings | Bin 0 -> 18132 bytes .../Socket_BeagleBone_Black.wrl | 21774 +++++++++ .../Socket_BeagleBone_Black.kicad_mod | 73 + _saved_bbb-bort.sch | 1969 + bbb-bort | 7 + bbb-bort-cache.dcm | 7 + bbb-bort-cache.lib | 418 + bbb-bort-f.dsn | 985 + bbb-bort-ff.bin | Bin 0 -> 239377 bytes bbb-bort-ff.dsn | 822 + bbb-bort-ff.ses | 0 bbb-bort-test.dsn | 1130 + bbb-bort.bak | 1967 + bbb-bort.dsn | 692 + bbb-bort.kicad_pcb | 2399 + bbb-bort.kicad_pcb-bak | 2319 + bbb-bort.net | 883 + bbb-bort.plt | 38368 ++++++++++++++++ bbb-bort.pro | 40 + bbb-bort.sch | 1969 + bbb-bort.xml | 1152 + bbb-bort10.dsn | 990 + bbb-bort10.rules | 93 + bbb-bort10.ses | 1008 + bbb-bort11.dsn | 9889 ++++ bbb-bort11.rules | 93 + bbb-bort11.ses | 2828 ++ bbb-bort12.dsn | 618 + bbb-bort12.rules | 79 + bbb-bort12.ses | 1100 + bbb-bort13.dsn | 920 + bbb-bort2.dsn | 714 + bbb-bort3.dsn | 791 + bbb-bort4.dsn | 793 + bbb-bort5.dsn | 793 + bbb-bort6.dsn | 875 + bbb-bort6.rules | 108 + bbb-bort6.ses | 453 + bbb-bort7.dsn | 855 + bbb-bort7.rules | 90 + bbb-bort7.ses | 474 + bbb-bort8.dsn | 1147 + bbb-bort8.rules | 113 + bbb-bort8.ses | 1048 + bbb-bort9.dsn | 1012 + bbb-bort9.rules | 111 + bbb-bort9.ses | 1005 + bom/ibom.html | 2385 + c-1-640456-8-aa-3d.stp | 6112 +++ fp-lib-table | 3 + hole/z_MountPTH_3mm.kicad_mod | 15 + pwr_BeagleBone.bck | 3 + pwr_BeagleBone.dcm | 3 + pwr_BeagleBone.lib | 47 + report.txt | 224 + sym-lib-table | 3 + 61 files changed, 126950 insertions(+) create mode 100644 .pretty/DIP254P762X508-16.kicad_mod create mode 100644 .pretty/NEW-640456-8.kicad_mod create mode 100644 166new.pretty/DIP254P762X508-16.kicad_mod create mode 100644 4605x.stp create mode 100644 4609x.stp create mode 100644 Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wings create mode 100644 Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl create mode 100644 Socket_BeagleBone_Black.pretty/Socket_BeagleBone_Black.kicad_mod create mode 100644 _saved_bbb-bort.sch create mode 100644 bbb-bort create mode 100644 bbb-bort-cache.dcm create mode 100644 bbb-bort-cache.lib create mode 100644 bbb-bort-f.dsn create mode 100644 bbb-bort-ff.bin create mode 100644 bbb-bort-ff.dsn create mode 100644 bbb-bort-ff.ses create mode 100644 bbb-bort-test.dsn create mode 100644 bbb-bort.bak create mode 100644 bbb-bort.dsn create mode 100644 bbb-bort.kicad_pcb create mode 100644 bbb-bort.kicad_pcb-bak create mode 100644 bbb-bort.net create mode 100644 bbb-bort.plt create mode 100644 bbb-bort.pro create mode 100644 bbb-bort.sch create mode 100644 bbb-bort.xml create mode 100644 bbb-bort10.dsn create mode 100644 bbb-bort10.rules create mode 100644 bbb-bort10.ses create mode 100644 bbb-bort11.dsn create mode 100644 bbb-bort11.rules create mode 100644 bbb-bort11.ses create mode 100644 bbb-bort12.dsn create mode 100644 bbb-bort12.rules create mode 100644 bbb-bort12.ses create mode 100644 bbb-bort13.dsn create mode 100644 bbb-bort2.dsn create mode 100644 bbb-bort3.dsn create mode 100644 bbb-bort4.dsn create mode 100644 bbb-bort5.dsn create mode 100644 bbb-bort6.dsn create mode 100644 bbb-bort6.rules create mode 100644 bbb-bort6.ses create mode 100644 bbb-bort7.dsn create mode 100644 bbb-bort7.rules create mode 100644 bbb-bort7.ses create mode 100644 bbb-bort8.dsn create mode 100644 bbb-bort8.rules create mode 100644 bbb-bort8.ses create mode 100644 bbb-bort9.dsn create mode 100644 bbb-bort9.rules create mode 100644 bbb-bort9.ses create mode 100644 bom/ibom.html create mode 100644 c-1-640456-8-aa-3d.stp create mode 100644 fp-lib-table create mode 100644 hole/z_MountPTH_3mm.kicad_mod create mode 100644 pwr_BeagleBone.bck create mode 100644 pwr_BeagleBone.dcm create mode 100644 pwr_BeagleBone.lib create mode 100644 report.txt create mode 100644 sym-lib-table diff --git a/.pretty/DIP254P762X508-16.kicad_mod b/.pretty/DIP254P762X508-16.kicad_mod new file mode 100644 index 0000000..1a88594 --- /dev/null +++ b/.pretty/DIP254P762X508-16.kicad_mod @@ -0,0 +1,100 @@ +(module DIP254P762X508-16 (layer F.Cu) (tedit 0) + (fp_text reference DIP254P762X508-16 (at -4.57835 -20.3229) (layer F.SilkS) + (effects (font (size 1.64228 1.64228) (thickness 0.05))) + ) + (fp_text value VAL** (at -4.32086 2.71959) (layer F.SilkS) + (effects (font (size 1.64108 1.64108) (thickness 0.05))) + ) + (fp_line (start -6.731 0.9652) (end -0.889 0.9652) (layer F.SilkS) (width 0.1524)) + (fp_line (start -0.889 -18.7452) (end -3.5052 -18.7452) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.5052 -18.7452) (end -4.1148 -18.7452) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.1148 -18.7452) (end -6.2992 -18.7452) (layer F.SilkS) (width 0.1524)) + (fp_arc (start -3.81 -18.7452) (end -4.1148 -18.7452) (angle -180) (layer F.SilkS) (width 0)) + (fp_line (start -7.112 -17.2212) (end -7.112 -18.3388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -18.3388) (end -8.1788 -18.3388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -18.3388) (end -8.1788 -17.2212) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -17.2212) (end -7.112 -17.2212) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -14.6812) (end -7.112 -15.7988) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -15.7988) (end -8.1788 -15.7988) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -15.7988) (end -8.1788 -14.6812) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -14.6812) (end -7.112 -14.6812) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -12.1412) (end -7.112 -13.2588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -13.2588) (end -8.1788 -13.2588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -13.2588) (end -8.1788 -12.1412) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -12.1412) (end -7.112 -12.1412) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -9.6012) (end -7.112 -10.7188) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -10.7188) (end -8.1788 -10.7188) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -10.7188) (end -8.1788 -9.6012) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -9.6012) (end -7.112 -9.6012) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -7.0612) (end -7.112 -8.1788) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -8.1788) (end -8.1788 -8.1788) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -8.1788) (end -8.1788 -7.0612) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -7.0612) (end -7.112 -7.0612) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -4.5212) (end -7.112 -5.6388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -5.6388) (end -8.1788 -5.6388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -5.6388) (end -8.1788 -4.5212) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -4.5212) (end -7.112 -4.5212) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -1.9812) (end -7.112 -3.0988) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -3.0988) (end -8.1788 -3.0988) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -3.0988) (end -8.1788 -1.9812) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -1.9812) (end -7.112 -1.9812) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 0.5588) (end -7.112 -0.5588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -0.5588) (end -8.1788 -0.5588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -0.5588) (end -8.1788 0.5588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 0.5588) (end -7.112 0.5588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -0.5588) (end -0.508 0.5588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 0.5588) (end 0.5588 0.5588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 0.5588) (end 0.5588 -0.5588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -0.5588) (end -0.508 -0.5588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -3.0988) (end -0.508 -1.9812) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -1.9812) (end 0.5588 -1.9812) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -1.9812) (end 0.5588 -3.0988) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -3.0988) (end -0.508 -3.0988) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -5.6388) (end -0.508 -4.5212) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -4.5212) (end 0.5588 -4.5212) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -4.5212) (end 0.5588 -5.6388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -5.6388) (end -0.508 -5.6388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -8.1788) (end -0.508 -7.0612) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -7.0612) (end 0.5588 -7.0612) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -7.0612) (end 0.5588 -8.1788) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -8.1788) (end -0.508 -8.1788) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -10.7188) (end -0.508 -9.6012) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -9.6012) (end 0.5588 -9.6012) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -9.6012) (end 0.5588 -10.7188) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -10.7188) (end -0.508 -10.7188) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -13.2588) (end -0.508 -12.1412) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -12.1412) (end 0.5588 -12.1412) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -12.1412) (end 0.5588 -13.2588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -13.2588) (end -0.508 -13.2588) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -15.7988) (end -0.508 -14.6812) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -14.6812) (end 0.5588 -14.6812) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -14.6812) (end 0.5588 -15.7988) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -15.7988) (end -0.508 -15.7988) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -18.3388) (end -0.508 -17.2212) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -17.2212) (end 0.5588 -17.2212) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -17.2212) (end 0.5588 -18.3388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 0.5588 -18.3388) (end -0.508 -18.3388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 0.9652) (end -0.508 0.9652) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 0.9652) (end -0.508 -18.7452) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -0.508 -18.7452) (end -3.5052 -18.7452) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -3.5052 -18.7452) (end -4.1148 -18.7452) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -4.1148 -18.7452) (end -7.112 -18.7452) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -18.7452) (end -7.112 0.9652) (layer Dwgs.User) (width 0.1524)) + (fp_arc (start -3.81 -18.7452) (end -4.1148 -18.7452) (angle -180) (layer Dwgs.User) (width 0)) + (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 2 thru_hole circle (at -7.62 -15.24) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 3 thru_hole circle (at -7.62 -12.7) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 4 thru_hole circle (at -7.62 -10.16) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 5 thru_hole circle (at -7.62 -7.62) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 6 thru_hole circle (at -7.62 -5.08) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 7 thru_hole circle (at -7.62 -2.54) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 8 thru_hole circle (at -7.62 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 9 thru_hole circle (at 0 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 10 thru_hole circle (at 0 -2.54) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 11 thru_hole circle (at 0 -5.08) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 12 thru_hole circle (at 0 -7.62) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 13 thru_hole circle (at 0 -10.16) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 14 thru_hole circle (at 0 -12.7) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 15 thru_hole circle (at 0 -15.24) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) + (pad 16 thru_hole circle (at 0 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)) +) diff --git a/.pretty/NEW-640456-8.kicad_mod b/.pretty/NEW-640456-8.kicad_mod new file mode 100644 index 0000000..5247e4d --- /dev/null +++ b/.pretty/NEW-640456-8.kicad_mod @@ -0,0 +1,49 @@ +(module NEW-640456-8 (layer F.Cu) (tedit 5C265171) + (fp_text reference REF** (at 8.89 0) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value CONN8_640456-8 (at 8.89 0) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0) (layer Cmts.User) + (effects (font (size 0.127 0.127) (thickness 0.002))) + ) + (fp_text user * (at 0 0) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user * (at 0 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 2.54) (end 19.177 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 -3.429) (end -1.397 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.397 -3.429) (end -1.397 2.54) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524)) + (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524)) + (pad 1 thru_hole circle (at 17.78 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) + (pad 2 thru_hole circle (at 15.24 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) + (pad 3 thru_hole circle (at 12.7 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) + (pad 4 thru_hole circle (at 10.16 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) + (pad 5 thru_hole circle (at 7.62 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) + (pad 6 thru_hole circle (at 5.08 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) + (pad 7 thru_hole circle (at 2.54 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) + (pad 8 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)) + (model ${KISYS3DMOD}/c-640456-8-aa-3d.stp + (offset (xyz 9 0.5 2.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) +) diff --git a/166new.pretty/DIP254P762X508-16.kicad_mod b/166new.pretty/DIP254P762X508-16.kicad_mod new file mode 100644 index 0000000..1a88594 --- /dev/null +++ b/166new.pretty/DIP254P762X508-16.kicad_mod @@ -0,0 +1,100 @@ +(module DIP254P762X508-16 (layer F.Cu) (tedit 0) + (fp_text reference DIP254P762X508-16 (at -4.57835 -20.3229) (layer F.SilkS) + (effects (font (size 1.64228 1.64228) (thickness 0.05))) + ) + (fp_text value VAL** (at -4.32086 2.71959) (layer F.SilkS) + (effects (font (size 1.64108 1.64108) (thickness 0.05))) + ) + (fp_line (start -6.731 0.9652) (end -0.889 0.9652) (layer F.SilkS) (width 0.1524)) + (fp_line (start -0.889 -18.7452) (end -3.5052 -18.7452) (layer F.SilkS) (width 0.1524)) + (fp_line (start -3.5052 -18.7452) (end -4.1148 -18.7452) (layer F.SilkS) (width 0.1524)) + (fp_line (start -4.1148 -18.7452) (end -6.2992 -18.7452) (layer F.SilkS) (width 0.1524)) + (fp_arc (start -3.81 -18.7452) (end -4.1148 -18.7452) (angle -180) (layer F.SilkS) (width 0)) + (fp_line (start -7.112 -17.2212) (end -7.112 -18.3388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -7.112 -18.3388) (end -8.1788 -18.3388) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 -18.3388) (end -8.1788 -17.2212) (layer Dwgs.User) (width 0.1524)) + (fp_line (start -8.1788 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(net a7r + (pins J1-2 U4-3 RN1-8) + ) + (net a8r + (pins J1-1 U4-2 RN1-9) + ) + (net b8r + (pins J2-1 U5-2 RN3-9) + ) + (net b7r + (pins J2-2 U5-3 RN3-8) + ) + (net b6r + (pins J2-3 U5-4 RN3-7) + ) + (net b5r + (pins J2-4 U5-5 RN3-6) + ) + (net b4r + (pins J2-5 U5-10 RN3-5) + ) + (net b3r + (pins J2-6 U5-11 RN3-4) + ) + (net b2r + (pins J2-7 U5-12 RN3-3) + ) + (net b1r + (pins J2-8 U5-14 RN3-2) + ) + (net c1r + (pins J3-8 U6-14 RN5-2) + ) + (net c2r + (pins J3-7 U6-12 RN5-3) + ) + (net c3r + (pins J3-6 U6-11 RN5-4) + ) + (net c4r + (pins J3-5 U6-10 RN5-5) + ) + (net c5r + (pins J3-4 U6-5 RN5-6) + ) + (net c6r + (pins J3-3 U6-4 RN5-7) + ) + (net c7r + (pins J3-2 U6-3 RN5-8) + ) + (net c8r + (pins J3-1 U6-2 RN5-9) + ) + (net d8r + (pins J4-1 U7-2 RN2-9) + ) + (net d7r + (pins J4-2 U7-3 RN2-8) + ) + (net d6r + (pins J4-3 U7-4 RN2-7) + ) + (net d5r + (pins J4-4 U7-5 RN2-6) + ) + (net d4r + (pins J4-5 U7-10 RN2-5) + ) + (net d3r + (pins J4-6 U7-11 RN2-4) + ) + (net d2r + (pins J4-7 U7-12 RN2-3) + ) + (net d1r + (pins J4-8 U7-14 RN2-2) + ) + (net f1r + (pins J6-8 U8-14 RN6-2) + ) + (net f2r + (pins J6-7 U8-12 RN6-3) + ) + (net f3r + (pins J6-6 U8-11 RN6-4) + ) + (net f4r + (pins J6-5 U8-10 RN6-5) + ) + (net f5r + (pins J6-4 U8-5 RN6-6) + ) + (net f6r + (pins J6-3 U8-4 RN6-7) + ) + (net f7r + (pins J6-2 U8-3 RN6-8) + ) + (net f8r + (pins J6-1 U8-2 RN6-9) + ) + (net "Net-(P8-Pad2)" + (pins P8-2) + ) + (net "Net-(P8-Pad1)" + (pins P8-1) + ) + (net GNDD + (pins P9-46 P9-45 P9-44 P9-43) + ) + (net GND + (pins U7-8 U7-1 U8-8 U8-1 U1-13 U1-8 U2-13 U2-8 U3-8 U3-1 U4-8 U4-1 U5-8 U5-1 + U6-8 U6-1 RN1-1 RN2-1 RN3-1 RN5-1 RN6-1 RN4-1 P9-2) + ) + (net "Net-(P9-Pad1)" + (pins P9-1) + ) + (class kicad_default "" +3V3 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T + BB3.3 GND GNDA_ADC GNDD "Net-(P8-Pad1)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" + "Net-(P8-Pad19)" "Net-(P8-Pad2)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" + "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" 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SR2_QH_T + (pins P8-6) + ) + (net +3V3 + (pins P9-4 P9-3) + ) + (net SR2_QH__T + (pins U1-4) + ) + (net SR2_QH + (pins U7-13 U1-5) + ) + (net SR3_QH + (pins U8-13 U1-7) + ) + (net SR4_QH + (pins U6-13 U1-9) + ) + (net SR5_QH + (pins U5-13 U1-11) + ) + (net SR6_QH + (pins U4-13 U1-14) + ) + (net 7SEG_DIO_T + (pins U2-15) + ) + (net 7SEG_CLK_T + (pins U2-12) + ) + (net e8r + (pins RN4-9 U3-2 J5-1) + ) + (net e7r + (pins RN4-8 U3-3 J5-2) + ) + (net e6r + (pins RN4-7 U3-4 J5-3) + ) + (net e5r + (pins RN4-6 U3-5 J5-4) + ) + (net e4r + (pins RN4-5 U3-10 J5-5) + ) + (net e3r + (pins RN4-4 U3-11 J5-6) + ) + (net e2r + (pins RN4-3 U3-12 J5-7) + ) + (net e1r + (pins RN4-2 U3-14 J5-8) + ) + (net a1r + (pins RN1-2 U4-14 J1-8) + ) + (net a2r + (pins RN1-3 U4-12 J1-7) + ) + (net a3r + (pins RN1-4 U4-11 J1-6) + ) + (net a4r + (pins RN1-5 U4-10 J1-5) + ) + (net a5r + (pins RN1-6 U4-5 J1-4) + ) + (net a6r + (pins RN1-7 U4-4 J1-3) + ) + (net a7r + (pins RN1-8 U4-3 J1-2) + ) + (net a8r + (pins RN1-9 U4-2 J1-1) + ) + (net b8r + (pins RN3-9 U5-2 J2-1) + ) + (net b7r + (pins RN3-8 U5-3 J2-2) + ) + (net b6r + (pins RN3-7 U5-4 J2-3) + ) + (net b5r + (pins RN3-6 U5-5 J2-4) + ) + (net b4r + (pins RN3-5 U5-10 J2-5) + ) + (net b3r + (pins RN3-4 U5-11 J2-6) + ) + (net b2r + (pins RN3-3 U5-12 J2-7) + ) + (net b1r + (pins RN3-2 U5-14 J2-8) + ) + (net c1r + (pins RN5-2 U6-14 J3-8) + ) + (net c2r + (pins RN5-3 U6-12 J3-7) + ) + (net c3r + (pins RN5-4 U6-11 J3-6) + ) + (net c4r + (pins RN5-5 U6-10 J3-5) + ) + (net c5r + (pins RN5-6 U6-5 J3-4) + ) + (net c6r + (pins RN5-7 U6-4 J3-3) + ) + (net c7r + (pins RN5-8 U6-3 J3-2) + ) + (net c8r + (pins RN5-9 U6-2 J3-1) + ) + (net d8r + (pins RN2-9 U7-2 J4-1) + ) + (net d7r + (pins RN2-8 U7-3 J4-2) + ) + (net d6r + (pins RN2-7 U7-4 J4-3) + ) + (net d5r + (pins RN2-6 U7-5 J4-4) + ) + (net d4r + (pins RN2-5 U7-10 J4-5) + ) + (net d3r + (pins RN2-4 U7-11 J4-6) + ) + (net d2r + (pins RN2-3 U7-12 J4-7) + ) + (net d1r + (pins RN2-2 U7-14 J4-8) + ) + (net f1r + (pins RN6-2 U8-14 J6-8) + ) + (net f2r + (pins RN6-3 U8-12 J6-7) + ) + (net f3r + (pins RN6-4 U8-11 J6-6) + ) + (net f4r + (pins RN6-5 U8-10 J6-5) + ) + (net f5r + (pins RN6-6 U8-5 J6-4) + ) + (net f6r + (pins RN6-7 U8-4 J6-3) + ) + (net f7r + (pins RN6-8 U8-3 J6-2) + ) + (net f8r + (pins RN6-9 U8-2 J6-1) + ) + (class kicad_default "" +3V3 /a1 /a2 /a3 /a4 /a5 /a6 /a7 /a8 /b1 /b2 /b3 + /b4 /b5 /b6 /b7 /b8 /c1 /c2 /c3 /c4 /c5 /c6 /c7 /c8 /d1 /d2 /d3 /d4 + /d5 /d6 /d7 /d8 /e1 /e2 /e3 /e4 /e5 /e6 /e7 /e8 /f1 /f2 /f3 /f4 /f5 + /f6 /f7 /f8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 GNDA_ADC + "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" + "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" + "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" + "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)" + "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" + "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" + "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)" + "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" + "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)" + "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" + "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)" + "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" + "Net-(R1-Pad2)" "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)" + "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)" + "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R2-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)" + "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)" + "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)" + "Net-(R3-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)" + "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)" + "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R4-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)" + "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)" + "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)" + "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)" "Net-(RN1-Pad1)" "Net-(RN1-Pad2)" + "Net-(RN1-Pad3)" "Net-(RN1-Pad4)" "Net-(RN1-Pad5)" "Net-(RN1-Pad6)" + "Net-(RN1-Pad7)" "Net-(RN1-Pad8)" "Net-(RN1-Pad9)" "Net-(RN2-Pad1)" + "Net-(RN2-Pad2)" "Net-(RN2-Pad3)" "Net-(RN2-Pad4)" "Net-(RN2-Pad5)" + "Net-(RN2-Pad6)" "Net-(RN2-Pad7)" "Net-(RN2-Pad8)" "Net-(RN2-Pad9)" + "Net-(RN3-Pad2)" "Net-(RN3-Pad3)" "Net-(RN3-Pad4)" "Net-(RN3-Pad5)" + "Net-(RN3-Pad6)" "Net-(RN3-Pad7)" "Net-(RN3-Pad8)" "Net-(RN3-Pad9)" + "Net-(RN4-Pad1)" "Net-(RN4-Pad2)" "Net-(RN4-Pad3)" "Net-(RN4-Pad4)" + "Net-(RN4-Pad5)" "Net-(RN4-Pad6)" "Net-(RN4-Pad7)" "Net-(RN4-Pad8)" + "Net-(RN4-Pad9)" "Net-(RN5-Pad1)" "Net-(RN5-Pad2)" "Net-(RN5-Pad3)" + "Net-(RN5-Pad4)" "Net-(RN5-Pad5)" "Net-(RN5-Pad6)" "Net-(RN5-Pad7)" + "Net-(RN5-Pad8)" "Net-(RN5-Pad9)" "Net-(RN6-Pad1)" "Net-(RN6-Pad2)" + "Net-(RN6-Pad3)" "Net-(RN6-Pad4)" "Net-(RN6-Pad5)" "Net-(RN6-Pad6)" + "Net-(RN6-Pad7)" "Net-(RN6-Pad8)" "Net-(RN6-Pad9)" PGND PWR_BUT SR1_CLK + SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T + SR1_SHLD SR1_SHLD_T SR2_QH SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH + SR4_QH_T SR5_QH SR5_QH_T SR6_QH SR6_QH_T SYS_RESETN VDD_ADC a1r a2r + a3r a4r a5r a6r a7r a8r b1r b2r b3r b4r b5r b6r b7r b8r c1r c2r c3r + c4r c5r c6r c7r c8r d1r d2r d3r d4r d5r d6r d7r d8r e1r e2r e3r e4r + e5r e6r e7r e8r f1r f2r f3r f4r f5r f6r f7r f8r + (circuit + (use_via Via[0-1]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + (wire (path B.Cu 250 137960 -59842.4 141770 -63652.5 141770 -76615.2 147219 -82064.3 + 147219 -84510.8 151532 -88824 153611 -88824 156379 -91592 + 160365 -91592 165445 -96672 166360 -96672 169791 -100103 + 169791 -101016 170608 -101833 170980 -101833)(net SR1_CLR)(type protect)) + (wire (path B.Cu 250 170980 -103022 170980 -101833)(net SR1_CLR)(type protect)) + (wire (path F.Cu 250 170980 -100482 172169 -100482 172169 -100110 172986 -99293.1 + 173860 -99293.1 174716 -98436.5 174716 -82211.4 161124 -68618.9 + 161124 -66097.2 158678 -63652 157889 -63652 152876 -58639.4 + 149323 -58639.4 145580 -62382.4)(net SR1_SHLD)(type protect)) + (wire (path B.Cu 250 170980 -95402 169791 -95402 168602 -94213.1 165547 -94213.1 + 160386 -89052 155331 -89052 152563 -86284 151536 -86284 148120 -82867.4 + 148120 -75082.3 145580 -72542.4)(net SR1_CLK)(type protect)) + (wire (path B.Cu 250 145580 -67462.4 149390 -71272 152766 -71272 155306 -73812 + 159368 -73812 169341 -83785 169341 -85325.5 170608 -86593.1 + 170980 -86593.1)(net SR1_CLKINH)(type protect)) + (wire (path B.Cu 250 170980 -87782 170980 -86593.1)(net SR1_CLKINH)(type protect)) + (wire (path B.Cu 250 150660 -62382 157010 -68732 161272 -68732 174710 -82170.1 + 174710 -83234.6 173892 -84053.1 173520 -84053.1)(net SR1_QH_T)(type protect)) + (wire (path B.Cu 250 173520 -85242 173520 -84053.1)(net SR1_QH_T)(type protect)) + (wire (path B.Cu 250 125260 -82702 122720 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 130340 -82702 125260 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 158280 -82702 157116 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 150660 -77622 152036 -77622 157116 -82702)(net PGND)(type protect)) + (wire (path F.Cu 250 130340 -82702 130340 -83865.5 130631 -83865.5 131544 -84778.9 + 131544 -99277.7 130340 -100482)(net PGND)(type protect)) + (wire (path F.Cu 250 145641 -82641.2 145474 -82474 145361 -82474)(net PGND)(type protect)) + (wire (path F.Cu 250 144310 -100254 145924 -98640.2 145924 -82924.3 145641 -82641.2 + 150660 -77622)(net PGND)(type protect)) + (wire (path F.Cu 250 170980 -82702 169791 -82702)(net PGND)(type protect)) + (wire (path F.Cu 250 159472 -73013.8 159472 -68654.2 158280 -67462)(net PGND)(type protect)) + (wire (path F.Cu 250 158280 -81538.5 157075 -80333.8 157075 -74641.2 157904 -73812 + 158674 -73812 159472 -73013.8)(net PGND)(type protect)) + (wire (path F.Cu 250 169791 -82702 160103 -73013.8 159472 -73013.8)(net PGND)(type protect)) + (wire (path F.Cu 250 158280 -82702 158280 -81538.5)(net PGND)(type protect)) + (wire (path B.Cu 250 158280 -104292 157116 -104292)(net PGND)(type protect)) + (wire (path B.Cu 250 155964 -102798 157116 -103951 157116 -104292)(net PGND)(type protect)) + (wire (path B.Cu 250 155964 -102798 158280 -100482)(net PGND)(type protect)) + (wire (path B.Cu 250 146854 -102798 155964 -102798)(net PGND)(type protect)) + (wire (path B.Cu 250 145474 -104292 146854 -102911 146854 -102798 144310 -100254)(net PGND)(type protect)) + (wire (path F.Cu 250 144310 -82474 145361 -82474)(net PGND)(type protect)) + (wire (path F.Cu 250 145514 -120868 144310 -122072)(net PGND)(type protect)) + (wire (path F.Cu 250 144310 -105456 144601 -105456 145514 -106369 145514 -120868 + 157076 -120868 158280 -122072)(net PGND)(type protect)) + (wire (path B.Cu 250 144310 -81310.5 144310 -80919.4 139515 -76124.1 139124 -76124.1)(net PGND)(type protect)) + (wire (path B.Cu 250 130340 -82702 131504 -82702 131504 -82411.1 137562 -76352.4 + 138895 -76352.4 139124 -76124.1)(net PGND)(type protect)) + (wire (path B.Cu 250 137960 -70002.4 139124 -71166 139124 -76124.1)(net PGND)(type protect)) + (wire (path B.Cu 250 144310 -82474 144310 -81310.5)(net PGND)(type protect)) + (wire (path F.Cu 250 125260 -136042 123909 -136042)(net PGND)(type protect)) + (wire (path F.Cu 250 125260 -138582 125260 -136042)(net PGND)(type protect)) + (wire (path F.Cu 250 122720 -136042 123909 -136042)(net PGND)(type protect)) + (wire (path F.Cu 250 125260 -138582 123909 -138582)(net PGND)(type protect)) + (wire (path F.Cu 250 122720 -138582 123909 -138582)(net PGND)(type protect)) + (wire (path B.Cu 250 173520 -82702 172331 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 170980 -82107.5 171737 -82107.5 172331 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 170980 -82702 170980 -82107.5)(net PGND)(type protect)) + (wire (path B.Cu 250 144310 -122072 143106 -123276 131544 -123276 130340 -122072)(net PGND)(type protect)) + (wire (path B.Cu 250 131544 -123276 131544 -128948 125640 -134853 125260 -134853)(net PGND)(type protect)) + (wire (path B.Cu 250 125260 -136042 125260 -134853)(net PGND)(type protect)) + (wire (path F.Cu 250 144310 -104292 144310 -105456)(net PGND)(type protect)) + (wire (path F.Cu 250 145580 -59842.4 139336 -66086 139336 -68626 137960 -70002.4)(net PGND)(type protect)) + (wire (path F.Cu 250 147050 -56823.2 145580 -58293.2 145580 -59842.4)(net PGND)(type protect)) + (wire (path B.Cu 250 144310 -104292 145474 -104292)(net PGND)(type protect)) + (wire (path F.Cu 250 130340 -100482 130340 -104292)(net PGND)(type protect)) + (wire (path F.Cu 250 147050 -55592.9 147050 -56823.2)(net PGND)(type protect)) + (wire (path B.Cu 250 122720 -87782 124071 -87782)(net 5v)(type protect)) + (wire (path B.Cu 250 125260 -87782 124071 -87782)(net 5v)(type protect)) + (wire (path B.Cu 250 122720 -87782 122720 -89133.1)(net 5v)(type protect)) + (wire (path B.Cu 250 122720 -90322 122720 -89133.1)(net 5v)(type protect)) + (wire (path B.Cu 250 151930 -104292 153094 -105456 164736 -105456 165900 -104292)(net 5v)(type protect)) + (wire (path B.Cu 250 151930 -104292 150766 -105456 139124 -105456 137960 -104292)(net 5v)(type protect)) + (wire (path B.Cu 250 125260 -91510.9 125632 -91510.9 126449 -92328.2 126449 -95699.4 + 129962 -99212 132880 -99212 137960 -104292)(net 5v)(type protect)) + (wire (path F.Cu 250 150660 -59842 149496 -59842)(net 5v)(type protect)) + (wire (path F.Cu 250 137960 -77622.4 136760 -76421.9 136760 -72066.5 137554 -71272.4 + 138336 -71272.4 143580 -66027.6 143580 -65237.2 145165 -63652.4 + 145977 -63652.4 149496 -60132.9 149496 -59842)(net 5v)(type protect)) + (wire (path F.Cu 250 137960 -82702 137960 -77622.4)(net 5v)(type protect)) + (wire (path B.Cu 250 151930 -82474 153322 -83865.6 164736 -83865.6 165900 -82702)(net 5v)(type protect)) + (wire (path F.Cu 250 151930 -104292 150267 -102629 150267 -84137.3 151930 -82474)(net 5v)(type protect)) + (wire (path F.Cu 250 125260 -90322 123909 -90322)(net 5v)(type protect)) + (wire (path F.Cu 250 122720 -90322 123909 -90322)(net 5v)(type protect)) + (wire (path B.Cu 250 125260 -90322 125260 -91510.9)(net 5v)(type protect)) + (wire (path B.Cu 250 125260 -87782 126449 -87782 127638 -86593.1 134069 -86593.1 + 137960 -82702)(net 5v)(type protect)) + (wire (path B.Cu 250 145580 -77622.4 145580 -76458.9)(net BB3.3)(type protect)) + (wire (path B.Cu 250 158280 -59842 157116 -61005.6 150319 -61005.6 148014 -63311.1 + 148014 -64137.9 145959 -66192.4 145188 -66192.4 144416 -66963.7 + 144416 -75586.4 145289 -76458.9 145580 -76458.9)(net BB3.3)(type protect)) + (wire (path B.Cu 250 143609 -81102.9 143526 -81102.9 139336 -85292.8 139336 -88945.6 + 137960 -90322)(net SR1_QH)(type protect)) + (wire (path F.Cu 250 150660 -64922 149496 -66085.6 149496 -75915.9 144309 -81102.9 + 143609 -81102.9)(net SR1_QH)(type protect)) + (wire (path B.Cu 250 165900 -122072 164729 -120901 153101 -120901 151930 -122072)(net SR1_CLR_T)(type protect)) + (wire (path B.Cu 250 165900 -100482 167104 -101686 167104 -120868 165900 -122072)(net SR1_CLR_T)(type protect)) + (wire (path F.Cu 250 137960 -100482 136309 -98831.2 136309 -64033.2 137960 -62382.4)(net SR1_CLR_T)(type protect)) + (wire (path F.Cu 250 165900 -100482 164695 -99277.1 152907 -99277.1 151930 -100254)(net SR1_CLR_T)(type protect)) + (wire (path B.Cu 250 137960 -100482 139379 -99063.4 150739 -99063.4 151930 -100254)(net SR1_CLR_T)(type protect)) + (wire (path B.Cu 250 137960 -122072 139151 -120881 150739 -120881 151930 -122072)(net SR1_CLR_T)(type protect)) + (wire (path F.Cu 250 137960 -85242 139574 -83628.1 139574 -70928.5 145580 -64922.4)(net SR1_SHLD_T)(type protect)) + (wire (path F.Cu 250 137960 -85242 139620 -86902.4 139620 -105172 137960 -106832)(net SR1_SHLD_T)(type protect)) + (wire (path F.Cu 250 153134 -105628 151930 -106832)(net SR1_SHLD_T)(type protect)) + (wire (path F.Cu 250 151930 -85014 150717 -86226.9 150717 -100977 153134 -103394 + 153134 -105628 164696 -105628 165900 -106832)(net SR1_SHLD_T)(type protect)) + (wire (path B.Cu 250 151930 -85014 153349 -86432.6 164709 -86432.6 165900 -85242)(net SR1_SHLD_T)(type protect)) + (wire (path B.Cu 250 137960 -106832 139151 -108023 150739 -108023 151930 -106832)(net SR1_SHLD_T)(type protect)) + (wire (path B.Cu 250 130340 -116992 131531 -115801 143119 -115801 144310 -116992)(net SR1_CLKINH_T)(type protect)) + (wire (path B.Cu 250 144310 -95174 145497 -93986.9 156865 -93986.9 158280 -95402)(net SR1_CLKINH_T)(type protect)) + (wire (path F.Cu 250 144310 -95174 142514 -93378 142514 -73068.4 145580 -70002.4)(net SR1_CLKINH_T)(type protect)) + (wire (path F.Cu 250 130340 -95402 129176 -96565.5 129176 -115828 130340 -116992)(net SR1_CLKINH_T)(type protect)) + (wire (path B.Cu 250 130340 -95402 131506 -94235.7 143372 -94235.7 144310 -95174)(net SR1_CLKINH_T)(type protect)) + (wire (path B.Cu 250 144310 -116992 145501 -115801 157089 -115801 158280 -116992)(net SR1_CLKINH_T)(type protect)) + (wire (path B.Cu 250 144310 -119532 143143 -118365 131507 -118365 130340 -119532)(net SR1_CLK_T)(type protect)) + (wire (path B.Cu 250 144310 -119532 145501 -118341 157089 -118341 158280 -119532)(net SR1_CLK_T)(type protect)) + (wire (path F.Cu 250 144310 -97714 145474 -96550.5 145474 -94688.9 144689 -93904 + 143935 -93904 142964 -92933.7 142964 -77698.1 145580 -75082.4)(net SR1_CLK_T)(type protect)) + (wire (path F.Cu 250 144310 -119532 143106 -118328 143106 -98918.2 144310 -97714)(net SR1_CLK_T)(type protect)) + (wire (path B.Cu 250 158280 -97942 156861 -96523.4 145501 -96523.4 144310 -97714)(net SR1_CLK_T)(type protect)) + (wire (path B.Cu 250 130340 -97942 131518 -96763.5 143360 -96763.5 144310 -97714)(net SR1_CLK_T)(type protect)) + (wire (path B.Cu 250 170980 -138582 170980 -137393 170608 -137393 169791 -136576 + 169791 -102696 166307 -99212 165523 -99212 160443 -94132 + 157904 -94132 155136 -91364 151532 -91364 145810 -85642.3 + 145810 -81310.4 139947 -75447 139947 -66909.3 137960 -64922.4)(net 7SEG_CLK)(type protect)) + (wire (path F.Cu 250 170980 -136042 169791 -136042 158970 -125220 145777 -125220 + 139512 -118955 139512 -114343 138351 -113182 137574 -113182 + 136773 -112381 136773 -103764 139170 -101367 139170 -92403 + 138359 -91592 137578 -91592 136760 -90774.1 136760 -84778.2 + 137566 -83972 138352 -83972 139124 -83200.5 139124 -73705.9 + 137960 -72542.4)(net 7SEG_DIO)(type protect)) + (wire (path F.Cu 250 173520 -101833 173892 -101833 175169 -100556 175169 -79002.9 + 172677 -76511.3 172114 -76511.3 161574 -65971.4 161574 -65676 + 158280 -62382)(net SR6_QH_T)(type protect)) + (wire (path F.Cu 250 173520 -103022 173520 -101833)(net SR6_QH_T)(type protect)) + (wire (path B.Cu 250 158280 -70002 169791 -81513.1 169791 -83700.4 169982 -83890.9 + 171367 -83890.9 172250 -84774 172250 -90789.6 173029 -91569 + 173927 -91569 174727 -92368.3 174727 -98457.9 173892 -99293.1 + 173520 -99293.1)(net SR5_QH_T)(type protect)) + (wire (path B.Cu 250 173520 -100482 173520 -99293.1)(net SR5_QH_T)(type protect)) + (wire (path F.Cu 250 173520 -97942 173520 -96753.1 173148 -96753.1 172331 -95935.8 + 172331 -89969.8 171377 -89015.7 170472 -89015.7 167452 -85996.5 + 167452 -85133.1 166291 -83972 165523 -83972 159656 -78105.4 + 159656 -76458.4 158280 -75082)(net SR4_QH_T)(type protect)) + (wire (path B.Cu 250 173520 -94213.1 173148 -94213.1 172331 -93395.8 172331 -92509.8 + 171413 -91592 170502 -91592 168890 -89980.3 168890 -83980.7 + 161328 -76417.9 154536 -76417.9 150660 -72542)(net SR3_QH_T)(type protect)) + (wire (path B.Cu 250 173520 -95402 173520 -94213.1)(net SR3_QH_T)(type protect)) + (wire (path B.Cu 250 122720 -85242 125260 -85242)(net +3V3)(type protect)) + (wire (path F.Cu 250 151930 -111912 149789 -109771 149789 -81038.2 152305 -78521.4 + 152305 -71647.4 150660 -70002)(net SR2_QH)(type protect)) + (wire (path F.Cu 250 150660 -75082 151855 -76277 151855 -78334.9 149338 -80851.7 + 149338 -111039 151402 -113103 164709 -113103 165900 -111912)(net SR3_QH)(type protect)) + (wire (path F.Cu 250 158280 -77622 164524 -83865.6 164524 -88945.6 165900 -90322)(net SR4_QH)(type protect)) + (wire (path F.Cu 250 158280 -72542 153306 -77515.6 153306 -88717.6 151930 -90094)(net SR5_QH)(type protect)) + (wire (path F.Cu 250 158280 -64922 157116 -63758 150156 -63758 147110 -66803.6 + 147110 -67584.9 145963 -68732.4 145190 -68732.4 140438 -73483.9 + 140438 -109434 137960 -111912)(net SR6_QH)(type protect)) + (via "Via[0-1]_600:400_um" 143609 -81102.9 (net SR1_QH)(type protect)) + ) +) diff --git a/bbb-bort.bak b/bbb-bort.bak new file mode 100644 index 0000000..82a3a1b --- /dev/null +++ b/bbb-bort.bak @@ -0,0 +1,1967 @@ +EESchema Schematic File Version 4 +LIBS:bbb-bort-cache +EELAYER 26 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "bort's brain" +Date "2018-12-28" +Rev "A1" +Comp "kremlinware unlimited" +Comment1 "i'm the one who press that button" +Comment2 "sweaty palms get caught bluffin" +Comment3 "fold a man into nothin, for nothin" +Comment4 "" +$EndDescr +$Comp +L power:GNDD #PWR01 +U 1 1 5589785A +P 1200 3050 +F 0 "#PWR01" H 1200 2800 50 0001 C CNN +F 1 "GNDD" H 1200 2900 50 0000 C CNN +F 2 "" H 1200 3050 60 0000 C CNN +F 3 "" H 1200 3050 60 0000 C CNN + 1 1200 3050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1450 2850 1500 2850 +Wire Wire Line + 1500 2850 1500 2950 +Wire Wire Line + 900 3050 900 2950 +Wire Wire Line + 900 2850 950 2850 +Wire Wire Line + 950 2950 900 2950 +Connection ~ 900 2950 +Wire Wire Line + 1450 2950 1500 2950 +Connection ~ 1500 2950 +Connection ~ 1200 3050 +$Comp +L power:+3.3V #PWR06 +U 1 1 55897A67 +P 1400 850 +F 0 "#PWR06" H 1400 700 50 0001 C CNN +F 1 "+3V3" H 1400 990 50 0000 C CNN +F 2 "" H 1400 850 60 0000 C CNN +F 3 "" H 1400 850 60 0000 C CNN + 1 1400 850 + 0 1 1 0 +$EndComp +$Comp +L power:+5V #PWR07 +U 1 1 55897A7F +P 1550 950 +F 0 "#PWR07" H 1550 800 50 0001 C CNN +F 1 "+5V" H 1550 1090 50 0000 C CNN +F 2 "" H 1550 950 60 0000 C CNN +F 3 "" H 1550 950 60 0000 C CNN + 1 1550 950 + 0 1 1 0 +$EndComp +Wire Wire Line + 1450 850 1400 850 +Wire Wire Line + 1450 950 1550 950 +Wire Wire Line + 1750 1050 1450 1050 +$Comp +L power:+3.3V #PWR08 +U 1 1 55897EE7 +P 800 850 +F 0 "#PWR08" H 800 700 50 0001 C CNN +F 1 "+3V3" H 800 990 50 0000 C CNN +F 2 "" H 800 850 60 0000 C CNN +F 3 "" H 800 850 60 0000 C CNN + 1 800 850 + 0 -1 -1 0 +$EndComp +$Comp +L power:+5V #PWR09 +U 1 1 55897EF8 +P 900 950 +F 0 "#PWR09" H 900 800 50 0001 C CNN +F 1 "+5V" H 900 1090 50 0000 C CNN +F 2 "" H 900 950 60 0000 C CNN +F 3 "" H 900 950 60 0000 C CNN + 1 900 950 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 950 850 800 850 +Wire Wire Line + 950 950 900 950 +$Comp +L pwr_BeagleBone:SYS_5V #PWR010 +U 1 1 55898497 +P 1750 1050 +F 0 "#PWR010" H 1750 900 50 0001 C CNN +F 1 "SYS_5V" H 1750 1190 50 0000 C CNN +F 2 "" H 1750 1050 60 0000 C CNN +F 3 "" H 1750 1050 60 0000 C CNN + 1 1750 1050 + 0 1 1 0 +$EndComp +$Comp +L pwr_BeagleBone:SYS_5V #PWR011 +U 1 1 558984AF +P 750 1050 +F 0 "#PWR011" H 750 900 50 0001 C CNN +F 1 "SYS_5V" H 750 1190 50 0000 C CNN +F 2 "" H 750 1050 60 0000 C CNN +F 3 "" H 750 1050 60 0000 C CNN + 1 750 1050 + 0 -1 -1 0 +$EndComp +$Comp +L pwr_BeagleBone:VDD_ADC #PWR012 +U 1 1 558985D8 +P 1500 2250 +F 0 "#PWR012" H 1500 2100 50 0001 C CNN +F 1 "VDD_ADC" H 1500 2390 50 0000 C CNN +F 2 "" H 1500 2250 60 0000 C CNN +F 3 "" H 1500 2250 60 0000 C CNN + 1 1500 2250 + 0 1 1 0 +$EndComp +Wire Wire Line + 1450 2250 1500 2250 +$Comp +L pwr_BeagleBone:GNDA_ADC #PWR013 +U 1 1 5589865D +P 1600 2350 +F 0 "#PWR013" H 1600 2100 50 0001 C CNN +F 1 "GNDA_ADC" H 1600 2200 50 0000 C CNN +F 2 "" H 1600 2350 60 0000 C CNN +F 3 "" H 1600 2350 60 0000 C CNN + 1 1600 2350 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 1450 2350 1600 2350 +Text GLabel 1550 1150 2 50 Input ~ 0 +SYS_RESETN +Wire Wire Line + 1450 1150 1550 1150 +Text GLabel 850 1150 0 50 Input ~ 0 +PWR_BUT +$Comp +L Connector_Generic:Conn_02x23_Odd_Even P8 +U 1 1 55DF7DE1 +P 2850 1900 +F 0 "P8" H 2850 3100 50 0000 C CNN +F 1 "BeagleBone_Black_Header" V 2900 1950 50 0000 C CNN +F 2 "Socket_BeagleBone_Black:Socket_BeagleBone_Black" H 2850 1050 60 0001 C CNN +F 3 "" H 2850 1050 60 0000 C CNN + 1 2850 1900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 900 2950 900 2850 +Wire Wire Line + 1500 2950 1500 3050 +Wire Wire Line + 1200 3050 900 3050 +Wire Wire Line + 1200 3050 1500 3050 +Text Label 2650 1000 2 50 ~ 0 +GPIO1_2_SR_CLKINH +Text Label 2650 1300 2 50 ~ 0 +GPIO1_13_SR_CLK +Text Label 2650 1500 2 50 ~ 0 +GPIO1_15_SR_SHLD +Text Label 2650 1600 2 50 ~ 0 +GPIO0_27_SR_CLR +Text Label 3150 900 0 50 ~ 0 +GPIO1_7_SR_QH +$Comp +L power:+5V #PWR0101 +U 1 1 5C2DC7FB +P 2100 2000 +F 0 "#PWR0101" H 2100 1850 50 0001 C CNN +F 1 "+5V" H 2115 2173 50 0000 C CNN +F 2 "" H 2100 2000 50 0001 C CNN +F 3 "" H 2100 2000 50 0001 C CNN + 1 2100 2000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2100 2000 2050 2050 +Text GLabel 2050 2050 0 50 Input ~ 0 +5v +$Comp +L 74xx_IEEE:74166 U3 +U 1 1 5C2DCFC3 +P 9800 3500 +F 0 "U3" H 9800 2485 50 0000 C CNN +F 1 "74166" H 9800 2576 50 0000 C CNN +F 2 "kicad-library:NEW-DIP254P762X508-16" H 9800 3500 50 0001 C CNN +F 3 "" H 9800 3500 50 0001 C CNN +F 4 "SN74HC166N" H 0 0 50 0001 C CNN "manf#" + 1 9800 3500 + -1 0 0 1 +$EndComp +Wire Wire Line + 9750 4150 9750 4350 +Wire Wire Line + 9600 4150 9600 4350 +Text GLabel 9600 4350 0 50 Input ~ 0 +5v +Text GLabel 9250 2700 0 50 Input ~ 0 +SR1_QH +Text GLabel 3150 900 2 50 Input ~ 0 +SR1_QH_T +Text GLabel 2650 1000 0 50 Input ~ 0 +SR1_CLKINH +Text GLabel 2650 1300 0 50 Input ~ 0 +SR1_CLK +Text GLabel 2650 1500 0 50 Input ~ 0 +SR1_SHLD +Text GLabel 2650 1600 0 50 Input ~ 0 +SR1_CLR +$Comp +L 4xxx:4504 U1 +U 1 1 5C2E1ABC +P 1300 4700 +F 0 "U1" H 1300 3714 50 0000 C CNN +F 1 "4504" H 1300 3623 50 0000 C CNN +F 2 "kicad-library:NEW-DIP254P762X508-16" H 1300 3400 50 0001 C CNN +F 3 "http://www.ti.com/lit/ds/symlink/cd4504b.pdf" H 650 4350 50 0001 C CNN +F 4 " CD4504BEG4" H 0 0 50 0001 C CNN "manf#" + 1 1300 4700 + 1 0 0 -1 +$EndComp +$Comp +L 4xxx:4504 U2 +U 1 1 5C2E1BA8 +P 2950 4700 +F 0 "U2" H 2950 3714 50 0000 C CNN +F 1 "4504" H 2950 3623 50 0000 C CNN +F 2 "kicad-library:NEW-DIP254P762X508-16" H 2950 3400 50 0001 C CNN +F 3 "http://www.ti.com/lit/ds/symlink/cd4504b.pdf" H 2300 4350 50 0001 C CNN +F 4 " CD4504BEG4" H 0 0 50 0001 C CNN "manf#" + 1 2950 4700 + 1 0 0 -1 +$EndComp +Text GLabel 900 1050 3 50 Input ~ 0 +5v +Text GLabel 1600 600 0 50 Input ~ 0 +BB3.3 +Text GLabel 1400 3800 1 50 Input ~ 0 +BB3.3 +Text GLabel 2850 3800 1 50 Input ~ 0 +BB3.3 +Text GLabel 1200 3800 1 50 Input ~ 0 +5v +Text GLabel 3050 3800 1 50 Input ~ 0 +5v +Text Label 1450 5300 2 50 ~ 0 +TO_BEAGLE +Text Label 2700 5350 0 50 ~ 0 +FROM_BEAGLE +Text GLabel 2500 4200 0 50 Input ~ 0 +SR1_CLK +Text GLabel 2500 4400 0 50 Input ~ 0 +SR1_CLKINH +Text GLabel 2500 4600 0 50 Input ~ 0 +SR1_SHLD +Text GLabel 2500 4800 0 50 Input ~ 0 +SR1_CLR +Text GLabel 3400 4200 2 50 Input ~ 0 +SR1_CLK_T +Text GLabel 3400 4400 2 50 Input ~ 0 +SR1_CLKINH_T +Text GLabel 3400 4600 2 50 Input ~ 0 +SR1_SHLD_T +Text GLabel 3400 4800 2 50 Input ~ 0 +SR1_CLR_T +Text GLabel 1750 4100 1 50 Input ~ 0 +SR1_QH_T +Wire Wire Line + 1750 4100 1750 4200 +Text GLabel 850 4200 0 50 Input ~ 0 +SR1_QH +Text GLabel 10350 3700 2 50 Input ~ 0 +SR1_CLK_T +Text GLabel 10250 4050 2 50 Input ~ 0 +SR1_CLR_T +Text GLabel 10350 3950 2 50 Input ~ 0 +SR1_SHLD_T +Text GLabel 10350 3800 2 50 Input ~ 0 +SR1_CLKINH_T +Wire Wire Line + 950 1150 850 1150 +Wire Wire Line + 750 1050 950 1050 +$Comp +L 74xx_IEEE:74166 U7 +U 1 1 5C339CD5 +P 9800 1600 +F 0 "U7" H 9800 585 50 0000 C CNN +F 1 "74166" H 9800 676 50 0000 C CNN +F 2 "kicad-library:NEW-DIP254P762X508-16" H 9800 1600 50 0001 C CNN +F 3 "" H 9800 1600 50 0001 C CNN +F 4 "SN74HC166N" H 0 0 50 0001 C CNN "manf#" + 1 9800 1600 + -1 0 0 1 +$EndComp +Text GLabel 10350 1800 2 50 Input ~ 0 +SR1_CLK_T +Text GLabel 10350 1900 2 50 Input ~ 0 +SR1_CLKINH_T +Text GLabel 10350 2050 2 50 Input ~ 0 +SR1_SHLD_T +Text GLabel 10250 2150 2 50 Input ~ 0 +SR1_CLR_T +Text GLabel 9450 2250 0 50 Input ~ 0 +5v +Wire Wire Line + 9450 2250 9600 2250 +Text GLabel 9250 800 0 50 Input ~ 0 +SR2_QH +Text GLabel 850 4400 0 50 Input ~ 0 +SR2_QH +Text GLabel 1900 4250 1 50 Input ~ 0 +SR2_QH__T +Wire Wire Line + 1900 4250 1900 4400 +Wire Wire Line + 1900 4400 1750 4400 +Text Label 3150 1000 0 50 ~ 0 +GPIO1_3_SR2_QH +Text GLabel 3150 1000 2 50 Input ~ 0 +SR2_QH_T +Text GLabel 9650 6400 0 50 Input ~ 0 +5v +Wire Wire Line + 9650 6400 9700 6400 +Wire Wire Line + 9700 6400 9700 6250 +Wire Wire Line + 9850 6250 9850 6350 +Text GLabel 10350 6150 2 50 Input ~ 0 +SR1_CLR_T +Text GLabel 10450 6050 2 50 Input ~ 0 +SR1_SHLD_T +Text GLabel 10450 5900 2 50 Input ~ 0 +SR1_CLKINH_T +Text GLabel 10450 5800 2 50 Input ~ 0 +SR1_CLK_T +Text GLabel 9350 4800 0 50 Input ~ 0 +SR3_QH +Text GLabel 850 4600 0 50 Input ~ 0 +SR3_QH +Text GLabel 2050 4250 1 50 Input ~ 0 +SR3_QH_T +Wire Wire Line + 2050 4250 1950 4250 +Wire Wire Line + 1950 4250 1950 4600 +Wire Wire Line + 1950 4600 1750 4600 +$Comp +L 74xx_IEEE:74166 U6 +U 1 1 5C345D5D +P 7750 5500 +F 0 "U6" H 7750 4485 50 0000 C CNN +F 1 "74166" H 7750 4576 50 0000 C CNN +F 2 "kicad-library:NEW-DIP254P762X508-16" H 7750 5500 50 0001 C CNN +F 3 "" H 7750 5500 50 0001 C CNN +F 4 "SN74HC166N" H 0 0 50 0001 C CNN "manf#" + 1 7750 5500 + -1 0 0 1 +$EndComp +Text GLabel 8300 5700 2 50 Input ~ 0 +SR1_CLK_T +Text GLabel 8300 5800 2 50 Input ~ 0 +SR1_CLKINH_T +Text GLabel 8300 5950 2 50 Input ~ 0 +SR1_SHLD_T +Text GLabel 8200 6050 2 50 Input ~ 0 +SR1_CLR_T +Text GLabel 7400 6150 0 50 Input ~ 0 +5v +Wire Wire Line + 7400 6150 7550 6150 +Text GLabel 7200 4700 0 50 Input ~ 0 +SR4_QH +Wire Wire Line + 7250 6300 7700 6300 +Wire Wire Line + 7700 6300 7700 6150 +$Comp +L 74xx_IEEE:74166 U5 +U 1 1 5C346672 +P 7650 3600 +F 0 "U5" H 7650 2585 50 0000 C CNN +F 1 "74166" H 7650 2676 50 0000 C CNN +F 2 "kicad-library:NEW-DIP254P762X508-16" H 7650 3600 50 0001 C CNN +F 3 "" H 7650 3600 50 0001 C CNN +F 4 "SN74HC166N" H 0 0 50 0001 C CNN "manf#" + 1 7650 3600 + -1 0 0 1 +$EndComp +Text GLabel 8200 3800 2 50 Input ~ 0 +SR1_CLK_T +Text GLabel 8200 3900 2 50 Input ~ 0 +SR1_CLKINH_T +Text GLabel 8200 4050 2 50 Input ~ 0 +SR1_SHLD_T +Text GLabel 8100 4150 2 50 Input ~ 0 +SR1_CLR_T +Text GLabel 7300 4250 0 50 Input ~ 0 +5v +Wire Wire Line + 7300 4250 7450 4250 +Text GLabel 7100 2800 0 50 Input ~ 0 +SR5_QH +Wire Wire Line + 7150 4400 7600 4400 +Wire Wire Line + 7600 4400 7600 4250 +$Comp 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(pins P8-31) + ) + (net "Net-(P8-Pad32)" + (pins P8-32) + ) + (net "Net-(P8-Pad33)" + (pins P8-33) + ) + (net "Net-(P8-Pad34)" + (pins P8-34) + ) + (net "Net-(P8-Pad35)" + (pins P8-35) + ) + (net "Net-(P8-Pad36)" + (pins P8-36) + ) + (net "Net-(P8-Pad37)" + (pins P8-37) + ) + (net "Net-(P8-Pad38)" + (pins P8-38) + ) + (net "Net-(P8-Pad39)" + (pins P8-39) + ) + (net "Net-(P8-Pad40)" + (pins P8-40) + ) + (net "Net-(P8-Pad41)" + (pins P8-41) + ) + (net "Net-(P8-Pad42)" + (pins P8-42) + ) + (net "Net-(P8-Pad43)" + (pins P8-43) + ) + (net "Net-(P8-Pad44)" + (pins P8-44) + ) + (net "Net-(P8-Pad45)" + (pins P8-45) + ) + (net "Net-(P8-Pad46)" + (pins P8-46) + ) + (net "Net-(P9-Pad11)" + (pins P9-11) + ) + (net "Net-(P9-Pad12)" + (pins P9-12) + ) + (net "Net-(P9-Pad13)" + (pins P9-13) + ) + (net "Net-(P9-Pad14)" + (pins P9-14) + ) + (net "Net-(P9-Pad15)" + (pins P9-15) + ) + (net "Net-(P9-Pad16)" + (pins P9-16) + ) + (net "Net-(P9-Pad17)" + (pins P9-17) + ) + (net "Net-(P9-Pad18)" + (pins P9-18) + ) + (net "Net-(P9-Pad19)" + (pins P9-19) + ) + (net "Net-(P9-Pad20)" + (pins P9-20) + ) + (net "Net-(P9-Pad21)" + (pins P9-21) + ) + (net "Net-(P9-Pad22)" + (pins P9-22) + ) + (net "Net-(P9-Pad23)" + (pins P9-23) + ) + (net "Net-(P9-Pad24)" + (pins P9-24) + ) + (net "Net-(P9-Pad25)" + (pins P9-25) + ) + (net "Net-(P9-Pad26)" + (pins P9-26) + ) + (net "Net-(P9-Pad27)" + (pins P9-27) + ) + (net "Net-(P9-Pad28)" + (pins P9-28) + ) + (net "Net-(P9-Pad29)" + (pins P9-29) + ) + (net "Net-(P9-Pad30)" + (pins P9-30) + ) + (net "Net-(P9-Pad31)" + (pins P9-31) + ) + (net "Net-(P9-Pad33)" + (pins P9-33) + ) + (net "Net-(P9-Pad35)" + (pins P9-35) + ) + (net "Net-(P9-Pad36)" + (pins P9-36) + ) + (net "Net-(P9-Pad37)" + (pins P9-37) + ) + (net "Net-(P9-Pad38)" + (pins P9-38) + ) + (net "Net-(P9-Pad39)" + (pins P9-39) + ) + (net "Net-(P9-Pad40)" + (pins P9-40) + ) + (net "Net-(P9-Pad41)" + (pins P9-41) + ) + (net "Net-(P9-Pad42)" + (pins P9-42) + ) + (net GNDD + (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-13 U1-8 U2-13 U2-8 U3-8 + U3-1) + ) + (net +3V3 + (pins P9-4 P9-3 U1-16 U2-1) + ) + (net +5V + (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16) + ) + (net PWR_BUT + (pins P9-9) + ) + (net SYS_RESETN + (pins P9-10) + ) + (net VDD_ADC + (pins P9-32) + ) + (net GNDA_ADC + (pins P9-34) + ) + (net /GPIO1_7_SR_QH + (pins P8-4 U1-2) + ) + (net /GPIO1_2_SR_CLKINH + (pins P8-5 U2-5) + ) + (net /GPIO1_13_SR_CLK + (pins P8-11 U2-3) + ) + (net /GPIO1_15_SR_SHLD + (pins P8-15 U2-7) + ) + (net /GPIO0_27_SR_CLR + (pins P8-17 U2-9) + ) + (net "Net-(U1-Pad3)" + (pins U1-3 U3-13) + ) + (net "Net-(U1-Pad4)" + (pins U1-4) + ) + (net "Net-(U1-Pad5)" + (pins U1-5) + ) + (net "Net-(U1-Pad6)" + (pins U1-6) + ) + (net "Net-(U1-Pad7)" + (pins U1-7) + ) + (net "Net-(U1-Pad9)" + (pins U1-9) + ) + (net "Net-(U1-Pad10)" + (pins U1-10) + ) + (net "Net-(U1-Pad11)" + (pins U1-11) + ) + (net "Net-(U1-Pad12)" + (pins U1-12) + ) + (net "Net-(U1-Pad14)" + (pins U1-14) + ) + (net "Net-(U1-Pad15)" + (pins U1-15) + ) + (net "Net-(U2-Pad15)" + (pins U2-15) + ) + (net "Net-(U2-Pad14)" + (pins U2-14) + ) + (net "Net-(U2-Pad12)" + (pins U2-12) + ) + (net "Net-(U2-Pad11)" + (pins U2-11) + ) + (net "Net-(U2-Pad10)" + (pins U2-10 U3-9) + ) + (net "Net-(U2-Pad6)" + (pins U2-6 U3-15) + ) + (net "Net-(U2-Pad4)" + (pins U2-4 U3-6) + ) + (net "Net-(U2-Pad2)" + (pins U2-2 U3-7) + ) + (net "Net-(U3-Pad2)" + (pins U3-2) + ) + (net "Net-(U3-Pad3)" + (pins U3-3) + ) + (net "Net-(U3-Pad4)" + (pins U3-4) + ) + (net "Net-(U3-Pad5)" + (pins U3-5) + ) + (net "Net-(U3-Pad10)" + (pins U3-10) + ) + (net "Net-(U3-Pad11)" + (pins U3-11) + ) + (net "Net-(U3-Pad12)" + (pins U3-12) + ) + (net "Net-(U3-Pad14)" + (pins U3-14) + ) + (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD + /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH GNDA_ADC GNDD "Net-(P8-Pad10)" "Net-(P8-Pad11)" + "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad15)" + "Net-(P8-Pad16)" "Net-(P8-Pad17)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" + "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" + "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" + "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" + "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" + "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" + "Net-(P8-Pad4)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" + "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad5)" "Net-(P8-Pad6)" + "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" + "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" + "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)" + "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" + "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)" + "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" + "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)" + "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" + "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)" "Net-(U1-Pad14)" + "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" "Net-(U1-Pad6)" + "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)" "Net-(U2-Pad12)" + "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)" "Net-(U2-Pad6)" + "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" + "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PWR_BUT + SYS_5V SYS_RESETN VDD_ADC + (circuit + (use_via Via[0-1]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + ) +) diff --git a/bbb-bort.kicad_pcb b/bbb-bort.kicad_pcb new file mode 100644 index 0000000..68c4c64 --- /dev/null +++ b/bbb-bort.kicad_pcb @@ -0,0 +1,2399 @@ +(kicad_pcb (version 20171130) (host pcbnew "(5.0.1)-3") + + (general + (thickness 1.6) + (drawings 5) + (tracks 0) + (zones 0) + (modules 26) + (nets 148) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.25) + (trace_clearance 0.2) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.2) + (segment_width 0.2) + (edge_width 0.00254) + (via_size 0.6) + (via_drill 0.4) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.7272 1.7272) + (pad_drill 1.016) + (pad_to_mask_clearance 0) + (solder_mask_min_width 0.25) + (aux_axis_origin 0 0) + (grid_origin 185.15 154.67) + (visible_elements 7FFFF7FF) + (pcbplotparams + (layerselection 0x01030_80000001) + (usegerberextensions false) + (usegerberattributes false) + (usegerberadvancedattributes false) + (creategerberjobfile false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 4) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "")) + ) + + (net 0 "") + (net 1 "Net-(P8-Pad3)") + (net 2 "Net-(P8-Pad7)") + (net 3 "Net-(P8-Pad8)") + (net 4 "Net-(P8-Pad9)") + (net 5 "Net-(P8-Pad10)") + (net 6 "Net-(P8-Pad13)") + (net 7 "Net-(P8-Pad19)") + (net 8 "Net-(P8-Pad20)") + (net 9 "Net-(P8-Pad21)") + (net 10 "Net-(P8-Pad22)") + (net 11 "Net-(P8-Pad23)") + (net 12 "Net-(P8-Pad24)") + (net 13 "Net-(P8-Pad25)") + (net 14 "Net-(P8-Pad26)") + (net 15 "Net-(P8-Pad27)") + (net 16 "Net-(P8-Pad28)") + (net 17 "Net-(P8-Pad29)") + (net 18 "Net-(P8-Pad30)") + (net 19 "Net-(P8-Pad31)") + (net 20 "Net-(P8-Pad32)") + (net 21 "Net-(P8-Pad33)") + (net 22 "Net-(P8-Pad34)") + (net 23 "Net-(P8-Pad35)") + (net 24 "Net-(P8-Pad36)") + (net 25 "Net-(P8-Pad37)") + (net 26 "Net-(P8-Pad38)") + (net 27 "Net-(P8-Pad39)") + (net 28 "Net-(P8-Pad40)") + (net 29 "Net-(P8-Pad41)") + (net 30 "Net-(P8-Pad42)") + (net 31 "Net-(P8-Pad44)") + (net 32 "Net-(P8-Pad46)") + (net 33 "Net-(P9-Pad11)") + (net 34 "Net-(P9-Pad12)") + (net 35 "Net-(P9-Pad13)") + (net 36 "Net-(P9-Pad14)") + (net 37 "Net-(P9-Pad15)") + (net 38 "Net-(P9-Pad16)") + (net 39 "Net-(P9-Pad17)") + (net 40 "Net-(P9-Pad18)") + (net 41 "Net-(P9-Pad19)") + (net 42 "Net-(P9-Pad20)") + (net 43 "Net-(P9-Pad21)") + (net 44 "Net-(P9-Pad22)") + (net 45 "Net-(P9-Pad23)") + (net 46 "Net-(P9-Pad24)") + (net 47 "Net-(P9-Pad25)") + (net 48 "Net-(P9-Pad26)") + (net 49 "Net-(P9-Pad27)") + (net 50 "Net-(P9-Pad28)") + (net 51 "Net-(P9-Pad29)") + (net 52 "Net-(P9-Pad30)") + (net 53 "Net-(P9-Pad31)") + (net 54 "Net-(P9-Pad33)") + (net 55 "Net-(P9-Pad35)") + (net 56 "Net-(P9-Pad36)") + (net 57 "Net-(P9-Pad37)") + (net 58 "Net-(P9-Pad38)") + (net 59 "Net-(P9-Pad39)") + (net 60 "Net-(P9-Pad40)") + (net 61 "Net-(P9-Pad41)") + (net 62 "Net-(P9-Pad42)") + (net 63 PWR_BUT) + (net 64 SYS_RESETN) + (net 65 VDD_ADC) + (net 66 GNDA_ADC) + (net 67 SR1_CLR) + (net 68 SR1_SHLD) + (net 69 SR1_CLK) + (net 70 SR1_CLKINH) + (net 71 SR1_QH_T) + (net 72 5v) + (net 73 BB3.3) + (net 74 SR1_QH) + (net 75 SR1_CLR_T) + (net 76 SR1_SHLD_T) + (net 77 SR1_CLKINH_T) + (net 78 SR1_CLK_T) + (net 79 7SEG_CLK) + (net 80 7SEG_DIO) + (net 81 SR6_QH_T) + (net 82 SR5_QH_T) + (net 83 SR4_QH_T) + (net 84 SR3_QH_T) + (net 85 SR2_QH_T) + (net 86 +3V3) + (net 87 SR2_QH__T) + (net 88 SR2_QH) + (net 89 SR3_QH) + (net 90 SR4_QH) + (net 91 SR5_QH) + (net 92 SR6_QH) + (net 93 7SEG_DIO_T) + (net 94 7SEG_CLK_T) + (net 95 e8r) + (net 96 e7r) + (net 97 e6r) + (net 98 e5r) + (net 99 e4r) + (net 100 e3r) + (net 101 e2r) + (net 102 e1r) + (net 103 a1r) + (net 104 a2r) + (net 105 a3r) + (net 106 a4r) + (net 107 a5r) + (net 108 a6r) + (net 109 a7r) + (net 110 a8r) + (net 111 b8r) + (net 112 b7r) + (net 113 b6r) + (net 114 b5r) + (net 115 b4r) + (net 116 b3r) + (net 117 b2r) + (net 118 b1r) + (net 119 c1r) + (net 120 c2r) + (net 121 c3r) + (net 122 c4r) + (net 123 c5r) + (net 124 c6r) + (net 125 c7r) + (net 126 c8r) + (net 127 d8r) + (net 128 d7r) + (net 129 d6r) + (net 130 d5r) + (net 131 d4r) + (net 132 d3r) + (net 133 d2r) + (net 134 d1r) + (net 135 f1r) + (net 136 f2r) + (net 137 f3r) + (net 138 f4r) + (net 139 f5r) + (net 140 f6r) + (net 141 f7r) + (net 142 f8r) + (net 143 "Net-(P8-Pad2)") + (net 144 "Net-(P8-Pad1)") + (net 145 GNDD) + (net 146 GND) + (net 147 "Net-(P9-Pad1)") + + (net_class Default "To jest domyślna klasa połączeń." + (clearance 0.2) + (trace_width 0.25) + (via_dia 0.6) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +3V3) + (add_net 5v) + (add_net 7SEG_CLK) + (add_net 7SEG_CLK_T) + (add_net 7SEG_DIO) + (add_net 7SEG_DIO_T) + (add_net BB3.3) + (add_net GND) + (add_net GNDA_ADC) + (add_net GNDD) + (add_net "Net-(P8-Pad1)") + (add_net "Net-(P8-Pad10)") + (add_net "Net-(P8-Pad13)") + (add_net "Net-(P8-Pad19)") + (add_net "Net-(P8-Pad2)") + (add_net "Net-(P8-Pad20)") + (add_net "Net-(P8-Pad21)") + (add_net "Net-(P8-Pad22)") + (add_net "Net-(P8-Pad23)") + (add_net "Net-(P8-Pad24)") + (add_net "Net-(P8-Pad25)") + (add_net "Net-(P8-Pad26)") + (add_net "Net-(P8-Pad27)") + (add_net "Net-(P8-Pad28)") + (add_net "Net-(P8-Pad29)") + (add_net "Net-(P8-Pad3)") + (add_net "Net-(P8-Pad30)") + (add_net "Net-(P8-Pad31)") + (add_net "Net-(P8-Pad32)") + (add_net "Net-(P8-Pad33)") + (add_net "Net-(P8-Pad34)") + (add_net "Net-(P8-Pad35)") + (add_net "Net-(P8-Pad36)") + (add_net "Net-(P8-Pad37)") + (add_net "Net-(P8-Pad38)") + (add_net "Net-(P8-Pad39)") + (add_net "Net-(P8-Pad40)") + (add_net "Net-(P8-Pad41)") + (add_net "Net-(P8-Pad42)") + (add_net "Net-(P8-Pad44)") + (add_net "Net-(P8-Pad46)") + (add_net "Net-(P8-Pad7)") + (add_net "Net-(P8-Pad8)") + (add_net "Net-(P8-Pad9)") + (add_net "Net-(P9-Pad1)") + (add_net "Net-(P9-Pad11)") + (add_net "Net-(P9-Pad12)") + (add_net "Net-(P9-Pad13)") + (add_net "Net-(P9-Pad14)") + (add_net "Net-(P9-Pad15)") + (add_net "Net-(P9-Pad16)") + (add_net "Net-(P9-Pad17)") + (add_net "Net-(P9-Pad18)") + (add_net "Net-(P9-Pad19)") + (add_net "Net-(P9-Pad20)") + (add_net "Net-(P9-Pad21)") + (add_net "Net-(P9-Pad22)") + (add_net "Net-(P9-Pad23)") + (add_net "Net-(P9-Pad24)") + (add_net "Net-(P9-Pad25)") + (add_net "Net-(P9-Pad26)") + (add_net "Net-(P9-Pad27)") + (add_net "Net-(P9-Pad28)") + (add_net "Net-(P9-Pad29)") + (add_net "Net-(P9-Pad30)") + (add_net "Net-(P9-Pad31)") + (add_net "Net-(P9-Pad33)") + (add_net "Net-(P9-Pad35)") + (add_net "Net-(P9-Pad36)") + (add_net "Net-(P9-Pad37)") + (add_net "Net-(P9-Pad38)") + (add_net "Net-(P9-Pad39)") + (add_net "Net-(P9-Pad40)") + (add_net "Net-(P9-Pad41)") + (add_net "Net-(P9-Pad42)") + (add_net PWR_BUT) + (add_net SR1_CLK) + (add_net SR1_CLKINH) + (add_net SR1_CLKINH_T) + (add_net SR1_CLK_T) + (add_net SR1_CLR) + (add_net SR1_CLR_T) + (add_net SR1_QH) + (add_net SR1_QH_T) + (add_net SR1_SHLD) + (add_net SR1_SHLD_T) + (add_net SR2_QH) + (add_net SR2_QH_T) + (add_net SR2_QH__T) + (add_net SR3_QH) + (add_net SR3_QH_T) + (add_net SR4_QH) + (add_net SR4_QH_T) + (add_net SR5_QH) + (add_net SR5_QH_T) + (add_net SR6_QH) + (add_net SR6_QH_T) + (add_net SYS_RESETN) + (add_net VDD_ADC) + (add_net a1r) + (add_net a2r) + (add_net a3r) + (add_net a4r) + (add_net a5r) + (add_net a6r) + (add_net a7r) + (add_net a8r) + (add_net b1r) + (add_net b2r) + (add_net b3r) + (add_net b4r) + (add_net b5r) + (add_net b6r) + (add_net b7r) + (add_net b8r) + (add_net c1r) + (add_net c2r) + (add_net c3r) + (add_net c4r) + (add_net c5r) + (add_net c6r) + (add_net c7r) + (add_net c8r) + (add_net d1r) + (add_net d2r) + (add_net d3r) + (add_net d4r) + (add_net d5r) + (add_net d6r) + (add_net d7r) + (add_net d8r) + (add_net e1r) + (add_net e2r) + (add_net e3r) + (add_net e4r) + (add_net e5r) + (add_net e6r) + (add_net e7r) + (add_net e8r) + (add_net f1r) + (add_net f2r) + (add_net f3r) + (add_net f4r) + (add_net f5r) + (add_net f6r) + (add_net f7r) + (add_net f8r) + ) + + (module MountingHole:MountingHole_2.2mm_M2 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5C8066D6) + (at 110.22 32.75) + (descr "Mounting Hole 2.2mm, no annular, M2") + (tags "mounting hole 2.2mm no annular m2") + (path /5C827EBA) + (attr virtual) + (fp_text reference H3 (at 0 -3.2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value MountingHole (at 0 3.2) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 2.45 0) (layer F.CrtYd) (width 0.05)) + (fp_circle (center 0 0) (end 2.2 0) (layer Cmts.User) (width 0.15)) + (fp_text user %R (at 0.3 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 np_thru_hole circle (at 0 0) (size 2.2 2.2) (drill 2.2) (layers *.Cu *.Mask)) + ) + + (module MountingHole:MountingHole_2.2mm_M2 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5C8066C6) + (at 183.88 32.75) + (descr "Mounting Hole 2.2mm, no annular, M2") + (tags "mounting hole 2.2mm no annular m2") + (path /5C827EC1) + (attr virtual) + (fp_text reference H1 (at 0 -3.2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value MountingHole (at 0 3.2) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 2.45 0) (layer F.CrtYd) (width 0.05)) + (fp_circle (center 0 0) (end 2.2 0) (layer Cmts.User) (width 0.15)) + (fp_text user %R (at 0.3 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 np_thru_hole circle (at 0 0) (size 2.2 2.2) (drill 2.2) (layers *.Cu *.Mask)) + ) + + (module .pretty:NEW-640456-8 (layer F.Cu) (tedit 5C265171) (tstamp 5C7374E9) + (at 174.79 61.1124 90) + (path /5C29AA60) + (fp_text reference J2 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 640456-8 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.397 -3.429) (end -1.397 2.54) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 -3.429) (end -1.397 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 2.54) (end 19.177 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524)) + (fp_text user * (at 0 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user * (at 0 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0 90) (layer Cmts.User) + (effects (font (size 0.127 0.127) (thickness 0.002))) + ) + (pad 8 thru_hole circle (at 0 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 118 b1r)) + (pad 7 thru_hole circle (at 2.54 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 117 b2r)) + (pad 6 thru_hole circle (at 5.08 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 116 b3r)) + (pad 5 thru_hole circle (at 7.62 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 115 b4r)) + (pad 4 thru_hole circle (at 10.16 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 114 b5r)) + (pad 3 thru_hole circle (at 12.7 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 113 b6r)) + (pad 2 thru_hole circle (at 15.24 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 112 b7r)) + (pad 1 thru_hole circle (at 17.78 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 111 b8r)) + (model ${KISYS3DMOD}/c-640456-8-aa-3d.stp + (offset (xyz 9 0.5 2.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module .pretty:NEW-640456-8 (layer F.Cu) (tedit 5C265171) (tstamp 5C7374C8) + (at 142.617 61.1124 90) + (path /5C29ACD3) + (fp_text reference J3 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 640456-8 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.397 -3.429) (end -1.397 2.54) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 -3.429) (end -1.397 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 2.54) (end 19.177 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524)) + (fp_text user * (at 0 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user * (at 0 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0 90) (layer Cmts.User) + (effects (font (size 0.127 0.127) (thickness 0.002))) + ) + (pad 8 thru_hole circle (at 0 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 119 c1r)) + (pad 7 thru_hole circle (at 2.54 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 120 c2r)) + (pad 6 thru_hole circle (at 5.08 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 121 c3r)) + (pad 5 thru_hole circle (at 7.62 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 122 c4r)) + (pad 4 thru_hole circle (at 10.16 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 123 c5r)) + (pad 3 thru_hole circle (at 12.7 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 124 c6r)) + (pad 2 thru_hole circle (at 15.24 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 125 c7r)) + (pad 1 thru_hole circle (at 17.78 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 126 c8r)) + (model ${KISYS3DMOD}/c-640456-8-aa-3d.stp + (offset (xyz 9 0.5 2.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module .pretty:NEW-640456-8 (layer F.Cu) (tedit 5C265171) (tstamp 5C7374A7) + (at 126.53 61.1124 90) + (path /5C29AD70) + (fp_text reference J4 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 640456-8 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.397 -3.429) (end -1.397 2.54) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 -3.429) (end -1.397 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 2.54) (end 19.177 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524)) + (fp_text user * (at 0 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user * (at 0 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." 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All rights reserved." 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All rights reserved." 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All rights reserved." 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*.Cu *.Mask) + (net 128 d7r)) + (pad 2 thru_hole circle (at -7.62 -15.24) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 127 d8r)) + (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 146 GND)) + (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step + (offset (xyz -7.5 17.8 -0.2)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E41B) + (at 168.44 128.422) + (path /5C343F96) + (fp_text reference U8 (at -4.57835 -20.3229) (layer F.SilkS) + (effects (font (size 1.64228 1.64228) (thickness 0.05))) + ) + (fp_text value 74166 (at -4.32086 2.71959) (layer F.SilkS) + (effects (font (size 1.64108 1.64108) (thickness 0.05))) + ) + (fp_arc (start -3.81 -18.7452) (end -4.1148 -18.7452) (angle -180) (layer Dwgs.User) (width 0.1)) + (fp_line (start -7.112 -18.7452) (end -7.112 0.9652) (layer Dwgs.User) (width 0.1524)) + (fp_line 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SR1_CLK)) + (pad 2 thru_hole circle (at -7.62 -15.24 180) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 78 SR1_CLK_T)) + (pad 1 thru_hole rect (at -7.62 -17.78 180) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask) + (net 73 BB3.3)) + (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step + (offset (xyz -7.5 17.8 -0.2)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E2FE) + (at 140.5 106.832) + (path /5C2DCFC3) + (fp_text reference U3 (at -4.57835 -20.3229) (layer F.SilkS) + (effects (font (size 1.64228 1.64228) (thickness 0.05))) + ) + (fp_text value 74166 (at -4.32086 2.71959) (layer F.SilkS) + (effects (font (size 1.64108 1.64108) (thickness 0.05))) + ) + (fp_arc (start -3.81 -18.7452) (end -4.1148 -18.7452) (angle -180) (layer Dwgs.User) (width 0.1)) + (fp_line (start -7.112 -18.7452) (end -7.112 0.9652) (layer Dwgs.User) (width 0.1524)) + (fp_line (start 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(pad 6 thru_hole circle (at 12.7 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 114 b5r)) + (pad 5 thru_hole circle (at 10.16 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 115 b4r)) + (pad 4 thru_hole circle (at 7.62 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 116 b3r)) + (pad 3 thru_hole circle (at 5.08 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 117 b2r)) + (pad 2 thru_hole circle (at 2.54 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 118 b1r)) + (pad 1 thru_hole rect (at 0 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 146 GND)) + (model ${KIPRJMOD}/4609x.stp + (offset (xyz -1.25 0 1.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D65C8) + (at 139.43 140.7) + (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf) + (path /5C3CDE16) + (fp_text reference RN5 (at 10.3 -2.2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4609X-101-103LF (at 9.7 2.7) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.24 -1.25) (end 21.57 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 -1.25) (end -1.24 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 21.57 -1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.4 1.4) (end -0.9 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -1.4 -1.4) (end -1.4 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -0.9 -1.4) (end -1.4 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.2 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.7 -0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.7 0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.2 1.4) (layer F.SilkS) (width 0.1)) + (fp_text user %R (at 9.3 0.1) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.49 -1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end 21.82 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end -1.49 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (pad 9 thru_hole circle (at 20.32 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 126 c8r)) + (pad 8 thru_hole circle (at 17.78 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 125 c7r)) + (pad 7 thru_hole circle (at 15.24 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 124 c6r)) + (pad 6 thru_hole circle (at 12.7 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 123 c5r)) + (pad 5 thru_hole circle (at 10.16 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 122 c4r)) + (pad 4 thru_hole circle (at 7.62 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 121 c3r)) + (pad 3 thru_hole circle (at 5.08 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 120 c2r)) + (pad 2 thru_hole circle (at 2.54 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 119 c1r)) + (pad 1 thru_hole rect (at 0 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 146 GND)) + (model ${KIPRJMOD}/4609x.stp + (offset (xyz -1.25 0 1.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D65AC) + (at 139.43 147.05) + (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf) + (path /5C3CDDAC) + (fp_text reference RN6 (at 10.3 -2.2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4609X-101-103LF (at 9.7 2.7) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.24 -1.25) (end 21.57 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 -1.25) (end -1.24 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 21.57 -1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.4 1.4) (end -0.9 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -1.4 -1.4) (end -1.4 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -0.9 -1.4) (end -1.4 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.2 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.7 -0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.7 0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.2 1.4) (layer F.SilkS) (width 0.1)) + (fp_text user %R (at 9.3 0.1) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.49 -1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end 21.82 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end -1.49 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (pad 9 thru_hole circle (at 20.32 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 142 f8r)) + (pad 8 thru_hole circle (at 17.78 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 141 f7r)) + (pad 7 thru_hole circle (at 15.24 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 140 f6r)) + (pad 6 thru_hole circle (at 12.7 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 139 f5r)) + (pad 5 thru_hole circle (at 10.16 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 138 f4r)) + (pad 4 thru_hole circle (at 7.62 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 137 f3r)) + (pad 3 thru_hole circle (at 5.08 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 136 f2r)) + (pad 2 thru_hole circle (at 2.54 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 135 f1r)) + (pad 1 thru_hole rect (at 0 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 146 GND)) + (model ${KIPRJMOD}/4609x.stp + (offset (xyz -1.25 0 1.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D6590) + (at 166.1 61.9429 90) + (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf) + (path /5C3CDCE8) + (fp_text reference RN4 (at 10.3 -2.2 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4609X-101-103LF (at 9.7 2.7 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.24 -1.25) (end 21.57 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 -1.25) (end -1.24 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 21.57 -1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.4 1.4) (end -0.9 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -1.4 -1.4) (end -1.4 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -0.9 -1.4) (end -1.4 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.2 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.7 -0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.7 0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.2 1.4) (layer F.SilkS) (width 0.1)) + (fp_text user %R (at 9.3 0.1 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.49 -1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end 21.82 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end -1.49 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (pad 9 thru_hole circle (at 20.32 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 95 e8r)) + (pad 8 thru_hole circle (at 17.78 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 96 e7r)) + (pad 7 thru_hole circle (at 15.24 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 97 e6r)) + (pad 6 thru_hole circle (at 12.7 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 98 e5r)) + (pad 5 thru_hole circle (at 10.16 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 99 e4r)) + (pad 4 thru_hole circle (at 7.62 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 100 e3r)) + (pad 3 thru_hole circle (at 5.08 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 101 e2r)) + (pad 2 thru_hole circle (at 2.54 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 102 e1r)) + (pad 1 thru_hole rect (at 0 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 146 GND)) + (model ${KIPRJMOD}/4609x.stp + (offset (xyz -1.25 0 1.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module Socket_BeagleBone_Black:Socket_BeagleBone_Black (layer F.Cu) (tedit 0) (tstamp 55DF7717) + (at 173.52 89.052) + (descr "Through hole pin header") + (tags "pin header") + (path /55DF7DE1) + (fp_text reference P8 (at 0 -5.1) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value BeagleBone_Black_Header (at 0 -3.1) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 57.15) (end -1.27 57.15) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 57.15) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 57.15) (end 3.81 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.75 57.65) (end 4.3 57.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.3 -1.75) (end 4.3 57.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 57.65) (layer F.CrtYd) (width 0.05)) + (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 32 "Net-(P8-Pad46)")) + (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 79 7SEG_CLK)) + (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 31 "Net-(P8-Pad44)")) + (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 80 7SEG_DIO)) + (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 30 "Net-(P8-Pad42)")) + (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 29 "Net-(P8-Pad41)")) + (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 28 "Net-(P8-Pad40)")) + (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 27 "Net-(P8-Pad39)")) + (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 26 "Net-(P8-Pad38)")) + (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 25 "Net-(P8-Pad37)")) + (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 24 "Net-(P8-Pad36)")) + (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 23 "Net-(P8-Pad35)")) + (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 22 "Net-(P8-Pad34)")) + (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 21 "Net-(P8-Pad33)")) + (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 20 "Net-(P8-Pad32)")) + (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 19 "Net-(P8-Pad31)")) + (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 18 "Net-(P8-Pad30)")) + (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 17 "Net-(P8-Pad29)")) + (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 16 "Net-(P8-Pad28)")) + (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 15 "Net-(P8-Pad27)")) + (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 14 "Net-(P8-Pad26)")) + (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 13 "Net-(P8-Pad25)")) + (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 12 "Net-(P8-Pad24)")) + (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 11 "Net-(P8-Pad23)")) + (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 10 "Net-(P8-Pad22)")) + (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 9 "Net-(P8-Pad21)")) + (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 8 "Net-(P8-Pad20)")) + (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 7 "Net-(P8-Pad19)")) + (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 81 SR6_QH_T)) + (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 67 SR1_CLR)) + (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 82 SR5_QH_T)) + (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 68 SR1_SHLD)) + (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 83 SR4_QH_T)) + (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 6 "Net-(P8-Pad13)")) + (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 84 SR3_QH_T)) + (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 69 SR1_CLK)) + (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 5 "Net-(P8-Pad10)")) + (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 4 "Net-(P8-Pad9)")) + (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 3 "Net-(P8-Pad8)")) + (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 2 "Net-(P8-Pad7)")) + (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 85 SR2_QH_T)) + (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 70 SR1_CLKINH)) + (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 71 SR1_QH_T)) + (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 "Net-(P8-Pad3)")) + (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 143 "Net-(P8-Pad2)")) + (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 144 "Net-(P8-Pad1)")) + (model ${KIPRJMOD}/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl + (offset (xyz 1.269999980926514 -27.9399995803833 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module Socket_BeagleBone_Black:Socket_BeagleBone_Black (layer F.Cu) (tedit 0) (tstamp 55DF7748) + (at 125.26 89.052) + (descr "Through hole pin header") + (tags "pin header") + (path /55DF7DBA) + (fp_text reference P9 (at 0 -5.1) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value BeagleBone_Black_Header (at 0 -3.1) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 57.15) (end -1.27 57.15) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 57.15) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 57.15) (end 3.81 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.75 57.65) (end 4.3 57.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.3 -1.75) (end 4.3 57.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 57.65) (layer F.CrtYd) (width 0.05)) + (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 145 GNDD)) + (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 145 GNDD)) + (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 145 GNDD)) + (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 145 GNDD)) + (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 62 "Net-(P9-Pad42)")) + (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 61 "Net-(P9-Pad41)")) + (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 60 "Net-(P9-Pad40)")) + (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 59 "Net-(P9-Pad39)")) + (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 58 "Net-(P9-Pad38)")) + (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 57 "Net-(P9-Pad37)")) + (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 56 "Net-(P9-Pad36)")) + (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 55 "Net-(P9-Pad35)")) + (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 66 GNDA_ADC)) + (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 54 "Net-(P9-Pad33)")) + (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 65 VDD_ADC)) + (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 53 "Net-(P9-Pad31)")) + (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 52 "Net-(P9-Pad30)")) + (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 51 "Net-(P9-Pad29)")) + (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 50 "Net-(P9-Pad28)")) + (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 49 "Net-(P9-Pad27)")) + (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 48 "Net-(P9-Pad26)")) + (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 47 "Net-(P9-Pad25)")) + (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 46 "Net-(P9-Pad24)")) + (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 45 "Net-(P9-Pad23)")) + (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 44 "Net-(P9-Pad22)")) + (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 43 "Net-(P9-Pad21)")) + (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 42 "Net-(P9-Pad20)")) + (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 41 "Net-(P9-Pad19)")) + (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 40 "Net-(P9-Pad18)")) + (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 39 "Net-(P9-Pad17)")) + (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 38 "Net-(P9-Pad16)")) + (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 37 "Net-(P9-Pad15)")) + (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 36 "Net-(P9-Pad14)")) + (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 35 "Net-(P9-Pad13)")) + (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 34 "Net-(P9-Pad12)")) + (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 33 "Net-(P9-Pad11)")) + (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 64 SYS_RESETN)) + (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 63 PWR_BUT)) + (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 72 5v)) + (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 72 5v)) + (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 72 5v)) + (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 72 5v)) + (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 86 +3V3)) + (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 86 +3V3)) + (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 146 GND)) + (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 147 "Net-(P9-Pad1)")) + (model ${KIPRJMOD}/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl + (offset (xyz 1.269999980926514 -27.9399995803833 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module MountingHole:MountingHole_2.2mm_M2 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5C8066CE) + (at 110.22 150.86) + (descr "Mounting Hole 2.2mm, no annular, M2") + (tags "mounting hole 2.2mm no annular m2") + (path /5C81F04C) + (attr virtual) + (fp_text reference H2 (at 0 -3.2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value MountingHole (at 0 3.2) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 2.45 0) (layer F.CrtYd) (width 0.05)) + (fp_circle (center 0 0) (end 2.2 0) (layer Cmts.User) (width 0.15)) + (fp_text user %R (at 0.3 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 np_thru_hole circle (at 0 0) (size 2.2 2.2) (drill 2.2) (layers *.Cu *.Mask)) + ) + + (module MountingHole:MountingHole_2.2mm_M2 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5C8066DE) + (at 183.88 150.86) + (descr "Mounting Hole 2.2mm, no annular, M2") + (tags "mounting hole 2.2mm no annular m2") + (path /5C81EB00) + (attr virtual) + (fp_text reference H4 (at 0 -3.2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value MountingHole (at 0 3.2) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 2.45 0) (layer F.CrtYd) (width 0.05)) + (fp_circle (center 0 0) (end 2.2 0) (layer Cmts.User) (width 0.15)) + (fp_text user %R (at 0.3 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 np_thru_hole circle (at 0 0) (size 2.2 2.2) (drill 2.2) (layers *.Cu *.Mask)) + ) + + (gr_line (start 106.41 154.67) (end 187.69 154.67) (layer Edge.Cuts) (width 0.00254)) + (gr_line (start 106.41 28.94) (end 106.41 154.67) (layer Edge.Cuts) (width 0.00254)) + (gr_line (start 110.22 28.94) (end 106.41 28.94) (layer Edge.Cuts) (width 0.00254)) + (gr_line (start 187.69 28.94) (end 110.22 28.94) (layer Edge.Cuts) (width 0.00254)) + (gr_line (start 187.69 154.67) (end 187.69 28.94) (layer Edge.Cuts) (width 0.00254)) + +) diff --git a/bbb-bort.kicad_pcb-bak b/bbb-bort.kicad_pcb-bak new file mode 100644 index 0000000..ac4b4cd --- /dev/null +++ b/bbb-bort.kicad_pcb-bak @@ -0,0 +1,2319 @@ +(kicad_pcb (version 20171130) (host pcbnew "(5.0.1)-3") + + (general + (thickness 1.6) + (drawings 5) + (tracks 0) + (zones 0) + (modules 22) + (nets 148) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.25) + (trace_clearance 0.2) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.2) + (segment_width 0.2) + (edge_width 0.00254) + (via_size 0.6) + (via_drill 0.4) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.7272 1.7272) + (pad_drill 1.016) + (pad_to_mask_clearance 0) + (solder_mask_min_width 0.25) + (aux_axis_origin 0 0) + (grid_origin 115.3 145.78) + (visible_elements 7FFFF7FF) + (pcbplotparams + (layerselection 0x01030_80000001) + (usegerberextensions false) + (usegerberattributes false) + (usegerberadvancedattributes false) + (creategerberjobfile false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 4) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "")) + ) + + (net 0 "") + (net 1 "Net-(P8-Pad3)") + (net 2 "Net-(P8-Pad7)") + (net 3 "Net-(P8-Pad8)") + (net 4 "Net-(P8-Pad9)") + (net 5 "Net-(P8-Pad10)") + (net 6 "Net-(P8-Pad13)") + (net 7 "Net-(P8-Pad19)") + (net 8 "Net-(P8-Pad20)") + (net 9 "Net-(P8-Pad21)") + (net 10 "Net-(P8-Pad22)") + (net 11 "Net-(P8-Pad23)") + (net 12 "Net-(P8-Pad24)") + (net 13 "Net-(P8-Pad25)") + (net 14 "Net-(P8-Pad26)") + (net 15 "Net-(P8-Pad27)") + (net 16 "Net-(P8-Pad28)") + (net 17 "Net-(P8-Pad29)") + (net 18 "Net-(P8-Pad30)") + (net 19 "Net-(P8-Pad31)") + (net 20 "Net-(P8-Pad32)") + (net 21 "Net-(P8-Pad33)") + (net 22 "Net-(P8-Pad34)") + (net 23 "Net-(P8-Pad35)") + (net 24 "Net-(P8-Pad36)") + (net 25 "Net-(P8-Pad37)") + (net 26 "Net-(P8-Pad38)") + (net 27 "Net-(P8-Pad39)") + (net 28 "Net-(P8-Pad40)") + (net 29 "Net-(P8-Pad41)") + (net 30 "Net-(P8-Pad42)") + (net 31 "Net-(P8-Pad44)") + (net 32 "Net-(P8-Pad46)") + (net 33 "Net-(P9-Pad11)") + (net 34 "Net-(P9-Pad12)") + (net 35 "Net-(P9-Pad13)") + (net 36 "Net-(P9-Pad14)") + (net 37 "Net-(P9-Pad15)") + (net 38 "Net-(P9-Pad16)") + (net 39 "Net-(P9-Pad17)") + (net 40 "Net-(P9-Pad18)") + (net 41 "Net-(P9-Pad19)") + (net 42 "Net-(P9-Pad20)") + (net 43 "Net-(P9-Pad21)") + (net 44 "Net-(P9-Pad22)") + (net 45 "Net-(P9-Pad23)") + (net 46 "Net-(P9-Pad24)") + (net 47 "Net-(P9-Pad25)") + (net 48 "Net-(P9-Pad26)") + (net 49 "Net-(P9-Pad27)") + (net 50 "Net-(P9-Pad28)") + (net 51 "Net-(P9-Pad29)") + (net 52 "Net-(P9-Pad30)") + (net 53 "Net-(P9-Pad31)") + (net 54 "Net-(P9-Pad33)") + (net 55 "Net-(P9-Pad35)") + (net 56 "Net-(P9-Pad36)") + (net 57 "Net-(P9-Pad37)") + (net 58 "Net-(P9-Pad38)") + (net 59 "Net-(P9-Pad39)") + (net 60 "Net-(P9-Pad40)") + (net 61 "Net-(P9-Pad41)") + (net 62 "Net-(P9-Pad42)") + (net 63 PWR_BUT) + (net 64 SYS_RESETN) + (net 65 VDD_ADC) + (net 66 GNDA_ADC) + (net 67 SR1_CLR) + (net 68 SR1_SHLD) + (net 69 SR1_CLK) + (net 70 SR1_CLKINH) + (net 71 SR1_QH_T) + (net 72 5v) + (net 73 BB3.3) + (net 74 SR1_QH) + (net 75 SR1_CLR_T) + (net 76 SR1_SHLD_T) + (net 77 SR1_CLKINH_T) + (net 78 SR1_CLK_T) + (net 79 7SEG_CLK) + (net 80 7SEG_DIO) + (net 81 SR6_QH_T) + (net 82 SR5_QH_T) + (net 83 SR4_QH_T) + (net 84 SR3_QH_T) + (net 85 SR2_QH_T) + (net 86 +3V3) + (net 87 SR2_QH__T) + (net 88 SR2_QH) + (net 89 SR3_QH) + (net 90 SR4_QH) + (net 91 SR5_QH) + (net 92 SR6_QH) + (net 93 7SEG_DIO_T) + (net 94 7SEG_CLK_T) + (net 95 e8r) + (net 96 e7r) + (net 97 e6r) + (net 98 e5r) + (net 99 e4r) + (net 100 e3r) + (net 101 e2r) + (net 102 e1r) + (net 103 a1r) + (net 104 a2r) + (net 105 a3r) + (net 106 a4r) + (net 107 a5r) + (net 108 a6r) + (net 109 a7r) + (net 110 a8r) + (net 111 b8r) + (net 112 b7r) + (net 113 b6r) + (net 114 b5r) + (net 115 b4r) + (net 116 b3r) + (net 117 b2r) + (net 118 b1r) + (net 119 c1r) + (net 120 c2r) + (net 121 c3r) + (net 122 c4r) + (net 123 c5r) + (net 124 c6r) + (net 125 c7r) + (net 126 c8r) + (net 127 d8r) + (net 128 d7r) + (net 129 d6r) + (net 130 d5r) + (net 131 d4r) + (net 132 d3r) + (net 133 d2r) + (net 134 d1r) + (net 135 f1r) + (net 136 f2r) + (net 137 f3r) + (net 138 f4r) + (net 139 f5r) + (net 140 f6r) + (net 141 f7r) + (net 142 f8r) + (net 143 "Net-(P8-Pad2)") + (net 144 "Net-(P8-Pad1)") + (net 145 GNDD) + (net 146 GND) + (net 147 "Net-(P9-Pad1)") + + (net_class Default "To jest domyślna klasa połączeń." + (clearance 0.2) + (trace_width 0.25) + (via_dia 0.6) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +3V3) + (add_net 5v) + (add_net 7SEG_CLK) + (add_net 7SEG_CLK_T) + (add_net 7SEG_DIO) + (add_net 7SEG_DIO_T) + (add_net BB3.3) + (add_net GND) + (add_net GNDA_ADC) + (add_net GNDD) + (add_net "Net-(P8-Pad1)") + (add_net "Net-(P8-Pad10)") + (add_net "Net-(P8-Pad13)") + (add_net "Net-(P8-Pad19)") + (add_net "Net-(P8-Pad2)") + (add_net "Net-(P8-Pad20)") + (add_net "Net-(P8-Pad21)") + (add_net "Net-(P8-Pad22)") + (add_net "Net-(P8-Pad23)") + (add_net "Net-(P8-Pad24)") + (add_net "Net-(P8-Pad25)") + (add_net "Net-(P8-Pad26)") + (add_net "Net-(P8-Pad27)") + (add_net "Net-(P8-Pad28)") + (add_net "Net-(P8-Pad29)") + (add_net "Net-(P8-Pad3)") + (add_net "Net-(P8-Pad30)") + (add_net "Net-(P8-Pad31)") + (add_net "Net-(P8-Pad32)") + (add_net "Net-(P8-Pad33)") + (add_net "Net-(P8-Pad34)") + (add_net "Net-(P8-Pad35)") + (add_net "Net-(P8-Pad36)") + (add_net "Net-(P8-Pad37)") + (add_net "Net-(P8-Pad38)") + (add_net "Net-(P8-Pad39)") + (add_net "Net-(P8-Pad40)") + (add_net "Net-(P8-Pad41)") + (add_net "Net-(P8-Pad42)") + (add_net "Net-(P8-Pad44)") + (add_net "Net-(P8-Pad46)") + (add_net "Net-(P8-Pad7)") + (add_net "Net-(P8-Pad8)") + (add_net "Net-(P8-Pad9)") + (add_net "Net-(P9-Pad1)") + (add_net "Net-(P9-Pad11)") + (add_net "Net-(P9-Pad12)") + (add_net "Net-(P9-Pad13)") + (add_net "Net-(P9-Pad14)") + (add_net "Net-(P9-Pad15)") + (add_net "Net-(P9-Pad16)") + (add_net "Net-(P9-Pad17)") + (add_net "Net-(P9-Pad18)") + (add_net "Net-(P9-Pad19)") + (add_net "Net-(P9-Pad20)") + (add_net "Net-(P9-Pad21)") + (add_net "Net-(P9-Pad22)") + (add_net "Net-(P9-Pad23)") + (add_net "Net-(P9-Pad24)") + (add_net "Net-(P9-Pad25)") + (add_net "Net-(P9-Pad26)") + (add_net "Net-(P9-Pad27)") + (add_net "Net-(P9-Pad28)") + (add_net "Net-(P9-Pad29)") + (add_net "Net-(P9-Pad30)") + (add_net "Net-(P9-Pad31)") + (add_net "Net-(P9-Pad33)") + (add_net "Net-(P9-Pad35)") + (add_net "Net-(P9-Pad36)") + (add_net "Net-(P9-Pad37)") + (add_net "Net-(P9-Pad38)") + (add_net "Net-(P9-Pad39)") + (add_net "Net-(P9-Pad40)") + (add_net "Net-(P9-Pad41)") + (add_net "Net-(P9-Pad42)") + (add_net PWR_BUT) + (add_net SR1_CLK) + (add_net SR1_CLKINH) + (add_net SR1_CLKINH_T) + (add_net SR1_CLK_T) + (add_net SR1_CLR) + (add_net SR1_CLR_T) + (add_net SR1_QH) + (add_net SR1_QH_T) + (add_net SR1_SHLD) + (add_net SR1_SHLD_T) + (add_net SR2_QH) + (add_net SR2_QH_T) + (add_net SR2_QH__T) + (add_net SR3_QH) + (add_net SR3_QH_T) + (add_net SR4_QH) + (add_net SR4_QH_T) + (add_net SR5_QH) + (add_net SR5_QH_T) + (add_net SR6_QH) + (add_net SR6_QH_T) + (add_net SYS_RESETN) + (add_net VDD_ADC) + (add_net a1r) + (add_net a2r) + (add_net a3r) + (add_net a4r) + (add_net a5r) + (add_net a6r) + (add_net a7r) + (add_net a8r) + (add_net b1r) + (add_net b2r) + (add_net b3r) + (add_net b4r) + (add_net b5r) + (add_net b6r) + (add_net b7r) + (add_net b8r) + (add_net c1r) + (add_net c2r) + (add_net c3r) + (add_net c4r) + (add_net c5r) + (add_net c6r) + (add_net c7r) + (add_net c8r) + (add_net d1r) + (add_net d2r) + (add_net d3r) + (add_net d4r) + (add_net d5r) + (add_net d6r) + (add_net d7r) + (add_net d8r) + (add_net e1r) + (add_net e2r) + (add_net e3r) + (add_net e4r) + (add_net e5r) + (add_net e6r) + (add_net e7r) + (add_net e8r) + (add_net f1r) + (add_net f2r) + (add_net f3r) + (add_net f4r) + (add_net f5r) + (add_net f6r) + (add_net f7r) + (add_net f8r) + ) + + (module .pretty:NEW-640456-8 (layer F.Cu) (tedit 5C265171) (tstamp 5C7374E9) + (at 172.25 54.7624 90) + (path /5C29AA60) + (fp_text reference J2 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 640456-8 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.397 -3.429) (end -1.397 2.54) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 -3.429) (end -1.397 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 2.54) (end 19.177 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524)) + (fp_text user * (at 0 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user * (at 0 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0 90) (layer Cmts.User) + (effects (font (size 0.127 0.127) (thickness 0.002))) + ) + (pad 8 thru_hole circle (at 0 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 118 b1r)) + (pad 7 thru_hole circle (at 2.54 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 117 b2r)) + (pad 6 thru_hole circle (at 5.08 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 116 b3r)) + (pad 5 thru_hole circle (at 7.62 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 115 b4r)) + (pad 4 thru_hole circle (at 10.16 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 114 b5r)) + (pad 3 thru_hole circle (at 12.7 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 113 b6r)) + (pad 2 thru_hole circle (at 15.24 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 112 b7r)) + (pad 1 thru_hole circle (at 17.78 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 111 b8r)) + (model ${KISYS3DMOD}/c-640456-8-aa-3d.stp + (offset (xyz 9 0.5 2.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module .pretty:NEW-640456-8 (layer F.Cu) (tedit 5C265171) (tstamp 5C7374C8) + (at 140.077 54.7624 90) + (path /5C29ACD3) + (fp_text reference J3 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 640456-8 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0 90) (layer Cmts.User) + (effects (font (size 0.127 0.127) (thickness 0.002))) + ) + (fp_text user * (at 0 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user * (at 0 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 2.54) (end 19.177 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 -3.429) (end -1.397 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.397 -3.429) (end -1.397 2.54) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524)) + (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524)) + (pad 1 thru_hole circle (at 17.78 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 126 c8r)) + (pad 2 thru_hole circle (at 15.24 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 125 c7r)) + (pad 3 thru_hole circle (at 12.7 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 124 c6r)) + (pad 4 thru_hole circle (at 10.16 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 123 c5r)) + (pad 5 thru_hole circle (at 7.62 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 122 c4r)) + (pad 6 thru_hole circle (at 5.08 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 121 c3r)) + (pad 7 thru_hole circle (at 2.54 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 120 c2r)) + (pad 8 thru_hole circle (at 0 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask) + (net 119 c1r)) + (model ${KISYS3DMOD}/c-640456-8-aa-3d.stp + (offset (xyz 9 0.5 2.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module .pretty:NEW-640456-8 (layer F.Cu) (tedit 5C265171) (tstamp 5C7374A7) + (at 123.99 54.7624 90) + (path /5C29AD70) + (fp_text reference J4 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 640456-8 (at 8.89 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524)) + (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524)) + (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.Fab) (width 0.1524)) + (fp_line (start -1.397 -3.429) (end -1.397 2.54) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 -3.429) (end -1.397 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start 19.177 2.54) (end 19.177 -3.429) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524)) + (fp_text user * (at 0 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user * (at 0 0 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." 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All rights reserved." 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All rights reserved." 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All rights reserved." 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21.7 0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.2 1.4) (layer F.SilkS) (width 0.1)) + (fp_text user %R (at 9.3 0.1 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.49 -1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end 21.82 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end -1.49 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (pad 9 thru_hole circle (at 20.32 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 111 b8r)) + (pad 8 thru_hole circle (at 17.78 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 112 b7r)) + (pad 7 thru_hole circle (at 15.24 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 113 b6r)) + (pad 6 thru_hole circle (at 12.7 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 114 b5r)) + (pad 5 thru_hole circle (at 10.16 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 115 b4r)) + (pad 4 thru_hole circle (at 7.62 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 116 b3r)) + (pad 3 thru_hole circle (at 5.08 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 117 b2r)) + (pad 2 thru_hole circle (at 2.54 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 118 b1r)) + (pad 1 thru_hole rect (at 0 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 146 GND)) + (model ${KIPRJMOD}/4609x.stp + (offset (xyz -1.25 0 1.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D65C8) + (at 136.89 134.35) + (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf) + (path /5C3CDE16) + (fp_text reference RN5 (at 10.3 -2.2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4609X-101-103LF (at 9.7 2.7) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end -1.49 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end 21.82 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.49 -1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 9.3 0.1) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 21.7 1.4) (end 21.2 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.7 0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.7 -0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.2 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -0.9 -1.4) (end -1.4 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -1.4 -1.4) (end -1.4 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -1.4 1.4) (end -0.9 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.57 -1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 -1.25) (end -1.24 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 -1.25) (end 21.57 -1.25) (layer F.Fab) (width 0.1)) + (pad 1 thru_hole rect (at 0 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 146 GND)) + (pad 2 thru_hole circle (at 2.54 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 119 c1r)) + (pad 3 thru_hole circle (at 5.08 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 120 c2r)) + (pad 4 thru_hole circle (at 7.62 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 121 c3r)) + (pad 5 thru_hole circle (at 10.16 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 122 c4r)) + (pad 6 thru_hole circle (at 12.7 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 123 c5r)) + (pad 7 thru_hole circle (at 15.24 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 124 c6r)) + (pad 8 thru_hole circle (at 17.78 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 125 c7r)) + (pad 9 thru_hole circle (at 20.32 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 126 c8r)) + (model ${KIPRJMOD}/4609x.stp + (offset (xyz -1.25 0 1.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D65AC) + (at 136.89 140.7) + (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf) + (path /5C3CDDAC) + (fp_text reference RN6 (at 10.3 -2.2) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4609X-101-103LF (at 9.7 2.7) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.24 -1.25) (end 21.57 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 -1.25) (end -1.24 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 21.57 -1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.4 1.4) (end -0.9 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -1.4 -1.4) (end -1.4 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -0.9 -1.4) (end -1.4 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.2 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.7 -0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.7 0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.2 1.4) (layer F.SilkS) (width 0.1)) + (fp_text user %R (at 9.3 0.1) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.49 -1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end 21.82 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end -1.49 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (pad 9 thru_hole circle (at 20.32 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 142 f8r)) + (pad 8 thru_hole circle (at 17.78 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 141 f7r)) + (pad 7 thru_hole circle (at 15.24 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 140 f6r)) + (pad 6 thru_hole circle (at 12.7 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 139 f5r)) + (pad 5 thru_hole circle (at 10.16 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 138 f4r)) + (pad 4 thru_hole circle (at 7.62 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 137 f3r)) + (pad 3 thru_hole circle (at 5.08 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 136 f2r)) + (pad 2 thru_hole circle (at 2.54 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 135 f1r)) + (pad 1 thru_hole rect (at 0 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 146 GND)) + (model ${KIPRJMOD}/4609x.stp + (offset (xyz -1.25 0 1.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D6590) + (at 163.56 55.5929 90) + (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf) + (path /5C3CDCE8) + (fp_text reference RN4 (at 10.3 -2.2 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4609X-101-103LF (at 9.7 2.7 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end -1.49 -1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 21.82 -1.5) (end 21.82 1.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.49 -1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 9.3 0.1 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 21.7 1.4) (end 21.2 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 1.4) (end 21.7 0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.7 -0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.7 -1.4) (end 21.2 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -0.9 -1.4) (end -1.4 -1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -1.4 -1.4) (end -1.4 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start -1.4 1.4) (end -0.9 1.4) (layer F.SilkS) (width 0.1)) + (fp_line (start 21.57 -1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 -1.25) (end -1.24 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.24 -1.25) (end 21.57 -1.25) (layer F.Fab) (width 0.1)) + (pad 1 thru_hole rect (at 0 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 146 GND)) + (pad 2 thru_hole circle (at 2.54 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 102 e1r)) + (pad 3 thru_hole circle (at 5.08 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 101 e2r)) + (pad 4 thru_hole circle (at 7.62 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 100 e3r)) + (pad 5 thru_hole circle (at 10.16 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 99 e4r)) + (pad 6 thru_hole circle (at 12.7 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 98 e5r)) + (pad 7 thru_hole circle (at 15.24 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 97 e6r)) + (pad 8 thru_hole circle (at 17.78 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 96 e7r)) + (pad 9 thru_hole circle (at 20.32 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask) + (net 95 e8r)) + (model ${KIPRJMOD}/4609x.stp + (offset (xyz -1.25 0 1.5)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module Socket_BeagleBone_Black:Socket_BeagleBone_Black (layer F.Cu) (tedit 0) (tstamp 55DF7717) + (at 170.98 82.702) + (descr "Through hole pin header") + (tags "pin header") + (path /55DF7DE1) + (fp_text reference P8 (at 0 -5.1) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value BeagleBone_Black_Header (at 0 -3.1) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 57.15) (end -1.27 57.15) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 57.15) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 57.15) (end 3.81 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.75 57.65) (end 4.3 57.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.3 -1.75) (end 4.3 57.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 57.65) (layer F.CrtYd) (width 0.05)) + (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 32 "Net-(P8-Pad46)")) + (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 79 7SEG_CLK)) + (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 31 "Net-(P8-Pad44)")) + (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 80 7SEG_DIO)) + (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 30 "Net-(P8-Pad42)")) + (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 29 "Net-(P8-Pad41)")) + (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 28 "Net-(P8-Pad40)")) + (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 27 "Net-(P8-Pad39)")) + (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 26 "Net-(P8-Pad38)")) + (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 25 "Net-(P8-Pad37)")) + (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 24 "Net-(P8-Pad36)")) + (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 23 "Net-(P8-Pad35)")) + (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 22 "Net-(P8-Pad34)")) + (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 21 "Net-(P8-Pad33)")) + (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 20 "Net-(P8-Pad32)")) + (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 19 "Net-(P8-Pad31)")) + (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 18 "Net-(P8-Pad30)")) + (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 17 "Net-(P8-Pad29)")) + (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 16 "Net-(P8-Pad28)")) + (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 15 "Net-(P8-Pad27)")) + (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 14 "Net-(P8-Pad26)")) + (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 13 "Net-(P8-Pad25)")) + (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 12 "Net-(P8-Pad24)")) + (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 11 "Net-(P8-Pad23)")) + (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 10 "Net-(P8-Pad22)")) + (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 9 "Net-(P8-Pad21)")) + (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 8 "Net-(P8-Pad20)")) + (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 7 "Net-(P8-Pad19)")) + (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 81 SR6_QH_T)) + (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 67 SR1_CLR)) + (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 82 SR5_QH_T)) + (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 68 SR1_SHLD)) + (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 83 SR4_QH_T)) + (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 6 "Net-(P8-Pad13)")) + (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 84 SR3_QH_T)) + (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 69 SR1_CLK)) + (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 5 "Net-(P8-Pad10)")) + (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 4 "Net-(P8-Pad9)")) + (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 3 "Net-(P8-Pad8)")) + (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 2 "Net-(P8-Pad7)")) + (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 85 SR2_QH_T)) + (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 70 SR1_CLKINH)) + (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 71 SR1_QH_T)) + (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 "Net-(P8-Pad3)")) + (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 143 "Net-(P8-Pad2)")) + (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 144 "Net-(P8-Pad1)")) + (model ${KIPRJMOD}/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl + (offset (xyz 1.269999980926514 -27.9399995803833 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module Socket_BeagleBone_Black:Socket_BeagleBone_Black (layer F.Cu) (tedit 0) (tstamp 55DF7748) + (at 122.72 82.702) + (descr "Through hole pin header") + (tags "pin header") + (path /55DF7DBA) + (fp_text reference P9 (at 0 -5.1) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value BeagleBone_Black_Header (at 0 -3.1) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 57.15) (end -1.27 57.15) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.27 57.15) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.81 57.15) (end 3.81 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.75 57.65) (end 4.3 57.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.3 -1.75) (end 4.3 57.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 57.65) (layer F.CrtYd) (width 0.05)) + (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 145 GNDD)) + (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 145 GNDD)) + (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 145 GNDD)) + (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 145 GNDD)) + (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 62 "Net-(P9-Pad42)")) + (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 61 "Net-(P9-Pad41)")) + (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 60 "Net-(P9-Pad40)")) + (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 59 "Net-(P9-Pad39)")) + (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 58 "Net-(P9-Pad38)")) + (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 57 "Net-(P9-Pad37)")) + (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 56 "Net-(P9-Pad36)")) + (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 55 "Net-(P9-Pad35)")) + (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 66 GNDA_ADC)) + (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 54 "Net-(P9-Pad33)")) + (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 65 VDD_ADC)) + (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 53 "Net-(P9-Pad31)")) + (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 52 "Net-(P9-Pad30)")) + (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 51 "Net-(P9-Pad29)")) + (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 50 "Net-(P9-Pad28)")) + (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 49 "Net-(P9-Pad27)")) + (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 48 "Net-(P9-Pad26)")) + (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 47 "Net-(P9-Pad25)")) + (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 46 "Net-(P9-Pad24)")) + (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 45 "Net-(P9-Pad23)")) + (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 44 "Net-(P9-Pad22)")) + (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 43 "Net-(P9-Pad21)")) + (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 42 "Net-(P9-Pad20)")) + (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 41 "Net-(P9-Pad19)")) + (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 40 "Net-(P9-Pad18)")) + (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 39 "Net-(P9-Pad17)")) + (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 38 "Net-(P9-Pad16)")) + (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 37 "Net-(P9-Pad15)")) + (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 36 "Net-(P9-Pad14)")) + (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 35 "Net-(P9-Pad13)")) + (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 34 "Net-(P9-Pad12)")) + (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 33 "Net-(P9-Pad11)")) + (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 64 SYS_RESETN)) + (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 63 PWR_BUT)) + (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 72 5v)) + (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 72 5v)) + (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 72 5v)) + (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 72 5v)) + (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 86 +3V3)) + (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 86 +3V3)) + (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 146 GND)) + (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 147 "Net-(P9-Pad1)")) + (model ${KIPRJMOD}/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl + (offset (xyz 1.269999980926514 -27.9399995803833 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (gr_line (start 180.07 145.78) (end 115.3 145.78) (layer Edge.Cuts) (width 0.00254)) + (gr_line (start 180.07 144.51) (end 180.07 145.78) (layer Edge.Cuts) (width 0.00254)) + (gr_line (start 180.07 30.21) (end 180.07 144.51) (layer Edge.Cuts) (width 0.00254)) + (gr_line (start 115.3 30.21) (end 180.07 30.21) (layer Edge.Cuts) (width 0.00254)) + (gr_line (start 115.3 145.78) (end 115.3 30.21) (layer Edge.Cuts) (width 0.00254)) + +) diff --git a/bbb-bort.net b/bbb-bort.net new file mode 100644 index 0000000..eba961b --- /dev/null +++ b/bbb-bort.net @@ -0,0 +1,883 @@ +(export (version D) + (design + (source C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort.sch) + (date "12/28/2018 10:56:58 AM") + (tool "Eeschema (5.0.1)-3") + (sheet (number 1) (name /) (tstamps /) + (title_block + (title "bort's brain") + (company "kremlinware unlimited") + (rev A1) + (date 2018-12-28) + (source bbb-bort.sch) + (comment (number 1) (value "i'm the one who press that button")) + (comment (number 2) (value "sweaty palms get caught bluffin")) + (comment (number 3) (value "fold a man into nothin, for nothin")) + (comment (number 4) (value ""))))) + (components + (comp (ref P8) + (value BeagleBone_Black_Header) + (footprint Socket_BeagleBone_Black:Socket_BeagleBone_Black) + (libsource (lib Connector_Generic) (part Conn_02x23_Odd_Even) (description "Generic connector, double row, 02x23, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)")) + (sheetpath (names /) (tstamps /)) + (tstamp 55DF7DE1)) + (comp (ref U3) + (value 74166) + (footprint kicad-library:NEW-DIP254P762X508-16) + (libsource (lib 74xx_IEEE) (part 74166) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C2DCFC3)) + (comp (ref U1) + (value 4504) + (footprint kicad-library:NEW-DIP254P762X508-16) + (datasheet http://www.ti.com/lit/ds/symlink/cd4504b.pdf) + (libsource (lib 4xxx) (part 4504) (description "CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS, DIP-16/SOIC-16/TSSOP-16")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C2E1ABC)) + (comp (ref U2) + (value 4504) + (footprint kicad-library:NEW-DIP254P762X508-16) + (datasheet http://www.ti.com/lit/ds/symlink/cd4504b.pdf) + (libsource (lib 4xxx) (part 4504) (description "CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS, DIP-16/SOIC-16/TSSOP-16")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C2E1BA8)) + (comp (ref U7) + (value 74166) + (footprint kicad-library:NEW-DIP254P762X508-16) + (libsource (lib 74xx_IEEE) (part 74166) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C339CD5)) + (comp (ref U6) + (value 74166) + (footprint kicad-library:NEW-DIP254P762X508-16) + (libsource (lib 74xx_IEEE) (part 74166) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C345D5D)) + (comp (ref U5) + (value 74166) + (footprint kicad-library:NEW-DIP254P762X508-16) + (libsource (lib 74xx_IEEE) (part 74166) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C346672)) + (comp (ref U4) + (value 74166) + (footprint kicad-library:NEW-DIP254P762X508-16) + (libsource (lib 74xx_IEEE) (part 74166) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C347042)) + (comp (ref J1) + (value 640456-8) + (footprint .pretty:NEW-640456-8) + (libsource (lib symbols) (part 640456-8) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C29A912)) + (comp (ref J2) + (value 640456-8) + (footprint .pretty:NEW-640456-8) + (libsource (lib symbols) (part 640456-8) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C29AA60)) + (comp (ref J3) + (value 640456-8) + (footprint .pretty:NEW-640456-8) + (libsource (lib symbols) (part 640456-8) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C29ACD3)) + (comp (ref J4) + (value 640456-8) + (footprint .pretty:NEW-640456-8) + (libsource (lib symbols) (part 640456-8) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C29AD70)) + (comp (ref J5) + (value 640456-8) + (footprint .pretty:NEW-640456-8) + (libsource (lib symbols) (part 640456-8) (description "")) + (sheetpath (names /) (tstamps /)) + (tstamp 5C29AE73)) + (comp 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(pin 7)) + (node (ref P8) (pin 15))) + (net (code 67) (name SR1_CLR) + (node (ref U2) (pin 9)) + (node (ref P8) (pin 17))) + (net (code 68) (name SR4_QH) + (node (ref U1) (pin 9)) + (node (ref U6) (pin 13))) + (net (code 69) (name SR2_QH__T) + (node (ref U1) (pin 4))) + (net (code 70) (name SR3_QH_T) + (node (ref P8) (pin 12)) + (node (ref U1) (pin 6))) + (net (code 71) (name "Net-(P8-Pad19)") + (node (ref P8) (pin 19))) + (net (code 72) (name GNDA_ADC) + (node (ref P9) (pin 34))) + (net (code 73) (name SYS_RESETN) + (node (ref P9) (pin 10))) + (net (code 74) (name "Net-(P8-Pad1)") + (node (ref P8) (pin 1))) + (net (code 75) (name "Net-(P8-Pad10)") + (node (ref P8) (pin 10))) + (net (code 76) (name "Net-(P8-Pad13)") + (node (ref P8) (pin 13))) + (net (code 77) (name "Net-(P8-Pad2)") + (node (ref P8) (pin 2))) + (net (code 78) (name "Net-(P8-Pad20)") + (node (ref P8) (pin 20))) + (net (code 79) (name "Net-(P8-Pad21)") + (node (ref P8) (pin 21))) + (net (code 80) (name "Net-(P8-Pad22)") + (node (ref P8) (pin 22))) + (net (code 81) (name "Net-(P8-Pad23)") + (node (ref P8) (pin 23))) + (net (code 82) (name "Net-(P8-Pad24)") + (node (ref P8) (pin 24))) + (net (code 83) (name "Net-(P8-Pad25)") + (node (ref P8) (pin 25))) + (net (code 84) (name "Net-(P8-Pad26)") + (node (ref P8) (pin 26))) + (net (code 85) (name "Net-(P8-Pad27)") + (node (ref P8) (pin 27))) + (net (code 86) (name "Net-(P8-Pad28)") + (node (ref P8) (pin 28))) + (net (code 87) (name "Net-(P8-Pad29)") + (node (ref P8) (pin 29))) + (net (code 88) (name "Net-(P8-Pad3)") + (node (ref P8) (pin 3))) + (net (code 89) (name "Net-(P8-Pad30)") + (node (ref P8) (pin 30))) + (net (code 90) (name "Net-(P8-Pad31)") + (node (ref P8) (pin 31))) + (net (code 91) (name "Net-(P8-Pad32)") + (node (ref P8) (pin 32))) + (net (code 92) (name +3V3) + (node (ref P9) (pin 3)) + (node (ref P9) (pin 4))) + (net (code 93) (name "Net-(P8-Pad33)") + (node (ref P8) (pin 33))) + (net (code 94) (name VDD_ADC) + (node (ref P9) (pin 32))) + (net (code 95) (name SR1_CLK_T) + (node (ref U8) (pin 7)) + (node (ref U6) (pin 7)) + (node (ref U7) (pin 7)) + (node (ref U3) (pin 7)) + (node (ref U2) (pin 2)) + (node (ref U4) (pin 7)) + (node (ref U5) (pin 7))) + (net (code 96) (name SR4_QH_T) + (node (ref U1) (pin 10)) + (node (ref P8) (pin 14))) + (net (code 97) (name SR5_QH) + (node (ref U1) (pin 11)) + (node (ref U5) (pin 13))) + (net (code 98) (name SR5_QH_T) + (node (ref P8) (pin 16)) + (node (ref U1) (pin 12))) + (net (code 99) (name SR2_QH_T) + (node (ref P8) (pin 6))) + (net (code 100) (name "Net-(P8-Pad34)") + (node (ref P8) (pin 34))) + (net (code 101) (name "Net-(P8-Pad35)") + (node (ref P8) (pin 35))) + (net (code 102) (name "Net-(P8-Pad36)") + (node (ref P8) (pin 36))) + (net (code 103) (name "Net-(P8-Pad37)") + (node (ref P8) (pin 37))) + (net (code 104) (name "Net-(P8-Pad38)") + (node (ref P8) (pin 38))) + (net (code 105) (name "Net-(P8-Pad39)") + (node (ref P8) (pin 39))) + (net (code 106) (name "Net-(P8-Pad40)") + (node (ref P8) (pin 40))) + (net (code 107) (name "Net-(P8-Pad41)") + (node (ref P8) (pin 41))) + (net (code 108) (name "Net-(P8-Pad42)") + (node (ref P8) (pin 42))) + (net (code 109) (name "Net-(P8-Pad44)") + (node (ref P8) (pin 44))) + (net (code 110) (name "Net-(P8-Pad46)") + (node (ref P8) (pin 46))) + (net (code 111) (name "Net-(P8-Pad7)") + (node (ref P8) (pin 7))) + (net (code 112) (name "Net-(P8-Pad8)") + (node (ref P8) (pin 8))) + (net (code 113) (name "Net-(P8-Pad9)") + (node (ref P8) (pin 9))) + (net (code 114) (name SR6_QH) + (node (ref U1) (pin 14)) + (node (ref U4) (pin 13))) + (net (code 115) (name 7SEG_CLK) + (node (ref P8) (pin 45)) + (node (ref U2) (pin 11))) + (net (code 116) (name e6r) + (node (ref J5) (pin 3)) + (node (ref RN4) (pin 7)) + (node (ref U3) (pin 4))) + (net (code 117) (name e7r) + (node (ref RN4) (pin 8)) + (node (ref U3) (pin 3)) + (node (ref J5) (pin 2))) + (net (code 118) (name e8r) + (node (ref RN4) (pin 9)) + (node (ref J5) (pin 1)) + (node (ref U3) (pin 2))) + (net (code 119) (name f1r) + (node (ref U8) (pin 14)) + (node (ref RN6) (pin 2)) + (node (ref J6) (pin 8))) + (net (code 120) (name f2r) + (node (ref RN6) (pin 3)) + (node (ref U8) (pin 12)) + (node (ref J6) (pin 7))) + (net (code 121) (name f3r) + (node (ref RN6) (pin 4)) + (node (ref J6) (pin 6)) + (node (ref U8) (pin 11))) + (net (code 122) (name f4r) + (node (ref U8) (pin 10)) + (node (ref RN6) (pin 5)) + (node (ref J6) (pin 5))) + (net (code 123) (name f5r) + (node (ref U8) (pin 5)) + (node (ref RN6) (pin 6)) + (node (ref J6) (pin 4))) + (net (code 124) (name f6r) + (node (ref J6) (pin 3)) + (node (ref RN6) (pin 7)) + (node (ref U8) (pin 4))) + (net (code 125) (name f7r) + (node (ref U8) (pin 3)) + (node (ref J6) (pin 2)) + (node (ref RN6) (pin 8))) + (net (code 126) (name f8r) + (node (ref U8) (pin 2)) + (node (ref RN6) (pin 9)) + (node (ref J6) (pin 1))) + (net (code 127) (name e4r) + (node (ref RN4) (pin 5)) + (node (ref U3) (pin 10)) + (node (ref J5) (pin 5))) + (net (code 128) (name e5r) + (node (ref U3) (pin 5)) + (node (ref RN4) (pin 6)) + (node (ref J5) (pin 4))) + (net (code 129) (name e3r) + (node (ref U3) (pin 11)) + (node (ref RN4) (pin 4)) + (node (ref J5) (pin 6))) + (net (code 130) (name c4r) + (node (ref J3) (pin 5)) + (node (ref RN5) (pin 5)) + (node (ref U6) (pin 10))) + (net (code 131) (name b1r) + (node (ref U5) (pin 14)) + (node (ref J2) (pin 8)) + (node (ref RN3) (pin 2))) + (net (code 132) (name b2r) + (node (ref U5) (pin 12)) + (node (ref RN3) (pin 3)) + (node (ref J2) (pin 7))) + (net (code 133) (name b3r) + (node (ref RN3) (pin 4)) + (node (ref U5) (pin 11)) + (node (ref J2) (pin 6))) + (net (code 134) (name b4r) + (node (ref U5) (pin 10)) + (node (ref J2) (pin 5)) + (node (ref RN3) (pin 5))) + (net (code 135) (name b5r) + (node (ref RN3) (pin 6)) + (node (ref U5) (pin 5)) + (node (ref J2) (pin 4))) + (net (code 136) (name b6r) + (node (ref RN3) (pin 7)) + (node (ref U5) (pin 4)) + (node (ref J2) (pin 3))) + (net (code 137) (name b7r) + (node (ref U5) (pin 3)) + (node (ref J2) (pin 2)) + (node (ref RN3) (pin 8))) + (net (code 138) (name b8r) + (node (ref U5) (pin 2)) + (node (ref RN3) (pin 9)) + (node (ref J2) (pin 1))) + (net (code 139) (name c1r) + (node (ref J3) (pin 8)) + (node (ref RN5) (pin 2)) + (node (ref U6) (pin 14))) + (net (code 140) (name c2r) + (node (ref RN5) (pin 3)) + (node (ref U6) (pin 12)) + (node (ref J3) (pin 7))) + (net (code 141) (name c3r) + (node (ref RN5) (pin 4)) + (node (ref J3) (pin 6)) + (node (ref U6) (pin 11))) + (net (code 142) (name c5r) + (node (ref RN5) (pin 6)) + (node (ref J3) (pin 4)) + (node (ref U6) (pin 5))) + (net (code 143) (name c6r) + (node (ref RN5) (pin 7)) + (node (ref J3) (pin 3)) + (node (ref U6) (pin 4))) + (net (code 144) (name c7r) + (node (ref RN5) (pin 8)) + (node (ref J3) (pin 2)) + (node (ref U6) (pin 3))) + (net (code 145) (name c8r) + (node (ref RN5) (pin 9)) + (node (ref U6) (pin 2)) + (node (ref J3) (pin 1))) + (net (code 146) (name d1r) + (node (ref U7) (pin 14)) + (node (ref J4) (pin 8)) + (node (ref RN2) (pin 2))) + (net (code 147) (name d2r) + (node (ref J4) (pin 7)) + (node (ref U7) (pin 12)) + (node (ref RN2) (pin 3))) + (net (code 148) (name d3r) + (node (ref U7) (pin 11)) + (node (ref J4) (pin 6)) + (node (ref RN2) (pin 4))) + (net (code 149) (name d4r) + (node (ref RN2) (pin 5)) + (node (ref U7) (pin 10)) + (node (ref J4) (pin 5))) + (net (code 150) (name d5r) + (node (ref RN2) (pin 6)) + (node (ref J4) (pin 4)) + (node (ref U7) (pin 5))) + (net (code 151) (name d6r) + (node (ref RN2) (pin 7)) + (node (ref J4) (pin 3)) + (node (ref U7) (pin 4))) + (net (code 152) (name d7r) + (node (ref RN2) (pin 8)) + (node (ref U7) (pin 3)) + (node (ref J4) (pin 2))) + (net (code 153) (name d8r) + (node (ref U7) (pin 2)) + (node (ref RN2) (pin 9)) + (node (ref J4) (pin 1))) + (net (code 154) (name e1r) + (node (ref RN4) (pin 2)) + (node (ref U3) (pin 14)) + (node (ref J5) (pin 8))) + (net (code 155) (name e2r) + (node (ref U3) (pin 12)) + (node (ref RN4) (pin 3)) + (node (ref J5) (pin 7))))) \ No newline at end of file diff --git a/bbb-bort.plt b/bbb-bort.plt new file mode 100644 index 0000000..96cbd78 --- /dev/null +++ b/bbb-bort.plt @@ -0,0 +1,38368 @@ +IN;VS40;PU;PA;SP1; +PT 0.5; +PU;PA 7081,1760; +EA 11401,480; +PU;PA 400,8000; +EA 11480,400; +PU;PA 480,7921; +EA 11401,480; +PU;PA 2400,7921; +PD;PA 2400,8000; +PU;PA 4400,7921; +PD;PA 4400,8000; +PU;PA 6400,7921; +PD;PA 6400,8000; +PU;PA 8400,7921; +PD;PA 8400,8000; +PU;PA 10400,7921; +PD;PA 10400,8000; +PU;PA 1442,7937; +PD;PA 1412,7937; +PU;PA 1427,7937; +PD;PA 1427,7989; +PA 1422,7982; +PA 1417,7977; +PA 1412,7975; +PU;PA 3412,7985; +PD;PA 3415,7987; +PA 3420,7989; +PA 3432,7989; +PA 3437,7987; +PA 3439,7985; +PA 3441,7980; +PA 3441,7975; +PA 3439,7967; +PA 3410,7937; +PA 3441,7937; +PU;PA 5410,7989; +PD;PA 5442,7989; +PA 5424,7970; +PA 5433,7970; +PA 5438,7967; +PA 5440,7964; +PA 5442,7959; +PA 5442,7947; +PA 5440,7942; +PA 5438,7940; +PA 5433,7937; +PA 5417,7937; +PA 5412,7940; +PA 5410,7942; +PU;PA 7437,7972; +PD;PA 7437,7937; +PU;PA 7424,7992; +PD;PA 7412,7954; +PA 7444,7954; +PU;PA 9440,7989; +PD;PA 9415,7989; +PA 9412,7964; +PA 9415,7967; +PA 9420,7970; +PA 9433,7970; +PA 9438,7967; +PA 9440,7964; +PA 9442,7959; +PA 9442,7947; +PA 9440,7942; +PA 9438,7940; +PA 9433,7937; +PA 9420,7937; +PA 9415,7940; +PA 9412,7942; +PU;PA 11437,7989; +PD;PA 11427,7989; +PA 11422,7987; +PA 11420,7985; +PA 11415,7977; +PA 11412,7967; +PA 11412,7947; +PA 11415,7942; +PA 11417,7940; +PA 11422,7937; +PA 11432,7937; +PA 11437,7940; +PA 11439,7942; +PA 11441,7947; +PA 11441,7959; +PA 11439,7964; +PA 11437,7967; +PA 11432,7970; +PA 11422,7970; +PA 11417,7967; +PA 11415,7964; +PA 11412,7959; +PU;PA 2400,480; +PD;PA 2400,400; +PU;PA 4400,480; +PD;PA 4400,400; +PU;PA 6400,480; +PD;PA 6400,400; +PU;PA 8400,480; +PD;PA 8400,400; +PU;PA 10400,480; +PD;PA 10400,400; +PU;PA 1442,417; +PD;PA 1412,417; +PU;PA 1427,417; +PD;PA 1427,468; +PA 1422,461; +PA 1417,456; +PA 1412,454; +PU;PA 3412,464; +PD;PA 3415,466; +PA 3420,468; +PA 3432,468; +PA 3437,466; +PA 3439,464; +PA 3441,459; +PA 3441,454; +PA 3439,447; +PA 3410,417; +PA 3441,417; +PU;PA 5410,468; +PD;PA 5442,468; +PA 5424,449; +PA 5433,449; +PA 5438,447; +PA 5440,444; +PA 5442,439; +PA 5442,427; +PA 5440,422; +PA 5438,420; +PA 5433,417; +PA 5417,417; +PA 5412,420; +PA 5410,422; +PU;PA 7437,451; +PD;PA 7437,417; +PU;PA 7424,471; +PD;PA 7412,434; +PA 7444,434; +PU;PA 9440,468; +PD;PA 9415,468; +PA 9412,444; +PA 9415,447; +PA 9420,449; +PA 9433,449; +PA 9438,447; +PA 9440,444; +PA 9442,439; +PA 9442,427; +PA 9440,422; +PA 9438,420; +PA 9433,417; +PA 9420,417; +PA 9415,420; +PA 9412,422; +PU;PA 11437,468; +PD;PA 11427,468; +PA 11422,466; +PA 11420,464; +PA 11415,456; +PA 11412,447; +PA 11412,427; +PA 11415,422; +PA 11417,420; +PA 11422,417; +PA 11432,417; +PA 11437,420; +PA 11439,422; +PA 11441,427; +PA 11441,439; +PA 11439,444; +PA 11437,447; +PA 11432,449; +PA 11422,449; +PA 11417,447; +PA 11415,444; +PA 11412,439; +PU;PA 400,6000; +PD;PA 480,6000; +PU;PA 400,4000; +PD;PA 480,4000; +PU;PA 400,2001; +PD;PA 480,2001; +PU;PA 427,6992; +PD;PA 452,6992; +PU;PA 423,6977; +PD;PA 440,7029; +PA 457,6977; +PU;PA 443,5005; +PD;PA 450,5003; +PA 453,5000; +PA 455,4995; +PA 455,4988; +PA 453,4982; +PA 450,4980; +PA 446,4977; +PA 426,4977; +PA 426,5029; +PA 443,5029; +PA 448,5027; +PA 450,5025; +PA 453,5020; +PA 453,5015; +PA 450,5010; +PA 448,5008; +PA 443,5005; +PA 426,5005; +PU;PA 455,2982; +PD;PA 453,2980; +PA 446,2977; +PA 441,2977; +PA 433,2980; +PA 429,2985; +PA 426,2990; +PA 424,2999; +PA 424,3007; +PA 426,3017; +PA 429,3022; +PA 433,3027; +PA 441,3029; +PA 446,3029; +PA 453,3027; +PA 455,3025; +PU;PA 426,977; +PD;PA 426,1029; +PA 438,1029; +PA 446,1027; +PA 450,1022; +PA 453,1017; +PA 455,1008; +PA 455,1000; +PA 453,991; +PA 450,986; +PA 446,980; +PA 438,977; +PA 426,977; +PU;PA 11480,6000; +PD;PA 11401,6000; +PU;PA 11480,4000; +PD;PA 11401,4000; +PU;PA 11480,2001; +PD;PA 11401,2001; +PU;PA 11427,6992; +PD;PA 11452,6992; +PU;PA 11423,6977; +PD;PA 11440,7029; +PA 11457,6977; +PU;PA 11443,5005; +PD;PA 11450,5003; +PA 11453,5000; +PA 11455,4995; +PA 11455,4988; +PA 11453,4982; +PA 11450,4980; +PA 11446,4977; +PA 11426,4977; +PA 11426,5029; +PA 11443,5029; +PA 11448,5027; +PA 11450,5025; +PA 11453,5020; +PA 11453,5015; +PA 11450,5010; +PA 11448,5008; +PA 11443,5005; +PA 11426,5005; +PU;PA 11455,2982; +PD;PA 11453,2980; +PA 11446,2977; +PA 11441,2977; +PA 11433,2980; +PA 11429,2985; +PA 11426,2990; +PA 11424,2999; +PA 11424,3007; +PA 11426,3017; +PA 11429,3022; +PA 11433,3027; +PA 11441,3029; +PA 11446,3029; +PA 11453,3027; +PA 11455,3025; +PU;PA 11426,977; +PD;PA 11426,1029; +PA 11438,1029; +PA 11446,1027; +PA 11450,1022; +PA 11453,1017; +PA 11455,1008; +PA 11455,1000; +PA 11453,991; +PA 11450,986; +PA 11446,980; +PA 11438,977; +PA 11426,977; +PU;PA 8017,649; +PD;PA 8017,709; +PA 8031,709; +PA 8040,706; +PA 8046,700; +PA 8048,695; +PA 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5029,5454; +PU;LT; +LT; +PA 5029,5251; +PD;PA 5029,4438; +PU;LT; +LT; +PA 6299,5251; +PD;PA 6299,4438; +PU;LT; +LT; +PA 6299,6267; +PD;PA 6299,5454; +PU;LT; +LT; +PA 6299,7333; +PD;PA 6299,6521; +PU;LT; +LT; +PA 8748,7333; +PD;PA 8788,7333; +PU;LT; +LT; +PA 8748,7232; +PD;PA 8788,7232; +PU;LT; +LT; +PA 8748,7130; +PD;PA 8788,7130; +PU;LT; +LT; +PA 8748,7029; +PD;PA 8788,7029; +PU;LT; +LT; +PA 8748,6927; +PD;PA 8788,6927; +PU;LT; +LT; +PA 8748,6825; +PD;PA 8788,6825; +PU;LT; +LT; +PA 8748,6724; +PD;PA 8788,6724; +PU;LT; +PU;PA;SP0; diff --git a/bbb-bort.pro b/bbb-bort.pro new file mode 100644 index 0000000..796d189 --- /dev/null +++ b/bbb-bort.pro @@ -0,0 +1,40 @@ +update=12/28/2018 9:59:52 AM +version=1 +last_client=kicad +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[general] +version=1 +[eeschema] +version=1 +LibDir= +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName=./ +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName=Pcbnew +SpiceAjustPassiveValues=0 +LabSize=50 +ERC_TestSimilarLabels=1 diff --git a/bbb-bort.sch b/bbb-bort.sch new file mode 100644 index 0000000..4f00ee6 --- /dev/null +++ b/bbb-bort.sch @@ -0,0 +1,1969 @@ +EESchema Schematic File Version 4 +LIBS:bbb-bort-cache +EELAYER 26 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "bort's brain" +Date "2018-12-28" +Rev "A1" +Comp "kremlinware unlimited" +Comment1 "i'm the one who press that button" +Comment2 "sweaty palms get caught bluffin" +Comment3 "fold a man into nothin, for nothin" +Comment4 "" +$EndDescr +$Comp +L power:GNDD #PWR01 +U 1 1 5589785A +P 1200 3050 +F 0 "#PWR01" H 1200 2800 50 0001 C CNN +F 1 "GNDD" H 1200 2900 50 0000 C CNN +F 2 "" H 1200 3050 60 0000 C CNN +F 3 "" H 1200 3050 60 0000 C CNN + 1 1200 3050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1450 2850 1500 2850 +Wire Wire Line + 1500 2850 1500 2950 +Wire Wire Line + 900 3050 900 2950 +Wire Wire Line + 900 2850 950 2850 +Wire Wire Line + 950 2950 900 2950 +Connection ~ 900 2950 +Wire Wire Line + 1450 2950 1500 2950 +Connection ~ 1500 2950 +Connection ~ 1200 3050 +$Comp +L power:+3.3V #PWR06 +U 1 1 55897A67 +P 1400 850 +F 0 "#PWR06" H 1400 700 50 0001 C CNN +F 1 "+3V3" H 1400 990 50 0000 C CNN +F 2 "" H 1400 850 60 0000 C CNN +F 3 "" H 1400 850 60 0000 C CNN + 1 1400 850 + 0 1 1 0 +$EndComp +$Comp +L power:+5V #PWR07 +U 1 1 55897A7F +P 1550 950 +F 0 "#PWR07" H 1550 800 50 0001 C CNN +F 1 "+5V" H 1550 1090 50 0000 C CNN +F 2 "" H 1550 950 60 0000 C CNN +F 3 "" H 1550 950 60 0000 C CNN + 1 1550 950 + 0 1 1 0 +$EndComp +Wire Wire Line + 1450 850 1400 850 +Wire Wire Line + 1450 950 1550 950 +Wire Wire Line + 1750 1050 1450 1050 +$Comp +L power:+3.3V #PWR08 +U 1 1 55897EE7 +P 800 850 +F 0 "#PWR08" H 800 700 50 0001 C CNN +F 1 "+3V3" H 800 990 50 0000 C CNN +F 2 "" H 800 850 60 0000 C CNN +F 3 "" H 800 850 60 0000 C CNN + 1 800 850 + 0 -1 -1 0 +$EndComp +$Comp +L power:+5V #PWR09 +U 1 1 55897EF8 +P 900 950 +F 0 "#PWR09" H 900 800 50 0001 C CNN +F 1 "+5V" H 900 1090 50 0000 C CNN +F 2 "" H 900 950 60 0000 C CNN +F 3 "" H 900 950 60 0000 C CNN + 1 900 950 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 950 850 800 850 +Wire Wire Line + 950 950 900 950 +$Comp +L pwr_BeagleBone:SYS_5V #PWR010 +U 1 1 55898497 +P 1750 1050 +F 0 "#PWR010" H 1750 900 50 0001 C CNN +F 1 "SYS_5V" H 1750 1190 50 0000 C CNN +F 2 "" H 1750 1050 60 0000 C CNN +F 3 "" H 1750 1050 60 0000 C CNN + 1 1750 1050 + 0 1 1 0 +$EndComp +$Comp +L pwr_BeagleBone:SYS_5V #PWR011 +U 1 1 558984AF +P 750 1050 +F 0 "#PWR011" H 750 900 50 0001 C CNN +F 1 "SYS_5V" H 750 1190 50 0000 C CNN +F 2 "" H 750 1050 60 0000 C CNN +F 3 "" H 750 1050 60 0000 C CNN + 1 750 1050 + 0 -1 -1 0 +$EndComp +$Comp +L pwr_BeagleBone:VDD_ADC #PWR012 +U 1 1 558985D8 +P 1500 2250 +F 0 "#PWR012" H 1500 2100 50 0001 C CNN +F 1 "VDD_ADC" H 1500 2390 50 0000 C CNN +F 2 "" H 1500 2250 60 0000 C CNN +F 3 "" H 1500 2250 60 0000 C CNN + 1 1500 2250 + 0 1 1 0 +$EndComp +Wire Wire Line + 1450 2250 1500 2250 +$Comp +L pwr_BeagleBone:GNDA_ADC #PWR013 +U 1 1 5589865D +P 1600 2350 +F 0 "#PWR013" H 1600 2100 50 0001 C CNN +F 1 "GNDA_ADC" H 1600 2200 50 0000 C CNN +F 2 "" H 1600 2350 60 0000 C CNN +F 3 "" H 1600 2350 60 0000 C CNN + 1 1600 2350 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 1450 2350 1600 2350 +Text GLabel 1550 1150 2 50 Input ~ 0 +SYS_RESETN +Wire Wire Line + 1450 1150 1550 1150 +Text GLabel 850 1150 0 50 Input ~ 0 +PWR_BUT +$Comp +L Connector_Generic:Conn_02x23_Odd_Even P8 +U 1 1 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2050 0 50 Input ~ 0 +5v +$Comp +L 74xx_IEEE:74166 U3 +U 1 1 5C2DCFC3 +P 9800 3500 +F 0 "U3" H 9800 2485 50 0000 C CNN +F 1 "74166" H 9800 2576 50 0000 C CNN +F 2 "kicad-library:NEW-DIP254P762X508-16" H 9800 3500 50 0001 C CNN +F 3 "" H 9800 3500 50 0001 C CNN +F 4 "SN74HC166N" H 0 0 50 0001 C CNN "manf#" + 1 9800 3500 + -1 0 0 1 +$EndComp +Wire Wire Line + 9750 4150 9750 4350 +Wire Wire Line + 9600 4150 9600 4350 +Text GLabel 9600 4350 0 50 Input ~ 0 +5v +Text GLabel 9250 2700 0 50 Input ~ 0 +SR1_QH +Text GLabel 3150 900 2 50 Input ~ 0 +SR1_QH_T +Text GLabel 2650 1000 0 50 Input ~ 0 +SR1_CLKINH +Text GLabel 2650 1300 0 50 Input ~ 0 +SR1_CLK +Text GLabel 2650 1500 0 50 Input ~ 0 +SR1_SHLD +Text GLabel 2650 1600 0 50 Input ~ 0 +SR1_CLR +$Comp +L 4xxx:4504 U1 +U 1 1 5C2E1ABC +P 1300 4700 +F 0 "U1" H 1300 3714 50 0000 C CNN +F 1 "4504" H 1300 3623 50 0000 C CNN +F 2 "kicad-library:NEW-DIP254P762X508-16" H 1300 3400 50 0001 C CNN +F 3 "http://www.ti.com/lit/ds/symlink/cd4504b.pdf" H 650 4350 50 0001 C CNN +F 4 " CD4504BEG4" H 0 0 50 0001 C CNN "manf#" + 1 1300 4700 + 1 0 0 -1 +$EndComp +$Comp +L 4xxx:4504 U2 +U 1 1 5C2E1BA8 +P 2950 4700 +F 0 "U2" H 2950 3714 50 0000 C CNN +F 1 "4504" H 2950 3623 50 0000 C CNN +F 2 "kicad-library:NEW-DIP254P762X508-16" H 2950 3400 50 0001 C CNN +F 3 "http://www.ti.com/lit/ds/symlink/cd4504b.pdf" H 2300 4350 50 0001 C CNN +F 4 " CD4504BEG4" H 0 0 50 0001 C CNN "manf#" + 1 2950 4700 + 1 0 0 -1 +$EndComp +Text GLabel 900 1050 3 50 Input ~ 0 +5v +Text GLabel 1600 600 0 50 Input ~ 0 +BB3.3 +Text GLabel 1400 3800 1 50 Input ~ 0 +BB3.3 +Text GLabel 2850 3800 1 50 Input ~ 0 +BB3.3 +Text GLabel 1200 3800 1 50 Input ~ 0 +5v +Text GLabel 3050 3800 1 50 Input ~ 0 +5v +Text Label 1450 5300 2 50 ~ 0 +TO_BEAGLE +Text Label 2700 5350 0 50 ~ 0 +FROM_BEAGLE +Text GLabel 2500 4200 0 50 Input ~ 0 +SR1_CLK +Text GLabel 2500 4400 0 50 Input ~ 0 +SR1_CLKINH +Text GLabel 2500 4600 0 50 Input ~ 0 +SR1_SHLD +Text GLabel 2500 4800 0 50 Input ~ 0 +SR1_CLR +Text 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H 1950 8400 60 0001 L CNN "Manufacturer" +F 12 "Active" H 1950 8500 60 0001 L CNN "Status" +F 13 "4609X-101-103LF" H 0 0 50 0001 C CNN "manf#" + 1 1750 7300 + 0 -1 -1 0 +$EndComp +Entry Wire Line + 8650 1650 8750 1750 +Text Label 8650 950 0 50 ~ 0 +a1 +Text Label 8650 1050 0 50 ~ 0 +a2 +Text Label 8650 1150 0 50 ~ 0 +a3 +Text Label 8650 1250 0 50 ~ 0 +a4 +Text Label 8650 1350 0 50 ~ 0 +a5 +Text Label 8650 1450 0 50 ~ 0 +a6 +Text Label 8650 1550 0 50 ~ 0 +a7 +Text Label 8650 1650 0 50 ~ 0 +a8 +Entry Wire Line + 8650 950 8750 1050 +Entry Wire Line + 8650 1050 8750 1150 +Entry Wire Line + 8650 1150 8750 1250 +Entry Wire Line + 8650 1250 8750 1350 +Entry Wire Line + 8650 1350 8750 1450 +Entry Wire Line + 8650 1450 8750 1550 +Entry Wire Line + 8650 1550 8750 1650 +$Comp +L dk_Resistor-Networks-Arrays:4609X-101-103LF RN4 +U 1 1 5C3CDCE8 +P 3400 7300 +F 0 "RN4" V 3443 6497 60 0000 R CNN +F 1 "4609X-101-103LF" V 3337 6497 60 0000 R CNN +F 2 "digikey-footprints:USE-SIP-9_P2.54mm" H 3600 7500 60 0001 L CNN +F 3 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" V 3600 7600 60 0001 L CNN +F 4 "4609X-101-103LF-ND" H 3600 7700 60 0001 L CNN "Digi-Key_PN" +F 5 "4609X-101-103LF" H 3600 7800 60 0001 L CNN "MPN" +F 6 "Resistors" H 3600 7900 60 0001 L CNN "Category" +F 7 "Resistor Networks, Arrays" H 3600 8000 60 0001 L CNN "Family" +F 8 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" H 3600 8100 60 0001 L CNN "DK_Datasheet_Link" +F 9 "/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616" H 3600 8200 60 0001 L CNN "DK_Detail_Page" +F 10 "RES ARRAY 8 RES 10K OHM 9SIP" H 3600 8300 60 0001 L CNN "Description" +F 11 "Bourns Inc." H 3600 8400 60 0001 L CNN "Manufacturer" +F 12 "Active" H 3600 8500 60 0001 L CNN "Status" +F 13 "4609X-101-103LF" H 0 0 50 0001 C CNN "manf#" + 1 3400 7300 + 0 -1 -1 0 +$EndComp +$Comp +L dk_Resistor-Networks-Arrays:4609X-101-103LF RN6 +U 1 1 5C3CDDAC +P 5050 7300 +F 0 "RN6" V 5093 6497 60 0000 R CNN +F 1 "4609X-101-103LF" V 4987 6497 60 0000 R CNN +F 2 "digikey-footprints:USE-SIP-9_P2.54mm" H 5250 7500 60 0001 L CNN +F 3 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" V 5250 7600 60 0001 L CNN +F 4 "4609X-101-103LF-ND" H 5250 7700 60 0001 L CNN "Digi-Key_PN" +F 5 "4609X-101-103LF" H 5250 7800 60 0001 L CNN "MPN" +F 6 "Resistors" H 5250 7900 60 0001 L CNN "Category" +F 7 "Resistor Networks, Arrays" H 5250 8000 60 0001 L CNN "Family" +F 8 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" H 5250 8100 60 0001 L CNN "DK_Datasheet_Link" +F 9 "/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616" H 5250 8200 60 0001 L CNN "DK_Detail_Page" +F 10 "RES ARRAY 8 RES 10K OHM 9SIP" H 5250 8300 60 0001 L CNN "Description" +F 11 "Bourns Inc." H 5250 8400 60 0001 L CNN "Manufacturer" +F 12 "Active" H 5250 8500 60 0001 L CNN "Status" +F 13 "4609X-101-103LF" H 0 0 50 0001 C CNN "manf#" + 1 5050 7300 + 0 -1 -1 0 +$EndComp +$Comp +L dk_Resistor-Networks-Arrays:4609X-101-103LF RN5 +U 1 1 5C3CDE16 +P 5050 6200 +F 0 "RN5" V 5093 5397 60 0000 R CNN +F 1 "4609X-101-103LF" V 4987 5397 60 0000 R CNN +F 2 "digikey-footprints:USE-SIP-9_P2.54mm" H 5250 6400 60 0001 L CNN +F 3 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" V 5250 6500 60 0001 L CNN +F 4 "4609X-101-103LF-ND" H 5250 6600 60 0001 L CNN "Digi-Key_PN" +F 5 "4609X-101-103LF" H 5250 6700 60 0001 L CNN "MPN" +F 6 "Resistors" H 5250 6800 60 0001 L CNN "Category" +F 7 "Resistor Networks, Arrays" H 5250 6900 60 0001 L CNN "Family" +F 8 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" H 5250 7000 60 0001 L CNN "DK_Datasheet_Link" +F 9 "/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616" H 5250 7100 60 0001 L CNN "DK_Detail_Page" +F 10 "RES ARRAY 8 RES 10K OHM 9SIP" H 5250 7200 60 0001 L CNN "Description" +F 11 "Bourns Inc." H 5250 7300 60 0001 L CNN "Manufacturer" +F 12 "Active" H 5250 7400 60 0001 L CNN "Status" +F 13 "4609X-101-103LF" H 0 0 50 0001 C CNN "manf#" + 1 5050 6200 + 0 1 1 0 +$EndComp +$Comp +L dk_Resistor-Networks-Arrays:4609X-101-103LF RN3 +U 1 1 5C3CDF3A +P 3400 6200 +F 0 "RN3" V 3443 5397 60 0000 R CNN +F 1 "4609X-101-103LF" V 3337 5397 60 0000 R CNN +F 2 "digikey-footprints:USE-SIP-9_P2.54mm" H 3600 6400 60 0001 L CNN +F 3 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" V 3600 6500 60 0001 L CNN +F 4 "4609X-101-103LF-ND" H 3600 6600 60 0001 L CNN "Digi-Key_PN" +F 5 "4609X-101-103LF" H 3600 6700 60 0001 L CNN "MPN" +F 6 "Resistors" H 3600 6800 60 0001 L CNN "Category" +F 7 "Resistor Networks, Arrays" H 3600 6900 60 0001 L CNN "Family" +F 8 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" H 3600 7000 60 0001 L CNN "DK_Datasheet_Link" +F 9 "/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616" H 3600 7100 60 0001 L CNN "DK_Detail_Page" +F 10 "RES ARRAY 8 RES 10K OHM 9SIP" H 3600 7200 60 0001 L CNN "Description" +F 11 "Bourns Inc." H 3600 7300 60 0001 L CNN "Manufacturer" +F 12 "Active" H 3600 7400 60 0001 L CNN "Status" +F 13 "4609X-101-103LF" H 0 0 50 0001 C CNN "manf#" + 1 3400 6200 + 0 1 1 0 +$EndComp +Wire Wire Line + 850 5500 800 5500 +Wire Wire Line + 2950 5600 2950 5650 +Wire Wire Line + 2950 5650 2500 5650 +Wire Wire Line + 850 5600 850 5500 +Wire Wire Line + 850 5400 850 5500 +Connection ~ 850 5500 +Wire Wire Line + 850 5600 1300 5600 +Text GLabel 1850 6540 3 50 Input ~ 0 +a5r +Text GLabel 2050 6540 3 50 Input ~ 0 +a6r +Text GLabel 2250 6540 3 50 Input ~ 0 +a7r +Text GLabel 2450 6540 3 50 Input ~ 0 +a8r +Text GLabel 1050 6540 3 50 Input ~ 0 +a1r +Text GLabel 1250 6540 3 50 Input ~ 0 +a2r +Text GLabel 1450 6540 3 50 Input ~ 0 +a3r +Text GLabel 1650 6540 3 50 Input ~ 0 +a4r +Text GLabel 3500 6540 3 50 Input ~ 0 +b5r +Text GLabel 3700 6540 3 50 Input ~ 0 +b6r +Text GLabel 3900 6540 3 50 Input ~ 0 +b7r +Text GLabel 4100 6540 3 50 Input ~ 0 +b8r +Text GLabel 2700 6540 3 50 Input ~ 0 +b1r +Text GLabel 2900 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"4609X-101-103LF-ND" H 1950 6600 60 0001 L CNN "Digi-Key_PN" +F 5 "4609X-101-103LF" H 1950 6700 60 0001 L CNN "MPN" +F 6 "Resistors" H 1950 6800 60 0001 L CNN "Category" +F 7 "Resistor Networks, Arrays" H 1950 6900 60 0001 L CNN "Family" +F 8 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" H 1950 7000 60 0001 L CNN "DK_Datasheet_Link" +F 9 "/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616" H 1950 7100 60 0001 L CNN "DK_Detail_Page" +F 10 "RES ARRAY 8 RES 10K OHM 9SIP" H 1950 7200 60 0001 L CNN "Description" +F 11 "Bourns Inc." H 1950 7300 60 0001 L CNN "Manufacturer" +F 12 "Active" H 1950 7400 60 0001 L CNN "Status" +F 13 "4609X-101-103LF" H 0 0 50 0001 C CNN "manf#" + 1 1750 6200 + 0 1 1 0 +$EndComp +Wire Wire Line + 10820 800 10850 800 +Wire Wire Line + 10820 900 10850 900 +Wire Wire Line + 10820 1000 10850 1000 +Wire Wire Line + 10820 1100 10850 1100 +Wire Wire Line + 10820 1200 10850 1200 +Wire Wire Line + 10820 1300 10850 1300 +Wire Wire Line + 10820 1400 10850 1400 +Wire Wire Line + 10820 1500 10850 1500 +Wire Wire Line + 10810 2700 10850 2700 +Wire Wire Line + 10810 2800 10850 2800 +Wire Wire Line + 10810 2900 10850 2900 +Wire Wire Line + 10810 3000 10850 3000 +Wire Wire Line + 10810 3100 10850 3100 +Wire Wire Line + 10810 3200 10850 3200 +Wire Wire Line + 10810 3300 10850 3300 +Wire Wire Line + 10810 3400 10850 3400 +Wire Wire Line + 10900 4800 10950 4800 +Wire Wire Line + 10900 4900 10950 4900 +Wire Wire Line + 10900 5000 10950 5000 +Wire Wire Line + 10900 5100 10950 5100 +Wire Wire Line + 10900 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8650 1550 +Wire Wire Line + 8610 1650 8650 1650 +$Comp +L power:GND #PWR0102 +U 1 1 5C7EEE97 +P 5050 5840 +F 0 "#PWR0102" H 5050 5590 50 0001 C CNN +F 1 "GND" H 5010 5620 50 0000 C CNN +F 2 "" H 5050 5840 50 0001 C CNN +F 3 "" H 5050 5840 50 0001 C CNN + 1 5050 5840 + -1 0 0 1 +$EndComp +$Comp +L power:GND #PWR0103 +U 1 1 5C7F86C1 +P 3400 5840 +F 0 "#PWR0103" H 3400 5590 50 0001 C CNN +F 1 "GND" H 3360 5620 50 0000 C CNN +F 2 "" H 3400 5840 50 0001 C CNN +F 3 "" H 3400 5840 50 0001 C CNN + 1 3400 5840 + -1 0 0 1 +$EndComp +$Comp +L power:GND #PWR0104 +U 1 1 5C7F8724 +P 1750 5840 +F 0 "#PWR0104" H 1750 5590 50 0001 C CNN +F 1 "GND" H 1710 5620 50 0000 C CNN +F 2 "" H 1750 5840 50 0001 C CNN +F 3 "" H 1750 5840 50 0001 C CNN + 1 1750 5840 + -1 0 0 1 +$EndComp +$Comp +L power:GND #PWR0105 +U 1 1 5C7F87B3 +P 1750 7660 +F 0 "#PWR0105" H 1750 7410 50 0001 C CNN +F 1 "GND" H 1780 7450 50 0000 C CNN +F 2 "" H 1750 7660 50 0001 C CNN +F 3 "" H 1750 7660 50 0001 C CNN + 1 1750 7660 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0106 +U 1 1 5C7F894A +P 3400 7660 +F 0 "#PWR0106" H 3400 7410 50 0001 C CNN +F 1 "GND" H 3430 7450 50 0000 C CNN +F 2 "" H 3400 7660 50 0001 C CNN +F 3 "" H 3400 7660 50 0001 C CNN + 1 3400 7660 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0107 +U 1 1 5C7F8A1B +P 5050 7660 +F 0 "#PWR0107" H 5050 7410 50 0001 C CNN +F 1 "GND" H 5080 7450 50 0000 C CNN +F 2 "" H 5050 7660 50 0001 C CNN +F 3 "" H 5050 7660 50 0001 C CNN + 1 5050 7660 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0108 +U 1 1 5C7F8C62 +P 7250 6300 +F 0 "#PWR0108" H 7250 6050 50 0001 C CNN +F 1 "GND" V 7230 6160 50 0000 R CNN +F 2 "" H 7250 6300 50 0001 C CNN +F 3 "" H 7250 6300 50 0001 C CNN + 1 7250 6300 + 0 1 1 0 +$EndComp +$Comp +L power:GND #PWR0109 +U 1 1 5C8025C9 +P 800 5500 +F 0 "#PWR0109" H 800 5250 50 0001 C CNN +F 1 "GND" V 770 5370 50 0000 R CNN +F 2 "" H 800 5500 50 0001 C CNN +F 3 "" H 800 5500 50 0001 C CNN + 1 800 5500 + 0 1 1 0 +$EndComp +$Comp +L power:GND #PWR0110 +U 1 1 5C80271E +P 2500 5650 +F 0 "#PWR0110" H 2500 5400 50 0001 C CNN +F 1 "GND" H 2550 5425 50 0000 C CNN +F 2 "" H 2500 5650 50 0001 C CNN +F 3 "" H 2500 5650 50 0001 C CNN + 1 2500 5650 + 1 0 0 -1 +$EndComp +Connection ~ 2500 5650 +Wire Wire Line + 2500 5400 2500 5650 +$Comp +L Connector_Generic:Conn_02x23_Odd_Even P9 +U 1 1 55DF7DBA +P 1150 1850 +F 0 "P9" H 1150 3050 50 0000 C CNN +F 1 "BeagleBone_Black_Header" V 1200 1900 50 0000 C CNN +F 2 "Socket_BeagleBone_Black:Socket_BeagleBone_Black" H 1150 1000 60 0001 C CNN +F 3 "" H 1150 1000 60 0000 C CNN +F 4 "67996-150HLF" H 0 0 50 0001 C CNN "manf#" + 1 1150 1850 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0111 +U 1 1 5C802AFB +P 1450 750 +F 0 "#PWR0111" H 1450 500 50 0001 C CNN +F 1 "GND" H 1450 550 50 0000 C CNN +F 2 "" H 1450 750 50 0001 C CNN +F 3 "" H 1450 750 50 0001 C CNN + 1 1450 750 + -1 0 0 1 +$EndComp +$Comp +L power:GND #PWR0112 +U 1 1 5C802CDC +P 9750 2350 +F 0 "#PWR0112" H 9750 2100 50 0001 C CNN +F 1 "GND" V 9800 2175 50 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(shape (circle B.Cu 1676.4)) + (attach off) + ) + (padstack Oval[A]Pad_1727.2x1727.2_um + (shape (path F.Cu 1727.2 0 0 0 0)) + (shape (path B.Cu 1727.2 0 0 0 0)) + (attach off) + ) + (padstack Rect[A]Pad_1676.4x1676.4_um + (shape (rect F.Cu -838.2 -838.2 838.2 838.2)) + (shape (rect B.Cu -838.2 -838.2 838.2 838.2)) + (attach off) + ) + (padstack Rect[A]Pad_1727.2x1727.2_um + (shape (rect F.Cu -863.6 -863.6 863.6 863.6)) + (shape (rect B.Cu -863.6 -863.6 863.6 863.6)) + (attach off) + ) + (padstack "Via[0-1]_600:400_um" + (shape (circle F.Cu 600)) + (shape (circle B.Cu 600)) + (attach off) + ) + ) + (network + (net "Net-(P8-Pad3)" + (pins P8-3) + ) + (net "Net-(P8-Pad7)" + (pins P8-7) + ) + (net "Net-(P8-Pad8)" + (pins P8-8) + ) + (net "Net-(P8-Pad9)" + (pins P8-9) + ) + (net "Net-(P8-Pad10)" + (pins P8-10) + ) + (net "Net-(P8-Pad13)" + (pins P8-13) + ) + (net "Net-(P8-Pad19)" + (pins P8-19) + ) + (net "Net-(P8-Pad20)" + (pins P8-20) + ) + (net "Net-(P8-Pad21)" + (pins P8-21) + ) + (net "Net-(P8-Pad22)" + (pins P8-22) + ) + (net "Net-(P8-Pad23)" + (pins P8-23) + ) + (net "Net-(P8-Pad24)" + (pins P8-24) + ) + (net "Net-(P8-Pad25)" + (pins P8-25) + ) + (net "Net-(P8-Pad26)" + (pins P8-26) + ) + (net "Net-(P8-Pad27)" + (pins P8-27) + ) + (net "Net-(P8-Pad28)" + (pins P8-28) + ) + (net "Net-(P8-Pad29)" + (pins P8-29) + ) + (net "Net-(P8-Pad30)" + (pins P8-30) + ) + (net "Net-(P8-Pad31)" + (pins P8-31) + ) + (net "Net-(P8-Pad32)" + (pins P8-32) + ) + (net "Net-(P8-Pad33)" + (pins P8-33) + ) + (net "Net-(P8-Pad34)" + (pins P8-34) + ) + (net "Net-(P8-Pad35)" + (pins P8-35) + ) + (net "Net-(P8-Pad36)" + (pins P8-36) + ) + (net "Net-(P8-Pad37)" + (pins P8-37) + ) + (net "Net-(P8-Pad38)" + (pins P8-38) + ) + (net "Net-(P8-Pad39)" + (pins P8-39) + ) + (net "Net-(P8-Pad40)" + (pins P8-40) + ) + (net "Net-(P8-Pad41)" + (pins P8-41) + ) + (net "Net-(P8-Pad42)" + (pins P8-42) + ) + (net "Net-(P8-Pad44)" + (pins P8-44) + ) + (net "Net-(P8-Pad46)" + (pins P8-46) + ) + (net "Net-(P9-Pad11)" + (pins P9-11) + ) + (net "Net-(P9-Pad12)" + (pins P9-12) + ) + (net "Net-(P9-Pad13)" + (pins P9-13) + ) + (net "Net-(P9-Pad14)" + (pins P9-14) + ) + (net "Net-(P9-Pad15)" + (pins P9-15) + ) + (net "Net-(P9-Pad16)" + (pins P9-16) + ) + (net "Net-(P9-Pad17)" + (pins P9-17) + ) + (net "Net-(P9-Pad18)" + (pins P9-18) + ) + (net "Net-(P9-Pad19)" + (pins P9-19) + ) + (net "Net-(P9-Pad20)" + (pins P9-20) + ) + (net "Net-(P9-Pad21)" + (pins P9-21) + ) + (net "Net-(P9-Pad22)" + (pins P9-22) + ) + (net "Net-(P9-Pad23)" + (pins P9-23) + ) + (net "Net-(P9-Pad24)" + (pins P9-24) + ) + (net "Net-(P9-Pad25)" + (pins P9-25) + ) + (net "Net-(P9-Pad26)" + (pins P9-26) + ) + (net "Net-(P9-Pad27)" + (pins P9-27) + ) + (net "Net-(P9-Pad28)" + (pins P9-28) + ) + (net "Net-(P9-Pad29)" + (pins P9-29) + ) + (net "Net-(P9-Pad30)" + (pins P9-30) + ) + (net "Net-(P9-Pad31)" + (pins P9-31) + ) + (net "Net-(P9-Pad33)" + (pins P9-33) + ) + (net "Net-(P9-Pad35)" + (pins P9-35) + ) + (net "Net-(P9-Pad36)" + (pins P9-36) + ) + (net "Net-(P9-Pad37)" + (pins P9-37) + ) + (net "Net-(P9-Pad38)" + (pins P9-38) + ) + (net "Net-(P9-Pad39)" + (pins P9-39) + ) + (net "Net-(P9-Pad40)" + (pins P9-40) + ) + (net "Net-(P9-Pad41)" + (pins P9-41) + ) + (net "Net-(P9-Pad42)" + (pins P9-42) + ) + (net PWR_BUT + (pins P9-9) + ) + (net SYS_RESETN + (pins P9-10) + ) + (net VDD_ADC + (pins P9-32) + ) + (net GNDA_ADC + (pins P9-34) + ) + (net SR1_CLR + (pins P8-17 U2-9) + ) + (net SR1_SHLD + (pins P8-15 U2-7) + ) + (net SR1_CLK + (pins P8-11 U2-3) + ) + (net SR1_CLKINH + (pins P8-5 U2-5) + ) + (net SR1_QH_T + (pins P8-4 U1-2) + ) + (net PGND + (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-8 U1-13 U2-13 U2-8 U3-1 + U3-8 U4-1 U4-8 U5-8 U5-1 U6-1 U6-8 U7-1 U7-8 U8-8 U8-1) + ) + (net 5v + (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16 U4-16 U5-16 U6-16 U7-16 U8-16) + ) + (net BB3.3 + (pins U1-16 U2-1) + ) + (net SR1_QH + (pins U1-3 U3-13) + ) + (net SR1_CLR_T + (pins U2-10 U3-9 U4-9 U5-9 U6-9 U7-9 U8-9) + ) + (net SR1_SHLD_T + (pins U2-6 U3-15 U4-15 U5-15 U6-15 U7-15 U8-15) + ) + (net SR1_CLKINH_T + (pins U2-4 U3-6 U4-6 U5-6 U6-6 U7-6 U8-6) + ) + (net SR1_CLK_T + (pins U2-2 U3-7 U4-7 U5-7 U6-7 U7-7 U8-7) + ) + (net 7SEG_CLK + (pins P8-45 U2-11) + ) + (net 7SEG_DIO + (pins P8-43 U2-14) + ) + (net SR6_QH_T + (pins P8-18 U1-15) + ) + (net SR5_QH_T + (pins P8-16 U1-12) + ) + (net SR4_QH_T + (pins P8-14 U1-10) + ) + (net SR3_QH_T + (pins P8-12 U1-6) + ) + (net SR2_QH_T + (pins P8-6) + ) + (net +3V3 + (pins P9-4 P9-3) + ) + (net SR2_QH__T + (pins U1-4) + ) + (net SR2_QH + (pins U1-5 U7-13) + ) + (net SR3_QH + (pins U1-7 U8-13) + ) + (net SR4_QH + (pins U1-9 U6-13) + ) + (net SR5_QH + (pins U1-11 U5-13) + ) + (net SR6_QH + (pins U1-14 U4-13) + ) + (net 7SEG_DIO_T + (pins U2-15) + ) + (net 7SEG_CLK_T + (pins U2-12) + ) + (net "Net-(U3-Pad2)" + (pins U3-2) + ) + (net "Net-(U3-Pad3)" + (pins U3-3) + ) + (net "Net-(U3-Pad4)" + (pins U3-4) + ) + (net "Net-(U3-Pad5)" + (pins U3-5) + ) + (net "Net-(U3-Pad10)" + (pins U3-10) + ) + (net "Net-(U3-Pad11)" + (pins U3-11) + ) + (net "Net-(U3-Pad12)" + (pins U3-12) + ) + (net "Net-(U3-Pad14)" + (pins U3-14) + ) + (net "Net-(U4-Pad2)" + (pins U4-2) + ) + (net "Net-(U4-Pad3)" + (pins U4-3) + ) + (net "Net-(U4-Pad4)" + (pins U4-4) + ) + (net "Net-(U4-Pad5)" + (pins U4-5) + ) + (net "Net-(U4-Pad10)" + (pins U4-10) + ) + (net "Net-(U4-Pad11)" + (pins U4-11) + ) + (net "Net-(U4-Pad12)" + (pins U4-12) + ) + (net "Net-(U4-Pad14)" + (pins U4-14) + ) + (net "Net-(U5-Pad14)" + (pins U5-14) + ) + (net "Net-(U5-Pad12)" + (pins U5-12) + ) + (net "Net-(U5-Pad11)" + (pins U5-11) + ) + (net "Net-(U5-Pad10)" + (pins U5-10) + ) + (net "Net-(U5-Pad5)" + (pins U5-5) + ) + (net "Net-(U5-Pad4)" + (pins U5-4) + ) + (net "Net-(U5-Pad3)" + (pins U5-3) + ) + (net "Net-(U5-Pad2)" + (pins U5-2) + ) + (net "Net-(U6-Pad2)" + (pins U6-2) + ) + (net "Net-(U6-Pad3)" + (pins U6-3) + ) + (net "Net-(U6-Pad4)" + (pins U6-4) + ) + (net "Net-(U6-Pad5)" + (pins U6-5) + ) + (net "Net-(U6-Pad10)" + (pins U6-10) + ) + (net "Net-(U6-Pad11)" + (pins U6-11) + ) + (net "Net-(U6-Pad12)" + (pins U6-12) + ) + (net "Net-(U6-Pad14)" + (pins U6-14) + ) + (net "Net-(U7-Pad2)" + (pins U7-2) + ) + (net "Net-(U7-Pad3)" + (pins U7-3) + ) + (net "Net-(U7-Pad4)" + (pins U7-4) + ) + (net "Net-(U7-Pad5)" + (pins U7-5) + ) + (net "Net-(U7-Pad10)" + (pins U7-10) + ) + (net "Net-(U7-Pad11)" + (pins U7-11) + ) + (net "Net-(U7-Pad12)" + (pins U7-12) + ) + (net "Net-(U7-Pad14)" + (pins U7-14) + ) + (net "Net-(U8-Pad14)" + (pins U8-14) + ) + (net "Net-(U8-Pad12)" + (pins U8-12) + ) + (net "Net-(U8-Pad11)" + (pins U8-11) + ) + (net "Net-(U8-Pad10)" + (pins U8-10) + ) + (net "Net-(U8-Pad5)" + (pins U8-5) + ) + (net "Net-(U8-Pad4)" + (pins U8-4) + ) + (net "Net-(U8-Pad3)" + (pins U8-3) + ) + (net "Net-(U8-Pad2)" + (pins U8-2) + ) + (class kicad_default "" +3V3 /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1 /p2 /p3 + /p4 /p5 /p6 /p7 /p8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 + GNDA_ADC "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" + "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)" + "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" + "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" + "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" + "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)" + "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" + "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" + "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" + "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" + "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" + "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" + "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" + "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" + "Net-(P9-Pad41)" "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" + "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" + "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad11)" "Net-(U2-Pad12)" + "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" + "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" + "Net-(U3-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)" + "Net-(U4-Pad2)" "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U5-Pad10)" + "Net-(U5-Pad11)" "Net-(U5-Pad12)" "Net-(U5-Pad14)" "Net-(U5-Pad2)" "Net-(U5-Pad3)" + "Net-(U5-Pad4)" "Net-(U5-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)" + "Net-(U6-Pad14)" "Net-(U6-Pad2)" "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)" + "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)" + "Net-(U7-Pad2)" "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U8-Pad10)" + "Net-(U8-Pad11)" "Net-(U8-Pad12)" "Net-(U8-Pad14)" "Net-(U8-Pad2)" "Net-(U8-Pad3)" + "Net-(U8-Pad4)" "Net-(U8-Pad5)" PGND PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T + SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SR2_QH + SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH SR4_QH_T SR5_QH SR5_QH_T SR6_QH + SR6_QH_T SYS_RESETN VDD_ADC + (circuit + (use_via Via[0-1]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + ) +) diff --git a/bbb-bort10.rules b/bbb-bort10.rules new file mode 100644 index 0000000..54ebc34 --- /dev/null +++ b/bbb-bort10.rules @@ -0,0 +1,93 @@ + +(rules PCB bbb-bort10 + (snap_angle + fortyfive_degree + ) + (autoroute_settings + (fanout off) + (autoroute on) + (postroute on) + (vias on) + (via_costs 50) + (plane_via_costs 5) + (start_ripup_costs 100) + (start_pass_no 910) + (layer_rule F.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 2.9) + ) + (layer_rule B.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.5) + ) + ) + (rule + (width 250.0) + (clear 200.2) + (clear 125.0 (type smd_to_turn_gap)) + (clear 50.0 (type smd_smd)) + ) + (padstack "Via[0-1]_600:400_um" + (shape + (circle F.Cu 600.0 0.0 0.0) + ) + (shape + (circle B.Cu 600.0 0.0 0.0) + ) + (attach off) + ) + (via + "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default + ) + (via + "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default" + ) + (via_rule + default "Via[0-1]_600:400_um" + ) + (via_rule + "kicad_default" "Via[0-1]_600:400_um-kicad_default" + ) + (class default + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) + (class "kicad_default" + "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)" + "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" + "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" + "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" + "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN" + "VDD_ADC" "GNDA_ADC" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND + 5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK" + "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T" + "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(U3-Pad2)" + "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U4-Pad2)" + "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)" "Net-(U5-Pad14)" + "Net-(U5-Pad12)" "Net-(U5-Pad11)" "Net-(U5-Pad10)" "Net-(U5-Pad5)" "Net-(U5-Pad4)" "Net-(U5-Pad3)" "Net-(U5-Pad2)" "Net-(U6-Pad2)" + "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)" "Net-(U6-Pad14)" "Net-(U7-Pad2)" + "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)" "Net-(U8-Pad14)" + "Net-(U8-Pad12)" "Net-(U8-Pad11)" "Net-(U8-Pad10)" "Net-(U8-Pad5)" "Net-(U8-Pad4)" "Net-(U8-Pad3)" "Net-(U8-Pad2)" + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) +) \ No newline at end of file diff --git a/bbb-bort10.ses b/bbb-bort10.ses new file mode 100644 index 0000000..500115b --- /dev/null +++ b/bbb-bort10.ses @@ -0,0 +1,1008 @@ + +(session "bbb-bort10.ses" + (base_design "bbb-bort10.dsn") + (placement + (resolution um 10) + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 1112900 -1169920 front 0) + (place P9 630301 -1169920 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N" + (place U1 719201 -1055620 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N::1" + (place U2 1087500 -1055620 front 0) + ) + (component "SN74HC166N:DIP254P762X508-16" + (place U3 903351 -1055620 front 0) + (place U4 681101 -776224 front 0) + (place U6 928751 -776224 front 0) + (place U7 1052580 -776224 front 0) + ) + (component "SN74HC166N:DIP254P762X508-16::1" + (place U5 804926 -776224 front 0) + (place U8 1176400 -776224 front 0) + ) + ) + (was_is + ) + (routes + (resolution um 10) + (parser + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (library_out + (padstack "Via[0-1]_600:400_um" + (shape + (circle F.Cu 6000 0 0) + ) + (shape + (circle B.Cu 6000 0 0) + ) + (attach off) + ) + ) + (network_out + (net SR1_CLR + (wire + (path F.Cu 2500 + 1112900 -1373120 + 1112900 -1361231 + ) + ) + (wire + (path F.Cu 2500 + 1087500 -1055620 + 1124789 -1092909 + 1124789 -1353058 + 1116616 -1361231 + 1112900 -1361231 + ) + ) + ) + (net SR1_SHLD + (wire + (path F.Cu 2500 + 1112900 -1335831 + 1109591 -1335831 + 1030137 -1256377 + 1030137 -1049057 + 1011300 -1030220 + ) + ) + (wire + (path F.Cu 2500 + 1112900 -1347720 + 1112900 -1335831 + ) + ) + ) + (net SR1_CLK + (wire + (path F.Cu 2500 + 1011300 -928620 + 999509 -940411 + 999509 -984313 + 1007316 -992120 + 1015214 -992120 + 1034641 -1011547 + 1034641 -1210487 + 1109185 -1285031 + 1112900 -1285031 + ) + ) + (wire + (path F.Cu 2500 + 1112900 -1296920 + 1112900 -1285031 + ) + ) + ) + (net SR1_CLKINH + (wire + (path F.Cu 2500 + 1112900 -1220720 + 1112900 -1208831 + ) + ) + (wire + (path F.Cu 2500 + 1011300 -979420 + 1053217 -1021337 + 1053217 -1152863 + 1109185 -1208831 + 1112900 -1208831 + ) + ) + ) + (net SR1_QH_T + (wire + (path B.Cu 2500 + 1138300 -1195320 + 1138300 -1183431 + ) + ) + (wire + (path B.Cu 2500 + 643001 -903220 + 631365 -891584 + 631365 -868090 + 637854 -861601 + 1087938 -861601 + 1150434 -924097 + 1150434 -1174992 + 1141995 -1183431 + 1138300 -1183431 + ) + ) + ) + (net PGND + (wire + (path B.Cu 2500 + 1138300 -1169920 + 1126411 -1169920 + ) + ) + (wire + (path B.Cu 2500 + 1112900 -1163975 + 1120466 -1163975 + 1126411 -1169920 + ) + ) + (wire + (path B.Cu 2500 + 1112900 -1163975 + 1112900 -1158031 + ) + ) + (wire + (path B.Cu 2500 + 1112900 -1169920 + 1112900 -1163975 + ) + ) + (wire + (path B.Cu 2500 + 1071045 -1055620 + 1084809 -1041856 + 1092971 -1041856 + 1099136 -1035691 + 1099136 -965656 + 1087500 -954020 + ) + ) + (wire + (path B.Cu 2500 + 1011300 -1055620 + 1071045 -1055620 + ) + ) + (wire + (path B.Cu 2500 + 1071045 -1055620 + 1071045 -1116176 + 1112900 -1158031 + ) + ) + (wire + (path F.Cu 2500 + 852551 -598424 + 840916 -598424 + ) + ) + (wire + (path F.Cu 2500 + 840916 -598424 + 829281 -610059 + 728726 -610059 + ) + ) + (wire + (path F.Cu 2500 + 716682 -619194 + 716682 -764180 + 728726 -776224 + ) + ) + (wire + (path F.Cu 2500 + 728726 -610059 + 725817 -610059 + 716682 -619194 + ) + ) + (wire + (path F.Cu 2500 + 716682 -619194 + 707547 -610059 + 628171 -610059 + 616536 -598424 + ) + ) + (wire + (path F.Cu 2500 + 604901 -598424 + 616536 -598424 + ) + ) + (wire + (path F.Cu 2500 + 651985 -1691431 + 643812 -1683258 + 643812 -1191604 + 634017 -1181809 + 630301 -1181809 + ) + ) + (wire + (path F.Cu 2500 + 655701 -1691431 + 651985 -1691431 + ) + ) + (wire + (path F.Cu 2500 + 651985 -1691431 + 642190 -1701226 + 642190 -1703320 + ) + ) + (wire + (path F.Cu 2500 + 630301 -1703320 + 642190 -1703320 + ) + ) + (wire + (path F.Cu 2500 + 655701 -1728720 + 642190 -1728720 + ) + ) + (wire + (path F.Cu 2500 + 655701 -1728720 + 655701 -1703320 + ) + ) + (wire + (path F.Cu 2500 + 630301 -1728720 + 642190 -1728720 + ) + ) + (wire + (path B.Cu 2500 + 728726 -776224 + 716562 -788388 + 617065 -788388 + 604901 -776224 + ) + ) + (wire + (path B.Cu 2500 + 852551 -776224 + 840854 -787921 + 740423 -787921 + 728726 -776224 + ) + ) + (wire + (path B.Cu 2500 + 827151 -1055620 + 725551 -954020 + 719201 -954020 + ) + ) + (wire + (path B.Cu 2500 + 852551 -598424 + 864186 -598424 + ) + ) + (wire + (path B.Cu 2500 + 976380 -598424 + 964745 -598424 + ) + ) + (wire + (path B.Cu 2500 + 964745 -598424 + 953110 -610059 + 875821 -610059 + 864186 -598424 + ) + ) + (wire + (path B.Cu 2500 + 982198 -598424 + 976380 -598424 + ) + ) + (wire + (path B.Cu 2500 + 1100200 -776224 + 1088370 -788054 + 988210 -788054 + 976380 -776224 + ) + ) + (wire + (path F.Cu 2500 + 644533 -1055620 + 644533 -1146863 + 655701 -1158031 + ) + ) + (wire + (path F.Cu 2500 + 719201 -954020 + 705437 -967784 + 705437 -994716 + 644533 -1055620 + ) + ) + (wire + (path F.Cu 2500 + 643001 -1055620 + 644533 -1055620 + ) + ) + (wire + (path F.Cu 2500 + 655701 -1169920 + 655701 -1158031 + ) + ) + (wire + (path F.Cu 2500 + 655701 -1703320 + 655701 -1691431 + ) + ) + (wire + (path F.Cu 2500 + 630301 -1169920 + 630301 -1181809 + ) + ) + (wire + (path B.Cu 2500 + 630301 -1169920 + 655701 -1169920 + ) + ) + (wire + (path F.Cu 2500 + 1100200 -598424 + 1100200 -610059 + ) + ) + (wire + (path F.Cu 2500 + 1100200 -776224 + 1088565 -764589 + 1088565 -618784 + 1097290 -610059 + 1100200 -610059 + ) + ) + (wire + (path F.Cu 2500 + 1087500 -954020 + 1100200 -941320 + 1100200 -776224 + ) + ) + (wire + (path F.Cu 2500 + 728726 -776224 + 730845 -778343 + 730845 -942376 + 719201 -954020 + ) + ) + (wire + (path F.Cu 2500 + 728726 -598424 + 728726 -610059 + ) + ) + (wire + (path F.Cu 2500 + 852551 -776224 + 827151 -801624 + 827151 -877820 + ) + ) + (wire + (path B.Cu 2500 + 982198 -598424 + 988015 -598424 + ) + ) + (wire + (path B.Cu 2500 + 1100200 -598424 + 1088565 -598424 + ) + ) + (wire + (path B.Cu 2500 + 1088565 -598424 + 1076930 -610059 + 999650 -610059 + 988015 -598424 + ) + ) + ) + (net 5v + (wire + (path B.Cu 2500 + 1087500 -877820 + 1075864 -889456 + 914987 -889456 + 903351 -877820 + ) + ) + (wire + (path F.Cu 2500 + 1052580 -610330 + 1055756 -610330 + 1065280 -619854 + 1065280 -855600 + 1087500 -877820 + ) + ) + (wire + (path F.Cu 2500 + 1052580 -598424 + 1052580 -610330 + ) + ) + (wire + (path F.Cu 2500 + 1052580 -610330 + 940657 -610330 + 928751 -598424 + ) + ) + (wire + (path B.Cu 2500 + 1176400 -598424 + 1164764 -586788 + 1064216 -586788 + 1052580 -598424 + ) + ) + (wire + (path B.Cu 2500 + 928751 -598424 + 917115 -586788 + 816562 -586788 + 804926 -598424 + ) + ) + (wire + (path B.Cu 2500 + 903351 -877820 + 891716 -889455 + 666271 -889455 + 654636 -877820 + ) + ) + (wire + (path B.Cu 2500 + 643001 -877820 + 654636 -877820 + ) + ) + (wire + (path F.Cu 2500 + 630301 -1220720 + 630301 -1208831 + ) + ) + (wire + (path F.Cu 2500 + 643001 -877820 + 643001 -889455 + ) + ) + (wire + (path F.Cu 2500 + 643001 -889455 + 640092 -889455 + 618167 -911380 + 618167 -1200392 + 626606 -1208831 + 630301 -1208831 + ) + ) + (wire + (path F.Cu 2500 + 655701 -1220720 + 655701 -1246120 + ) + ) + (wire + (path F.Cu 2500 + 630301 -1220720 + 630301 -1246120 + ) + ) + (wire + (path B.Cu 2500 + 630301 -1220720 + 655701 -1220720 + ) + ) + (wire + (path B.Cu 2500 + 804926 -598424 + 793290 -586788 + 692737 -586788 + 681101 -598424 + ) + ) + ) + (net BB3.3 + (wire + (path B.Cu 2500 + 1011300 -877820 + 999665 -877820 + ) + ) + (wire + (path B.Cu 2500 + 999665 -877820 + 988029 -866184 + 730837 -866184 + 719201 -877820 + ) + ) + ) + (net SR1_QH + (wire + (path B.Cu 2500 + 903351 -954020 + 890651 -941320 + 655701 -941320 + 643001 -928620 + ) + ) + ) + (net SR1_CLR_T + (wire + (path F.Cu 2500 + 1052580 -776224 + 1052580 -995300 + 1087500 -1030220 + ) + ) + (wire + (path B.Cu 2500 + 1087500 -1030220 + 1074800 -1042920 + 916051 -1042920 + 903351 -1055620 + ) + ) + (wire + (path B.Cu 2500 + 804926 -776224 + 750678 -776224 + 738584 -764130 + 723077 -764130 + 710983 -776224 + 681101 -776224 + ) + ) + (wire + (path B.Cu 2500 + 928751 -776224 + 916845 -764318 + 845426 -764318 + 833520 -776224 + 804926 -776224 + ) + ) + (wire + (path B.Cu 2500 + 1111839 -776224 + 1111839 -781329 + 1100610 -792558 + 945085 -792558 + 928751 -776224 + ) + ) + (wire + (path B.Cu 2500 + 1052580 -776224 + 1082457 -776224 + 1094540 -764141 + 1105043 -764141 + 1111839 -770937 + 1111839 -776224 + ) + ) + (wire + (path B.Cu 2500 + 1176400 -776224 + 1111839 -776224 + ) + ) + ) + (net SR1_SHLD_T + (wire + (path B.Cu 2500 + 1176400 -623824 + 1164325 -611749 + 1091378 -611749 + 1079303 -623824 + 1052580 -623824 + ) + ) + (wire + (path F.Cu 2500 + 906526 -900045 + 903351 -903220 + ) + ) + (wire + (path F.Cu 2500 + 940657 -635730 + 940657 -865914 + 906526 -900045 + ) + ) + (wire + (path F.Cu 2500 + 906526 -900045 + 1011300 -1004820 + ) + ) + (wire + (path F.Cu 2500 + 940657 -635730 + 928751 -623824 + ) + ) + (wire + (path F.Cu 2500 + 1052580 -623824 + 1040674 -635730 + 940657 -635730 + ) + ) + (wire + (path B.Cu 2500 + 928751 -623824 + 917115 -635460 + 816562 -635460 + 804926 -623824 + ) + ) + (wire + (path B.Cu 2500 + 681101 -623824 + 692737 -635460 + 793290 -635460 + 804926 -623824 + ) + ) + ) + (net SR1_CLKINH_T + (wire + (path B.Cu 2500 + 827151 -1004820 + 840915 -991056 + 974264 -991056 + 1011300 -954020 + ) + ) + (wire + (path B.Cu 2500 + 976380 -725424 + 964681 -713725 + 864250 -713725 + 852551 -725424 + ) + ) + (wire + (path B.Cu 2500 + 1100200 -725424 + 1088564 -713788 + 988016 -713788 + 976380 -725424 + ) + ) + (wire + (path B.Cu 2500 + 604901 -725424 + 616573 -737096 + 694707 -737096 + 699194 -741583 + 712567 -741583 + 728726 -725424 + ) + ) + (wire + (path F.Cu 2500 + 976380 -725424 + 1023343 -772387 + 1023343 -941977 + 1011300 -954020 + ) + ) + (wire + (path B.Cu 2500 + 728726 -725424 + 740632 -737330 + 840645 -737330 + 852551 -725424 + ) + ) + ) + (net SR1_CLK_T + (wire + (path B.Cu 2500 + 1011300 -903220 + 948864 -965656 + 857597 -965656 + 831133 -992120 + 823010 -992120 + 815191 -999939 + 815191 -1018260 + 827151 -1030220 + ) + ) + (wire + (path F.Cu 2500 + 976380 -750824 + 997536 -771980 + 997536 -889456 + 1011300 -903220 + ) + ) + (wire + (path B.Cu 2500 + 852551 -750824 + 840826 -762549 + 753381 -762549 + 741656 -750824 + 728726 -750824 + ) + ) + (wire + (path B.Cu 2500 + 976380 -750824 + 964506 -738950 + 864425 -738950 + 852551 -750824 + ) + ) + (wire + (path B.Cu 2500 + 728726 -750824 + 717054 -762496 + 616573 -762496 + 604901 -750824 + ) + ) + (wire + (path B.Cu 2500 + 1100200 -750824 + 1088294 -762730 + 988286 -762730 + 976380 -750824 + ) + ) + ) + (net 7SEG_CLK + (wire + (path F.Cu 2500 + 1112900 -1728720 + 1124789 -1728720 + ) + ) + (wire + (path F.Cu 2500 + 1087500 -1004820 + 1155243 -1072563 + 1155243 -1703864 + 1142276 -1716831 + 1132962 -1716831 + 1124789 -1725004 + 1124789 -1728720 + ) + ) + ) + (net 7SEG_DIO + (wire + (path F.Cu 2500 + 1087500 -928620 + 1075575 -940545 + 1075575 -1010201 + 1081830 -1016456 + 1090192 -1016456 + 1150224 -1076488 + 1150224 -1378097 + 1141691 -1386630 + 1132639 -1386630 + 1124789 -1394480 + 1124789 -1683258 + 1116616 -1691431 + 1112900 -1691431 + ) + ) + (wire + (path F.Cu 2500 + 1112900 -1703320 + 1112900 -1691431 + ) + ) + ) + (net SR6_QH_T + (wire + (path B.Cu 2500 + 1138300 -1373120 + 1126411 -1373120 + ) + ) + (wire + (path B.Cu 2500 + 719201 -903220 + 706501 -915920 + 639220 -915920 + 631252 -923888 + 631252 -1009579 + 639191 -1017518 + 646935 -1017518 + 990648 -1361231 + 1118238 -1361231 + 1126411 -1369404 + 1126411 -1373120 + ) + ) + ) + (net SR5_QH_T + (wire + (path B.Cu 2500 + 1138300 -1347720 + 1138300 -1335831 + ) + ) + (wire + (path B.Cu 2500 + 719201 -979420 + 998601 -1258820 + 1142520 -1258820 + 1150189 -1266489 + 1150189 -1327658 + 1142016 -1335831 + 1138300 -1335831 + ) + ) + ) + (net SR4_QH_T + (wire + (path B.Cu 2500 + 1126411 -1322320 + 1126411 -1318604 + 1118238 -1310431 + 999412 -1310431 + 719201 -1030220 + ) + ) + (wire + (path B.Cu 2500 + 1138300 -1322320 + 1126411 -1322320 + ) + ) + ) + (net SR3_QH_T + (wire + (path B.Cu 2500 + 1138300 -1296920 + 1126411 -1296920 + ) + ) + (wire + (path B.Cu 2500 + 643001 -1004820 + 655701 -1017520 + 730215 -1017520 + 997726 -1285031 + 1118238 -1285031 + 1126411 -1293204 + 1126411 -1296920 + ) + ) + ) + (net +3V3 + (wire + (path B.Cu 2500 + 630301 -1195320 + 655701 -1195320 + ) + ) + ) + (net SR2_QH + (wire + (path F.Cu 2500 + 701784 -735330 + 701784 -920637 + 643001 -979420 + ) + ) + (via "Via[0-1]_600:400_um" 701784 -735330 + ) + (wire + (path B.Cu 2500 + 1052580 -674624 + 1039880 -687324 + 776910 -687324 + 751510 -712724 + 724390 -712724 + 701784 -735330 + ) + ) + ) + (net SR3_QH + (wire + (path B.Cu 2500 + 1176400 -674624 + 1188071 -686295 + 1188071 -781453 + 1113082 -856442 + 636587 -856442 + 626727 -866302 + 626727 -1013946 + 643001 -1030220 + ) + ) + ) + (net SR4_QH + (wire + (path F.Cu 2500 + 928751 -674624 + 873607 -729768 + 873607 -746948 + 857031 -763524 + 848441 -763524 + 788479 -823486 + 788479 -986342 + 719201 -1055620 + ) + ) + ) + (net SR5_QH + (wire + (path F.Cu 2500 + 804926 -674624 + 743755 -735795 + 743755 -980266 + 719201 -1004820 + ) + ) + ) + (net SR6_QH + (wire + (path F.Cu 2500 + 719201 -928620 + 707121 -916540 + 707121 -738837 + 708037 -737921 + 708037 -701560 + 681101 -674624 + ) + ) + ) + ) + ) +) \ No newline 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U2-7 + P8-15 + ) + ) + (net "SR1_CLK" 1 + (pins + U2-3 + P8-11 + ) + ) + (net "SR1_CLKINH" 1 + (pins + U2-5 + P8-5 + ) + ) + (net "SR1_QH_T" 1 + (pins + U1-2 + P8-4 + ) + ) + (net PGND 1 + (pins + R48-1 + R46-1 + R44-1 + R42-1 + R40-1 + R38-1 + R36-1 + R34-1 + R32-1 + R30-1 + R28-1 + R27-1 + R25-1 + R24-1 + R22-1 + R18-1 + R16-1 + R14-1 + R12-1 + R10-1 + R8-1 + R6-1 + R4-1 + R2-1 + R47-1 + R45-1 + R43-1 + R41-1 + R39-1 + R37-1 + R35-1 + R33-1 + R31-1 + R29-1 + R26-1 + R23-1 + R21-1 + R20-1 + R19-1 + R17-1 + R15-1 + R13-1 + R11-1 + R9-1 + R7-1 + R5-1 + R3-1 + R1-1 + J6-8 + J6-7 + J6-6 + J6-5 + J6-4 + J6-3 + J6-2 + J6-1 + J4-8 + J4-7 + J4-6 + J4-5 + J4-4 + J4-3 + J4-2 + J4-1 + J2-8 + J2-7 + J2-6 + J2-5 + J2-4 + J2-3 + J2-2 + J2-1 + J5-1 + J5-2 + J5-3 + J5-4 + J5-5 + J5-6 + J5-7 + J5-8 + J3-1 + J3-2 + J3-3 + J3-4 + J3-5 + J3-6 + J3-7 + J3-8 + J1-1 + J1-2 + J1-3 + J1-4 + J1-5 + J1-6 + J1-7 + J1-8 + U8-1 + U8-8 + U5-1 + U5-8 + U7-8 + U7-1 + U6-8 + U6-1 + U4-8 + U4-1 + U3-8 + U3-1 + U2-8 + U2-13 + U1-13 + U1-8 + P9-1 + P9-2 + P9-43 + P9-44 + P9-45 + P9-46 + P8-1 + P8-2 + ) + ) + (net 5v 1 + (pins + U8-16 + U5-16 + U7-16 + U6-16 + U4-16 + U3-16 + U2-16 + U1-1 + P9-5 + P9-6 + P9-7 + P9-8 + ) + ) + (net BB3.3 1 + (pins + U2-1 + U1-16 + ) + ) + (net "SR1_QH" 1 + (pins + U3-13 + U1-3 + ) + ) + (net "SR1_CLR_T" 1 + (pins + U8-9 + U5-9 + U7-9 + U6-9 + U4-9 + U3-9 + U2-10 + ) + ) + (net "SR1_SHLD_T" 1 + (pins + U8-15 + U5-15 + U7-15 + U6-15 + U4-15 + U3-15 + U2-6 + ) + ) + (net "SR1_CLKINH_T" 1 + (pins + U8-6 + U5-6 + U7-6 + U6-6 + U4-6 + U3-6 + U2-4 + ) + ) + (net "SR1_CLK_T" 1 + (pins + U8-7 + U5-7 + U7-7 + U6-7 + U4-7 + U3-7 + U2-2 + ) + ) + (net "7SEG_CLK" 1 + (pins + U2-11 + P8-45 + ) + ) + (net "7SEG_DIO" 1 + (pins + U2-14 + P8-43 + ) + ) + (net "SR6_QH_T" 1 + (pins + U1-15 + P8-18 + ) + ) + (net "SR5_QH_T" 1 + (pins + U1-12 + P8-16 + ) + ) + (net "SR4_QH_T" 1 + (pins + U1-10 + P8-14 + ) + ) + (net "SR3_QH_T" 1 + (pins + U1-6 + P8-12 + ) + ) + (net "SR2_QH_T" 1 + (pins + P8-6 + ) + ) + (net +3V3 1 + (pins + P9-3 + P9-4 + ) + ) + (net "SR2_QH__T" 1 + (pins + U1-4 + ) + ) + (net "SR2_QH" 1 + (pins + U7-13 + U1-5 + ) + ) + (net "SR3_QH" 1 + (pins + U8-13 + U1-7 + ) + ) + (net "SR4_QH" 1 + (pins + U6-13 + U1-9 + ) + ) + (net "SR5_QH" 1 + (pins + U5-13 + U1-11 + ) + ) + (net "SR6_QH" 1 + (pins + U4-13 + U1-14 + ) + ) + (net "7SEG_DIO_T" 1 + (pins + U2-15 + ) + ) + (net "7SEG_CLK_T" 1 + (pins + U2-12 + ) + ) + (net "Net-(R1-Pad2)" 1 + (pins + R1-2 + U4-14 + ) + ) + (net "Net-(R2-Pad2)" 1 + (pins + R2-2 + U4-12 + ) + ) + (net "Net-(R3-Pad2)" 1 + (pins + R3-2 + U4-11 + ) + ) + (net "Net-(R4-Pad2)" 1 + (pins + R4-2 + U4-10 + ) + ) + (net "Net-(R5-Pad2)" 1 + (pins + R5-2 + U4-5 + ) + ) + (net "Net-(R6-Pad2)" 1 + (pins + R6-2 + U4-4 + ) + ) + (net "Net-(R7-Pad2)" 1 + (pins + R7-2 + U4-3 + ) + ) + (net "Net-(R8-Pad2)" 1 + (pins + R8-2 + U4-2 + ) + ) + (net "Net-(R9-Pad2)" 1 + (pins + R9-2 + U5-14 + ) + ) + (net "Net-(R10-Pad2)" 1 + (pins + R10-2 + U5-12 + ) + ) + (net "Net-(R11-Pad2)" 1 + (pins + R11-2 + U5-11 + ) + ) + (net "Net-(R12-Pad2)" 1 + (pins + R12-2 + U5-10 + ) + ) + (net "Net-(R13-Pad2)" 1 + (pins + R13-2 + U5-5 + ) + ) + (net "Net-(R14-Pad2)" 1 + (pins + R14-2 + U5-4 + ) + ) + (net "Net-(R15-Pad2)" 1 + (pins + R15-2 + U5-3 + ) + ) + (net "Net-(R16-Pad2)" 1 + (pins + R16-2 + U5-2 + ) + ) + (net "Net-(R17-Pad2)" 1 + (pins + R17-2 + U6-14 + ) + ) + (net "Net-(R18-Pad2)" 1 + (pins + R18-2 + U6-12 + ) + ) + (net "Net-(R19-Pad2)" 1 + (pins + R19-2 + U6-11 + ) + ) + (net "Net-(R20-Pad2)" 1 + (pins + R20-2 + U6-10 + ) + ) + (net "Net-(R21-Pad2)" 1 + (pins + R21-2 + U6-5 + ) + ) + (net "Net-(R22-Pad2)" 1 + (pins + R22-2 + U6-4 + ) + ) + (net "Net-(R23-Pad2)" 1 + (pins + R23-2 + U6-3 + ) + ) + (net "Net-(R24-Pad2)" 1 + (pins + R24-2 + U6-2 + ) + ) + (net "Net-(R25-Pad2)" 1 + (pins + R25-2 + U7-14 + ) + ) + (net "Net-(R26-Pad2)" 1 + (pins + R26-2 + U7-12 + ) + ) + (net "Net-(R27-Pad2)" 1 + (pins + R27-2 + U7-11 + ) + ) + (net "Net-(R28-Pad2)" 1 + (pins + R28-2 + U7-10 + ) + ) + (net "Net-(R29-Pad2)" 1 + (pins + R29-2 + U7-5 + ) + ) + (net "Net-(R30-Pad2)" 1 + (pins + R30-2 + U7-4 + ) + ) + (net "Net-(R31-Pad2)" 1 + (pins + R31-2 + U7-3 + ) + ) + (net "Net-(R32-Pad2)" 1 + (pins + R32-2 + U7-2 + ) + ) + (net "Net-(R33-Pad2)" 1 + (pins + R33-2 + U3-14 + ) + ) + (net "Net-(R34-Pad2)" 1 + (pins + R34-2 + U3-12 + ) + ) + (net "Net-(R35-Pad2)" 1 + (pins + R35-2 + U3-11 + ) + ) + (net "Net-(R36-Pad2)" 1 + (pins + R36-2 + U3-10 + ) + ) + (net "Net-(R37-Pad2)" 1 + (pins + R37-2 + U3-5 + ) + ) + (net "Net-(R38-Pad2)" 1 + (pins + R38-2 + U3-4 + ) + ) + (net "Net-(R39-Pad2)" 1 + (pins + R39-2 + U3-3 + ) + ) + (net "Net-(R40-Pad2)" 1 + (pins + R40-2 + U3-2 + ) + ) + (net "Net-(R41-Pad2)" 1 + (pins + R41-2 + U8-14 + ) + ) + (net "Net-(R42-Pad2)" 1 + (pins + R42-2 + U8-12 + ) + ) + (net "Net-(R43-Pad2)" 1 + (pins + R43-2 + U8-11 + ) + ) + (net "Net-(R44-Pad2)" 1 + (pins + R44-2 + U8-10 + ) + ) + (net "Net-(R45-Pad2)" 1 + (pins + R45-2 + U8-5 + ) + ) + (net "Net-(R46-Pad2)" 1 + (pins + R46-2 + U8-4 + ) + ) + (net "Net-(R47-Pad2)" 1 + (pins + R47-2 + U8-3 + ) + ) + (net "Net-(R48-Pad2)" 1 + (pins + R48-2 + U8-2 + ) + ) + (via + "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default + ) + (via + "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default" + ) + (via_rule + default "Via[0-1]_600:400_um" + ) + (via_rule + "kicad_default" "Via[0-1]_600:400_um-kicad_default" + ) + (class default + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) + (class "kicad_default" + "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)" + "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" + "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" + "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" + "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN" + "VDD_ADC" "GNDA_ADC" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND + 5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK" + "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T" + "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(R1-Pad2)" + "Net-(R2-Pad2)" "Net-(R3-Pad2)" "Net-(R4-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)" "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)" + "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)" "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)" + "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)" "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)" + "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)" + "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)" "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)" + "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)" "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)" + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) + ) + (wiring + (wire + (polyline_path F.Cu 250.0 + 93201.5 -86788.4 93201.6 -86788.4 + 93201.5 -86788.4 93201.5 -89257.0 + 93201.5 -89257.0 96300.8 -92356.3 + 96300.8 -92356.3 96300.8 -113357.2 + 96300.8 -113357.2 96993.6 -114050.0 + 96993.6 -114050.0 96993.6 -122604.0 + 97625.2 -123235.6 98590.0 -124200.4 + 98590.0 -124200.4 98590.0 -124612.0 + 98590.0 -124612.0 98589.9 -124612.0 + ) + (net "Net-(R22-Pad2)" 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 98590.0 -115828.5 98589.9 -115828.5 + 98590.0 -115828.5 98590.0 -115008.0 + 98590.0 -115008.0 96976.2 -113394.2 + 96976.2 -113394.2 96976.2 -103365.9 + 96976.2 -103365.9 98590.1 -101752.0 + 98590.1 -101752.0 98590.2 -101752.1 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 87439.4 -69484.4 87439.5 -69484.3 + 87439.4 -69484.4 88514.4 -70559.4 + 88514.4 -70559.4 89715.1 -70559.4 + 89715.1 -70559.4 92576.3 -73420.6 + 92576.2 -73420.7 92576.2 -91627.4 + 92576.2 -91627.4 95850.4 -94901.6 + 95850.4 -94901.6 95850.4 -113589.1 + 95850.4 -113589.1 96428.9 -114167.6 + 96428.9 -114167.6 96428.9 -122724.2 + 96428.9 -122724.2 96829.3 -123124.6 + 96829.3 -123124.6 96829.3 -141901.3 + 96829.3 -141901.3 98590.0 -143662.0 + 98590.0 -143662.0 98589.9 -143662.1 + ) + (net "Net-(R47-Pad2)" 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path B.Cu 250.0 + 87439.4 -84534.4 87439.3 -84534.4 + 87439.4 -84534.4 87439.5 -84534.3 + 89714.6 -83459.4 90364.8 -83459.4 + 93201.5 -86788.4 93201.6 -86788.5 + 93201.5 -86788.4 93201.4 -86788.4 + ) + (net "Net-(R22-Pad2)" 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 70669.9 -103693.0 70670.0 -103692.9 + 70669.9 -103693.0 72539.3 -105562.4 + 72539.3 -105562.4 78655.9 -105562.4 + 78655.9 -105562.4 79440.9 -106347.4 + 79440.9 -106347.4 79440.9 -107315.7 + 79440.9 -107315.7 78654.2 -108102.4 + 78654.2 -108102.4 77891.3 -108102.4 + 77891.3 -108102.4 75250.7 -110743.0 + 75250.7 -110743.0 75250.7 -140642.6 + 75250.7 -140642.6 78270.1 -143662.0 + 78270.1 -143662.0 78270.0 -143662.1 + ) + (net "Net-(R1-Pad2)" 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 78270.1 -106832.4 78270.2 -106832.5 + 78270.1 -106832.4 74800.4 -110302.1 + 74800.4 -110302.1 74800.4 -146940.7 + 74800.4 -146940.7 77921.3 -150061.6 + 77921.3 -150061.6 78760.6 -150061.6 + 78760.6 -150061.6 79839.6 -151140.6 + 79839.6 -151140.6 79839.6 -168026.9 + 79839.6 -168026.9 82144.7 -170332.0 + 82144.7 -170332.0 111290.0 -170332.0 + 111290.0 -170332.0 111290.0 -170332.1 + ) + (net "7SEG_DIO" 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 111290.0 -171683.1 111290.0 -171683.0 + 111290.0 -171683.1 111659.5 -171683.1 + 111659.5 -171683.1 112506.3 -170836.3 + 112506.3 -170836.3 112506.3 -169845.0 + 112506.3 -169845.0 111804.3 -169143.0 + 111804.3 -169143.0 110588.2 -169143.0 + 110588.2 -169143.0 110587.4 -169143.8 + 110587.4 -169143.8 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64300.1 -106832.0 64300.2 -106832.0 + 64300.1 -105562.0 64300.1 -101752.0 + 64300.1 -104292.0 64300.2 -104292.0 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 64300.1 -109372.0 64300.2 -109372.0 + 64300.1 -108102.0 64300.1 -104292.0 + 64300.1 -106832.0 64300.2 -106832.0 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 72569.9 -97243.4 72569.8 -97243.4 + 72569.9 -98318.4 72569.9 -101543.0 + 72569.9 -99393.4 72569.8 -99393.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 72569.9 -92943.4 72569.8 -92943.4 + 72569.9 -91868.4 72569.9 -95093.4 + 72569.9 -95093.4 72569.8 -95093.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 72570.0 -90793.4 72569.9 -90793.4 + 72569.9 -91868.4 72569.9 -95093.4 + 72569.9 -92943.4 72569.8 -92943.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 104787.0 -95093.4 104786.9 -95093.4 + 104787.0 -94018.4 104787.0 -97243.4 + 104787.0 -97243.4 104786.9 -97243.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 104787.1 -92943.4 104787.0 -92943.4 + 104787.0 -94018.4 104787.0 -97243.4 + 104787.0 -95093.4 104786.9 -95093.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path B.Cu 250.0 + 80914.6 -167612.0 80914.6 -167611.9 + 81989.6 -167612.0 78764.6 -167612.0 + 78764.6 -167612.0 78764.6 -167611.9 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path B.Cu 250.0 + 83064.6 -167612.1 83064.6 -167612.0 + 81989.6 -167612.0 78764.6 -167612.0 + 80914.6 -167612.0 80914.6 -167611.9 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 89339.4 -86684.4 89339.3 -86684.4 + 89339.4 -85609.4 89339.4 -88834.4 + 89339.4 -88834.4 89339.3 -88834.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 89339.4 -84534.4 89339.3 -84534.4 + 89339.4 -85609.4 89339.4 -88834.4 + 89339.4 -86684.4 89339.3 -86684.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 104787.0 -90793.4 104786.9 -90793.4 + 104787.0 -89718.4 104787.0 -92943.4 + 104787.0 -92943.4 104786.9 -92943.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 104787.0 -88643.4 104786.9 -88643.4 + 104787.0 -89718.4 104787.0 -92943.4 + 104787.0 -90793.4 104786.9 -90793.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 89339.5 -82384.4 89339.4 -82384.4 + 89339.4 -83459.4 89339.4 -86684.4 + 89339.4 -84534.4 89339.3 -84534.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 72569.9 -86493.4 72569.8 -86493.4 + 72569.9 -85418.4 72569.9 -88643.4 + 72569.9 -88643.4 72569.8 -88643.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 72570.0 -84343.4 72569.9 -84343.4 + 72569.9 -85418.4 72569.9 -88643.4 + 72569.9 -86493.4 72569.8 -86493.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 72569.9 -80043.4 72570.0 -80043.4 + 72569.9 -81118.4 72569.9 -84343.4 + 72569.9 -82193.4 72569.8 -82193.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 89339.3 -80234.4 89339.4 -80234.4 + 89339.4 -79159.4 89339.4 -82384.4 + 89339.4 -82384.4 89339.3 -82384.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 89339.5 -78084.4 89339.4 -78084.4 + 89339.4 -79159.4 89339.4 -82384.4 + 89339.3 -80234.4 89339.4 -80234.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 72569.9 -88643.4 72570.0 -88643.4 + 72569.9 -88643.4 72569.9 -90793.4 + 72569.9 -90793.4 72569.8 -90793.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 104786.9 -84343.4 104787.0 -84343.4 + 104787.0 -83268.4 104787.0 -80043.4 + 104787.0 -82193.4 104787.1 -82193.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path B.Cu 250.0 + 89514.6 -167612.0 89514.6 -167612.1 + 88439.6 -167612.0 91664.6 -167612.0 + 91664.6 -167612.0 91664.6 -167612.1 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path F.Cu 250.0 + 89339.4 -78084.4 89339.5 -78084.4 + 89339.4 -79159.4 89339.4 -75934.4 + 89339.4 -75934.4 89339.5 -75934.4 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (wire + (polyline_path B.Cu 250.0 + 100265.0 -167612.0 100265.0 -167612.1 + 100265.0 -167612.0 98114.6 -167612.0 + 98114.6 -167612.0 98114.6 -167611.9 + ) + (net PGND 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 93201.5 -86788.4 + (net "Net-(R22-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 88596.4 -99629.7 + (net "SR1_SHLD_T" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 82045.5 -94551.4 + (net "Net-(R36-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 81093.5 -92480.0 + (net "Net-(R29-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 93767.1 -141783.5 + (net "SR3_QH" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 97602.5 -112996.2 + (net "SR5_QH" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 83843.3 -102938.6 + (net "SR6_QH" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 101811.6 -135453.6 + (net "Net-(R6-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 100850.5 -124073.5 + (net "Net-(R15-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 101326.8 -134275.1 + (net "Net-(R8-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 87005.8 -158310.3 + (net "Net-(R9-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 71356.4 -98366.2 + (net "Net-(R7-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 107456.2 -96273.2 + (net "Net-(R17-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 95718.1 -126645.8 + (net "Net-(R20-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 86870.5 -126634.4 + (net "Net-(R12-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 82281.0 -93265.6 + (net "Net-(R12-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 100895.7 -162344.9 + (net "Net-(R23-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 102420.2 -145673.0 + (net "Net-(R2-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 89163.5 -114379.4 + (net "SR1_QH" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 80061.3 -113705.5 + (net "SR1_QH" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 75475.4 -93852.5 + (net "SR1_CLR" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 93874.1 -111346.7 + (net "Net-(R16-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 93874.1 -95872.4 + (net "Net-(R16-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 81029.2 -99878.6 + (net "Net-(R34-Pad2)" 1) + (clearance_class "kicad_default") + ) + (via "Via[0-1]_600:400_um" 95964.6 -157009.0 + (net "Net-(R42-Pad2)" 1) + (clearance_class "kicad_default") + ) + ) +) \ No newline at end of file diff --git a/bbb-bort11.rules b/bbb-bort11.rules new file mode 100644 index 0000000..1db48ec --- /dev/null +++ b/bbb-bort11.rules @@ -0,0 +1,93 @@ + +(rules PCB bbb-bort11 + (snap_angle + fortyfive_degree + ) + (autoroute_settings + (fanout off) + (autoroute on) + (postroute on) + (vias on) + (via_costs 50) + (plane_via_costs 5) + (start_ripup_costs 100) + (start_pass_no 10391) + (layer_rule F.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 2.8) + ) + (layer_rule B.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.5) + ) + ) + (rule + (width 250.0) + (clear 200.2) + (clear 125.0 (type smd_to_turn_gap)) + (clear 50.0 (type smd_smd)) + ) + (padstack "Via[0-1]_600:400_um" + (shape + (circle F.Cu 600.0 0.0 0.0) + ) + (shape + (circle B.Cu 600.0 0.0 0.0) + ) + (attach off) + ) + (via + "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default + ) + (via + "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default" + ) + (via_rule + default "Via[0-1]_600:400_um" + ) + (via_rule + "kicad_default" "Via[0-1]_600:400_um-kicad_default" + ) + (class default + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) + (class "kicad_default" + "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)" + "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" + "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" + "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" + "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN" + "VDD_ADC" "GNDA_ADC" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND + 5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK" + "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T" + "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(R1-Pad2)" + "Net-(R2-Pad2)" "Net-(R3-Pad2)" "Net-(R4-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)" "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)" + "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)" "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)" + "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)" "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)" + "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)" + "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)" "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)" + "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)" "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)" + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) +) \ No newline at end of file diff --git a/bbb-bort11.ses b/bbb-bort11.ses new file mode 100644 index 0000000..814bcd8 --- /dev/null +++ b/bbb-bort11.ses @@ -0,0 +1,2828 @@ + +(session "bbb-bort11.ses" + (base_design "bbb-bort11.dsn") + (placement + (resolution um 10) + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 1112900 -1169920 front 0) + (place P9 630301 -1169920 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N" + (place U1 985901 -1119120 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N::1" + (place U2 782701 -941324 front 180) + ) + (component "SN74HC166N:DIP254P762X508-16" + (place U3 782701 -1347720 front 0) + (place U4 782701 -1563620 front 0) + (place U6 1062100 -1347720 front 0) + (place U7 922401 -1563620 front 0) + ) + (component "SN74HC166N:DIP254P762X508-16::1" + (place U5 922401 -1345440 front 0) + (place U8 1062100 -1563620 front 0) + ) + (component "footprints:640456-8" + (place J1 1125600 -1119120 front 90) + (place J3 803868 -890524 front 90) + (place J5 964734 -890524 front 90) + ) + (component "footprints:640456-8::1" + (place J2 1125600 -890524 front 90) + (place J4 643001 -890524 front 90) + (place J6 643001 -1119120 front 90) + ) + (component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical + (place R1 725699 -1036930 front 180) + (place R3 725699 -1015430 front 180) + (place R5 725699 -993934 front 180) + (place R7 893394 -888344 front 180) + (place R9 787646 -1676120 front 90) + (place R11 725699 -950934 front 180) + (place R13 725699 -907934 front 180) + (place R15 1047870 -972434 front 180) + (place R17 1047870 -929434 front 180) + (place R19 830646 -1676120 front 90) + (place R20 893394 -866844 front 180) + (place R21 1047870 -907934 front 180) + (place R23 852146 -1676120 front 90) + (place R26 893394 -823844 front 180) + (place R29 725699 -843434 front 180) + (place R31 916646 -1676120 front 90) + (place R33 725699 -821934 front 180) + (place R35 893394 -759344 front 180) + (place R37 725699 -800434 front 180) + (place R39 893420 -673295 front 180) + (place R41 938146 -1676120 front 90) + (place R43 1047870 -800434 front 180) + (place R45 981146 -1676120 front 90) + (place R47 893394 -694844 front 180) + ) + (component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical::1 + (place R2 1047870 -1036930 front 180) + (place R4 766146 -1676120 front 90) + (place R6 1047870 -1015430 front 180) + (place R8 1047870 -993934 front 180) + (place R10 725699 -972434 front 180) + (place R12 725699 -929434 front 180) + (place R14 725699 -886434 front 180) + (place R16 1047870 -950934 front 180) + (place R18 809146 -1676120 front 90) + (place R22 893394 -845344 front 180) + (place R24 1047870 -886434 front 180) + (place R25 873646 -1676120 front 90) + (place R27 725699 -864934 front 180) + (place R28 895146 -1676120 front 90) + (place R30 893394 -802344 front 180) + (place R32 893394 -780844 front 180) + (place R34 1047870 -864934 front 180) + (place R36 1047870 -843434 front 180) + (place R38 893394 -737844 front 180) + (place R40 1047870 -821934 front 180) + (place R42 959646 -1676120 front 90) + (place R44 893158 -651985 front 180) + (place R46 893394 -716344 front 180) + (place R48 1002650 -1676120 front 90) + ) + ) + (was_is + ) + (routes + (resolution um 10) + (parser + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (library_out + (padstack "Via[0-1]_600:400_um" + (shape + (circle F.Cu 6000 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) + ) + (via "Via[0-1]_600:400_um" 932015 -867884 + ) + (wire + (path B.Cu 2500 + 874394 -845344 + 885144 -834594 + 898725 -834594 + 932015 -867884 + ) + ) + ) + (net "Net-(R23-Pad2)" + (wire + (path F.Cu 2500 + 985900 -1220720 + 997749 -1232569 + 997749 -1251169 + 990098 -1258820 + 981386 -1258820 + 973816 -1266390 + 973816 -1276561 + 981475 -1284220 + 989896 -1284220 + 1006412 -1300736 + 1006412 -1350571 + 1008957 -1353116 + 1008957 -1623449 + ) + ) + (wire + (path B.Cu 2500 + 862399 -1657120 + 862399 -1653275 + 892225 -1623449 + 1008957 -1623449 + ) + ) + (wire + (path B.Cu 2500 + 852146 -1657120 + 862399 -1657120 + ) + ) + (via "Via[0-1]_600:400_um" 1008957 -1623449 + ) + ) + (net "Net-(R24-Pad2)" + (wire + (path F.Cu 2500 + 1028870 -896687 + 1025025 -896687 + 998451 -923261 + 998451 -1182769 + 985900 -1195320 + ) + ) + (wire + (path F.Cu 2500 + 1028870 -886434 + 1028870 -896687 + ) + ) + ) + (net "Net-(R25-Pad2)" + (wire + (path F.Cu 2500 + 873646 -1657120 + 873646 -1646867 + ) + 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Rect[A]Pad_1810x1810_um 1 0 0) + ) + (padstack Round[A]Pad_1524_um + (shape (circle F.Cu 1524)) + (shape (circle B.Cu 1524)) + (attach off) + ) + (padstack Round[A]Pad_1676.4_um + (shape (circle F.Cu 1676.4)) + (shape (circle B.Cu 1676.4)) + (attach off) + ) + (padstack Round[A]Pad_1810_um + (shape (circle F.Cu 1810)) + (shape (circle B.Cu 1810)) + (attach off) + ) + (padstack Oval[A]Pad_1727.2x1727.2_um + (shape (path F.Cu 1727.2 0 0 0 0)) + (shape (path B.Cu 1727.2 0 0 0 0)) + (attach off) + ) + (padstack Rect[A]Pad_1676.4x1676.4_um + (shape (rect F.Cu -838.2 -838.2 838.2 838.2)) + (shape (rect B.Cu -838.2 -838.2 838.2 838.2)) + (attach off) + ) + (padstack Rect[A]Pad_1727.2x1727.2_um + (shape (rect F.Cu -863.6 -863.6 863.6 863.6)) + (shape (rect B.Cu -863.6 -863.6 863.6 863.6)) + (attach off) + ) + (padstack Rect[A]Pad_1810x1810_um + (shape (rect F.Cu -905 -905 905 905)) + (shape (rect B.Cu -905 -905 905 905)) + (attach off) + ) + (padstack "Via[0-1]_600:400_um" + (shape (circle F.Cu 600)) + (shape (circle B.Cu 600)) + (attach off) + ) + ) + (network + (net SR1_CLR + (pins U2-9 P8-17) + ) + (net SR1_SHLD + (pins U2-7 P8-15) + ) + (net SR1_CLK + (pins U2-3 P8-11) + ) + (net SR1_CLKINH + (pins U2-5 P8-5) + ) + (net SR1_QH_T + (pins U1-2 P8-4) + ) + (net PGND + (pins U8-8 U8-1 U7-1 U7-8 U6-8 U6-1 U5-1 U5-8 U4-8 U4-1 U3-1 U3-8 U2-13 U2-8 + U1-8 U1-13 P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 RN3-1) + ) + (net 5v + (pins U8-16 U7-16 U6-16 U5-16 U4-16 U3-16 U2-16 U1-1 P9-8 P9-7 P9-6 P9-5) + ) + (net BB3.3 + (pins U2-1 U1-16) + ) + (net SR1_QH + (pins U3-13 U1-3) + ) + (net SR1_CLR_T + (pins U8-9 U7-9 U6-9 U5-9 U4-9 U3-9 U2-10) + ) + (net SR1_SHLD_T + (pins U8-15 U7-15 U6-15 U5-15 U4-15 U3-15 U2-6) + ) + (net SR1_CLKINH_T + (pins U8-6 U7-6 U6-6 U5-6 U4-6 U3-6 U2-4) + ) + (net SR1_CLK_T + (pins U8-7 U7-7 U6-7 U5-7 U4-7 U3-7 U2-2) + ) + (net 7SEG_CLK + (pins U2-11 P8-45) + ) + (net 7SEG_DIO + (pins U2-14 P8-43) + ) + (net SR6_QH_T + (pins U1-15 P8-18) + ) + (net SR5_QH_T + (pins U1-12 P8-16) + ) + (net SR4_QH_T + (pins U1-10 P8-14) + ) + (net SR3_QH_T + (pins U1-6 P8-12) + ) + (net +3V3 + (pins P9-4 P9-3) + ) + (net SR2_QH + (pins U7-13 U1-5) + ) + (net SR3_QH + (pins U8-13 U1-7) + ) + (net SR4_QH + (pins U6-13 U1-9) + ) + (net SR5_QH + (pins U5-13 U1-11) + ) + (net SR6_QH + (pins U4-13 U1-14) + ) + (class kicad_default "" +3V3 /a1 /a2 /a3 /a4 /a5 /a6 /a7 /a8 /b1 /b2 /b3 + /b4 /b5 /b6 /b7 /b8 /c1 /c2 /c3 /c4 /c5 /c6 /c7 /c8 /d1 /d2 /d3 /d4 + /d5 /d6 /d7 /d8 /e1 /e2 /e3 /e4 /e5 /e6 /e7 /e8 /f1 /f2 /f3 /f4 /f5 + /f6 /f7 /f8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 GNDA_ADC + "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" + "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" + "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" + "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)" + "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" + "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" + "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)" + "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" + "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)" + "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" + "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)" + "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" + "Net-(R1-Pad2)" "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)" + "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)" + "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R2-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)" + "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)" + "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)" + "Net-(R3-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)" + "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)" + "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R4-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)" + "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)" + "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)" + "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)" "Net-(RN1-Pad1)" "Net-(RN1-Pad2)" + "Net-(RN1-Pad3)" "Net-(RN1-Pad4)" "Net-(RN1-Pad5)" "Net-(RN1-Pad6)" + "Net-(RN1-Pad7)" "Net-(RN1-Pad8)" "Net-(RN1-Pad9)" "Net-(RN2-Pad1)" + "Net-(RN2-Pad2)" "Net-(RN2-Pad3)" "Net-(RN2-Pad4)" "Net-(RN2-Pad5)" + "Net-(RN2-Pad6)" "Net-(RN2-Pad7)" "Net-(RN2-Pad8)" "Net-(RN2-Pad9)" + "Net-(RN3-Pad2)" "Net-(RN3-Pad3)" "Net-(RN3-Pad4)" "Net-(RN3-Pad5)" + "Net-(RN3-Pad6)" "Net-(RN3-Pad7)" "Net-(RN3-Pad8)" "Net-(RN3-Pad9)" + "Net-(RN4-Pad1)" "Net-(RN4-Pad2)" "Net-(RN4-Pad3)" "Net-(RN4-Pad4)" + "Net-(RN4-Pad5)" "Net-(RN4-Pad6)" "Net-(RN4-Pad7)" "Net-(RN4-Pad8)" + "Net-(RN4-Pad9)" "Net-(RN5-Pad1)" "Net-(RN5-Pad2)" "Net-(RN5-Pad3)" + "Net-(RN5-Pad4)" "Net-(RN5-Pad5)" "Net-(RN5-Pad6)" "Net-(RN5-Pad7)" + "Net-(RN5-Pad8)" "Net-(RN5-Pad9)" "Net-(RN6-Pad1)" "Net-(RN6-Pad2)" + "Net-(RN6-Pad3)" "Net-(RN6-Pad4)" "Net-(RN6-Pad5)" "Net-(RN6-Pad6)" + "Net-(RN6-Pad7)" "Net-(RN6-Pad8)" "Net-(RN6-Pad9)" PGND PWR_BUT SR1_CLK + SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T + SR1_SHLD SR1_SHLD_T SR2_QH SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH + SR4_QH_T SR5_QH SR5_QH_T SR6_QH SR6_QH_T SYS_RESETN VDD_ADC a1r a2r + a3r a4r a5r a6r a7r a8r b1r b2r b3r b4r b5r b6r b7r b8r c1r c2r c3r + c4r c5r c6r c7r c8r d1r d2r d3r d4r d5r d6r d7r d8r e1r e2r e3r e4r + e5r e6r e7r e8r f1r f2r f3r f4r f5r f6r f7r f8r + (circuit + (use_via Via[0-1]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + ) +) diff --git a/bbb-bort12.rules b/bbb-bort12.rules new file mode 100644 index 0000000..aaf7e9d --- /dev/null +++ b/bbb-bort12.rules @@ -0,0 +1,79 @@ + +(rules PCB bbb-bort12 + (snap_angle + fortyfive_degree + ) + (autoroute_settings + (fanout off) + (autoroute on) + (postroute on) + (vias on) + (via_costs 50) + (plane_via_costs 5) + (start_ripup_costs 100) + (start_pass_no 1198) + (layer_rule F.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 2.8) + ) + (layer_rule B.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.6) + ) + ) + (rule + (width 250.0) + (clear 200.2) + (clear 125.0 (type smd_to_turn_gap)) + (clear 50.0 (type smd_smd)) + ) + (padstack "Via[0-1]_600:400_um" + (shape + (circle F.Cu 600.0 0.0 0.0) + ) + (shape + (circle B.Cu 600.0 0.0 0.0) + ) + (attach off) + ) + (via + "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default + ) + (via + "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default" + ) + (via_rule + default "Via[0-1]_600:400_um" + ) + (via_rule + "kicad_default" "Via[0-1]_600:400_um-kicad_default" + ) + (class default + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) + (class "kicad_default" + "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND 5v BB3.3 + "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK" "7SEG_DIO" "SR6_QH_T" + "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" +3V3 "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" + "SR6_QH" + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) +) \ No newline at end of file diff --git a/bbb-bort12.ses b/bbb-bort12.ses new file mode 100644 index 0000000..a650d72 --- /dev/null +++ b/bbb-bort12.ses @@ -0,0 +1,1100 @@ + +(session "bbb-bort12.ses" + (base_design "bbb-bort12.dsn") + (placement + (resolution um 10) + (component "166new:DIP254P762X508-16" + (place U8 1659000 -1220720 front 0) + (place U6 1659000 -1004820 front 0) + (place U4 1379600 -1220720 front 0) + (place U2 1379600 -598424 front 180) + ) + (component "166new:DIP254P762X508-16::1" + (place U7 1519300 -1220720 front 0) + (place U5 1519300 -1002540 front 0) + (place U3 1379600 -1004820 front 0) + (place U1 1582800 -776220 front 0) + ) + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 1709800 -827020 front 0) + (place P9 1227200 -827020 front 0) + ) + (component "footprints:640456-8" + (place J1 1722500 -776220 front 90) + (place J3 1400770 -547624 front 90) + (place J5 1559400 -547624 front 90) + ) + (component "footprints:640456-8::1" + (place J2 1722500 -547624 front 90) + (place J4 1239900 -547624 front 90) + (place J6 1239900 -776220 front 90) + ) + (component "digikey-footprints:SIP-9_P2.54mm" + (place RN1 1368900 -1280000 front 0) + (place RN4 1635600 -555929 front 90) + (place RN5 1368900 -1343500 front 0) + ) + (component "digikey-footprints:SIP-9_P2.54mm::1" + (place RN2 1318100 -555929 front 90) + (place RN3 1470500 -555929 front 90) + (place RN6 1368900 -1407000 front 0) + ) + ) + (was_is + ) + (routes + (resolution um 10) + (parser + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (library_out + (padstack "Via[0-1]_600:400_um" + (shape + (circle F.Cu 6000 0 0) + ) + (shape + (circle B.Cu 6000 0 0) + ) + (attach off) + ) + ) + (network_out + (net SR1_CLR + (wire + (path B.Cu 2500 + 1379600 -598424 + 1417701 -636525 + 1417701 -766152 + 1472192 -820643 + 1472192 -845108 + 1515324 -888240 + 1536112 -888240 + 1563792 -915920 + 1603653 -915920 + 1654453 -966720 + 1663599 -966720 + 1697911 -1001032 + 1697911 -1010158 + 1706084 -1018331 + 1709800 -1018331 + ) + ) + (wire + (path B.Cu 2500 + 1709800 -1030220 + 1709800 -1018331 + ) + ) + ) + (net SR1_SHLD + (wire + (path F.Cu 2500 + 1709800 -1004820 + 1721689 -1004820 + ) + ) + (wire + (path F.Cu 2500 + 1721689 -1004820 + 1721689 -1001104 + 1729862 -992931 + 1738595 -992931 + 1747161 -984365 + 1747161 -822114 + 1611236 -686189 + 1611236 -660972 + 1586784 -636520 + 1578886 -636520 + 1528760 -586394 + 1493230 -586394 + 1455800 -623824 + ) + ) + ) + (net SR1_CLK + (wire + (path B.Cu 2500 + 1709800 -954020 + 1697911 -954020 + ) + ) + (wire + (path B.Cu 2500 + 1697911 -954020 + 1686022 -942131 + 1655467 -942131 + 1603856 -890520 + 1553311 -890520 + 1525631 -862840 + 1515365 -862840 + 1481199 -828674 + 1481199 -750823 + 1455800 -725424 + ) + ) + ) + (net SR1_CLKINH + (wire + (path B.Cu 2500 + 1455800 -674624 + 1493896 -712720 + 1527656 -712720 + 1553056 -738120 + 1593678 -738120 + 1693408 -837850 + 1693408 -853255 + 1706084 -865931 + 1709800 -865931 + ) + ) + (wire + (path B.Cu 2500 + 1709800 -877820 + 1709800 -865931 + ) + ) + ) + (net SR1_QH_T + (wire + (path B.Cu 2500 + 1506600 -623820 + 1570100 -687320 + 1612719 -687320 + 1747100 -821701 + 1747100 -832346 + 1738915 -840531 + 1735200 -840531 + ) + ) + (wire + (path B.Cu 2500 + 1735200 -852420 + 1735200 -840531 + ) + ) + ) + (net PGND + (wire + (path B.Cu 2500 + 1252600 -827020 + 1227200 -827020 + ) + ) + (wire + (path B.Cu 2500 + 1303400 -827020 + 1252600 -827020 + ) + ) + (wire + (path B.Cu 2500 + 1582800 -827020 + 1571165 -827020 + ) + ) + (wire + (path B.Cu 2500 + 1506600 -776220 + 1520365 -776220 + 1571165 -827020 + ) + ) + (wire + (path F.Cu 2500 + 1303400 -827020 + 1303400 -838655 + ) + ) + (wire + (path F.Cu 2500 + 1303400 -838655 + 1306309 -838655 + 1315443 -847789 + 1315443 -992777 + 1303400 -1004820 + ) + ) + (wire + (path F.Cu 2500 + 1456408 -826412 + 1454735 -824740 + 1453609 -824740 + ) + ) + (wire + (path F.Cu 2500 + 1443100 -1002540 + 1459238 -986402 + 1459238 -829243 + 1456408 -826412 + ) + ) + (wire + (path F.Cu 2500 + 1456408 -826412 + 1506600 -776220 + ) + ) + (wire + (path F.Cu 2500 + 1709800 -827020 + 1697911 -827020 + ) + ) + (wire + (path F.Cu 2500 + 1594722 -730138 + 1594722 -686542 + 1582800 -674620 + ) + ) + (wire + (path F.Cu 2500 + 1582800 -815385 + 1570753 -803338 + 1570753 -746412 + 1579045 -738120 + 1586740 -738120 + 1594722 -730138 + ) + ) + (wire + (path F.Cu 2500 + 1697911 -827020 + 1601029 -730138 + 1594722 -730138 + ) + ) + (wire + (path F.Cu 2500 + 1582800 -827020 + 1582800 -815385 + ) + ) + (wire + (path B.Cu 2500 + 1582800 -1042920 + 1571165 -1042920 + ) + ) + (wire + (path B.Cu 2500 + 1559636 -1027984 + 1571165 -1039513 + 1571165 -1042920 + ) + ) + (wire + (path B.Cu 2500 + 1559636 -1027984 + 1582800 -1004820 + ) + ) + (wire + (path B.Cu 2500 + 1468544 -1027984 + 1559636 -1027984 + ) + ) + (wire + (path B.Cu 2500 + 1454735 -1042920 + 1468544 -1029111 + 1468544 -1027984 + ) + ) + (wire + (path B.Cu 2500 + 1468544 -1027984 + 1443100 -1002540 + ) + ) + (wire + (path F.Cu 2500 + 1443100 -824740 + 1453609 -824740 + ) + ) + (wire + (path F.Cu 2500 + 1455143 -1208677 + 1443100 -1220720 + ) + ) + (wire + (path F.Cu 2500 + 1443100 -1054555 + 1446009 -1054555 + 1455143 -1063689 + 1455143 -1208677 + ) + ) + (wire + (path F.Cu 2500 + 1455143 -1208677 + 1570757 -1208677 + 1582800 -1220720 + ) + ) + (wire + (path B.Cu 2500 + 1443100 -813105 + 1443100 -809194 + 1395147 -761241 + 1391236 -761241 + ) + ) + (wire + (path B.Cu 2500 + 1303400 -827020 + 1315035 -827020 + ) + ) + (wire + (path B.Cu 2500 + 1315035 -827020 + 1315035 -824111 + 1375622 -763524 + 1388953 -763524 + 1391236 -761241 + ) + ) + (wire + (path B.Cu 2500 + 1379600 -700024 + 1391236 -711660 + 1391236 -761241 + ) + ) + (wire + (path B.Cu 2500 + 1443100 -824740 + 1443100 -813105 + ) + ) + (wire + (path F.Cu 2500 + 1252600 -1360420 + 1239089 -1360420 + ) + ) + (wire + (path F.Cu 2500 + 1252600 -1385820 + 1252600 -1360420 + ) + ) + (wire + (path F.Cu 2500 + 1227200 -1360420 + 1239089 -1360420 + ) + ) + (wire + (path F.Cu 2500 + 1252600 -1385820 + 1239089 -1385820 + ) + ) + (wire + (path F.Cu 2500 + 1227200 -1385820 + 1239089 -1385820 + ) + ) + (wire + (path B.Cu 2500 + 1735200 -827020 + 1723311 -827020 + ) + ) + (wire + (path B.Cu 2500 + 1709800 -821075 + 1717366 -821075 + 1723311 -827020 + ) + ) + (wire + (path B.Cu 2500 + 1709800 -827020 + 1709800 -821075 + ) + ) + (wire + (path B.Cu 2500 + 1443100 -1220720 + 1431056 -1232764 + 1315444 -1232764 + ) + ) + (wire + (path B.Cu 2500 + 1315444 -1232764 + 1303400 -1220720 + ) + ) + (wire + (path B.Cu 2500 + 1315444 -1232764 + 1315444 -1289484 + 1256397 -1348531 + 1252600 -1348531 + ) + ) + (wire + (path B.Cu 2500 + 1252600 -1360420 + 1252600 -1348531 + ) + ) + (wire + (path F.Cu 2500 + 1443100 -1042920 + 1443100 -1054555 + ) + ) + (wire + (path F.Cu 2500 + 1455800 -598424 + 1393364 -660860 + 1393364 -686260 + 1379600 -700024 + ) + ) + (wire + (path F.Cu 2500 + 1470500 -568232 + 1455800 -582932 + 1455800 -598424 + ) + ) + (wire + (path B.Cu 2500 + 1443100 -1042920 + 1454735 -1042920 + ) + ) + (wire + (path F.Cu 2500 + 1303400 -1004820 + 1303400 -1042920 + ) + ) + (wire + (path F.Cu 2500 + 1470500 -555929 + 1470500 -568232 + ) + ) + ) + (net 5v + (wire + (path B.Cu 2500 + 1227200 -877820 + 1240711 -877820 + ) + ) + (wire + (path B.Cu 2500 + 1252600 -877820 + 1240711 -877820 + ) + ) + (wire + (path B.Cu 2500 + 1227200 -877820 + 1227200 -891331 + ) + ) + (wire + (path B.Cu 2500 + 1227200 -903220 + 1227200 -891331 + ) + ) + (wire + (path B.Cu 2500 + 1519300 -1042920 + 1530936 -1054556 + 1647364 -1054556 + 1659000 -1042920 + ) + ) + (wire + (path B.Cu 2500 + 1519300 -1042920 + 1507664 -1054556 + 1391236 -1054556 + 1379600 -1042920 + ) + ) + (wire + (path B.Cu 2500 + 1252600 -915109 + 1256316 -915109 + 1264489 -923282 + 1264489 -956994 + 1299615 -992120 + 1328800 -992120 + 1379600 -1042920 + ) + ) + (wire + (path F.Cu 2500 + 1506600 -598420 + 1494965 -598420 + ) + ) + (wire + (path F.Cu 2500 + 1379600 -776224 + 1367595 -764219 + 1367595 -720665 + 1375536 -712724 + 1383356 -712724 + 1435804 -660276 + 1435804 -652372 + 1451652 -636524 + 1459770 -636524 + 1494965 -601329 + 1494965 -598420 + ) + ) + (wire + (path F.Cu 2500 + 1379600 -827020 + 1379600 -776224 + ) + ) + (wire + (path B.Cu 2500 + 1519300 -824740 + 1533216 -838656 + 1647364 -838656 + 1659000 -827020 + ) + ) + (wire + (path F.Cu 2500 + 1519300 -1042920 + 1502667 -1026287 + 1502667 -841373 + 1519300 -824740 + ) + ) + (wire + (path F.Cu 2500 + 1252600 -903220 + 1239089 -903220 + ) + ) + (wire + (path F.Cu 2500 + 1227200 -903220 + 1239089 -903220 + ) + ) + (wire + (path B.Cu 2500 + 1252600 -903220 + 1252600 -915109 + ) + ) + (wire + (path B.Cu 2500 + 1252600 -877820 + 1264489 -877820 + ) + ) + (wire + (path B.Cu 2500 + 1264489 -877820 + 1276378 -865931 + 1340689 -865931 + 1379600 -827020 + ) + ) + ) + (net BB3.3 + (wire + (path B.Cu 2500 + 1455800 -776224 + 1455800 -764589 + ) + ) + (wire + (path B.Cu 2500 + 1582800 -598420 + 1571164 -610056 + 1503194 -610056 + 1480139 -633111 + 1480139 -641379 + 1459594 -661924 + 1451878 -661924 + 1444165 -669637 + 1444165 -755864 + 1452890 -764589 + 1455800 -764589 + ) + ) + ) + (net SR1_QH + (wire + (path B.Cu 2500 + 1436091 -811029 + 1435263 -811029 + 1393364 -852928 + 1393364 -889456 + 1379600 -903220 + ) + ) + (via "Via[0-1]_600:400_um" 1436091 -811029 + ) + (wire + (path F.Cu 2500 + 1506600 -649220 + 1494964 -660856 + 1494964 -759159 + 1443094 -811029 + 1436091 -811029 + ) + ) + ) + (net SR1_CLR_T + (wire + (path B.Cu 2500 + 1659000 -1220720 + 1647293 -1209013 + 1531007 -1209013 + 1519300 -1220720 + ) + ) + (wire + (path B.Cu 2500 + 1659000 -1004820 + 1671043 -1016863 + 1671043 -1208677 + 1659000 -1220720 + ) + ) + (wire + (path F.Cu 2500 + 1379600 -1004820 + 1363092 -988312 + 1363092 -640332 + 1379600 -623824 + ) + ) + (wire + (path F.Cu 2500 + 1659000 -1004820 + 1646951 -992771 + 1529069 -992771 + 1519300 -1002540 + ) + ) + (wire + (path B.Cu 2500 + 1379600 -1004820 + 1393786 -990634 + 1507394 -990634 + 1519300 -1002540 + ) + ) + (wire + (path B.Cu 2500 + 1379600 -1220720 + 1391506 -1208814 + 1507394 -1208814 + 1519300 -1220720 + ) + ) + ) + (net SR1_SHLD_T + (wire + (path F.Cu 2500 + 1379600 -852420 + 1395739 -836281 + 1395739 -709285 + 1455800 -649224 + ) + ) + (wire + (path F.Cu 2500 + 1379600 -852420 + 1396204 -869024 + 1396204 -1051716 + 1379600 -1068320 + ) + ) + (wire + (path F.Cu 2500 + 1531343 -1056277 + 1519300 -1068320 + ) + ) + (wire + (path F.Cu 2500 + 1519300 -850140 + 1507171 -862269 + 1507171 -1009772 + 1531343 -1033944 + 1531343 -1056277 + ) + ) + (wire + (path F.Cu 2500 + 1531343 -1056277 + 1646957 -1056277 + 1659000 -1068320 + ) + ) + (wire + (path B.Cu 2500 + 1519300 -850140 + 1533486 -864326 + 1647094 -864326 + 1659000 -852420 + ) + ) + (wire + (path B.Cu 2500 + 1379600 -1068320 + 1391506 -1080226 + 1507394 -1080226 + 1519300 -1068320 + ) + ) + ) + (net SR1_CLKINH_T + (wire + (path B.Cu 2500 + 1303400 -1169920 + 1315306 -1158014 + 1431194 -1158014 + 1443100 -1169920 + ) + ) + (wire + (path B.Cu 2500 + 1443100 -951740 + 1454971 -939869 + 1568649 -939869 + 1582800 -954020 + ) + ) + (wire + (path F.Cu 2500 + 1443100 -951740 + 1425140 -933780 + 1425140 -730684 + 1455800 -700024 + ) + ) + (wire + (path F.Cu 2500 + 1303400 -954020 + 1291765 -965655 + 1291765 -1158285 + 1303400 -1169920 + ) + ) + (wire + (path B.Cu 2500 + 1303400 -954020 + 1315063 -942357 + 1433717 -942357 + 1443100 -951740 + ) + ) + (wire + (path B.Cu 2500 + 1443100 -1169920 + 1455006 -1158014 + 1570894 -1158014 + 1582800 -1169920 + ) + ) + ) + (net SR1_CLK_T + (wire + (path B.Cu 2500 + 1443100 -1195320 + 1431427 -1183647 + 1315073 -1183647 + 1303400 -1195320 + ) + ) + (wire + (path B.Cu 2500 + 1443100 -1195320 + 1455006 -1183414 + 1570894 -1183414 + 1582800 -1195320 + ) + ) + (wire + (path F.Cu 2500 + 1443100 -977140 + 1454735 -965505 + 1454735 -946889 + 1446886 -939040 + 1439346 -939040 + 1429643 -929337 + 1429643 -776981 + 1455800 -750824 + ) + ) + (wire + (path F.Cu 2500 + 1443100 -1195320 + 1431058 -1183278 + 1431058 -989182 + 1443100 -977140 + ) + ) + (wire + (path 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(outline (path signal 100 -900 1400 -1400 1400)) + (outline (path signal 100 -1400 1400 -1400 -1400)) + (outline (path signal 100 -1400 -1400 -900 -1400)) + (outline (path signal 100 21570 1250 21570 -1250)) + (outline (path signal 100 -1240 1250 -1240 -1250)) + (outline (path signal 100 -1240 -1250 21570 -1250)) + (outline (path signal 100 -1240 1250 21570 1250)) + (pin Rect[A]Pad_1810x1810_um 1 0 0) + (pin Round[A]Pad_1810_um 2 2540 0) + (pin Round[A]Pad_1810_um 3 5080 0) + (pin Round[A]Pad_1810_um 4 7620 0) + (pin Round[A]Pad_1810_um 5 10160 0) + (pin Round[A]Pad_1810_um 6 12700 0) + (pin Round[A]Pad_1810_um 7 15240 0) + (pin Round[A]Pad_1810_um 8 17780 0) + (pin Round[A]Pad_1810_um 9 20320 0) + ) + (image "digikey-footprints:SIP-9_P2.54mm::1" + (outline (path signal 100 -1240 1250 21570 1250)) + (outline (path signal 100 -1240 -1250 21570 -1250)) + (outline (path signal 100 -1240 1250 -1240 -1250)) + (outline (path signal 100 21570 1250 21570 -1250)) + (outline (path signal 100 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(padstack Round[A]Pad_1676.4_um + (shape (circle F.Cu 1676.4)) + (shape (circle B.Cu 1676.4)) + (attach off) + ) + (padstack Round[A]Pad_1810_um + (shape (circle F.Cu 1810)) + (shape (circle B.Cu 1810)) + (attach off) + ) + (padstack Oval[A]Pad_1727.2x1727.2_um + (shape (path F.Cu 1727.2 0 0 0 0)) + (shape (path B.Cu 1727.2 0 0 0 0)) + (attach off) + ) + (padstack Rect[A]Pad_1676.4x1676.4_um + (shape (rect F.Cu -838.2 -838.2 838.2 838.2)) + (shape (rect B.Cu -838.2 -838.2 838.2 838.2)) + (attach off) + ) + (padstack Rect[A]Pad_1727.2x1727.2_um + (shape (rect F.Cu -863.6 -863.6 863.6 863.6)) + (shape (rect B.Cu -863.6 -863.6 863.6 863.6)) + (attach off) + ) + (padstack Rect[A]Pad_1810x1810_um + (shape (rect F.Cu -905 -905 905 905)) + (shape (rect B.Cu -905 -905 905 905)) + (attach off) + ) + (padstack "Via[0-1]_600:400_um" + (shape (circle F.Cu 600)) + (shape (circle B.Cu 600)) + (attach off) + ) + ) + (network + (net SR1_CLR + (pins U2-9 P8-17) + ) + (net SR1_SHLD + (pins U2-7 P8-15) + ) + (net SR1_CLK + (pins U2-3 P8-11) + ) + (net SR1_CLKINH + (pins U2-5 P8-5) + ) + (net SR1_QH_T + (pins U1-2 P8-4) + ) + (net PGND + (pins U8-8 U8-1 U7-1 U7-8 U6-8 U6-1 U5-1 U5-8 U4-8 U4-1 U3-1 U3-8 U2-13 U2-8 + U1-8 U1-13 P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 RN1-1 RN2-1 RN3-1 RN4-1 + RN5-1 RN6-1) + ) + (net 5v + (pins U8-16 U7-16 U6-16 U5-16 U4-16 U3-16 U2-16 U1-1 P9-8 P9-7 P9-6 P9-5) + ) + (net BB3.3 + (pins U2-1 U1-16) + ) + (net SR1_QH + (pins U3-13 U1-3) + ) + (net SR1_CLR_T + (pins U8-9 U7-9 U6-9 U5-9 U4-9 U3-9 U2-10) + ) + (net SR1_SHLD_T + (pins U8-15 U7-15 U6-15 U5-15 U4-15 U3-15 U2-6) + ) + (net SR1_CLKINH_T + (pins U8-6 U7-6 U6-6 U5-6 U4-6 U3-6 U2-4) + ) + (net SR1_CLK_T + (pins U8-7 U7-7 U6-7 U5-7 U4-7 U3-7 U2-2) + ) + (net 7SEG_CLK + (pins U2-11 P8-45) + ) + (net 7SEG_DIO + (pins U2-14 P8-43) + ) + (net SR6_QH_T + (pins U1-15 P8-18) + ) + (net SR5_QH_T + (pins U1-12 P8-16) + ) + (net SR4_QH_T + (pins U1-10 P8-14) + ) + (net SR3_QH_T + (pins U1-6 P8-12) + ) + (net +3V3 + (pins P9-4 P9-3) + ) + (net SR2_QH + (pins U7-13 U1-5) + ) + (net SR3_QH + (pins U8-13 U1-7) + ) + (net SR4_QH + (pins U6-13 U1-9) + ) + (net SR5_QH + (pins U5-13 U1-11) + ) + (net SR6_QH + (pins U4-13 U1-14) + ) + (net e8r + (pins U3-2 J5-1 RN4-9) + ) + (net e7r + (pins U3-3 J5-2 RN4-8) + ) + (net e6r + (pins U3-4 J5-3 RN4-7) + ) + (net e5r + (pins U3-5 J5-4 RN4-6) + ) + (net e4r + (pins U3-10 J5-5 RN4-5) + ) + (net e3r + (pins U3-11 J5-6 RN4-4) + ) + (net e2r + (pins U3-12 J5-7 RN4-3) + ) + (net e1r + (pins U3-14 J5-8 RN4-2) + ) + (net a1r + (pins U4-14 J1-8 RN1-2) + ) + (net a2r + (pins U4-12 J1-7 RN1-3) + ) + (net a3r + (pins U4-11 J1-6 RN1-4) + ) + (net a4r + (pins U4-10 J1-5 RN1-5) + ) + (net a5r + (pins U4-5 J1-4 RN1-6) + ) + (net a6r + (pins U4-4 J1-3 RN1-7) + ) + (net a7r + (pins U4-3 J1-2 RN1-8) + ) + (net a8r + (pins U4-2 J1-1 RN1-9) + ) + (net b8r + (pins U5-2 J2-1 RN3-9) + ) + (net b7r + (pins U5-3 J2-2 RN3-8) + ) + (net b6r + (pins U5-4 J2-3 RN3-7) + ) + (net b5r + (pins U5-5 J2-4 RN3-6) + ) + (net b4r + (pins U5-10 J2-5 RN3-5) + ) + (net b3r + (pins U5-11 J2-6 RN3-4) + ) + (net b2r + (pins U5-12 J2-7 RN3-3) + ) + (net b1r + (pins U5-14 J2-8 RN3-2) + ) + (net c1r + (pins U6-14 J3-8 RN5-2) + ) + (net c2r + (pins U6-12 J3-7 RN5-3) + ) + (net c3r + (pins U6-11 J3-6 RN5-4) + ) + (net c4r + (pins U6-10 J3-5 RN5-5) + ) + (net c5r + (pins U6-5 J3-4 RN5-6) + ) + (net c6r + (pins U6-4 J3-3 RN5-7) + ) + (net c7r + (pins U6-3 J3-2 RN5-8) + ) + (net c8r + (pins U6-2 J3-1 RN5-9) + ) + (net d8r + (pins U7-2 J4-1 RN2-9) + ) + (net d7r + (pins U7-3 J4-2 RN2-8) + ) + (net d6r + (pins U7-4 J4-3 RN2-7) + ) + (net d5r + (pins U7-5 J4-4 RN2-6) + ) + (net d4r + (pins U7-10 J4-5 RN2-5) + ) + (net d3r + (pins U7-11 J4-6 RN2-4) + ) + (net d2r + (pins U7-12 J4-7 RN2-3) + ) + (net d1r + (pins U7-14 J4-8 RN2-2) + ) + (net f1r + (pins U8-14 J6-8 RN6-2) + ) + (net f2r + (pins U8-12 J6-7 RN6-3) + ) + (net f3r + (pins U8-11 J6-6 RN6-4) + ) + (net f4r + (pins U8-10 J6-5 RN6-5) + ) + (net f5r + (pins U8-5 J6-4 RN6-6) + ) + (net f6r + (pins U8-4 J6-3 RN6-7) + ) + (net f7r + (pins U8-3 J6-2 RN6-8) + ) + (net f8r + (pins U8-2 J6-1 RN6-9) + ) + (class kicad_default "" +3V3 /a1 /a2 /a3 /a4 /a5 /a6 /a7 /a8 /b1 /b2 /b3 + /b4 /b5 /b6 /b7 /b8 /c1 /c2 /c3 /c4 /c5 /c6 /c7 /c8 /d1 /d2 /d3 /d4 + /d5 /d6 /d7 /d8 /e1 /e2 /e3 /e4 /e5 /e6 /e7 /e8 /f1 /f2 /f3 /f4 /f5 + /f6 /f7 /f8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 GNDA_ADC + "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" + "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" + "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" + "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)" + "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" + "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" + "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)" + "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" + "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)" + "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" + "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)" + "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" + "Net-(R1-Pad2)" "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)" + "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)" + "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R2-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)" + "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)" + "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)" + "Net-(R3-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)" + "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)" + "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R4-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)" + "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)" + "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)" + "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)" "Net-(RN1-Pad1)" "Net-(RN1-Pad2)" + "Net-(RN1-Pad3)" "Net-(RN1-Pad4)" "Net-(RN1-Pad5)" "Net-(RN1-Pad6)" + "Net-(RN1-Pad7)" "Net-(RN1-Pad8)" "Net-(RN1-Pad9)" "Net-(RN2-Pad1)" + "Net-(RN2-Pad2)" "Net-(RN2-Pad3)" "Net-(RN2-Pad4)" "Net-(RN2-Pad5)" + "Net-(RN2-Pad6)" "Net-(RN2-Pad7)" "Net-(RN2-Pad8)" "Net-(RN2-Pad9)" + "Net-(RN3-Pad2)" "Net-(RN3-Pad3)" "Net-(RN3-Pad4)" "Net-(RN3-Pad5)" + "Net-(RN3-Pad6)" "Net-(RN3-Pad7)" "Net-(RN3-Pad8)" "Net-(RN3-Pad9)" + "Net-(RN4-Pad1)" "Net-(RN4-Pad2)" "Net-(RN4-Pad3)" "Net-(RN4-Pad4)" + "Net-(RN4-Pad5)" "Net-(RN4-Pad6)" "Net-(RN4-Pad7)" "Net-(RN4-Pad8)" + "Net-(RN4-Pad9)" "Net-(RN5-Pad1)" "Net-(RN5-Pad2)" "Net-(RN5-Pad3)" + "Net-(RN5-Pad4)" "Net-(RN5-Pad5)" "Net-(RN5-Pad6)" "Net-(RN5-Pad7)" + "Net-(RN5-Pad8)" "Net-(RN5-Pad9)" "Net-(RN6-Pad1)" "Net-(RN6-Pad2)" + "Net-(RN6-Pad3)" "Net-(RN6-Pad4)" "Net-(RN6-Pad5)" "Net-(RN6-Pad6)" + "Net-(RN6-Pad7)" "Net-(RN6-Pad8)" "Net-(RN6-Pad9)" PGND PWR_BUT SR1_CLK + SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T + SR1_SHLD SR1_SHLD_T SR2_QH SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH + SR4_QH_T SR5_QH SR5_QH_T SR6_QH SR6_QH_T SYS_RESETN VDD_ADC a1r a2r + a3r a4r a5r a6r a7r a8r b1r b2r b3r b4r b5r b6r b7r b8r c1r c2r c3r + c4r c5r c6r c7r c8r d1r d2r d3r d4r d5r d6r d7r d8r e1r e2r e3r e4r + e5r e6r e7r e8r f1r f2r f3r f4r f5r f6r f7r f8r + (circuit + (use_via Via[0-1]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + (wire (path B.Cu 250 137960 -59842.4 141770 -63652.5 141770 -76615.2 147219 -82064.3 + 147219 -84510.8 151532 -88824 153611 -88824 156379 -91592 + 160365 -91592 165445 -96672 166360 -96672 169791 -100103 + 169791 -101016 170608 -101833 170980 -101833)(net SR1_CLR)(type protect)) + (wire (path B.Cu 250 170980 -103022 170980 -101833)(net SR1_CLR)(type protect)) + (wire (path F.Cu 250 170980 -100482 172169 -100482 172169 -100110 172986 -99293.1 + 173860 -99293.1 174716 -98436.5 174716 -82211.4 161124 -68618.9 + 161124 -66097.2 158678 -63652 157889 -63652 152876 -58639.4 + 149323 -58639.4 145580 -62382.4)(net SR1_SHLD)(type protect)) + (wire (path B.Cu 250 170980 -95402 169791 -95402 168602 -94213.1 165547 -94213.1 + 160386 -89052 155331 -89052 152563 -86284 151536 -86284 148120 -82867.4 + 148120 -75082.3 145580 -72542.4)(net SR1_CLK)(type protect)) + (wire (path B.Cu 250 145580 -67462.4 149390 -71272 152766 -71272 155306 -73812 + 159368 -73812 169341 -83785 169341 -85325.5 170608 -86593.1 + 170980 -86593.1)(net SR1_CLKINH)(type protect)) + (wire (path B.Cu 250 170980 -87782 170980 -86593.1)(net SR1_CLKINH)(type protect)) + (wire (path B.Cu 250 150660 -62382 157010 -68732 161272 -68732 174710 -82170.1 + 174710 -83234.6 173892 -84053.1 173520 -84053.1)(net SR1_QH_T)(type protect)) + (wire (path B.Cu 250 173520 -85242 173520 -84053.1)(net SR1_QH_T)(type protect)) + (wire (path B.Cu 250 125260 -82702 122720 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 130340 -82702 125260 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 158280 -82702 157116 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 150660 -77622 152036 -77622 157116 -82702)(net PGND)(type protect)) + (wire (path F.Cu 250 130340 -82702 130340 -83865.5 130631 -83865.5 131544 -84778.9 + 131544 -99277.7 130340 -100482)(net PGND)(type protect)) + (wire (path F.Cu 250 145641 -82641.2 145474 -82474 145361 -82474)(net PGND)(type protect)) + (wire (path F.Cu 250 144310 -100254 145924 -98640.2 145924 -82924.3 145641 -82641.2 + 150660 -77622)(net PGND)(type protect)) + (wire (path F.Cu 250 170980 -82702 169791 -82702)(net PGND)(type protect)) + (wire (path F.Cu 250 159472 -73013.8 159472 -68654.2 158280 -67462)(net PGND)(type protect)) + (wire (path F.Cu 250 158280 -81538.5 157075 -80333.8 157075 -74641.2 157904 -73812 + 158674 -73812 159472 -73013.8)(net PGND)(type protect)) + (wire (path F.Cu 250 169791 -82702 160103 -73013.8 159472 -73013.8)(net PGND)(type protect)) + (wire (path F.Cu 250 158280 -82702 158280 -81538.5)(net PGND)(type protect)) + (wire (path B.Cu 250 158280 -104292 157116 -104292)(net PGND)(type protect)) + (wire (path B.Cu 250 155964 -102798 157116 -103951 157116 -104292)(net PGND)(type protect)) + (wire (path B.Cu 250 155964 -102798 158280 -100482)(net PGND)(type protect)) + (wire (path B.Cu 250 146854 -102798 155964 -102798)(net PGND)(type protect)) + (wire (path B.Cu 250 145474 -104292 146854 -102911 146854 -102798 144310 -100254)(net PGND)(type protect)) + (wire (path F.Cu 250 144310 -82474 145361 -82474)(net PGND)(type protect)) + (wire (path F.Cu 250 145514 -120868 144310 -122072)(net PGND)(type protect)) + (wire (path F.Cu 250 144310 -105456 144601 -105456 145514 -106369 145514 -120868 + 157076 -120868 158280 -122072)(net PGND)(type protect)) + (wire (path B.Cu 250 144310 -81310.5 144310 -80919.4 139515 -76124.1 139124 -76124.1)(net PGND)(type protect)) + (wire (path B.Cu 250 130340 -82702 131504 -82702 131504 -82411.1 137562 -76352.4 + 138895 -76352.4 139124 -76124.1)(net PGND)(type protect)) + (wire (path B.Cu 250 137960 -70002.4 139124 -71166 139124 -76124.1)(net PGND)(type protect)) + (wire (path B.Cu 250 144310 -82474 144310 -81310.5)(net PGND)(type protect)) + (wire (path F.Cu 250 125260 -136042 123909 -136042)(net PGND)(type protect)) + (wire (path F.Cu 250 125260 -138582 125260 -136042)(net PGND)(type protect)) + (wire (path F.Cu 250 122720 -136042 123909 -136042)(net PGND)(type protect)) + (wire (path F.Cu 250 125260 -138582 123909 -138582)(net PGND)(type protect)) + (wire (path F.Cu 250 122720 -138582 123909 -138582)(net PGND)(type protect)) + (wire (path B.Cu 250 173520 -82702 172331 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 170980 -82107.5 171737 -82107.5 172331 -82702)(net PGND)(type protect)) + (wire (path B.Cu 250 170980 -82702 170980 -82107.5)(net PGND)(type protect)) + (wire (path B.Cu 250 144310 -122072 143106 -123276 131544 -123276 130340 -122072)(net PGND)(type protect)) + (wire (path B.Cu 250 131544 -123276 131544 -128948 125640 -134853 125260 -134853)(net PGND)(type protect)) + (wire (path B.Cu 250 125260 -136042 125260 -134853)(net PGND)(type protect)) + (wire (path F.Cu 250 144310 -104292 144310 -105456)(net PGND)(type protect)) + (wire (path F.Cu 250 145580 -59842.4 139336 -66086 139336 -68626 137960 -70002.4)(net PGND)(type protect)) + (wire (path F.Cu 250 147050 -56823.2 145580 -58293.2 145580 -59842.4)(net PGND)(type protect)) + (wire (path B.Cu 250 144310 -104292 145474 -104292)(net PGND)(type protect)) + (wire (path F.Cu 250 130340 -100482 130340 -104292)(net PGND)(type protect)) + (wire (path F.Cu 250 147050 -55592.9 147050 -56823.2)(net PGND)(type protect)) + (wire (path B.Cu 250 122720 -87782 124071 -87782)(net 5v)(type protect)) + (wire (path B.Cu 250 125260 -87782 124071 -87782)(net 5v)(type protect)) + (wire (path B.Cu 250 122720 -87782 122720 -89133.1)(net 5v)(type protect)) + (wire (path B.Cu 250 122720 -90322 122720 -89133.1)(net 5v)(type protect)) + (wire (path B.Cu 250 151930 -104292 153094 -105456 164736 -105456 165900 -104292)(net 5v)(type protect)) + (wire (path B.Cu 250 151930 -104292 150766 -105456 139124 -105456 137960 -104292)(net 5v)(type protect)) + (wire (path B.Cu 250 125260 -91510.9 125632 -91510.9 126449 -92328.2 126449 -95699.4 + 129962 -99212 132880 -99212 137960 -104292)(net 5v)(type protect)) + (wire (path F.Cu 250 150660 -59842 149496 -59842)(net 5v)(type protect)) + (wire (path F.Cu 250 137960 -77622.4 136760 -76421.9 136760 -72066.5 137554 -71272.4 + 138336 -71272.4 143580 -66027.6 143580 -65237.2 145165 -63652.4 + 145977 -63652.4 149496 -60132.9 149496 -59842)(net 5v)(type protect)) + (wire (path F.Cu 250 137960 -82702 137960 -77622.4)(net 5v)(type protect)) + (wire (path B.Cu 250 151930 -82474 153322 -83865.6 164736 -83865.6 165900 -82702)(net 5v)(type protect)) + (wire (path F.Cu 250 151930 -104292 150267 -102629 150267 -84137.3 151930 -82474)(net 5v)(type protect)) + (wire (path F.Cu 250 125260 -90322 123909 -90322)(net 5v)(type protect)) + (wire (path F.Cu 250 122720 -90322 123909 -90322)(net 5v)(type protect)) + (wire (path B.Cu 250 125260 -90322 125260 -91510.9)(net 5v)(type protect)) + (wire (path B.Cu 250 125260 -87782 126449 -87782 127638 -86593.1 134069 -86593.1 + 137960 -82702)(net 5v)(type protect)) + (wire (path B.Cu 250 145580 -77622.4 145580 -76458.9)(net BB3.3)(type protect)) + (wire (path B.Cu 250 158280 -59842 157116 -61005.6 150319 -61005.6 148014 -63311.1 + 148014 -64137.9 145959 -66192.4 145188 -66192.4 144416 -66963.7 + 144416 -75586.4 145289 -76458.9 145580 -76458.9)(net BB3.3)(type protect)) + (wire (path B.Cu 250 143609 -81102.9 143526 -81102.9 139336 -85292.8 139336 -88945.6 + 137960 -90322)(net SR1_QH)(type protect)) + (wire (path F.Cu 250 150660 -64922 149496 -66085.6 149496 -75915.9 144309 -81102.9 + 143609 -81102.9)(net SR1_QH)(type protect)) + (wire (path B.Cu 250 165900 -122072 164729 -120901 153101 -120901 151930 -122072)(net SR1_CLR_T)(type protect)) + (wire (path B.Cu 250 165900 -100482 167104 -101686 167104 -120868 165900 -122072)(net SR1_CLR_T)(type protect)) + (wire (path F.Cu 250 137960 -100482 136309 -98831.2 136309 -64033.2 137960 -62382.4)(net SR1_CLR_T)(type protect)) + (wire (path F.Cu 250 165900 -100482 164695 -99277.1 152907 -99277.1 151930 -100254)(net SR1_CLR_T)(type protect)) + (wire (path B.Cu 250 137960 -100482 139379 -99063.4 150739 -99063.4 151930 -100254)(net SR1_CLR_T)(type protect)) + (wire (path B.Cu 250 137960 -122072 139151 -120881 150739 -120881 151930 -122072)(net SR1_CLR_T)(type protect)) + (wire (path F.Cu 250 137960 -85242 139574 -83628.1 139574 -70928.5 145580 -64922.4)(net SR1_SHLD_T)(type protect)) + (wire (path F.Cu 250 137960 -85242 139620 -86902.4 139620 -105172 137960 -106832)(net SR1_SHLD_T)(type protect)) + (wire (path F.Cu 250 153134 -105628 151930 -106832)(net SR1_SHLD_T)(type protect)) + (wire (path F.Cu 250 151930 -85014 150717 -86226.9 150717 -100977 153134 -103394 + 153134 -105628 164696 -105628 165900 -106832)(net SR1_SHLD_T)(type protect)) + (wire (path B.Cu 250 151930 -85014 153349 -86432.6 164709 -86432.6 165900 -85242)(net SR1_SHLD_T)(type protect)) + (wire (path B.Cu 250 137960 -106832 139151 -108023 150739 -108023 151930 -106832)(net SR1_SHLD_T)(type protect)) + (wire (path B.Cu 250 130340 -116992 131531 -115801 143119 -115801 144310 -116992)(net SR1_CLKINH_T)(type protect)) + (wire (path B.Cu 250 144310 -95174 145497 -93986.9 156865 -93986.9 158280 -95402)(net SR1_CLKINH_T)(type protect)) + (wire (path F.Cu 250 144310 -95174 142514 -93378 142514 -73068.4 145580 -70002.4)(net SR1_CLKINH_T)(type protect)) + (wire (path F.Cu 250 130340 -95402 129176 -96565.5 129176 -115828 130340 -116992)(net SR1_CLKINH_T)(type protect)) + (wire (path B.Cu 250 130340 -95402 131506 -94235.7 143372 -94235.7 144310 -95174)(net SR1_CLKINH_T)(type protect)) + (wire (path B.Cu 250 144310 -116992 145501 -115801 157089 -115801 158280 -116992)(net SR1_CLKINH_T)(type protect)) + (wire (path B.Cu 250 144310 -119532 143143 -118365 131507 -118365 130340 -119532)(net SR1_CLK_T)(type protect)) + (wire (path B.Cu 250 144310 -119532 145501 -118341 157089 -118341 158280 -119532)(net SR1_CLK_T)(type protect)) + (wire (path F.Cu 250 144310 -97714 145474 -96550.5 145474 -94688.9 144689 -93904 + 143935 -93904 142964 -92933.7 142964 -77698.1 145580 -75082.4)(net SR1_CLK_T)(type protect)) + (wire (path F.Cu 250 144310 -119532 143106 -118328 143106 -98918.2 144310 -97714)(net SR1_CLK_T)(type protect)) + (wire (path B.Cu 250 158280 -97942 156861 -96523.4 145501 -96523.4 144310 -97714)(net SR1_CLK_T)(type protect)) + (wire (path B.Cu 250 130340 -97942 131518 -96763.5 143360 -96763.5 144310 -97714)(net SR1_CLK_T)(type protect)) + (wire (path B.Cu 250 170980 -138582 170980 -137393 170608 -137393 169791 -136576 + 169791 -102696 166307 -99212 165523 -99212 160443 -94132 + 157904 -94132 155136 -91364 151532 -91364 145810 -85642.3 + 145810 -81310.4 139947 -75447 139947 -66909.3 137960 -64922.4)(net 7SEG_CLK)(type protect)) + (wire (path F.Cu 250 170980 -136042 169791 -136042 158970 -125220 145777 -125220 + 139512 -118955 139512 -114343 138351 -113182 137574 -113182 + 136773 -112381 136773 -103764 139170 -101367 139170 -92403 + 138359 -91592 137578 -91592 136760 -90774.1 136760 -84778.2 + 137566 -83972 138352 -83972 139124 -83200.5 139124 -73705.9 + 137960 -72542.4)(net 7SEG_DIO)(type protect)) + (wire (path F.Cu 250 173520 -101833 173892 -101833 175169 -100556 175169 -79002.9 + 172677 -76511.3 172114 -76511.3 161574 -65971.4 161574 -65676 + 158280 -62382)(net SR6_QH_T)(type protect)) + (wire (path F.Cu 250 173520 -103022 173520 -101833)(net SR6_QH_T)(type protect)) + (wire (path B.Cu 250 158280 -70002 169791 -81513.1 169791 -83700.4 169982 -83890.9 + 171367 -83890.9 172250 -84774 172250 -90789.6 173029 -91569 + 173927 -91569 174727 -92368.3 174727 -98457.9 173892 -99293.1 + 173520 -99293.1)(net SR5_QH_T)(type protect)) + (wire (path B.Cu 250 173520 -100482 173520 -99293.1)(net SR5_QH_T)(type protect)) + (wire (path F.Cu 250 173520 -97942 173520 -96753.1 173148 -96753.1 172331 -95935.8 + 172331 -89969.8 171377 -89015.7 170472 -89015.7 167452 -85996.5 + 167452 -85133.1 166291 -83972 165523 -83972 159656 -78105.4 + 159656 -76458.4 158280 -75082)(net SR4_QH_T)(type protect)) + (wire (path B.Cu 250 173520 -94213.1 173148 -94213.1 172331 -93395.8 172331 -92509.8 + 171413 -91592 170502 -91592 168890 -89980.3 168890 -83980.7 + 161328 -76417.9 154536 -76417.9 150660 -72542)(net SR3_QH_T)(type protect)) + (wire (path B.Cu 250 173520 -95402 173520 -94213.1)(net SR3_QH_T)(type protect)) + (wire (path B.Cu 250 122720 -85242 125260 -85242)(net +3V3)(type protect)) + (wire (path F.Cu 250 151930 -111912 149789 -109771 149789 -81038.2 152305 -78521.4 + 152305 -71647.4 150660 -70002)(net SR2_QH)(type protect)) + (wire (path F.Cu 250 150660 -75082 151855 -76277 151855 -78334.9 149338 -80851.7 + 149338 -111039 151402 -113103 164709 -113103 165900 -111912)(net SR3_QH)(type protect)) + (wire (path F.Cu 250 158280 -77622 164524 -83865.6 164524 -88945.6 165900 -90322)(net SR4_QH)(type protect)) + (wire (path F.Cu 250 158280 -72542 153306 -77515.6 153306 -88717.6 151930 -90094)(net SR5_QH)(type protect)) + (wire (path F.Cu 250 158280 -64922 157116 -63758 150156 -63758 147110 -66803.6 + 147110 -67584.9 145963 -68732.4 145190 -68732.4 140438 -73483.9 + 140438 -109434 137960 -111912)(net SR6_QH)(type protect)) + (via "Via[0-1]_600:400_um" 143609 -81102.9 (net SR1_QH)(type protect)) + ) +) diff --git a/bbb-bort2.dsn b/bbb-bort2.dsn new file mode 100644 index 0000000..9c2c2d5 --- /dev/null +++ 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"Net-(P8-Pad22)" "Net-(P8-Pad23)" + "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" + "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" + "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" + "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" + "Net-(P8-Pad4)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" + "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad5)" "Net-(P8-Pad6)" + "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" + "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" + "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)" + "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" + "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)" + "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" + "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" 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+ (net "Net-(P8-Pad24)" + (pins P8-24) + ) + (net "Net-(P8-Pad25)" + (pins P8-25) + ) + (net "Net-(P8-Pad26)" + (pins P8-26) + ) + (net "Net-(P8-Pad27)" + (pins P8-27) + ) + (net "Net-(P8-Pad28)" + (pins P8-28) + ) + (net "Net-(P8-Pad29)" + (pins P8-29) + ) + (net "Net-(P8-Pad30)" + (pins P8-30) + ) + (net "Net-(P8-Pad31)" + (pins P8-31) + ) + (net "Net-(P8-Pad32)" + (pins P8-32) + ) + (net "Net-(P8-Pad33)" + (pins P8-33) + ) + (net "Net-(P8-Pad34)" + (pins P8-34) + ) + (net "Net-(P8-Pad35)" + (pins P8-35) + ) + (net "Net-(P8-Pad36)" + (pins P8-36) + ) + (net "Net-(P8-Pad37)" + (pins P8-37) + ) + (net "Net-(P8-Pad38)" + (pins P8-38) + ) + (net "Net-(P8-Pad39)" + (pins P8-39) + ) + (net "Net-(P8-Pad40)" + (pins P8-40) + ) + (net "Net-(P8-Pad41)" + (pins P8-41) + ) + (net "Net-(P8-Pad42)" + (pins P8-42) + ) + (net "Net-(P8-Pad43)" + (pins P8-43) + ) + (net "Net-(P8-Pad44)" + (pins P8-44) + ) + (net "Net-(P8-Pad45)" + (pins P8-45) + ) + (net "Net-(P8-Pad46)" + (pins P8-46) + ) + (net "Net-(P9-Pad11)" + (pins P9-11) + ) + (net "Net-(P9-Pad12)" + (pins P9-12) + ) + (net "Net-(P9-Pad13)" + (pins P9-13) + ) + (net "Net-(P9-Pad14)" + (pins P9-14) + ) + (net "Net-(P9-Pad15)" + (pins P9-15) + ) + (net "Net-(P9-Pad16)" + (pins P9-16) + ) + (net "Net-(P9-Pad17)" + (pins P9-17) + ) + (net "Net-(P9-Pad18)" + (pins P9-18) + ) + (net "Net-(P9-Pad19)" + (pins P9-19) + ) + (net "Net-(P9-Pad20)" + (pins P9-20) + ) + (net "Net-(P9-Pad21)" + (pins P9-21) + ) + (net "Net-(P9-Pad22)" + (pins P9-22) + ) + (net "Net-(P9-Pad23)" + (pins P9-23) + ) + (net "Net-(P9-Pad24)" + (pins P9-24) + ) + (net "Net-(P9-Pad25)" + (pins P9-25) + ) + (net "Net-(P9-Pad26)" + (pins P9-26) + ) + (net "Net-(P9-Pad27)" + (pins P9-27) + ) + (net "Net-(P9-Pad28)" + (pins P9-28) + ) + (net "Net-(P9-Pad29)" + (pins P9-29) + ) + (net "Net-(P9-Pad30)" + (pins P9-30) + ) + (net "Net-(P9-Pad31)" + (pins P9-31) + ) + (net "Net-(P9-Pad33)" + (pins P9-33) + ) + (net "Net-(P9-Pad35)" + (pins P9-35) + ) + (net "Net-(P9-Pad36)" + (pins P9-36) + ) + (net "Net-(P9-Pad37)" + (pins P9-37) + ) + (net "Net-(P9-Pad38)" + (pins P9-38) + ) + (net "Net-(P9-Pad39)" + (pins P9-39) + ) + (net "Net-(P9-Pad40)" + (pins P9-40) + ) + (net "Net-(P9-Pad41)" + (pins P9-41) + ) + (net "Net-(P9-Pad42)" + (pins P9-42) + ) + (net PWR_BUT + (pins P9-9) + ) + (net SYS_RESETN + (pins P9-10) + ) + (net VDD_ADC + (pins P9-32) + ) + (net GNDA_ADC + (pins P9-34) + ) + (net "Net-(U1-Pad4)" + (pins U1-4) + ) + (net "Net-(U1-Pad5)" + (pins U1-5) + ) + (net "Net-(U1-Pad6)" + (pins U1-6) + ) + (net "Net-(U1-Pad7)" + (pins U1-7) + ) + (net "Net-(U1-Pad9)" + (pins U1-9) + ) + (net "Net-(U1-Pad10)" + (pins U1-10) + ) + (net "Net-(U1-Pad11)" + (pins U1-11) + ) + (net "Net-(U1-Pad12)" + (pins U1-12) + ) + (net "Net-(U1-Pad14)" + (pins U1-14) + ) + (net "Net-(U1-Pad15)" + (pins U1-15) + ) + (net "Net-(U2-Pad15)" + (pins U2-15) + ) + (net "Net-(U2-Pad14)" + (pins U2-14) + ) + (net "Net-(U2-Pad12)" + (pins U2-12) + ) + (net "Net-(U2-Pad11)" + (pins U2-11) + ) + (net /d1 + (pins J1-1) + ) + (net /d2 + (pins J1-2) + ) + (net /d3 + (pins J1-3) + ) + (net /d4 + (pins J1-4) + ) + (net /d5 + (pins J1-5) + ) + (net /d6 + (pins J1-6) + ) + (net /d7 + (pins J1-7) + ) + (net /d8 + (pins J1-8) + ) + (net "Net-(J1-Pad9)" + (pins J1-9) + ) + (net "Net-(J1-Pad10)" + (pins J1-10) + ) + (net "Net-(J1-Pad11)" + (pins J1-11) + ) + (net "Net-(J1-Pad12)" + (pins J1-12) + ) + (net SR1_CLR + (pins P8-17 U2-9) + ) + (net SR1_SHLD + (pins P8-15 U2-7) + ) + (net SR1_CLK + (pins P8-11 U2-3) + ) + (net SR1_CLKINH + (pins P8-5 U2-5) + ) + (net SR1_QH_T + (pins P8-4 U1-2) + ) + (net PGND + (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-13 U1-8 U2-13 U2-8 U3-8 + U3-1) + ) + (net 5v + (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16) + ) + (net BB3.3 + (pins P9-4 P9-3 U1-16 U2-1) + ) + (net SR1_QH + (pins U1-3 U3-13) + ) + (net SR1_CLR_T + (pins U2-10 U3-9) + ) + (net SR1_SHLD_T + (pins U2-6 U3-15) + ) + (net SR1_CLKINH_T + (pins U2-4 U3-6) + ) + (net SR1_CLK_T + (pins U2-2 U3-7) + ) + (net /p8 + (pins U3-14) + ) + (net /p7 + (pins U3-12) + ) + (net /p6 + (pins U3-11) + ) + (net /p5 + (pins U3-10) + ) + (net /p4 + (pins U3-5) + ) + (net /p3 + (pins U3-4) + ) + (net /p2 + (pins U3-3) + ) + (net /p1 + (pins U3-2) + ) + (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD + /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1 + /p2 /p3 /p4 /p5 /p6 /p7 /p8 5v BB3.3 GNDA_ADC GNDD "Net-(J1-Pad10)" + "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)" + "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)" + "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" + "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" + "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" + "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" + "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" + "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" + "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" + "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" + "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" + "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" + "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" + "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" + "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" + "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" + "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" + "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)" + "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" + "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)" + "Net-(U2-Pad12)" "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)" + "Net-(U2-Pad6)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" + "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PGND + PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T + SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SYS_RESETN VDD_ADC + (circuit + (use_via Via[0-3]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + ) +) diff --git a/bbb-bort6.dsn b/bbb-bort6.dsn new file mode 100644 index 0000000..49bd8db --- /dev/null +++ b/bbb-bort6.dsn @@ -0,0 +1,875 @@ +(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort6.dsn" + (parser + (string_quote ") + (space_in_quoted_tokens on) + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (resolution um 10) + (unit um) + (structure + (layer F.Cu + (type signal) + (property + (index 0) + ) + ) + (layer In1.Cu + (type signal) + (property + (index 1) + ) + ) + (layer In2.Cu + (type signal) + (property + (index 2) + ) + ) + (layer B.Cu + (type signal) + (property + (index 3) + ) + ) + (boundary + (path pcb 0 149390 -176682 32550.1 -176682 32550.1 -28092.4 149390 -28092.4 + 149390 -176682) + ) + (via "Via[0-3]_600:400_um") + (rule + (width 250) + (clearance 200.1) + (clearance 200.1 (type default_smd)) + (clearance 50 (type smd_smd)) + ) + ) + (placement + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 106210 -91592.4 front 0 (PN BeagleBone_Black_Header)) + (place P9 57950.1 -91592.4 front 0 (PN BeagleBone_Black_Header)) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N" + (place U1 96050.1 -54762.4 front 0 (PN 4504)) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N::1" + (place U2 132880 -54762.4 front 0 (PN 4504)) + ) + (component "SN74HC166N:DIP254P762X508-16" + (place U3 115100 -54762.4 front 0 (PN 74166)) + ) + (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD" + (place J1 47790.1 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(net "Net-(P8-Pad35)" + (pins P8-35) + ) + (net "Net-(P8-Pad36)" + (pins P8-36) + ) + (net "Net-(P8-Pad37)" + (pins P8-37) + ) + (net "Net-(P8-Pad38)" + (pins P8-38) + ) + (net "Net-(P8-Pad39)" + (pins P8-39) + ) + (net "Net-(P8-Pad40)" + (pins P8-40) + ) + (net "Net-(P8-Pad41)" + (pins P8-41) + ) + (net "Net-(P8-Pad42)" + (pins P8-42) + ) + (net "Net-(P8-Pad43)" + (pins P8-43) + ) + (net "Net-(P8-Pad44)" + (pins P8-44) + ) + (net "Net-(P8-Pad45)" + (pins P8-45) + ) + (net "Net-(P8-Pad46)" + (pins P8-46) + ) + (net "Net-(P9-Pad11)" + (pins P9-11) + ) + (net "Net-(P9-Pad12)" + (pins P9-12) + ) + (net "Net-(P9-Pad13)" + (pins P9-13) + ) + (net "Net-(P9-Pad14)" + (pins P9-14) + ) + (net "Net-(P9-Pad15)" + (pins P9-15) + ) + (net "Net-(P9-Pad16)" + (pins P9-16) + ) + (net "Net-(P9-Pad17)" + (pins P9-17) + ) + (net "Net-(P9-Pad18)" + (pins P9-18) + ) + (net "Net-(P9-Pad19)" + (pins P9-19) + ) + (net "Net-(P9-Pad20)" + (pins P9-20) + ) + (net "Net-(P9-Pad21)" + (pins P9-21) + ) + (net "Net-(P9-Pad22)" + (pins P9-22) + ) + (net "Net-(P9-Pad23)" + (pins P9-23) + ) + (net "Net-(P9-Pad24)" + (pins P9-24) + ) + (net "Net-(P9-Pad25)" + (pins P9-25) + ) + (net "Net-(P9-Pad26)" + (pins P9-26) + ) + (net "Net-(P9-Pad27)" + (pins P9-27) + ) + (net "Net-(P9-Pad28)" + (pins P9-28) + ) + (net "Net-(P9-Pad29)" + (pins P9-29) + ) + (net "Net-(P9-Pad30)" + (pins P9-30) + ) + (net "Net-(P9-Pad31)" + (pins P9-31) + ) + (net "Net-(P9-Pad33)" + (pins P9-33) + ) + (net "Net-(P9-Pad35)" + (pins P9-35) + ) + (net "Net-(P9-Pad36)" + (pins P9-36) + ) + (net "Net-(P9-Pad37)" + (pins P9-37) + ) + (net "Net-(P9-Pad38)" + (pins P9-38) + ) + (net "Net-(P9-Pad39)" + (pins P9-39) + ) + (net "Net-(P9-Pad40)" + (pins P9-40) + ) + (net "Net-(P9-Pad41)" + (pins P9-41) + ) + (net "Net-(P9-Pad42)" + (pins P9-42) + ) + (net PWR_BUT + (pins P9-9) + ) + (net SYS_RESETN + (pins P9-10) + ) + (net VDD_ADC + (pins P9-32) + ) + (net GNDA_ADC + (pins P9-34) + ) + (net "Net-(U1-Pad4)" + (pins U1-4) + ) + (net "Net-(U1-Pad5)" + (pins U1-5) + ) + (net "Net-(U1-Pad6)" + (pins U1-6) + ) + (net "Net-(U1-Pad7)" + (pins U1-7) + ) + (net "Net-(U1-Pad9)" + (pins U1-9) + ) + (net "Net-(U1-Pad10)" + (pins U1-10) + ) + (net "Net-(U1-Pad11)" + (pins U1-11) + ) + (net "Net-(U1-Pad12)" + (pins U1-12) + ) + (net "Net-(U1-Pad14)" + (pins U1-14) + ) + (net "Net-(U1-Pad15)" + (pins U1-15) + ) + (net "Net-(U2-Pad15)" + (pins U2-15) + ) + (net "Net-(U2-Pad14)" + (pins U2-14) + ) + (net "Net-(U2-Pad12)" + (pins U2-12) + ) + (net "Net-(U2-Pad11)" + (pins U2-11) + ) + (net /d1 + (pins J1-1) + ) + (net /d2 + (pins J1-2) + ) + (net /d3 + (pins J1-3) + ) + (net /d4 + (pins J1-4) + ) + (net /d5 + (pins J1-5) + ) + (net /d6 + (pins J1-6) + ) + (net /d7 + (pins J1-7) + ) + (net /d8 + (pins J1-8) + ) + (net "Net-(J1-Pad9)" + (pins J1-9) + ) + (net "Net-(J1-Pad10)" + (pins J1-10) + ) + (net "Net-(J1-Pad11)" + (pins J1-11) + ) + (net "Net-(J1-Pad12)" + (pins J1-12) + ) + (net SR1_CLR + (pins P8-17 U2-9) + ) + (net SR1_SHLD + (pins P8-15 U2-7) + ) + (net SR1_CLK + (pins P8-11 U2-3) + ) + (net SR1_CLKINH + (pins P8-5 U2-5) + ) + (net SR1_QH_T + (pins P8-4 U1-2) + ) + (net PGND + (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-8 U1-13 U2-13 U2-8 U3-1 + U3-8) + ) + (net 5v + (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16) + ) + (net BB3.3 + (pins P9-4 P9-3 U1-16 U2-1) + ) + (net SR1_QH + (pins U1-3 U3-13) + ) + (net SR1_CLR_T + (pins U2-10 U3-9) + ) + (net SR1_SHLD_T + (pins U2-6 U3-15) + ) + (net SR1_CLKINH_T + (pins U2-4 U3-6) + ) + (net SR1_CLK_T + (pins U2-2 U3-7) + ) + (net /p8 + (pins U3-14) + ) + (net /p7 + (pins U3-12) + ) + (net /p6 + (pins U3-11) + ) + (net /p5 + (pins U3-10) + ) + (net /p4 + (pins U3-5) + ) + (net /p3 + (pins U3-4) + ) + (net /p2 + (pins U3-3) + ) + (net /p1 + (pins U3-2) + ) + (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD + /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1 + /p2 /p3 /p4 /p5 /p6 /p7 /p8 5v BB3.3 GNDA_ADC GNDD "Net-(J1-Pad10)" + "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)" + "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)" + "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" + "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" + "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" + "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" + "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" + "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" + "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" + "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" + "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" + "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" + "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" + "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" + "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" + "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" + "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" + "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)" + "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" + "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)" + "Net-(U2-Pad12)" "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)" + "Net-(U2-Pad6)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" + "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PGND + PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T + SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SYS_RESETN VDD_ADC + (circuit + (use_via Via[0-3]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + ) +) diff --git a/bbb-bort6.rules b/bbb-bort6.rules new file mode 100644 index 0000000..4ec221e --- /dev/null +++ b/bbb-bort6.rules @@ -0,0 +1,108 @@ + +(rules PCB bbb-bort6 + (snap_angle + fortyfive_degree + ) + (autoroute_settings + (fanout off) + (autoroute on) + (postroute on) + (vias on) + (via_costs 50) + (plane_via_costs 5) + (start_ripup_costs 100) + (start_pass_no 192) + (layer_rule F.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.8) + (against_preferred_direction_trace_costs 3.1) + ) + (layer_rule In1.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.8) + ) + (layer_rule In2.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 2.3) + ) + (layer_rule B.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.8) + (against_preferred_direction_trace_costs 2.6) + ) + ) + (rule + (width 250.0) + (clear 200.2) + (clear 125.0 (type smd_to_turn_gap)) + (clear 50.0 (type smd_smd)) + ) + (padstack "Via[0-3]_600:400_um" + (shape + (circle F.Cu 600.0 0.0 0.0) + ) + (shape + (circle In1.Cu 600.0 0.0 0.0) + ) + (shape + (circle In2.Cu 600.0 0.0 0.0) + ) + (shape + (circle B.Cu 600.0 0.0 0.0) + ) + (attach off) + ) + (via + "Via[0-3]_600:400_um" "Via[0-3]_600:400_um" default + ) + (via + "Via[0-3]_600:400_um-kicad_default" "Via[0-3]_600:400_um" "kicad_default" + ) + (via_rule + default "Via[0-3]_600:400_um" + ) + (via_rule + "kicad_default" "Via[0-3]_600:400_um-kicad_default" + ) + (class default + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu In1.Cu In2.Cu B.Cu) + ) + ) + (class "kicad_default" + "Net-(P8-Pad3)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)" + "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" + "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" + "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" + "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P9-Pad11)" + "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" + "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" + "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" + "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN" "VDD_ADC" + "GNDA_ADC" "Net-(U1-Pad4)" "Net-(U1-Pad5)" "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" + "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U2-Pad15)" "Net-(U2-Pad14)" "Net-(U2-Pad12)" "Net-(U2-Pad11)" /d1 + /d2 /d3 /d4 /d5 /d6 /d7 /d8 "Net-(J1-Pad9)" + "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" + PGND 5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" + /p8 /p7 /p6 /p5 /p4 /p3 /p2 /p1 + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu In1.Cu In2.Cu B.Cu) + ) + ) +) \ No newline at end of file diff --git a/bbb-bort6.ses b/bbb-bort6.ses new file mode 100644 index 0000000..8cde1d4 --- /dev/null +++ b/bbb-bort6.ses @@ -0,0 +1,453 @@ + +(session "bbb-bort6.ses" + (base_design "bbb-bort6.dsn") + (placement + (resolution um 10) + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 1062100 -915924 front 0) + (place P9 579501 -915924 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N" + (place U1 960501 -547624 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N::1" + (place U2 1328800 -547624 front 0) + ) + (component "SN74HC166N:DIP254P762X508-16" + (place U3 1151000 -547624 front 0) + ) + (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD" + (place J1 477901 -500024 front 0) + ) + ) + (was_is + ) + (routes + (resolution um 10) + (parser + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (library_out + (padstack "Via[0-3]_600:400_um" + (shape + (circle F.Cu 6000 0 0) + ) + (shape + (circle In1.Cu 6000 0 0) + ) + (shape + (circle In2.Cu 6000 0 0) + ) + (shape + (circle B.Cu 6000 0 0) + ) + (attach off) + ) + ) + (network_out + (net SR1_CLR + (wire + (path In2.Cu 2500 + 1062100 -1119124 + 1062100 -1107235 + ) + ) + (wire + (path In2.Cu 2500 + 1328800 -547624 + 1328800 -844174 + 1091140 -1081834 + 1082357 -1081834 + 1073989 -1090202 + 1073989 -1099062 + 1065816 -1107235 + 1062100 -1107235 + ) + ) + ) + (net SR1_SHLD + (wire + (path In2.Cu 2500 + 1062100 -1093724 + 1062100 -1081835 + ) + ) + (wire + (path In2.Cu 2500 + 1252600 -522224 + 1225596 -549228 + 1225596 -845495 + 1091667 -979424 + 1057597 -979424 + 1050211 -986810 + 1050211 -1073662 + 1058384 -1081835 + 1062100 -1081835 + ) + ) + ) + (net SR1_CLK + (wire + (path In2.Cu 2500 + 1062100 -1031035 + 1065816 -1031035 + 1073989 -1022862 + 1073989 -1013708 + 1082873 -1004824 + 1092080 -1004824 + 1234602 -862302 + 1234602 -548938 + 1248616 -534924 + 1256514 -534924 + 1264517 -526921 + 1264517 -432541 + 1252600 -420624 + ) + ) + (wire + (path In2.Cu 2500 + 1062100 -1042924 + 1062100 -1031035 + ) + ) + ) + (net SR1_CLKINH + (wire + (path In2.Cu 2500 + 1062100 -966724 + 1073989 -966724 + ) + ) + (wire + (path In2.Cu 2500 + 1252600 -471424 + 1103452 -620572 + 1103452 -942188 + 1090805 -954835 + 1082162 -954835 + 1073989 -963008 + 1073989 -966724 + ) + ) + ) + (net SR1_QH_T + (wire + (path In2.Cu 2500 + 1087500 -941324 + 1075611 -941324 + ) + ) + (wire + (path In2.Cu 2500 + 884301 -395224 + 938382 -449305 + 938382 -814273 + 1053544 -929435 + 1067438 -929435 + 1075611 -937608 + 1075611 -941324 + ) + ) + ) + (net PGND + (wire + (path In1.Cu 2500 + 604901 -1449324 + 604901 -1462835 + ) + ) + (wire + (path In1.Cu 2500 + 579501 -1449324 + 604901 -1449324 + ) + ) + (wire + (path In1.Cu 2500 + 604901 -1474724 + 604901 -1462835 + ) + ) + (wire + (path In1.Cu 2500 + 579501 -1449324 + 579501 -1462835 + ) + ) + (wire + (path In1.Cu 2500 + 579501 -1474724 + 579501 -1462835 + ) + ) + (wire + (path In2.Cu 2500 + 992897 -451727 + 992897 -465721 + 1074800 -547624 + ) + ) + (wire + (path In2.Cu 2500 + 1074800 -369824 + 992897 -451727 + ) + ) + (wire + (path In2.Cu 2500 + 992897 -451727 + 966204 -451727 + 960501 -446024 + ) + ) + (wire + (path In2.Cu 2500 + 1074800 -547624 + 1062100 -560324 + 1062100 -915924 + ) + ) + (wire + (path In1.Cu 2500 + 960501 -446024 + 898065 -508460 + 898065 -533860 + 884301 -547624 + ) + ) + (wire + (path In2.Cu 2500 + 583216 -927813 + 591390 -935987 + 591390 -1429262 + 583217 -1437435 + 579501 -1437435 + ) + ) + (wire + (path In2.Cu 2500 + 579501 -927813 + 583216 -927813 + ) + ) + (wire + (path In2.Cu 2500 + 593012 -915924 + 593012 -918017 + 583216 -927813 + ) + ) + (wire + (path In2.Cu 2500 + 604901 -915924 + 593012 -915924 + ) + ) + (wire + (path In1.Cu 2500 + 1074800 -547624 + 1086436 -559260 + 1240964 -559260 + 1252600 -547624 + ) + ) + (wire + (path In2.Cu 2500 + 579501 -1449324 + 579501 -1437435 + ) + ) + (wire + (path In2.Cu 2500 + 579501 -915924 + 579501 -927813 + ) + ) + (wire + (path In1.Cu 2500 + 1062100 -915924 + 1087500 -915924 + ) + ) + (wire + (path In1.Cu 2500 + 604901 -915924 + 1062100 -915924 + ) + ) + (wire + (path In2.Cu 2500 + 1252600 -547624 + 1315036 -485188 + 1315036 -459788 + 1328800 -446024 + ) + ) + ) + (net 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/GPIO1_7_SR_QH /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1 + /p2 /p3 /p4 /p5 /p6 /p7 /p8 5v BB3.3 GNDA_ADC GNDD "Net-(J1-Pad10)" + "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)" + "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)" + "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" + "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" + "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" + "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" + "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" + "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" + "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" + "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" + "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" + "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" + "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" + "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" + "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" + "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" + "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" + "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)" + "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" + "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)" + "Net-(U2-Pad12)" "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)" + "Net-(U2-Pad6)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" + "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PGND + PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T + SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SYS_RESETN VDD_ADC + (circuit + (use_via Via[0-1]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + (wire (path B.Cu 250 115100 -36982.4 116264 -38146 131716 -38146 132880 -36982.4)(net 5v)(type protect)) + (wire (path B.Cu 250 107480 -49682.4 111290 -45872.4 123990 -45872.4 125260 -44602.4)(net SR1_CLKINH_T)(type protect)) + ) +) diff --git a/bbb-bort7.rules b/bbb-bort7.rules new file mode 100644 index 0000000..c6d360f --- /dev/null +++ b/bbb-bort7.rules @@ -0,0 +1,90 @@ + +(rules PCB bbb-bort7 + (snap_angle + fortyfive_degree + ) + (autoroute_settings + (fanout off) + (autoroute on) + (postroute on) + (vias on) + (via_costs 50) + (plane_via_costs 5) + (start_ripup_costs 100) + (start_pass_no 164) + (layer_rule F.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 2.3) + ) + (layer_rule B.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.8) + ) + ) + (rule + (width 250.0) + (clear 200.2) + (clear 125.0 (type smd_to_turn_gap)) + (clear 50.0 (type smd_smd)) + ) + (padstack "Via[0-1]_600:400_um" + (shape + (circle F.Cu 600.0 0.0 0.0) + ) + (shape + (circle B.Cu 600.0 0.0 0.0) + ) + (attach off) + ) + (via + "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default + ) + (via + "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default" + ) + (via_rule + default "Via[0-1]_600:400_um" + ) + (via_rule + "kicad_default" "Via[0-1]_600:400_um-kicad_default" + ) + (class default + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) + (class "kicad_default" + "Net-(P8-Pad3)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)" + "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" + "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" + "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" + "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P9-Pad11)" + "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" + "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" + "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" + "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN" "VDD_ADC" + "GNDA_ADC" "Net-(U1-Pad4)" "Net-(U1-Pad5)" "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" + "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U2-Pad15)" "Net-(U2-Pad14)" "Net-(U2-Pad12)" "Net-(U2-Pad11)" /d1 + /d2 /d3 /d4 /d5 /d6 /d7 /d8 "Net-(J1-Pad9)" + "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" + PGND 5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" + /p8 /p7 /p6 /p5 /p4 /p3 /p2 /p1 + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) +) \ No newline at end of file diff --git a/bbb-bort7.ses b/bbb-bort7.ses new file mode 100644 index 0000000..770aec0 --- /dev/null +++ b/bbb-bort7.ses @@ -0,0 +1,474 @@ + +(session "bbb-bort7.ses" + (base_design "bbb-bort7.dsn") + (placement + (resolution um 10) + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 1062100 -915924 front 0) + (place P9 579501 -915924 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N" + (place U1 960501 -547624 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N::1" + (place U2 1328800 -547624 front 0) + ) + (component "SN74HC166N:DIP254P762X508-16" + (place U3 1151000 -547624 front 0) + ) + (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD" + (place J1 477901 -500024 front 0) + ) + ) + (was_is + ) + (routes + (resolution um 10) + (parser + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (library_out + (padstack "Via[0-1]_600:400_um" + (shape + (circle F.Cu 6000 0 0) + ) + (shape + (circle B.Cu 6000 0 0) + ) + (attach off) + ) + ) + (network_out + (net SR1_CLR + (wire + (path F.Cu 2500 + 1062100 -1119124 + 1073989 -1119124 + ) + ) + (wire + (path F.Cu 2500 + 1328800 -547624 + 1328800 -869574 + 1091139 -1107235 + 1082162 -1107235 + 1073989 -1115408 + 1073989 -1119124 + ) + ) + ) + (net SR1_SHLD + (wire + (path F.Cu 2500 + 1062100 -1093724 + 1062100 -1081835 + ) + ) + (wire + (path F.Cu 2500 + 1252600 -522224 + 1108479 -666345 + 1108479 -1038984 + 1091029 -1056434 + 1082357 -1056434 + 1073989 -1064802 + 1073989 -1073662 + 1065816 -1081835 + 1062100 -1081835 + ) + ) + ) + (net SR1_CLK + (wire + (path F.Cu 2500 + 1062100 -1042924 + 1062100 -1031035 + ) + ) + (wire + (path F.Cu 2500 + 1062100 -1031035 + 1065816 -1031035 + 1073989 -1022862 + 1073989 -1014002 + 1083167 -1004824 + 1091898 -1004824 + 1103894 -992828 + 1103894 -654083 + 1248453 -509524 + 1256443 -509524 + 1269293 -496674 + 1269293 -437317 + 1252600 -420624 + ) + ) + ) + (net SR1_CLKINH + (wire + (path F.Cu 2500 + 1062100 -966724 + 1073989 -966724 + ) + ) + (wire + (path F.Cu 2500 + 1073989 -966724 + 1073989 -963008 + 1082162 -954835 + 1090895 -954835 + 1099390 -946340 + 1099390 -624634 + 1252600 -471424 + ) + ) + ) + (net SR1_QH_T + (wire + (path F.Cu 2500 + 1087500 -941324 + 1087500 -929435 + ) + ) + (wire + (path F.Cu 2500 + 884301 -395224 + 938382 -449305 + 938382 -746878 + 1075611 -884107 + 1075611 -921262 + 1083784 -929435 + 1087500 -929435 + ) + ) + ) + (net PGND + (wire + (path B.Cu 2500 + 1087500 -559260 + 1240964 -559260 + 1252600 -547624 + ) + ) + (wire + (path B.Cu 2500 + 1074800 -547624 + 1086436 -559260 + 1087500 -559260 + ) + ) + (wire + (path B.Cu 2500 + 1087500 -559260 + 1087500 -915924 + ) + ) + (wire + (path F.Cu 2500 + 1074800 -369824 + 1074800 -381459 + ) + ) + (wire + (path F.Cu 2500 + 1005596 -446024 + 1005596 -478420 + 1074800 -547624 + ) + ) + (wire + (path F.Cu 2500 + 1074800 -381459 + 1070161 -381459 + 1005596 -446024 + ) + ) + (wire + (path F.Cu 2500 + 1005596 -446024 + 960501 -446024 + ) + ) + (wire + (path B.Cu 2500 + 1087500 -915924 + 1073989 -915924 + ) + ) + (wire + (path B.Cu 2500 + 1062100 -915924 + 1073989 -915924 + ) + ) + (wire + (path B.Cu 2500 + 960501 -446024 + 898065 -508460 + 898065 -533860 + 884301 -547624 + ) + ) + (wire + (path F.Cu 2500 + 583216 -927813 + 591390 -935987 + 591390 -1429262 + 583217 -1437435 + ) + ) + (wire + (path F.Cu 2500 + 579501 -927813 + 583216 -927813 + ) + ) + (wire + (path F.Cu 2500 + 593012 -915924 + 593012 -918017 + 583216 -927813 + ) + ) + (wire + (path F.Cu 2500 + 604901 -915924 + 593012 -915924 + ) + ) + (wire + (path F.Cu 2500 + 583217 -1437435 + 579501 -1437435 + ) + ) + (wire + (path F.Cu 2500 + 583217 -1437435 + 593012 -1447230 + 593012 -1449324 + ) + ) + (wire + (path F.Cu 2500 + 604901 -1449324 + 593012 -1449324 + ) + ) + (wire + (path F.Cu 2500 + 579501 -1474724 + 593012 -1474724 + ) + ) + (wire + (path F.Cu 2500 + 579501 -1449324 + 579501 -1474724 + ) + ) + (wire + (path F.Cu 2500 + 604901 -1474724 + 593012 -1474724 + ) + ) + (wire + (path F.Cu 2500 + 579501 -1449324 + 579501 -1437435 + ) + ) + (wire + (path F.Cu 2500 + 579501 -915924 + 579501 -927813 + ) + ) + (wire + (path B.Cu 2500 + 604901 -915924 + 1062100 -915924 + ) + ) + (wire + (path F.Cu 2500 + 1252600 -547624 + 1315036 -485188 + 1315036 -459788 + 1328800 -446024 + ) + ) + ) + (net 5v + (wire + (path F.Cu 2500 + 604901 -966724 + 604901 -954835 + ) + ) + (wire + (path F.Cu 2500 + 884301 -369824 + 884301 -381459 + ) + ) + (wire + (path F.Cu 2500 + 884301 -381459 + 881391 -381459 + 872666 -390184 + 872666 -690785 + 608616 -954835 + 604901 -954835 + ) + ) + (wire + (path B.Cu 2500 + 579501 -966724 + 604901 -966724 + ) + ) + (wire + (path F.Cu 2500 + 604901 -966724 + 604901 -992124 + ) + ) + (wire + (path F.Cu 2500 + 579501 -966724 + 579501 -992124 + ) + ) + (wire + (path B.Cu 2500 + 884301 -369824 + 895936 -369824 + ) + ) + (wire + (path B.Cu 2500 + 1151000 -369824 + 1161513 -380333 + ) + (type protect) + ) + (wire + (path B.Cu 2500 + 1161513 -380333 + 1161513 -380334 + 1160388 -381459 + 907571 -381459 + 895936 -369824 + ) + ) + (wire + (path B.Cu 2500 + 1161513 -380333 + 1162640 -381460 + 1317160 -381460 + 1328800 -369824 + ) + (type protect) + ) + ) + (net BB3.3 + (wire + (path F.Cu 2500 + 604901 -941324 + 604901 -929435 + ) + ) + (wire + (path F.Cu 2500 + 604901 -929435 + 608617 -929435 + 616790 -921262 + 616790 -615909 + 874511 -358188 + 948865 -358188 + 960501 -369824 + ) + ) + (wire + (path B.Cu 2500 + 579501 -941324 + 604901 -941324 + ) + ) + (wire + (path B.Cu 2500 + 1252600 -369824 + 1240965 -369824 + ) + ) + (wire + (path B.Cu 2500 + 1240965 -369824 + 1229329 -358188 + 972137 -358188 + 960501 -369824 + ) + ) + ) + (net SR1_QH + (wire + (path B.Cu 2500 + 1151000 -446024 + 1138300 -433324 + 897001 -433324 + 884301 -420624 + ) + ) + ) + (net SR1_CLR_T + (wire + (path B.Cu 2500 + 1151000 -547624 + 1163700 -534924 + 1316100 -534924 + 1328800 -522224 + ) + ) + ) + (net SR1_SHLD_T + (wire + (path F.Cu 2500 + 1151000 -395224 + 1214500 -458724 + 1256486 -458724 + 1264270 -466508 + 1264270 -485154 + 1252600 -496824 + ) + ) + ) + (net SR1_CLKINH_T + (wire + (path B.Cu 2500 + 1074800 -496824 + 1112900 -458724 + 1239900 -458724 + 1252600 -446024 + ) + (type protect) + ) + ) + (net SR1_CLK_T + (wire + (path B.Cu 2500 + 1074800 -522224 + 1112900 -484124 + 1220869 -484124 + 1246269 -458724 + 1256742 -458724 + 1264560 -450906 + 1264560 -407184 + 1252600 -395224 + ) + ) + ) + ) + ) +) \ No newline at end of file diff --git a/bbb-bort8.dsn b/bbb-bort8.dsn new file mode 100644 index 0000000..51b546a --- /dev/null +++ b/bbb-bort8.dsn @@ -0,0 +1,1147 @@ +(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort8.dsn" + (parser + (string_quote ") + (space_in_quoted_tokens on) + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (resolution um 10) + (unit um) + (structure + (layer F.Cu + (type signal) + (property + (index 0) + ) + ) + (layer In1.Cu + (type signal) + (property + (index 1) + ) + ) + (layer In2.Cu + (type signal) + (property + (index 2) + ) + ) + (layer B.Cu + (type signal) + (property + (index 3) + ) + ) + (boundary + (path pcb 0 149390 -176682 32550.1 -176682 32550.1 -28092.4 149390 -28092.4 + 149390 -176682) + ) + (via "Via[0-3]_600:400_um") + (rule + (width 250) + (clearance 200.1) + (clearance 200.1 (type default_smd)) + (clearance 50 (type smd_smd)) + ) + ) + (placement + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 106210 -91592.4 front 0 (PN BeagleBone_Black_Header)) + (place P9 57950.1 -91592.4 front 0 (PN BeagleBone_Black_Header)) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N" + (place U1 96050.1 -54762.4 front 0 (PN 4504)) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N::1" + (place U2 132880 -54762.4 front 0 (PN 4504)) + ) + (component "SN74HC166N:DIP254P762X508-16" + (place U3 115100 -54762.4 front 0 (PN 74166)) + (place U4 140272 -141554 front 90 (PN 74166)) + (place U6 140272 -122974 front 90 (PN 74166)) + (place U7 140272 -113684 front 90 (PN 74166)) + ) + (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD" + (place J1 47790.1 -50002.4 front 0 (PN 0015912120)) + ) + (component "SN74HC166N:DIP254P762X508-16::1" + (place U5 140272 -132264 front 90 (PN 74166)) + (place U8 140272 -104394 front 90 (PN 74166)) + ) + ) + (library + (image Socket_BeagleBone_Black:Socket_BeagleBone_Black + (outline (path signal 150 -1550 1550 -1550 0)) + (outline (path signal 150 1270 -1270 -1270 -1270)) + (outline (path signal 150 1270 1270 1270 -1270)) + (outline (path signal 150 0 1550 -1550 1550)) + (outline (path signal 150 3810 1270 1270 1270)) + (outline (path signal 150 3810 -57150 -1270 -57150)) + (outline (path signal 150 -1270 -57150 -1270 -1270)) + (outline (path signal 150 3810 -57150 3810 1270)) + (outline (path signal 50 -1750 -57650 4300 -57650)) + (outline (path signal 50 -1750 1750 4300 1750)) + (outline (path signal 50 4300 1750 4300 -57650)) + (outline (path signal 50 -1750 1750 -1750 -57650)) + (pin Oval[A]Pad_1727.2x1727.2_um 46 2540 -55880) + (pin Oval[A]Pad_1727.2x1727.2_um 45 0 -55880) + (pin Oval[A]Pad_1727.2x1727.2_um 44 2540 -53340) + (pin Oval[A]Pad_1727.2x1727.2_um 43 0 -53340) + (pin Oval[A]Pad_1727.2x1727.2_um 42 2540 -50800) + (pin Oval[A]Pad_1727.2x1727.2_um 41 0 -50800) + (pin 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(pins U4-3) + ) + (net "Net-(U4-Pad4)" + (pins U4-4) + ) + (net "Net-(U4-Pad5)" + (pins U4-5) + ) + (net "Net-(U4-Pad10)" + (pins U4-10) + ) + (net "Net-(U4-Pad11)" + (pins U4-11) + ) + (net "Net-(U4-Pad12)" + (pins U4-12) + ) + (net "Net-(U4-Pad14)" + (pins U4-14) + ) + (net "Net-(U5-Pad14)" + (pins U5-14) + ) + (net "Net-(U5-Pad12)" + (pins U5-12) + ) + (net "Net-(U5-Pad11)" + (pins U5-11) + ) + (net "Net-(U5-Pad10)" + (pins U5-10) + ) + (net "Net-(U5-Pad5)" + (pins U5-5) + ) + (net "Net-(U5-Pad4)" + (pins U5-4) + ) + (net "Net-(U5-Pad3)" + (pins U5-3) + ) + (net "Net-(U5-Pad2)" + (pins U5-2) + ) + (net "Net-(U6-Pad2)" + (pins U6-2) + ) + (net "Net-(U6-Pad3)" + (pins U6-3) + ) + (net "Net-(U6-Pad4)" + (pins U6-4) + ) + (net "Net-(U6-Pad5)" + (pins U6-5) + ) + (net "Net-(U6-Pad10)" + (pins U6-10) + ) + (net "Net-(U6-Pad11)" + (pins U6-11) + ) + (net "Net-(U6-Pad12)" + (pins U6-12) + ) + (net "Net-(U6-Pad14)" + (pins U6-14) + ) + (net "Net-(U7-Pad2)" + (pins U7-2) + ) + (net "Net-(U7-Pad3)" + (pins U7-3) + ) + (net "Net-(U7-Pad4)" + (pins U7-4) + ) + (net "Net-(U7-Pad5)" + (pins U7-5) + ) + (net "Net-(U7-Pad10)" + (pins U7-10) + ) + (net "Net-(U7-Pad11)" + (pins U7-11) + ) + (net "Net-(U7-Pad12)" + (pins U7-12) + ) + (net "Net-(U7-Pad14)" + (pins U7-14) + ) + (net "Net-(U8-Pad14)" + (pins U8-14) + ) + (net "Net-(U8-Pad12)" + (pins U8-12) + ) + (net "Net-(U8-Pad11)" + (pins U8-11) + ) + (net "Net-(U8-Pad10)" + (pins U8-10) + ) + (net "Net-(U8-Pad5)" + (pins U8-5) + ) + (net "Net-(U8-Pad4)" + (pins U8-4) + ) + (net "Net-(U8-Pad3)" + (pins U8-3) + ) + (net "Net-(U8-Pad2)" + (pins U8-2) + ) + (class kicad_default "" +3V3 /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1 /p2 /p3 + /p4 /p5 /p6 /p7 /p8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 + GNDA_ADC "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" + "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)" + "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" + "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" + "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" + "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)" + "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" + "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" + "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" + "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" + "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" + "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" + "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" + "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" + "Net-(P9-Pad41)" "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" + "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" + "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad11)" "Net-(U2-Pad12)" + "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" + "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" + "Net-(U3-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)" + "Net-(U4-Pad2)" "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U5-Pad10)" + "Net-(U5-Pad11)" "Net-(U5-Pad12)" "Net-(U5-Pad14)" "Net-(U5-Pad2)" "Net-(U5-Pad3)" + "Net-(U5-Pad4)" "Net-(U5-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)" + "Net-(U6-Pad14)" "Net-(U6-Pad2)" "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)" + "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)" + "Net-(U7-Pad2)" "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U8-Pad10)" + "Net-(U8-Pad11)" "Net-(U8-Pad12)" "Net-(U8-Pad14)" "Net-(U8-Pad2)" "Net-(U8-Pad3)" + "Net-(U8-Pad4)" "Net-(U8-Pad5)" PGND PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T + SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SR2_QH + SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH SR4_QH_T SR5_QH SR5_QH_T SR6_QH + SR6_QH_T SYS_RESETN VDD_ADC + (circuit + (use_via Via[0-3]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + (wire (path F.Cu 250 106210 -111912 107399 -111912)(net SR1_CLR)(type protect)) + (wire (path F.Cu 250 132880 -54762.4 132880 -86957.4 109114 -110724 108216 -110724 + 107399 -111541 107399 -111912)(net SR1_CLR)(type protect)) + (wire (path F.Cu 250 106210 -109372 106210 -108184)(net SR1_SHLD)(type protect)) + (wire (path F.Cu 250 125260 -52222.4 110848 -66634.5 110848 -103898 109103 -105643 + 108236 -105643 107399 -106480 107399 -107366 106582 -108184 + 106210 -108184)(net SR1_SHLD)(type protect)) + (wire (path F.Cu 250 106210 -104292 106210 -103104 106582 -103104 107399 -102286 + 107399 -101400 108317 -100482 109190 -100482 110389 -99282.8 + 110389 -65408.3 124845 -50952.4 125644 -50952.4 126929 -49667.4 + 126929 -43731.7 125260 -42062.4)(net SR1_CLK)(type protect)) + (wire (path F.Cu 250 106210 -96672.4 107399 -96672.4 107399 -96300.8 108216 -95483.5 + 109090 -95483.5 109939 -94634 109939 -62463.4 125260 -47142.4)(net SR1_CLKINH)(type protect)) + (wire (path F.Cu 250 108750 -94132.4 108750 -92943.5)(net SR1_QH_T)(type protect)) + (wire (path F.Cu 250 88430.1 -39522.4 93838.2 -44930.5 93838.2 -74687.8 107561 -88410.7 + 107561 -92126.2 108378 -92943.5 108750 -92943.5)(net SR1_QH_T)(type protect)) + (wire (path B.Cu 250 108750 -55926 124096 -55926 125260 -54762.4)(net PGND)(type protect)) + (wire (path B.Cu 250 107480 -54762.4 108644 -55926 108750 -55926 108750 -91592.4)(net PGND)(type protect)) + (wire (path F.Cu 250 107480 -36982.4 107480 -38145.9)(net PGND)(type protect)) + (wire (path F.Cu 250 100560 -44602.4 100560 -47842 107480 -54762.4)(net PGND)(type protect)) + (wire (path F.Cu 250 107480 -38145.9 107016 -38145.9 100560 -44602.4 96050.1 -44602.4)(net PGND)(type protect)) + (wire (path B.Cu 250 108750 -91592.4 107399 -91592.4)(net PGND)(type protect)) + (wire (path B.Cu 250 106210 -91592.4 107399 -91592.4)(net PGND)(type protect)) + (wire (path B.Cu 250 96050.1 -44602.4 89806.5 -50846 89806.5 -53386 88430.1 -54762.4)(net PGND)(type protect)) + (wire (path F.Cu 250 58321.6 -92781.3 59139 -93598.7 59139 -142926 58321.7 -143744)(net PGND)(type protect)) + (wire (path F.Cu 250 57950.1 -92781.3 58321.6 -92781.3)(net PGND)(type protect)) + (wire (path F.Cu 250 59301.2 -91592.4 59301.2 -91801.7 58321.6 -92781.3)(net PGND)(type protect)) + (wire (path F.Cu 250 60490.1 -91592.4 59301.2 -91592.4)(net PGND)(type protect)) + (wire (path F.Cu 250 58321.7 -143744 57950.1 -143744)(net PGND)(type protect)) + (wire (path F.Cu 250 58321.7 -143744 59301.2 -144723 59301.2 -144932)(net PGND)(type protect)) + (wire (path F.Cu 250 60490.1 -144932 59301.2 -144932)(net PGND)(type protect)) + (wire (path F.Cu 250 57950.1 -147472 59301.2 -147472)(net PGND)(type protect)) + (wire (path F.Cu 250 57950.1 -144932 57950.1 -147472)(net PGND)(type protect)) + (wire (path F.Cu 250 60490.1 -147472 59301.2 -147472)(net PGND)(type protect)) + (wire (path F.Cu 250 57950.1 -144932 57950.1 -143744)(net PGND)(type protect)) + (wire (path F.Cu 250 57950.1 -91592.4 57950.1 -92781.3)(net PGND)(type protect)) + (wire (path B.Cu 250 60490.1 -91592.4 106210 -91592.4)(net PGND)(type protect)) + (wire (path F.Cu 250 125260 -54762.4 131504 -48518.8 131504 -45978.8 132880 -44602.4)(net PGND)(type protect)) + (wire (path F.Cu 250 60490.1 -96672.4 60490.1 -95483.5)(net 5v)(type protect)) + (wire (path F.Cu 250 88430.1 -36982.4 88430.1 -38145.9 88139.1 -38145.9 87266.6 -39018.4 + 87266.6 -69078.5 60861.6 -95483.5 60490.1 -95483.5)(net 5v)(type protect)) + (wire (path B.Cu 250 57950.1 -96672.4 60490.1 -96672.4)(net 5v)(type protect)) + (wire (path F.Cu 250 60490.1 -96672.4 60490.1 -99212.4)(net 5v)(type protect)) + (wire (path F.Cu 250 57950.1 -96672.4 57950.1 -99212.4)(net 5v)(type protect)) + (wire (path B.Cu 250 88430.1 -36982.4 89593.6 -36982.4)(net 5v)(type protect)) + (wire (path B.Cu 250 115100 -36982.4 116151 -38033.3 116151 -38033.4 116039 -38145.9 + 90757.1 -38145.9 89593.6 -36982.4)(net 5v)(type protect)) + (wire (path B.Cu 250 116151 -38033.3 116264 -38146 131716 -38146 132880 -36982.4)(net 5v)(type protect)) + (wire (path F.Cu 250 60490.1 -94132.4 60490.1 -92943.5 60861.7 -92943.5 61679 -92126.2 + 61679 -61590.9 87451.1 -35818.8 94886.5 -35818.8 96050.1 -36982.4)(net BB3.3)(type protect)) + (wire (path B.Cu 250 57950.1 -94132.4 60490.1 -94132.4)(net BB3.3)(type protect)) + (wire (path B.Cu 250 125260 -36982.4 124096 -36982.4 122933 -35818.8 97213.7 -35818.8 + 96050.1 -36982.4)(net BB3.3)(type protect)) + (wire (path B.Cu 250 115100 -44602.4 113830 -43332.4 89700.1 -43332.4 88430.1 -42062.4)(net SR1_QH)(type protect)) + (wire (path B.Cu 250 115100 -54762.4 116370 -53492.4 131610 -53492.4 132880 -52222.4)(net SR1_CLR_T)(type protect)) + (wire (path F.Cu 250 115100 -39522.4 121450 -45872.4 125649 -45872.4 126427 -46650.8 + 126427 -48515.4 125260 -49682.4)(net SR1_SHLD_T)(type protect)) + (wire (path B.Cu 250 107480 -49682.4 111290 -45872.4 123990 -45872.4 125260 -44602.4)(net SR1_CLKINH_T)(type protect)) + (wire (path B.Cu 250 107480 -52222.4 111290 -48412.4 122087 -48412.4 124627 -45872.4 + 125674 -45872.4 126456 -45090.6 126456 -40718.4 125260 -39522.4)(net SR1_CLK_T)(type protect)) + ) +) diff --git a/bbb-bort8.rules b/bbb-bort8.rules new file mode 100644 index 0000000..d449189 --- /dev/null +++ b/bbb-bort8.rules @@ -0,0 +1,113 @@ + +(rules PCB bbb-bort8 + (snap_angle + fortyfive_degree + ) + (autoroute_settings + (fanout off) + (autoroute on) + (postroute on) + (vias on) + (via_costs 50) + (plane_via_costs 5) + (start_ripup_costs 100) + (start_pass_no 385) + (layer_rule F.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.8) + (against_preferred_direction_trace_costs 3.1) + ) + (layer_rule In1.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.8) + ) + (layer_rule In2.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 2.3) + ) + (layer_rule B.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.8) + (against_preferred_direction_trace_costs 2.6) + ) + ) + (rule + (width 250.0) + (clear 200.2) + (clear 125.0 (type smd_to_turn_gap)) + (clear 50.0 (type smd_smd)) + ) + (padstack "Via[0-3]_600:400_um" + (shape + (circle F.Cu 600.0 0.0 0.0) + ) + (shape + (circle In1.Cu 600.0 0.0 0.0) + ) + (shape + (circle In2.Cu 600.0 0.0 0.0) + ) + (shape + (circle B.Cu 600.0 0.0 0.0) + ) + (attach off) + ) + (via + "Via[0-3]_600:400_um" "Via[0-3]_600:400_um" default + ) + (via + "Via[0-3]_600:400_um-kicad_default" "Via[0-3]_600:400_um" "kicad_default" + ) + (via_rule + default "Via[0-3]_600:400_um" + ) + (via_rule + "kicad_default" "Via[0-3]_600:400_um-kicad_default" + ) + (class default + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu In1.Cu In2.Cu B.Cu) + ) + ) + (class "kicad_default" + "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)" + "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" + "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" + "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" + "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN" + "VDD_ADC" "GNDA_ADC" /d1 /d2 /d3 /d4 /d5 /d6 + /d7 /d8 "Net-(J1-Pad9)" "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "SR1_CLR" "SR1_SHLD" + "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND 5v BB3.3 "SR1_QH" "SR1_CLR_T" + "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK" "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T" + "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T" "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" + "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" "Net-(U3-Pad10)" + "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U4-Pad2)" "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U4-Pad10)" + "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)" "Net-(U5-Pad14)" "Net-(U5-Pad12)" "Net-(U5-Pad11)" "Net-(U5-Pad10)" "Net-(U5-Pad5)" + "Net-(U5-Pad4)" "Net-(U5-Pad3)" "Net-(U5-Pad2)" "Net-(U6-Pad2)" "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)" "Net-(U6-Pad10)" + "Net-(U6-Pad11)" "Net-(U6-Pad12)" "Net-(U6-Pad14)" "Net-(U7-Pad2)" "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U7-Pad10)" + "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)" "Net-(U8-Pad14)" "Net-(U8-Pad12)" "Net-(U8-Pad11)" "Net-(U8-Pad10)" "Net-(U8-Pad5)" + "Net-(U8-Pad4)" "Net-(U8-Pad3)" "Net-(U8-Pad2)" + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu In1.Cu In2.Cu B.Cu) + ) + ) +) \ No newline at end of file diff --git a/bbb-bort8.ses b/bbb-bort8.ses new file mode 100644 index 0000000..f006d45 --- /dev/null +++ b/bbb-bort8.ses @@ -0,0 +1,1048 @@ + +(session "bbb-bort8.ses" + (base_design "bbb-bort8.dsn") + (placement + (resolution um 10) + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 1062100 -915924 front 0) + (place P9 579501 -915924 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N" + (place U1 960501 -547624 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N::1" + (place U2 1328800 -547624 front 0) + ) + (component "SN74HC166N:DIP254P762X508-16" + (place U3 1151000 -547624 front 0) + (place U4 1402720 -1415540 front 90) + (place U6 1402720 -1229740 front 90) + (place U7 1402720 -1136840 front 90) + ) + (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD" + (place J1 477901 -500024 front 0) + ) + (component "SN74HC166N:DIP254P762X508-16::1" + (place U5 1402720 -1322640 front 90) + (place U8 1402720 -1043940 front 90) + ) + ) + (was_is + ) + (routes + (resolution um 10) + (parser + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (library_out + (padstack "Via[0-3]_600:400_um" + (shape + (circle F.Cu 6000 0 0) + ) + (shape + (circle In1.Cu 6000 0 0) + ) + (shape + (circle In2.Cu 6000 0 0) + ) + (shape + (circle B.Cu 6000 0 0) + ) + (attach off) + ) + ) + (network_out + (net SR1_CLR + (wire + (path F.Cu 2500 + 1062104 -1119120 + 1062100 -1119124 + ) + ) + (wire + (path F.Cu 2500 + 1328800 -547624 + 1328800 -869574 + 1091140 -1107240 + 1082160 -1107240 + 1073990 -1115410 + 1073990 -1119120 + 1062104 -1119120 + ) + (type protect) + ) + (wire + (path F.Cu 2500 + 1062104 -1119120 + 1062100 -1119120 + ) + (type protect) + ) + ) + (net SR1_SHLD + (wire + (path F.Cu 2500 + 1062100 -1093720 + 1062100 -1093724 + ) + ) + (wire + (path F.Cu 2500 + 1252600 -522224 + 1108480 -666345 + 1108480 -1038980 + 1091030 -1056430 + 1082360 -1056430 + 1073990 -1064800 + 1073990 -1073660 + 1065820 -1081840 + 1062100 -1081840 + 1062100 -1093720 + ) + (type protect) + ) + ) + (net SR1_CLK + (wire + (path F.Cu 2500 + 1062100 -1042920 + 1062100 -1042924 + ) + ) + (wire + (path F.Cu 2500 + 1062100 -1042920 + 1062100 -1031040 + 1065820 -1031040 + 1073990 -1022860 + 1073990 -1014000 + 1083170 -1004820 + 1091900 -1004820 + 1103890 -992828 + 1103890 -654083 + 1248450 -509524 + 1256440 -509524 + 1269290 -496674 + 1269290 -437317 + 1252600 -420624 + ) + (type protect) + ) + ) + (net SR1_CLKINH + (wire + (path F.Cu 2500 + 1062100 -966724 + 1073990 -966724 + 1073990 -963008 + 1082160 -954835 + 1090900 -954835 + 1099390 -946340 + 1099390 -624634 + 1252600 -471424 + ) + (type protect) + ) + ) + (net SR1_QH_T + (wire + (path F.Cu 2500 + 884301 -395224 + 938382 -449305 + 938382 -746878 + 1075610 -884107 + 1075610 -921262 + 1083780 -929435 + 1087500 -929435 + 1087500 -941324 + ) + (type protect) + ) + ) + (net PGND + (wire + (path In2.Cu 2500 + 1224920 -1305940 + 1236735 -1317755 + 1236735 -1331621 + 1224920 -1343436 + 1224920 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) + (net SR2_QH + (wire + (path In1.Cu 2500 + 1301120 -1136840 + 1288420 -1124140 + 1288420 -1016055 + 872257 -599892 + 872257 -483468 + 884301 -471424 + ) + ) + ) + (net SR3_QH + (wire + (path In1.Cu 2500 + 884301 -522224 + 1301120 -939043 + 1301120 -1043940 + ) + ) + ) + (net SR4_QH + (wire + (path In1.Cu 2500 + 1301120 -1229740 + 1313167 -1217693 + 1313167 -900290 + 960501 -547624 + ) + ) + ) + (net SR5_QH + (wire + (path In1.Cu 2500 + 1301120 -1322640 + 1313820 -1309940 + 1313820 -1259080 + 1338657 -1234243 + 1338657 -874980 + 960501 -496824 + ) + ) + ) + (net SR6_QH + (wire + (path In2.Cu 2500 + 1301120 -1415540 + 1288420 -1402840 + 1288420 -1369095 + 1263020 -1343695 + 1263020 -1301540 + 1197098 -1235618 + 1197098 -691485 + 991162 -485549 + 991162 -451285 + 960501 -420624 + ) + ) + ) + ) + ) +) \ No newline at end of file diff --git a/bbb-bort9.dsn b/bbb-bort9.dsn new file mode 100644 index 0000000..853ff7e --- /dev/null +++ b/bbb-bort9.dsn @@ -0,0 +1,1012 @@ +(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort9.dsn" + (parser + (string_quote ") + (space_in_quoted_tokens on) + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (resolution um 10) + (unit um) + (structure + (layer F.Cu + (type signal) + (property + (index 0) + ) + ) + (layer In1.Cu + (type signal) + (property + (index 1) + ) + ) + (layer In2.Cu + (type signal) + (property + (index 2) + ) + ) + (layer B.Cu + (type signal) + (property + (index 3) + ) + ) + (boundary + (path pcb 0 122720 -181762 54140.1 -181762 54140.1 -49682.4 122720 -49682.4 + 122720 -181762) + ) + (via "Via[0-3]_600:400_um") + (rule + (width 250) + (clearance 200.1) + (clearance 200.1 (type default_smd)) + (clearance 50 (type smd_smd)) + ) + ) + (placement + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 111290 -116992 front 0 (PN BeagleBone_Black_Header)) + (place P9 63030.1 -116992 front 0 (PN BeagleBone_Black_Header)) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N" + (place U1 71920.1 -105562 front 0 (PN 4504)) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N::1" + (place U2 108750 -105562 front 0 (PN 4504)) + ) + (component "SN74HC166N:DIP254P762X508-16" + (place U3 90335.1 -105562 front 0 (PN 74166)) + (place U4 68110.1 -77622.4 front 0 (PN 74166)) + (place U6 92875.1 -77622.4 front 0 (PN 74166)) + (place U7 105258 -77622.4 front 0 (PN 74166)) + ) + (component "SN74HC166N:DIP254P762X508-16::1" + (place U5 80492.6 -77622.4 front 0 (PN 74166)) + (place U8 117640 -77622.4 front 0 (PN 74166)) + ) + ) + (library + (image Socket_BeagleBone_Black:Socket_BeagleBone_Black + (outline (path signal 150 -1550 1550 -1550 0)) + (outline (path signal 150 1270 -1270 -1270 -1270)) + (outline (path signal 150 1270 1270 1270 -1270)) + (outline (path signal 150 0 1550 -1550 1550)) + (outline (path signal 150 3810 1270 1270 1270)) + (outline (path signal 150 3810 -57150 -1270 -57150)) + (outline (path signal 150 -1270 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+ (net "Net-(U8-Pad5)" + (pins U8-5) + ) + (net "Net-(U8-Pad4)" + (pins U8-4) + ) + (net "Net-(U8-Pad3)" + (pins U8-3) + ) + (net "Net-(U8-Pad2)" + (pins U8-2) + ) + (class kicad_default "" +3V3 /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1 /p2 /p3 + /p4 /p5 /p6 /p7 /p8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 + GNDA_ADC "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" + "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)" + "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" + "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" + "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" + "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)" + "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" + "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" + "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" + "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" + "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" + "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" + "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" + "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" + "Net-(P9-Pad41)" "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" + "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" + "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad11)" "Net-(U2-Pad12)" + "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" + "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" + "Net-(U3-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)" + "Net-(U4-Pad2)" "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U5-Pad10)" + "Net-(U5-Pad11)" "Net-(U5-Pad12)" "Net-(U5-Pad14)" "Net-(U5-Pad2)" "Net-(U5-Pad3)" + "Net-(U5-Pad4)" "Net-(U5-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)" + "Net-(U6-Pad14)" "Net-(U6-Pad2)" "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)" + "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)" + "Net-(U7-Pad2)" "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U8-Pad10)" + "Net-(U8-Pad11)" "Net-(U8-Pad12)" "Net-(U8-Pad14)" "Net-(U8-Pad2)" "Net-(U8-Pad3)" + "Net-(U8-Pad4)" "Net-(U8-Pad5)" PGND PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T + SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SR2_QH + SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH SR4_QH_T SR5_QH SR5_QH_T SR6_QH + SR6_QH_T SYS_RESETN VDD_ADC + (circuit + (use_via Via[0-3]_600:400_um) + ) + (rule + (width 250) + (clearance 200.1) + ) + ) + ) + (wiring + ) +) diff --git a/bbb-bort9.rules b/bbb-bort9.rules new file mode 100644 index 0000000..133e1a5 --- /dev/null +++ b/bbb-bort9.rules @@ -0,0 +1,111 @@ + +(rules PCB bbb-bort9 + (snap_angle + fortyfive_degree + ) + (autoroute_settings + (fanout off) + (autoroute on) + (postroute on) + (vias on) + (via_costs 50) + (plane_via_costs 5) + (start_ripup_costs 100) + (start_pass_no 831) + (layer_rule F.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.8) + (against_preferred_direction_trace_costs 3.7) + ) + (layer_rule In1.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.5) + ) + (layer_rule In2.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 2.9) + ) + (layer_rule B.Cu + (active on) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.8) + (against_preferred_direction_trace_costs 2.3) + ) + ) + (rule + (width 250.0) + (clear 200.2) + (clear 125.0 (type smd_to_turn_gap)) + (clear 50.0 (type smd_smd)) + ) + (padstack "Via[0-3]_600:400_um" + (shape + (circle F.Cu 600.0 0.0 0.0) + ) + (shape + (circle In1.Cu 600.0 0.0 0.0) + ) + (shape + (circle In2.Cu 600.0 0.0 0.0) + ) + (shape + (circle B.Cu 600.0 0.0 0.0) + ) + (attach off) + ) + (via + "Via[0-3]_600:400_um" "Via[0-3]_600:400_um" default + ) + (via + "Via[0-3]_600:400_um-kicad_default" "Via[0-3]_600:400_um" "kicad_default" + ) + (via_rule + default "Via[0-3]_600:400_um" + ) + (via_rule + "kicad_default" "Via[0-3]_600:400_um-kicad_default" + ) + (class default + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu In1.Cu In2.Cu B.Cu) + ) + ) + (class "kicad_default" + "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" + "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" + "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" + "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)" + "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" + "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" + "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" + "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN" + "VDD_ADC" "GNDA_ADC" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND + 5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK" + "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T" + "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(U3-Pad2)" + "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U4-Pad2)" + "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)" "Net-(U5-Pad14)" + "Net-(U5-Pad12)" "Net-(U5-Pad11)" "Net-(U5-Pad10)" "Net-(U5-Pad5)" "Net-(U5-Pad4)" "Net-(U5-Pad3)" "Net-(U5-Pad2)" "Net-(U6-Pad2)" + "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)" "Net-(U6-Pad14)" "Net-(U7-Pad2)" + "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)" "Net-(U8-Pad14)" + "Net-(U8-Pad12)" "Net-(U8-Pad11)" "Net-(U8-Pad10)" "Net-(U8-Pad5)" "Net-(U8-Pad4)" "Net-(U8-Pad3)" "Net-(U8-Pad2)" + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu In1.Cu In2.Cu B.Cu) + ) + ) +) \ No newline at end of file diff --git a/bbb-bort9.ses b/bbb-bort9.ses new file mode 100644 index 0000000..559c3f2 --- /dev/null +++ b/bbb-bort9.ses @@ -0,0 +1,1005 @@ + +(session "bbb-bort9.ses" + (base_design "bbb-bort9.dsn") + (placement + (resolution um 10) + (component Socket_BeagleBone_Black:Socket_BeagleBone_Black + (place P8 1112900 -1169920 front 0) + (place P9 630301 -1169920 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N" + (place U1 719201 -1055620 front 0) + ) + (component "DIP254P762X508-16N:DIP254P762X508-16N::1" + (place U2 1087500 -1055620 front 0) + ) + (component "SN74HC166N:DIP254P762X508-16" + (place U3 903351 -1055620 front 0) + (place U4 681101 -776224 front 0) + (place U6 928751 -776224 front 0) + (place U7 1052580 -776224 front 0) + ) + (component "SN74HC166N:DIP254P762X508-16::1" + (place U5 804926 -776224 front 0) + (place U8 1176400 -776224 front 0) + ) + ) + (was_is + ) + (routes + (resolution um 10) + (parser + (host_cad "KiCad's Pcbnew") + (host_version "(5.0.1)-3") + ) + (library_out + (padstack "Via[0-3]_600:400_um" + (shape + (circle F.Cu 6000 0 0) + ) + (shape + (circle In1.Cu 6000 0 0) + ) + (shape + (circle In2.Cu 6000 0 0) + ) + (shape + (circle B.Cu 6000 0 0) + ) + (attach off) + ) + ) + (network_out + (net SR1_CLR + (wire + (path In2.Cu 2500 + 1112900 -1373120 + 1112900 -1361231 + ) + ) + (wire + (path In2.Cu 2500 + 1087500 -1055620 + 1124789 -1092909 + 1124789 -1353058 + 1116616 -1361231 + 1112900 -1361231 + ) + ) + ) + (net SR1_SHLD + (wire + (path In2.Cu 2500 + 1112900 -1347720 + 1112900 -1335831 + ) + ) + (wire + (path In2.Cu 2500 + 1011300 -1030220 + 1022935 -1041855 + 1022935 -1249581 + 1109185 -1335831 + 1112900 -1335831 + ) + ) + ) + (net SR1_CLK + (wire + (path In2.Cu 2500 + 1011300 -928620 + 999555 -940365 + 999555 -984452 + 1006159 -991056 + 1014140 -991056 + 1027439 -1004355 + 1027439 -1203285 + 1109185 -1285031 + 1112900 -1285031 + ) + ) + (wire + (path In2.Cu 2500 + 1112900 -1296920 + 1112900 -1285031 + ) + ) + ) + (net SR1_CLKINH + (wire + (path In2.Cu 2500 + 1112900 -1220720 + 1112900 -1208831 + ) + ) + (wire + (path In2.Cu 2500 + 1011300 -979420 + 1048416 -1016536 + 1048416 -1148062 + 1109185 -1208831 + 1112900 -1208831 + ) + ) + ) + (net SR1_QH_T + (wire + (path In1.Cu 2500 + 1138300 -1195320 + 1126411 -1195320 + ) + ) + (wire + (path In1.Cu 2500 + 743438 -956581 + 804377 -1017520 + 831496 -1017520 + 997407 -1183431 + 1118238 -1183431 + 1126411 -1191604 + 1126411 -1195320 + ) + ) + (via "Via[0-3]_600:400_um" 743438 -956581 + ) + (wire + (path In2.Cu 2500 + 643001 -903220 + 680037 -940256 + 727113 -940256 + 743438 -956581 + ) + ) + ) + (net PGND + (wire + (path B.Cu 2500 + 852551 -776224 + 864187 -787860 + 964744 -787860 + 976380 -776224 + ) + ) + (wire + (path B.Cu 2500 + 604901 -776224 + 616807 -764318 + 716820 -764318 + 728726 -776224 + ) + ) + (wire + (path In2.Cu 2500 + 852551 -598424 + 840916 -598424 + ) + ) + (wire + (path In2.Cu 2500 + 840916 -598424 + 829281 -610059 + 728726 -610059 + ) + ) + (wire + (path In2.Cu 2500 + 728726 -598424 + 728726 -610059 + ) + ) + (wire + (path In2.Cu 2500 + 728726 -610059 + 725817 -610059 + 716682 -619194 + 716682 -764180 + 728726 -776224 + ) + ) + (wire + (path In2.Cu 2500 + 707088 -1067256 + 655701 -1067256 + ) + ) + (wire + (path In2.Cu 2500 + 827151 -1055620 + 815515 -1067256 + 707088 -1067256 + ) + ) + (wire + (path In2.Cu 2500 + 719201 -954020 + 707088 -966133 + 707088 -1067256 + ) + ) + (wire + (path In2.Cu 2500 + 655701 -1067256 + 654637 -1067256 + 643001 -1055620 + ) + ) + (wire + (path In2.Cu 2500 + 655701 -1158031 + 655701 -1067256 + ) + ) + (wire + (path In1.Cu 2500 + 655701 -1703320 + 655701 -1716831 + ) + ) + (wire + (path In1.Cu 2500 + 630301 -1703320 + 655701 -1703320 + ) + ) + (wire + (path In1.Cu 2500 + 655701 -1728720 + 655701 -1716831 + ) + ) + (wire + (path In1.Cu 2500 + 630301 -1703320 + 630301 -1716831 + ) + ) + (wire + (path In1.Cu 2500 + 630301 -1728720 + 630301 -1716831 + ) + ) + (wire + (path In1.Cu 2500 + 976380 -598424 + 988015 -598424 + ) + ) + (wire + (path In1.Cu 2500 + 1100200 -598424 + 1088565 -598424 + ) + ) + (wire + (path In1.Cu 2500 + 1088565 -598424 + 1076930 -610059 + 999650 -610059 + 988015 -598424 + ) + ) + (wire + (path In1.Cu 2500 + 1088402 -788022 + 988178 -788022 + 976380 -776224 + ) + ) + (wire + (path In1.Cu 2500 + 1100200 -776224 + 1088402 -788022 + ) + ) + (wire + (path In1.Cu 2500 + 1088402 -788022 + 1099170 -798790 + 1099170 -942350 + 1087500 -954020 + ) + ) + (wire + (path In1.Cu 2500 + 719201 -954020 + 795401 -877820 + 827151 -877820 + ) + ) + (wire + (path In1.Cu 2500 + 852551 -598424 + 864186 -598424 + ) + ) + (wire + (path In1.Cu 2500 + 976380 -598424 + 964745 -598424 + ) + ) + (wire + (path In1.Cu 2500 + 964745 -598424 + 953110 -610059 + 875821 -610059 + 864186 -598424 + ) + ) + (wire + (path In2.Cu 2500 + 655701 -1169920 + 655701 -1158031 + ) + ) + (wire + (path In1.Cu 2500 + 1061662 -1065003 + 1020683 -1065003 + 1011300 -1055620 + ) + ) + (wire + (path In1.Cu 2500 + 1138300 -1169920 + 1126411 -1169920 + ) + ) + (wire + (path In1.Cu 2500 + 1112900 -1163975 + 1120466 -1163975 + 1126411 -1169920 + ) + ) + (wire + (path In1.Cu 2500 + 1112900 -1163975 + 1112900 -1158031 + ) + ) + (wire + (path In1.Cu 2500 + 1112900 -1169920 + 1112900 -1163975 + ) + ) + (wire + (path In2.Cu 2500 + 630301 -1169920 + 630301 -1181809 + ) + ) + (wire + (path In2.Cu 2500 + 655701 -1703320 + 655701 -1691431 + ) + ) + (wire + (path In2.Cu 2500 + 655701 -1691431 + 651985 -1691431 + 642190 -1681636 + 642190 -1189982 + 634017 -1181809 + 630301 -1181809 + ) + ) + (wire + (path In1.Cu 2500 + 1087500 -954020 + 1099566 -966086 + 1099566 -1035315 + 1093025 -1041856 + 1084809 -1041856 + 1061662 -1065003 + ) + ) + (wire + (path In1.Cu 2500 + 1061662 -1065003 + 1061662 -1106793 + 1112900 -1158031 + ) + ) + (wire + (path In1.Cu 2500 + 630301 -1169920 + 655701 -1169920 + ) + ) + (wire + (path In2.Cu 2500 + 1100200 -598424 + 1100200 -610059 + ) + ) + (wire + (path In2.Cu 2500 + 1100200 -776224 + 1088565 -764589 + 1088565 -618784 + 1097290 -610059 + 1100200 -610059 + ) + ) + (wire + (path In1.Cu 2500 + 604901 -598424 + 616536 -598424 + ) + ) + (wire + (path In1.Cu 2500 + 728726 -598424 + 717091 -598424 + ) + ) + (wire + (path In1.Cu 2500 + 717091 -598424 + 705456 -610059 + 628171 -610059 + 616536 -598424 + ) + ) + (wire + (path In2.Cu 2500 + 852551 -776224 + 827151 -801624 + 827151 -877820 + ) + ) + ) + (net 5v + (wire + (path In2.Cu 2500 + 681101 -598424 + 643001 -636524 + 643001 -877820 + ) + ) + (wire + (path In1.Cu 2500 + 655701 -1220720 + 655701 -1234231 + ) + ) + (wire + (path In1.Cu 2500 + 630301 -1220720 + 655701 -1220720 + ) + ) + (wire + (path In1.Cu 2500 + 655701 -1246120 + 655701 -1234231 + ) + ) + (wire + (path In1.Cu 2500 + 630301 -1220720 + 630301 -1234231 + ) + ) + (wire + (path In1.Cu 2500 + 630301 -1246120 + 630301 -1234231 + ) + ) + (wire + (path In2.Cu 2500 + 1052580 -610330 + 1055756 -610330 + 1065280 -619854 + 1065280 -855600 + 1087500 -877820 + ) + ) + (wire + (path In2.Cu 2500 + 1052580 -598424 + 1052580 -610330 + ) + ) + (wire + (path In2.Cu 2500 + 1052580 -610330 + 940657 -610330 + 928751 -598424 + ) + ) + (wire + (path In1.Cu 2500 + 928751 -598424 + 917115 -586788 + 816562 -586788 + 804926 -598424 + ) + ) + (wire + (path In2.Cu 2500 + 643001 -877820 + 643001 -889455 + ) + ) + (wire + (path In2.Cu 2500 + 643001 -889455 + 640092 -889455 + 618167 -911380 + 618167 -1200392 + 626606 -1208831 + 630301 -1208831 + ) + ) + (wire + (path In2.Cu 2500 + 630301 -1220720 + 630301 -1208831 + ) + ) + (wire + (path In1.Cu 2500 + 1087500 -877820 + 1075864 -889456 + 921356 -889456 + 909720 -877820 + 903351 -877820 + ) + ) + (wire + (path In1.Cu 2500 + 1176400 -598424 + 1164764 -586788 + 1064216 -586788 + 1052580 -598424 + ) + ) + (wire + (path In1.Cu 2500 + 804926 -598424 + 793290 -586788 + 692737 -586788 + 681101 -598424 + ) + ) + ) + (net BB3.3 + (wire + (path B.Cu 2500 + 1011300 -877820 + 999665 -877820 + ) + ) + (wire + (path B.Cu 2500 + 999665 -877820 + 988029 -889456 + 730837 -889456 + 719201 -877820 + ) + ) + ) + (net SR1_QH + (wire + (path F.Cu 2500 + 903351 -954020 + 891716 -942385 + 656765 -942385 + 656765 -942384 + 643001 -928620 + ) + ) + ) + (net SR1_CLR_T + (wire + (path In1.Cu 2500 + 804926 -776224 + 793096 -788054 + 692931 -788054 + 681101 -776224 + ) + ) + (wire + (path In1.Cu 2500 + 928751 -776224 + 917115 -764588 + 816562 -764588 + 804926 -776224 + ) + ) + (wire + (path In2.Cu 2500 + 1052580 -776224 + 1052580 -995300 + 1087500 -1030220 + ) + ) + (wire + (path In1.Cu 2500 + 1087500 -1030220 + 1074800 -1042920 + 916051 -1042920 + 903351 -1055620 + ) + ) + (wire + (path B.Cu 2500 + 1052580 -776224 + 1040807 -764451 + 940524 -764451 + 928751 -776224 + ) + ) + (wire + (path In1.Cu 2500 + 1176400 -776224 + 1164317 -764141 + 1094540 -764141 + 1082457 -776224 + 1052580 -776224 + ) + ) + ) + (net SR1_SHLD_T + (wire + (path In1.Cu 2500 + 1176400 -623824 + 1164764 -635460 + 1064216 -635460 + 1052580 -623824 + ) + ) + (wire + (path In2.Cu 2500 + 940658 -635731 + 940658 -865913 + 903351 -903220 + ) + ) + (wire + (path In2.Cu 2500 + 928751 -623824 + 940658 -635731 + ) + ) + (wire + (path In2.Cu 2500 + 1052580 -623824 + 1040673 -635731 + 940658 -635731 + ) + ) + (wire + (path In1.Cu 2500 + 804926 -623824 + 816562 -635460 + 917115 -635460 + 928751 -623824 + ) + ) + (wire + (path In1.Cu 2500 + 804926 -623824 + 793020 -635730 + 693007 -635730 + 681101 -623824 + ) + ) + (wire + (path In1.Cu 2500 + 903351 -903220 + 1004951 -1004820 + 1011300 -1004820 + ) + ) + ) + (net SR1_CLKINH_T + (wire + (path In2.Cu 2500 + 976380 -725424 + 1023343 -772387 + 1023343 -941977 + 1011300 -954020 + ) + ) + (wire + (path B.Cu 2500 + 827151 -1004820 + 865251 -966720 + 998600 -966720 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0.1) (thickness 0.01))) + ) + (fp_text value VAL** (at 0 -0.125) (layer F.Fab) + (effects (font (size 0.1 0.1) (thickness 0.01))) + ) + (fp_text user %R (at 0 0 180) (layer Eco1.User) + (effects (font (size 0.3 0.3) (thickness 0.03))) + ) + (fp_circle (center 0 0) (end 3.5 0) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 -3.1) (end 0 3.1) (layer Cmts.User) (width 0.05)) + (fp_line (start -3.1 0) (end 3.1 0) (layer Cmts.User) (width 0.05)) + (pad 1 thru_hole circle (at 0 0) (size 6.5 6.5) (drill 3.2) (layers *.Cu *.Mask)) +) diff --git a/pwr_BeagleBone.bck b/pwr_BeagleBone.bck new file mode 100644 index 0000000..5f3ed79 --- /dev/null +++ b/pwr_BeagleBone.bck @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/pwr_BeagleBone.dcm b/pwr_BeagleBone.dcm new file mode 100644 index 0000000..5f3ed79 --- /dev/null +++ b/pwr_BeagleBone.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/pwr_BeagleBone.lib b/pwr_BeagleBone.lib new file mode 100644 index 0000000..02c6a69 --- /dev/null +++ b/pwr_BeagleBone.lib @@ -0,0 +1,47 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# GNDA_ADC +# +DEF GNDA_ADC #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GNDA_ADC" 0 -150 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GNDA_ADC 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# SYS_5V +# +DEF SYS_5V #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "SYS_5V" 0 140 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X SYS_5V 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# VDD_ADC +# +DEF VDD_ADC #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "VDD_ADC" 0 140 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X VDD_ADC 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# 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“P8:/55DF7DE1:Socket_BeagleBone_Black:Socket_BeagleBone_Black”. + +Info: Checking netlist symbol footprint “J6:/5C29AF80:footprints:640456-8”. + +Info: Checking netlist symbol footprint “J5:/5C29AE73:footprints:640456-8”. + +Info: Checking netlist symbol footprint “J4:/5C29AD70:footprints:640456-8”. + +Info: Checking netlist symbol footprint “J3:/5C29ACD3:footprints:640456-8”. + +Info: Checking netlist symbol footprint “J2:/5C29AA60:footprints:640456-8”. + +Info: Checking netlist symbol footprint “J1:/5C29A912:footprints:640456-8”. + +Warning: Footprint of symbol “R1” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R39” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R2” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R3” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R4” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R5” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R6” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R7” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R8” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R26” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R25” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R21” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R16” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R15” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R14” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R13” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R12” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R11” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R10” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R9” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R24” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R23” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R22” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R27” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R40” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R19” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R18” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R17” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R48” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R47” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R46” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R45” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R44” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R43” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R42” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R41” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R28” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R20” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R38” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R37” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R36” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R35” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R34” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R33” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R32” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R31” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R30” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + +Warning: Footprint of symbol “R29” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal” + diff --git a/sym-lib-table b/sym-lib-table new file mode 100644 index 0000000..ebfcea5 --- /dev/null +++ b/sym-lib-table @@ -0,0 +1,3 @@ +(sym_lib_table + (lib (name pwr_BeagleBone)(type Legacy)(uri ${KIPRJMOD}/pwr_BeagleBone.lib)(options "")(descr "")) +) -- 2.41.0