--- /dev/null
+(pcb "C:\Users\kremlin\kicad\projects\bort-segs\bort-segs.dsn"\r
+ (parser\r
+ (string_quote ")\r
+ (space_in_quoted_tokens on)\r
+ (host_cad "KiCad's Pcbnew")\r
+ (host_version "(5.0.1)-3")\r
+ )\r
+ (resolution um 10)\r
+ (unit um)\r
+ (structure\r
+ (layer F.Cu\r
+ (type signal)\r
+ (property\r
+ (index 0)\r
+ )\r
+ )\r
+ (layer B.Cu\r
+ (type signal)\r
+ (property\r
+ (index 1)\r
+ )\r
+ )\r
+ (boundary\r
+ (path pcb 0 400304 -126492 305816 -220980 30734 -220980 30734 -26924\r
+ 400304 -26924 400304 -126492)\r
+ )\r
+ (via "Via[0-1]_800:400_um")\r
+ (rule\r
+ (width 250)\r
+ (clearance 200.1)\r
+ (clearance 200.1 (type default_smd))\r
+ (clearance 50 (type smd_smd))\r
+ )\r
+ )\r
+ (placement\r
+ (component "new-out:2.3_7-SEG_DIS"\r
+ (place DSP1 71382 -70612 front 0 (PN "SA23-11SRWA"))\r
+ (place DSP2 120658 -70612 front 0 (PN "SA23-11SRWA"))\r
+ (place DSP3 170442 -70612 front 0 (PN "SA23-11SRWA"))\r
+ (place DSP4 219718 -70612 front 0 (PN "SA23-11SRWA"))\r
+ (place DSP5 268994 -70612 front 0 (PN "SA23-11SRWA"))\r
+ (place DSP6 318270 -70612 front 0 (PN "SA23-11SRWA"))\r
+ (place DSP7 367546 -70612 front 0 (PN "SA23-11SRWA"))\r
+ )\r
+ (component Capacitor_SMD:C_1210_3225Metric_Pad1.42x2.65mm_HandSolder\r
+ (place C15 368046 -119380 front 0 (PN 0.1uF))\r
+ (place C14 318262 -131064 front 0 (PN 0.1uF))\r
+ (place C13 268986 -124714 front 0 (PN 0.1uF))\r
+ (place C12 220218 -130810 front 0 (PN 0.1uF))\r
+ (place C11 168910 -132080 front 0 (PN 0.1uF))\r
+ (place C10 243586 -143510 front 0 (PN 0.1uF))\r
+ (place C9 71410.5 -123698 front 0 (PN 0.1uF))\r
+ (place C8 201712 -163068 front 0 (PN 0.1uF))\r
+ (place C7 205740 -185674 front 0 (PN 0.1uF))\r
+ (place C6 188722 -176530 front 90 (PN 0.1uF))\r
+ (place C5 188722 -170688 front 90 (PN 0.1uF))\r
+ (place C4 199898 -185674 front 0 (PN 0.1uF))\r
+ (place C3 243586 -146812 front 0 (PN 0.1uF))\r
+ (place C2 243586 -139954 front 0 (PN 0.1uF))\r
+ )\r
+ (component Capacitor_THT:CP_Radial_D6.3mm_P2.50mm\r
+ (place C1 121920 -163830 front 180 (PN 200uF))\r
+ )\r
+ (component "Package_DIP:DIP-16_W7.62mm"\r
+ (place U2 197866 -141224 front 0 (PN 74HC238))\r
+ )\r
+ (component "badheader:TSW-123-17-L-D"\r
+ (place J1 283210 -166624 front 90 (PN P8))\r
+ (place J3 233680 -166624 front 90 (PN P9))\r
+ )\r
+ (component cd4026bpw:CD4026BPW\r
+ (place U3 71374 -117348 front 0 (PN PW16))\r
+ (place U4 120396 -122936 front 0 (PN PW16))\r
+ (place U5 168910 -124460 front 0 (PN PW16))\r
+ (place U6 219456 -117094 front 0 (PN PW16))\r
+ (place U7 268478 -118364 front 0 (PN PW16))\r
+ (place U8 318008 -123952 front 0 (PN PW16))\r
+ (place U9 367538 -112014 front 0 (PN PW16))\r
+ )\r
+ (component "power_term:796683-2"\r
+ (place J2 118618 -178816 front 0 (PN "CON2_P5MM_VER_STERM-BLK"))\r
+ )\r
+ (component sn74lvch16t245dlr:SN74LVCH16T245DLR\r
+ (place U1 202438 -173990 front 0 (PN DL48))\r
+ )\r
+ )\r
+ (library\r
+ (image "new-out:2.3_7-SEG_DIS"\r
+ (outline (path signal 127 -2000 37000 25000 37000))\r
+ (outline (path signal 127 25000 37000 25000 -37000))\r
+ (outline (path signal 127 25000 -37000 -24000 -37000))\r
+ (outline (path signal 127 -24000 -37000 -24000 37000))\r
+ (outline (path signal 127 -24000 37000 -2000 37000))\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 1 -5080 -30000)\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 2 -2540 -30000)\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 3 0 -30050)\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 4 2540 -30000)\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 5 5080 -30000)\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 6 5080 30050)\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 7 2540 30050)\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 8 0 30050)\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 9 -2540 30050)\r
+ (pin Oval[A]Pad_2216x1108_um (rotate 90) 10 -5080 30050)\r
+ )\r
+ (image Capacitor_SMD:C_1210_3225Metric_Pad1.42x2.65mm_HandSolder\r
+ (outline (path signal 50 2450 -1580 -2450 -1580))\r
+ (outline (path signal 50 2450 1580 2450 -1580))\r
+ (outline (path signal 50 -2450 1580 2450 1580))\r
+ (outline (path signal 50 -2450 -1580 -2450 1580))\r
+ (outline (path signal 120 -602.064 -1360 602.064 -1360))\r
+ (outline (path signal 120 -602.064 1360 602.064 1360))\r
+ (outline (path signal 100 1600 -1250 -1600 -1250))\r
+ (outline (path signal 100 1600 1250 1600 -1250))\r
+ (outline (path signal 100 -1600 1250 1600 1250))\r
+ (outline (path signal 100 -1600 -1250 -1600 1250))\r
+ (pin RoundRect[T]Pad_1425x2650_250.951_um 2 1487.5 0)\r
+ (pin RoundRect[T]Pad_1425x2650_250.951_um 1 -1487.5 0)\r
+ )\r
+ (image Capacitor_THT:CP_Radial_D6.3mm_P2.50mm\r
+ (outline (path signal 120 -1935.24 2154 -1935.24 1524))\r
+ (outline (path signal 120 -2250.24 1839 -1620.24 1839))\r
+ (outline (path signal 120 4491 402 4491 -402))\r
+ (outline (path signal 120 4451 633 4451 -633))\r
+ (outline (path signal 120 4411 802 4411 -802))\r
+ (outline (path signal 120 4371 940 4371 -940))\r
+ (outline (path signal 120 4331 1059 4331 -1059))\r
+ (outline (path signal 120 4291 1165 4291 -1165))\r
+ (outline (path signal 120 4251 1262 4251 -1262))\r
+ (outline (path signal 120 4211 1350 4211 -1350))\r
+ (outline (path signal 120 4171 1432 4171 -1432))\r
+ (outline (path signal 120 4131 1509 4131 -1509))\r
+ (outline (path signal 120 4091 1581 4091 -1581))\r
+ (outline (path signal 120 4051 1650 4051 -1650))\r
+ (outline (path signal 120 4011 1714 4011 -1714))\r
+ (outline (path signal 120 3971 1776 3971 -1776))\r
+ (outline (path signal 120 3931 1834 3931 -1834))\r
+ (outline (path signal 120 3891 1890 3891 -1890))\r
+ (outline (path signal 120 3851 1944 3851 -1944))\r
+ (outline (path signal 120 3811 1995 3811 -1995))\r
+ (outline (path signal 120 3771 2044 3771 -2044))\r
+ (outline (path signal 120 3731 2092 3731 -2092))\r
+ (outline (path signal 120 3691 2137 3691 -2137))\r
+ (outline (path signal 120 3651 2182 3651 -2182))\r
+ (outline (path signal 120 3611 2224 3611 -2224))\r
+ (outline (path signal 120 3571 2265 3571 -2265))\r
+ (outline (path signal 120 3531 -1040 3531 -2305))\r
+ (outline (path signal 120 3531 2305 3531 1040))\r
+ (outline (path signal 120 3491 -1040 3491 -2343))\r
+ (outline (path signal 120 3491 2343 3491 1040))\r
+ (outline (path signal 120 3451 -1040 3451 -2380))\r
+ (outline (path signal 120 3451 2380 3451 1040))\r
+ (outline (path signal 120 3411 -1040 3411 -2416))\r
+ (outline (path signal 120 3411 2416 3411 1040))\r
+ (outline (path signal 120 3371 -1040 3371 -2450))\r
+ (outline (path signal 120 3371 2450 3371 1040))\r
+ (outline (path signal 120 3331 -1040 3331 -2484))\r
+ (outline (path signal 120 3331 2484 3331 1040))\r
+ (outline (path signal 120 3291 -1040 3291 -2516))\r
+ (outline (path signal 120 3291 2516 3291 1040))\r
+ (outline (path signal 120 3251 -1040 3251 -2548))\r
+ (outline (path signal 120 3251 2548 3251 1040))\r
+ (outline (path signal 120 3211 -1040 3211 -2578))\r
+ (outline (path signal 120 3211 2578 3211 1040))\r
+ (outline (path signal 120 3171 -1040 3171 -2607))\r
+ (outline (path signal 120 3171 2607 3171 1040))\r
+ (outline (path signal 120 3131 -1040 3131 -2636))\r
+ (outline (path signal 120 3131 2636 3131 1040))\r
+ (outline (path signal 120 3091 -1040 3091 -2664))\r
+ (outline (path signal 120 3091 2664 3091 1040))\r
+ (outline (path signal 120 3051 -1040 3051 -2690))\r
+ (outline (path signal 120 3051 2690 3051 1040))\r
+ (outline (path signal 120 3011 -1040 3011 -2716))\r
+ (outline (path signal 120 3011 2716 3011 1040))\r
+ (outline (path signal 120 2971 -1040 2971 -2742))\r
+ (outline (path signal 120 2971 2742 2971 1040))\r
+ (outline (path signal 120 2931 -1040 2931 -2766))\r
+ (outline (path signal 120 2931 2766 2931 1040))\r
+ (outline (path signal 120 2891 -1040 2891 -2790))\r
+ (outline (path signal 120 2891 2790 2891 1040))\r
+ (outline (path signal 120 2851 -1040 2851 -2812))\r
+ (outline (path signal 120 2851 2812 2851 1040))\r
+ (outline (path signal 120 2811 -1040 2811 -2834))\r
+ (outline (path signal 120 2811 2834 2811 1040))\r
+ (outline (path signal 120 2771 -1040 2771 -2856))\r
+ (outline (path signal 120 2771 2856 2771 1040))\r
+ (outline (path signal 120 2731 -1040 2731 -2876))\r
+ (outline (path signal 120 2731 2876 2731 1040))\r
+ (outline (path signal 120 2691 -1040 2691 -2896))\r
+ (outline (path signal 120 2691 2896 2691 1040))\r
+ (outline (path signal 120 2651 -1040 2651 -2916))\r
+ (outline (path signal 120 2651 2916 2651 1040))\r
+ (outline (path signal 120 2611 -1040 2611 -2934))\r
+ (outline (path signal 120 2611 2934 2611 1040))\r
+ (outline (path signal 120 2571 -1040 2571 -2952))\r
+ (outline (path signal 120 2571 2952 2571 1040))\r
+ (outline (path signal 120 2531 -1040 2531 -2970))\r
+ (outline (path signal 120 2531 2970 2531 1040))\r
+ (outline (path signal 120 2491 -1040 2491 -2986))\r
+ (outline (path signal 120 2491 2986 2491 1040))\r
+ (outline (path signal 120 2451 -1040 2451 -3002))\r
+ (outline (path signal 120 2451 3002 2451 1040))\r
+ (outline (path signal 120 2411 -1040 2411 -3018))\r
+ (outline (path signal 120 2411 3018 2411 1040))\r
+ (outline (path signal 120 2371 -1040 2371 -3033))\r
+ (outline (path signal 120 2371 3033 2371 1040))\r
+ (outline (path signal 120 2331 -1040 2331 -3047))\r
+ (outline (path signal 120 2331 3047 2331 1040))\r
+ (outline (path signal 120 2291 -1040 2291 -3061))\r
+ (outline (path signal 120 2291 3061 2291 1040))\r
+ (outline (path signal 120 2251 -1040 2251 -3074))\r
+ (outline (path signal 120 2251 3074 2251 1040))\r
+ (outline (path signal 120 2211 -1040 2211 -3086))\r
+ (outline (path signal 120 2211 3086 2211 1040))\r
+ (outline (path signal 120 2171 -1040 2171 -3098))\r
+ (outline (path signal 120 2171 3098 2171 1040))\r
+ (outline (path signal 120 2131 -1040 2131 -3110))\r
+ (outline (path signal 120 2131 3110 2131 1040))\r
+ (outline (path signal 120 2091 -1040 2091 -3121))\r
+ (outline (path signal 120 2091 3121 2091 1040))\r
+ (outline (path signal 120 2051 -1040 2051 -3131))\r
+ (outline (path signal 120 2051 3131 2051 1040))\r
+ (outline (path signal 120 2011 -1040 2011 -3141))\r
+ (outline (path signal 120 2011 3141 2011 1040))\r
+ (outline (path signal 120 1971 -1040 1971 -3150))\r
+ (outline (path signal 120 1971 3150 1971 1040))\r
+ (outline (path signal 120 1930 -1040 1930 -3159))\r
+ (outline (path signal 120 1930 3159 1930 1040))\r
+ (outline (path signal 120 1890 -1040 1890 -3167))\r
+ (outline (path signal 120 1890 3167 1890 1040))\r
+ (outline (path signal 120 1850 -1040 1850 -3175))\r
+ (outline (path signal 120 1850 3175 1850 1040))\r
+ (outline (path signal 120 1810 -1040 1810 -3182))\r
+ (outline (path signal 120 1810 3182 1810 1040))\r
+ (outline (path signal 120 1770 -1040 1770 -3189))\r
+ (outline (path signal 120 1770 3189 1770 1040))\r
+ (outline (path signal 120 1730 -1040 1730 -3195))\r
+ (outline (path signal 120 1730 3195 1730 1040))\r
+ (outline (path signal 120 1690 -1040 1690 -3201))\r
+ (outline (path signal 120 1690 3201 1690 1040))\r
+ (outline (path signal 120 1650 -1040 1650 -3206))\r
+ (outline (path signal 120 1650 3206 1650 1040))\r
+ (outline (path signal 120 1610 -1040 1610 -3211))\r
+ (outline (path signal 120 1610 3211 1610 1040))\r
+ (outline (path signal 120 1570 -1040 1570 -3215))\r
+ (outline (path signal 120 1570 3215 1570 1040))\r
+ (outline (path signal 120 1530 -1040 1530 -3218))\r
+ (outline (path signal 120 1530 3218 1530 1040))\r
+ (outline (path signal 120 1490 -1040 1490 -3222))\r
+ (outline (path signal 120 1490 3222 1490 1040))\r
+ (outline (path signal 120 1450 3224 1450 -3224))\r
+ (outline (path signal 120 1410 3227 1410 -3227))\r
+ (outline (path signal 120 1370 3228 1370 -3228))\r
+ (outline (path signal 120 1330 3230 1330 -3230))\r
+ (outline (path signal 120 1290 3230 1290 -3230))\r
+ (outline (path signal 120 1250 3230 1250 -3230))\r
+ (outline (path signal 100 -1128.97 1688.5 -1128.97 1058.5))\r
+ (outline (path signal 100 -1443.97 1373.5 -813.972 1373.5))\r
+ (outline (path signal 50 4650 0 4570.51 -730.899 4335.76 -1427.62 3956.72 -2057.59\r
+ 3451.11 -2591.35 2842.59 -3003.94 2159.6 -3276.07 1434.07 -3395.01\r
+ 699.941 -3355.21 -8.47 -3158.52 -658.036 -2814.14 -1218.38 -2338.18\r
+ -1663.31 -1752.88 -1972.02 -1085.62 -2130.07 -367.605 -2130.07 367.605\r
+ -1972.02 1085.62 -1663.31 1752.88 -1218.38 2338.18 -658.036 2814.14\r
+ -8.47 3158.52 699.941 3355.21 1434.07 3395.01 2159.6 3276.07\r
+ 2842.59 3003.94 3451.11 2591.35 3956.72 2057.59 4335.76 1427.62\r
+ 4570.51 730.899 4650 0))\r
+ (outline (path signal 120 4520 0 4438.01 -727.643 4196.17 -1418.8 3806.59 -2038.81\r
+ 3288.81 -2556.59 2668.8 -2946.17 1977.64 -3188.01 1250 -3270\r
+ 522.357 -3188.01 -168.8 -2946.17 -788.812 -2556.59 -1306.59 -2038.81\r
+ -1696.17 -1418.8 -1938.01 -727.643 -2020 0 -1938.01 727.643\r
+ -1696.17 1418.8 -1306.59 2038.81 -788.812 2556.59 -168.8 2946.17\r
+ 522.357 3188.01 1250 3270 1977.64 3188.01 2668.8 2946.17\r
+ 3288.81 2556.59 3806.59 2038.81 4196.17 1418.8 4438.01 727.643\r
+ 4520 0))\r
+ (outline (path signal 100 4400 0 4321.02 -700.941 4088.05 -1366.73 3712.77 -1963.99\r
+ 3213.99 -2462.77 2616.73 -2838.05 1950.94 -3071.02 1250 -3150\r
+ 549.059 -3071.02 -116.734 -2838.05 -713.993 -2462.77 -1212.77 -1963.99\r
+ -1588.05 -1366.73 -1821.02 -700.941 -1900 0 -1821.02 700.941\r
+ -1588.05 1366.73 -1212.77 1963.99 -713.993 2462.77 -116.734 2838.05\r
+ 549.059 3071.02 1250 3150 1950.94 3071.02 2616.73 2838.05\r
+ 3213.99 2462.77 3712.77 1963.99 4088.05 1366.73 4321.02 700.941\r
+ 4400 0))\r
+ (pin Round[A]Pad_1600_um 2 2500 0)\r
+ (pin Rect[A]Pad_1600x1600_um 1 0 0)\r
+ )\r
+ (image "Package_DIP:DIP-16_W7.62mm"\r
+ (outline (path signal 50 8700 1550 -1100 1550))\r
+ (outline (path signal 50 8700 -19300 8700 1550))\r
+ (outline (path signal 50 -1100 -19300 8700 -19300))\r
+ (outline (path signal 50 -1100 1550 -1100 -19300))\r
+ (outline (path signal 120 6460 1330 4810 1330))\r
+ (outline (path signal 120 6460 -19110 6460 1330))\r
+ (outline (path signal 120 1160 -19110 6460 -19110))\r
+ (outline (path signal 120 1160 1330 1160 -19110))\r
+ (outline (path signal 120 2810 1330 1160 1330))\r
+ (outline (path signal 100 635 270 1635 1270))\r
+ (outline (path signal 100 635 -19050 635 270))\r
+ (outline (path signal 100 6985 -19050 635 -19050))\r
+ (outline (path signal 100 6985 1270 6985 -19050))\r
+ (outline (path signal 100 1635 1270 6985 1270))\r
+ (pin Oval[A]Pad_1600x1600_um 16 7620 0)\r
+ (pin Oval[A]Pad_1600x1600_um 8 0 -17780)\r
+ (pin Oval[A]Pad_1600x1600_um 15 7620 -2540)\r
+ (pin Oval[A]Pad_1600x1600_um 7 0 -15240)\r
+ (pin Oval[A]Pad_1600x1600_um 14 7620 -5080)\r
+ (pin Oval[A]Pad_1600x1600_um 6 0 -12700)\r
+ (pin Oval[A]Pad_1600x1600_um 13 7620 -7620)\r
+ (pin Oval[A]Pad_1600x1600_um 5 0 -10160)\r
+ (pin Oval[A]Pad_1600x1600_um 12 7620 -10160)\r
+ (pin Oval[A]Pad_1600x1600_um 4 0 -7620)\r
+ (pin Oval[A]Pad_1600x1600_um 11 7620 -12700)\r
+ (pin Oval[A]Pad_1600x1600_um 3 0 -5080)\r
+ (pin Oval[A]Pad_1600x1600_um 10 7620 -15240)\r
+ (pin Oval[A]Pad_1600x1600_um 2 0 -2540)\r
+ (pin Oval[A]Pad_1600x1600_um 9 7620 -17780)\r
+ (pin Rect[A]Pad_1600x1600_um 1 0 0)\r
+ )\r
+ (image "badheader:TSW-123-17-L-D"\r
+ (outline (path signal 152.4 28194 -1270 28119.6 -1449.61 27940 -1524 27760.4 -1449.61\r
+ 27686 -1270 27760.4 -1090.39 27940 -1016 28119.6 -1090.39\r
+ 28194 -1270))\r
+ (outline (path signal 152.4 28321 -3175 28248.2 -3398.95 28057.7 -3537.35 27822.3 -3537.35\r
+ 27631.8 -3398.95 27559 -3175 27631.8 -2951.05 27822.3 -2812.65\r
+ 28057.7 -2812.65 28248.2 -2951.05 28321 -3175))\r
+ (outline (path signal 152.4 28321 -3175 28248.2 -3398.95 28057.7 -3537.35 27822.3 -3537.35\r
+ 27631.8 -3398.95 27559 -3175 27631.8 -2951.05 27822.3 -2812.65\r
+ 28057.7 -2812.65 28248.2 -2951.05 28321 -3175))\r
+ (outline (path signal 152.4 29718 2743.2 29210 2743.2))\r
+ (outline (path signal 152.4 29718 -2717.8 29718 2743.2))\r
+ (outline (path signal 152.4 29210 -2717.8 29718 -2717.8))\r
+ (outline (path signal 152.4 29210 -2590.8 29210 -2717.8))\r
+ (outline (path signal 152.4 -29210 -2590.8 29210 -2590.8))\r
+ (outline (path signal 152.4 -29210 -2717.8 -29210 -2590.8))\r
+ (outline (path signal 152.4 -29718 -2717.8 -29210 -2717.8))\r
+ (outline (path signal 152.4 -29718 2743.2 -29718 -2717.8))\r
+ (outline (path signal 152.4 -29210 2743.2 -29718 2743.2))\r
+ (outline (path signal 152.4 -29210 2590.8 -29210 2743.2))\r
+ (outline (path signal 152.4 29210 2590.8 -29210 2590.8))\r
+ (outline (path signal 152.4 29210 2743.2 29210 2590.8))\r
+ (outline (path signal 152.4 -29464 2489.2 -29464 -2463.8))\r
+ (outline (path signal 152.4 29464 2489.2 -29464 2489.2))\r
+ (outline (path signal 152.4 29464 -2463.8 29464 2489.2))\r
+ (outline (path signal 152.4 -29464 -2463.8 29464 -2463.8))\r
+ (outline (path signal 152.4 -29591 2616.2 -29591 -2590.8))\r
+ (outline (path signal 152.4 29591 2616.2 -29591 2616.2))\r
+ (outline (path signal 152.4 29591 -2590.8 29591 2616.2))\r
+ (outline (path signal 152.4 -29591 -2590.8 29591 -2590.8))\r
+ (pin Round[A]Pad_1524_um (rotate 90) 46 -27940 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 45 -27940 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 44 -25400 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 43 -25400 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 42 -22860 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 41 -22860 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 40 -20320 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 39 -20320 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 38 -17780 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 37 -17780 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 36 -15240 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 35 -15240 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 34 -12700 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 33 -12700 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 32 -10160 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 31 -10160 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 30 -7620 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 29 -7620 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 28 -5080 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 27 -5080 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 26 -2540 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 25 -2540 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 24 0 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 23 0 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 22 2540 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 21 2540 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 20 5080 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 19 5080 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 18 7620 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 17 7620 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 16 10160 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 15 10160 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 14 12700 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 13 12700 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 12 15240 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 11 15240 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 10 17780 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 9 17780 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 8 20320 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 7 20320 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 6 22860 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 5 22860 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 4 25400 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 3 25400 -1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 2 27940 1270)\r
+ (pin Round[A]Pad_1524_um (rotate 90) 1 27940 -1270)\r
+ )\r
+ (image cd4026bpw:CD4026BPW\r
+ (outline (path signal 152.4 -2501.9 -2706.8 -3911.6 -2706.8))\r
+ (outline (path signal 152.4 -2501.9 -2806.7 -2501.9 -2706.8))\r
+ (outline (path signal 152.4 2501.9 -2806.7 -2501.9 -2806.7))\r
+ (outline (path signal 152.4 2501.9 -2706.8 2501.9 -2806.7))\r
+ (outline (path signal 152.4 3911.6 -2706.8 2501.9 -2706.8))\r
+ (outline (path signal 152.4 3911.6 2706.8 3911.6 -2706.8))\r
+ (outline (path signal 152.4 2501.9 2706.8 3911.6 2706.8))\r
+ (outline (path signal 152.4 2501.9 2806.7 2501.9 2706.8))\r
+ (outline (path signal 152.4 -2501.9 2806.7 2501.9 2806.7))\r
+ (outline (path signal 152.4 -2501.9 2706.8 -2501.9 2806.7))\r
+ (outline (path signal 152.4 -3911.6 2706.8 -2501.9 2706.8))\r
+ (outline (path signal 152.4 -3911.6 -2706.8 -3911.6 2706.8))\r
+ (outline (path signal 152.4 3911.6 -1434.5 4165.6 -1434.5))\r
+ (outline (path signal 152.4 3911.6 -1815.5 3911.6 -1434.5))\r
+ (outline (path signal 152.4 4165.6 -1815.5 3911.6 -1815.5))\r
+ (outline (path signal 152.4 4165.6 -1434.5 4165.6 -1815.5))\r
+ (outline (path signal 152.4 -2247.9 2552.7 -2247.9 -2552.7))\r
+ (outline (path signal 152.4 2247.9 2552.7 -2247.9 2552.7))\r
+ (outline (path signal 152.4 2247.9 -2552.7 2247.9 2552.7))\r
+ (outline (path signal 152.4 -2247.9 -2552.7 2247.9 -2552.7))\r
+ (outline (path signal 152.4 1737.82 2679.7 -1737.82 2679.7))\r
+ (outline (path signal 152.4 -1737.82 -2679.7 1737.82 -2679.7))\r
+ (outline (path signal 152.4 3302 2427.4 2247.9 2427.4))\r
+ (outline (path signal 152.4 3302 2122.6 3302 2427.4))\r
+ (outline (path signal 152.4 2247.9 2122.6 3302 2122.6))\r
+ (outline (path signal 152.4 2247.9 2427.4 2247.9 2122.6))\r
+ (outline (path signal 152.4 3302 1777.4 2247.9 1777.4))\r
+ (outline (path signal 152.4 3302 1472.6 3302 1777.4))\r
+ (outline (path signal 152.4 2247.9 1472.6 3302 1472.6))\r
+ (outline (path signal 152.4 2247.9 1777.4 2247.9 1472.6))\r
+ (outline (path signal 152.4 3302 1127.4 2247.9 1127.4))\r
+ (outline (path signal 152.4 3302 822.599 3302 1127.4))\r
+ (outline (path signal 152.4 2247.9 822.599 3302 822.599))\r
+ (outline (path signal 152.4 2247.9 1127.4 2247.9 822.599))\r
+ (outline (path signal 152.4 3302 477.399 2247.9 477.399))\r
+ (outline (path signal 152.4 3302 172.599 3302 477.399))\r
+ (outline (path signal 152.4 2247.9 172.599 3302 172.599))\r
+ (outline (path signal 152.4 2247.9 477.399 2247.9 172.599))\r
+ (outline (path signal 152.4 3302 -172.601 2247.9 -172.601))\r
+ (outline (path signal 152.4 3302 -477.401 3302 -172.601))\r
+ (outline (path signal 152.4 2247.9 -477.401 3302 -477.401))\r
+ (outline (path signal 152.4 2247.9 -172.601 2247.9 -477.401))\r
+ (outline (path signal 152.4 3302 -822.601 2247.9 -822.601))\r
+ (outline (path signal 152.4 3302 -1127.4 3302 -822.601))\r
+ (outline (path signal 152.4 2247.9 -1127.4 3302 -1127.4))\r
+ (outline (path signal 152.4 2247.9 -822.601 2247.9 -1127.4))\r
+ (outline (path signal 152.4 3302 -1472.6 2247.9 -1472.6))\r
+ (outline (path signal 152.4 3302 -1777.4 3302 -1472.6))\r
+ (outline (path signal 152.4 2247.9 -1777.4 3302 -1777.4))\r
+ (outline (path signal 152.4 2247.9 -1472.6 2247.9 -1777.4))\r
+ (outline (path signal 152.4 3302 -2122.6 2247.9 -2122.6))\r
+ (outline (path signal 152.4 3302 -2427.4 3302 -2122.6))\r
+ (outline (path signal 152.4 2247.9 -2427.4 3302 -2427.4))\r
+ (outline (path signal 152.4 2247.9 -2122.6 2247.9 -2427.4))\r
+ (outline (path signal 152.4 -3302 -2427.4 -2247.9 -2427.4))\r
+ (outline (path signal 152.4 -3302 -2122.6 -3302 -2427.4))\r
+ (outline (path signal 152.4 -2247.9 -2122.6 -3302 -2122.6))\r
+ (outline (path signal 152.4 -2247.9 -2427.4 -2247.9 -2122.6))\r
+ (outline (path signal 152.4 -3302 -1777.4 -2247.9 -1777.4))\r
+ (outline (path signal 152.4 -3302 -1472.6 -3302 -1777.4))\r
+ (outline (path signal 152.4 -2247.9 -1472.6 -3302 -1472.6))\r
+ (outline (path signal 152.4 -2247.9 -1777.4 -2247.9 -1472.6))\r
+ (outline (path signal 152.4 -3302 -1127.4 -2247.9 -1127.4))\r
+ (outline (path signal 152.4 -3302 -822.599 -3302 -1127.4))\r
+ (outline (path signal 152.4 -2247.9 -822.599 -3302 -822.599))\r
+ (outline (path signal 152.4 -2247.9 -1127.4 -2247.9 -822.599))\r
+ (outline (path signal 152.4 -3302 -477.399 -2247.9 -477.399))\r
+ (outline (path signal 152.4 -3302 -172.599 -3302 -477.399))\r
+ (outline (path signal 152.4 -2247.9 -172.599 -3302 -172.599))\r
+ (outline (path signal 152.4 -2247.9 -477.399 -2247.9 -172.599))\r
+ (outline (path signal 152.4 -3302 172.601 -2247.9 172.601))\r
+ (outline (path signal 152.4 -3302 477.401 -3302 172.601))\r
+ (outline (path signal 152.4 -2247.9 477.401 -3302 477.401))\r
+ (outline (path signal 152.4 -2247.9 172.601 -2247.9 477.401))\r
+ (outline (path signal 152.4 -3302 822.601 -2247.9 822.601))\r
+ (outline (path signal 152.4 -3302 1127.4 -3302 822.601))\r
+ (outline (path signal 152.4 -2247.9 1127.4 -3302 1127.4))\r
+ (outline (path signal 152.4 -2247.9 822.601 -2247.9 1127.4))\r
+ (outline (path signal 152.4 -3302 1472.6 -2247.9 1472.6))\r
+ (outline (path signal 152.4 -3302 1777.4 -3302 1472.6))\r
+ (outline (path signal 152.4 -2247.9 1777.4 -3302 1777.4))\r
+ (outline (path signal 152.4 -2247.9 1472.6 -2247.9 1777.4))\r
+ (outline (path signal 152.4 -3302 2122.6 -2247.9 2122.6))\r
+ (outline (path signal 152.4 -3302 2427.4 -3302 2122.6))\r
+ (outline (path signal 152.4 -2247.9 2427.4 -3302 2427.4))\r
+ (outline (path signal 152.4 -2247.9 2122.6 -2247.9 2427.4))\r
+ (pin Rect[T]Pad_1676.4x355.6_um 16 2819.4 2275)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 15 2819.4 1625)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 14 2819.4 974.999)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 13 2819.4 324.998)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 12 2819.4 -325.001)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 11 2819.4 -974.999)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 10 2819.4 -1625)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 9 2819.4 -2275)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 8 -2819.4 -2275)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 7 -2819.4 -1625)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 6 -2819.4 -974.999)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 5 -2819.4 -324.998)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 4 -2819.4 325.001)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 3 -2819.4 974.999)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 2 -2819.4 1625)\r
+ (pin Rect[T]Pad_1676.4x355.6_um 1 -2819.4 2275)\r
+ )\r
+ (image "power_term:796683-2"\r
+ (outline (path signal 152.4 381 1905 308.235 1681.05 117.735 1542.65 -117.735 1542.65\r
+ -308.235 1681.05 -381 1905 -308.235 2128.95 -117.735 2267.35\r
+ 117.735 2267.35 308.235 2128.95 381 1905))\r
+ (outline (path signal 152.4 -2884.8 0 -2957.57 -223.946 -3148.07 -362.353 -3383.53 -362.353\r
+ -3574.03 -223.946 -3646.8 0 -3574.03 223.946 -3383.53 362.353\r
+ -3148.07 362.353 -2957.57 223.946 -2884.8 0))\r
+ (outline (path signal 152.4 -2884.8 0 -2957.57 -223.946 -3148.07 -362.353 -3383.53 -362.353\r
+ -3574.03 -223.946 -3646.8 0 -3574.03 223.946 -3383.53 362.353\r
+ -3148.07 362.353 -2957.57 223.946 -2884.8 0))\r
+ (outline (path signal 152.4 7757.8 4749.8 -2757.8 4749.8))\r
+ (outline (path signal 152.4 7757.8 -4749.8 7757.8 4749.8))\r
+ (outline (path signal 152.4 -2757.8 -4749.8 7757.8 -4749.8))\r
+ (outline (path signal 152.4 -2757.8 4749.8 -2757.8 -4749.8))\r
+ (outline (path signal 152.4 -2503.8 4495.8 -2503.8 -4495.8))\r
+ (outline (path signal 152.4 7503.8 4495.8 -2503.8 4495.8))\r
+ (outline (path signal 152.4 7503.8 -4495.8 7503.8 4495.8))\r
+ (outline (path signal 152.4 -2503.8 -4495.8 7503.8 -4495.8))\r
+ (outline (path signal 152.4 -2630.8 4622.8 -2630.8 -4622.8))\r
+ (outline (path signal 152.4 7630.8 4622.8 -2630.8 4622.8))\r
+ (outline (path signal 152.4 7630.8 -4622.8 7630.8 4622.8))\r
+ (outline (path signal 152.4 -2630.8 -4622.8 7630.8 -4622.8))\r
+ (pin Round[A]Pad_2032_um 2 5000 0)\r
+ (pin Round[A]Pad_2032_um 1 0 0)\r
+ )\r
+ (image sn74lvch16t245dlr:SN74LVCH16T245DLR\r
+ (outline (path signal 152.4 -4051.3 -7759.7 -5943.6 -7759.7))\r
+ (outline (path signal 152.4 -4051.3 -8255 -4051.3 -7759.7))\r
+ (outline (path signal 152.4 4051.3 -8255 -4051.3 -8255))\r
+ (outline (path signal 152.4 4051.3 -7759.7 4051.3 -8255))\r
+ (outline (path signal 152.4 5943.6 -7759.7 4051.3 -7759.7))\r
+ (outline (path signal 152.4 5943.6 7759.7 5943.6 -7759.7))\r
+ (outline (path signal 152.4 4051.3 7759.7 5943.6 7759.7))\r
+ (outline (path signal 152.4 4051.3 8255 4051.3 7759.7))\r
+ (outline (path signal 152.4 -4051.3 8255 4051.3 8255))\r
+ (outline (path signal 152.4 -4051.3 7759.7 -4051.3 8255))\r
+ (outline (path signal 152.4 -5943.6 7759.7 -4051.3 7759.7))\r
+ (outline (path signal 152.4 -5943.6 -7759.7 -5943.6 7759.7))\r
+ (outline (path signal 152.4 5943.6 2413 6197.6 2413))\r
+ (outline (path signal 152.4 5943.6 2032 5943.6 2413))\r
+ (outline (path signal 152.4 6197.6 2032 5943.6 2032))\r
+ (outline (path signal 152.4 6197.6 2413 6197.6 2032))\r
+ (outline (path signal 152.4 5943.6 -3937 6197.6 -3937))\r
+ (outline (path signal 152.4 5943.6 -4318 5943.6 -3937))\r
+ (outline (path signal 152.4 6197.6 -4318 5943.6 -4318))\r
+ (outline (path signal 152.4 6197.6 -3937 6197.6 -4318))\r
+ (outline (path signal 152.4 -5943.6 -4572 -6197.6 -4572))\r
+ (outline (path signal 152.4 -5943.6 -4953 -5943.6 -4572))\r
+ (outline (path signal 152.4 -6197.6 -4953 -5943.6 -4953))\r
+ (outline (path signal 152.4 -6197.6 -4572 -6197.6 -4953))\r
+ (outline (path signal 152.4 -5943.6 1778 -6197.6 1778))\r
+ (outline (path signal 152.4 -5943.6 1397 -5943.6 1778))\r
+ (outline (path signal 152.4 -6197.6 1397 -5943.6 1397))\r
+ (outline (path signal 152.4 -6197.6 1778 -6197.6 1397))\r
+ (outline (path signal 152.4 3924.3 7838.44 3924.3 8128))\r
+ (outline (path signal 152.4 -3924.3 -7838.44 -3924.3 -8128))\r
+ (outline (path signal 152.4 -3797.3 8001 -3797.3 -8001))\r
+ (outline (path signal 152.4 3797.3 8001 -3797.3 8001))\r
+ (outline (path signal 152.4 3797.3 -8001 3797.3 8001))\r
+ (outline (path signal 152.4 -3797.3 -8001 3797.3 -8001))\r
+ (outline (path signal 152.4 -3924.3 8128 -3924.3 7838.44))\r
+ (outline (path signal 152.4 3924.3 8128 -3924.3 8128))\r
+ (outline (path signal 152.4 3924.3 -8128 3924.3 -7838.44))\r
+ (outline (path signal 152.4 -3924.3 -8128 3924.3 -8128))\r
+ (outline (path signal 152.4 5334 7480.3 3797.3 7480.3))\r
+ (outline (path signal 152.4 5334 7124.7 5334 7480.3))\r
+ (outline (path signal 152.4 3797.3 7124.7 5334 7124.7))\r
+ (outline (path signal 152.4 3797.3 7480.3 3797.3 7124.7))\r
+ (outline (path signal 152.4 5334 6845.3 3797.3 6845.3))\r
+ (outline (path signal 152.4 5334 6489.7 5334 6845.3))\r
+ (outline (path signal 152.4 3797.3 6489.7 5334 6489.7))\r
+ (outline (path signal 152.4 3797.3 6845.3 3797.3 6489.7))\r
+ (outline (path signal 152.4 5334 6210.3 3797.3 6210.3))\r
+ (outline (path signal 152.4 5334 5854.7 5334 6210.3))\r
+ (outline (path signal 152.4 3797.3 5854.7 5334 5854.7))\r
+ (outline (path signal 152.4 3797.3 6210.3 3797.3 5854.7))\r
+ (outline (path signal 152.4 5334 5575.3 3797.3 5575.3))\r
+ (outline (path signal 152.4 5334 5219.7 5334 5575.3))\r
+ (outline (path signal 152.4 3797.3 5219.7 5334 5219.7))\r
+ (outline (path signal 152.4 3797.3 5575.3 3797.3 5219.7))\r
+ (outline (path signal 152.4 5334 4940.3 3797.3 4940.3))\r
+ (outline (path signal 152.4 5334 4584.7 5334 4940.3))\r
+ (outline (path signal 152.4 3797.3 4584.7 5334 4584.7))\r
+ (outline (path signal 152.4 3797.3 4940.3 3797.3 4584.7))\r
+ (outline (path signal 152.4 5334 4305.3 3797.3 4305.3))\r
+ (outline (path signal 152.4 5334 3949.7 5334 4305.3))\r
+ (outline (path signal 152.4 3797.3 3949.7 5334 3949.7))\r
+ (outline (path signal 152.4 3797.3 4305.3 3797.3 3949.7))\r
+ (outline (path signal 152.4 5334 3670.3 3797.3 3670.3))\r
+ (outline (path signal 152.4 5334 3314.7 5334 3670.3))\r
+ (outline (path signal 152.4 3797.3 3314.7 5334 3314.7))\r
+ (outline (path signal 152.4 3797.3 3670.3 3797.3 3314.7))\r
+ (outline (path signal 152.4 5334 3035.3 3797.3 3035.3))\r
+ (outline (path signal 152.4 5334 2679.7 5334 3035.3))\r
+ (outline (path signal 152.4 3797.3 2679.7 5334 2679.7))\r
+ (outline (path signal 152.4 3797.3 3035.3 3797.3 2679.7))\r
+ (outline (path signal 152.4 5334 2400.3 3797.3 2400.3))\r
+ (outline (path signal 152.4 5334 2044.7 5334 2400.3))\r
+ (outline (path signal 152.4 3797.3 2044.7 5334 2044.7))\r
+ (outline (path signal 152.4 3797.3 2400.3 3797.3 2044.7))\r
+ (outline (path signal 152.4 5334 1765.3 3797.3 1765.3))\r
+ (outline (path signal 152.4 5334 1409.7 5334 1765.3))\r
+ (outline (path signal 152.4 3797.3 1409.7 5334 1409.7))\r
+ (outline (path signal 152.4 3797.3 1765.3 3797.3 1409.7))\r
+ (outline (path signal 152.4 5334 1130.3 3797.3 1130.3))\r
+ (outline (path signal 152.4 5334 774.7 5334 1130.3))\r
+ (outline (path signal 152.4 3797.3 774.7 5334 774.7))\r
+ (outline (path signal 152.4 3797.3 1130.3 3797.3 774.7))\r
+ (outline (path signal 152.4 5334 495.3 3797.3 495.3))\r
+ (outline (path signal 152.4 5334 139.7 5334 495.3))\r
+ (outline (path signal 152.4 3797.3 139.7 5334 139.7))\r
+ (outline (path signal 152.4 3797.3 495.3 3797.3 139.7))\r
+ (outline (path signal 152.4 5334 -139.7 3797.3 -139.7))\r
+ (outline (path signal 152.4 5334 -495.3 5334 -139.7))\r
+ (outline (path signal 152.4 3797.3 -495.3 5334 -495.3))\r
+ (outline (path signal 152.4 3797.3 -139.7 3797.3 -495.3))\r
+ (outline (path signal 152.4 5334 -774.7 3797.3 -774.7))\r
+ (outline (path signal 152.4 5334 -1130.3 5334 -774.7))\r
+ (outline (path signal 152.4 3797.3 -1130.3 5334 -1130.3))\r
+ (outline (path signal 152.4 3797.3 -774.7 3797.3 -1130.3))\r
+ (outline (path signal 152.4 5334 -1409.7 3797.3 -1409.7))\r
+ (outline (path signal 152.4 5334 -1765.3 5334 -1409.7))\r
+ (outline (path signal 152.4 3797.3 -1765.3 5334 -1765.3))\r
+ (outline (path signal 152.4 3797.3 -1409.7 3797.3 -1765.3))\r
+ (outline (path signal 152.4 5334 -2044.7 3797.3 -2044.7))\r
+ (outline (path signal 152.4 5334 -2400.3 5334 -2044.7))\r
+ (outline (path signal 152.4 3797.3 -2400.3 5334 -2400.3))\r
+ (outline (path signal 152.4 3797.3 -2044.7 3797.3 -2400.3))\r
+ (outline (path signal 152.4 5334 -2679.7 3797.3 -2679.7))\r
+ (outline (path signal 152.4 5334 -3035.3 5334 -2679.7))\r
+ (outline (path signal 152.4 3797.3 -3035.3 5334 -3035.3))\r
+ (outline (path signal 152.4 3797.3 -2679.7 3797.3 -3035.3))\r
+ (outline (path signal 152.4 5334 -3314.7 3797.3 -3314.7))\r
+ (outline (path signal 152.4 5334 -3670.3 5334 -3314.7))\r
+ (outline (path signal 152.4 3797.3 -3670.3 5334 -3670.3))\r
+ (outline (path signal 152.4 3797.3 -3314.7 3797.3 -3670.3))\r
+ (outline (path signal 152.4 5334 -3949.7 3797.3 -3949.7))\r
+ (outline (path signal 152.4 5334 -4305.3 5334 -3949.7))\r
+ (outline (path signal 152.4 3797.3 -4305.3 5334 -4305.3))\r
+ (outline (path signal 152.4 3797.3 -3949.7 3797.3 -4305.3))\r
+ (outline (path signal 152.4 5334 -4584.7 3797.3 -4584.7))\r
+ (outline (path signal 152.4 5334 -4940.3 5334 -4584.7))\r
+ (outline (path signal 152.4 3797.3 -4940.3 5334 -4940.3))\r
+ (outline (path signal 152.4 3797.3 -4584.7 3797.3 -4940.3))\r
+ (outline (path signal 152.4 5334 -5219.7 3797.3 -5219.7))\r
+ (outline (path signal 152.4 5334 -5575.3 5334 -5219.7))\r
+ (outline (path signal 152.4 3797.3 -5575.3 5334 -5575.3))\r
+ (outline (path signal 152.4 3797.3 -5219.7 3797.3 -5575.3))\r
+ (outline (path signal 152.4 5334 -5854.7 3797.3 -5854.7))\r
+ (outline (path signal 152.4 5334 -6210.3 5334 -5854.7))\r
+ (outline (path signal 152.4 3797.3 -6210.3 5334 -6210.3))\r
+ (outline (path signal 152.4 3797.3 -5854.7 3797.3 -6210.3))\r
+ (outline (path signal 152.4 5334 -6489.7 3797.3 -6489.7))\r
+ (outline (path signal 152.4 5334 -6845.3 5334 -6489.7))\r
+ (outline (path signal 152.4 3797.3 -6845.3 5334 -6845.3))\r
+ (outline (path signal 152.4 3797.3 -6489.7 3797.3 -6845.3))\r
+ (outline (path signal 152.4 5334 -7124.7 3797.3 -7124.7))\r
+ (outline (path signal 152.4 5334 -7480.3 5334 -7124.7))\r
+ (outline (path signal 152.4 3797.3 -7480.3 5334 -7480.3))\r
+ (outline (path signal 152.4 3797.3 -7124.7 3797.3 -7480.3))\r
+ (outline (path signal 152.4 -5334 -7480.3 -3797.3 -7480.3))\r
+ (outline (path signal 152.4 -5334 -7124.7 -5334 -7480.3))\r
+ (outline (path signal 152.4 -3797.3 -7124.7 -5334 -7124.7))\r
+ (outline (path signal 152.4 -3797.3 -7480.3 -3797.3 -7124.7))\r
+ (outline (path signal 152.4 -5334 -6845.3 -3797.3 -6845.3))\r
+ (outline (path signal 152.4 -5334 -6489.7 -5334 -6845.3))\r
+ (outline (path signal 152.4 -3797.3 -6489.7 -5334 -6489.7))\r
+ (outline (path signal 152.4 -3797.3 -6845.3 -3797.3 -6489.7))\r
+ (outline (path signal 152.4 -5334 -6210.3 -3797.3 -6210.3))\r
+ (outline (path signal 152.4 -5334 -5854.7 -5334 -6210.3))\r
+ (outline (path signal 152.4 -3797.3 -5854.7 -5334 -5854.7))\r
+ (outline (path signal 152.4 -3797.3 -6210.3 -3797.3 -5854.7))\r
+ (outline (path signal 152.4 -5334 -5575.3 -3797.3 -5575.3))\r
+ (outline (path signal 152.4 -5334 -5219.7 -5334 -5575.3))\r
+ (outline (path signal 152.4 -3797.3 -5219.7 -5334 -5219.7))\r
+ (outline (path signal 152.4 -3797.3 -5575.3 -3797.3 -5219.7))\r
+ (outline (path signal 152.4 -5334 -4940.3 -3797.3 -4940.3))\r
+ (outline (path signal 152.4 -5334 -4584.7 -5334 -4940.3))\r
+ (outline (path signal 152.4 -3797.3 -4584.7 -5334 -4584.7))\r
+ (outline (path signal 152.4 -3797.3 -4940.3 -3797.3 -4584.7))\r
+ (outline (path signal 152.4 -5334 -4305.3 -3797.3 -4305.3))\r
+ (outline (path signal 152.4 -5334 -3949.7 -5334 -4305.3))\r
+ (outline (path signal 152.4 -3797.3 -3949.7 -5334 -3949.7))\r
+ (outline (path signal 152.4 -3797.3 -4305.3 -3797.3 -3949.7))\r
+ (outline (path signal 152.4 -5334 -3670.3 -3797.3 -3670.3))\r
+ (outline (path signal 152.4 -5334 -3314.7 -5334 -3670.3))\r
+ (outline (path signal 152.4 -3797.3 -3314.7 -5334 -3314.7))\r
+ (outline (path signal 152.4 -3797.3 -3670.3 -3797.3 -3314.7))\r
+ (outline (path signal 152.4 -5334 -3035.3 -3797.3 -3035.3))\r
+ (outline (path signal 152.4 -5334 -2679.7 -5334 -3035.3))\r
+ (outline (path signal 152.4 -3797.3 -2679.7 -5334 -2679.7))\r
+ (outline (path signal 152.4 -3797.3 -3035.3 -3797.3 -2679.7))\r
+ (outline (path signal 152.4 -5334 -2400.3 -3797.3 -2400.3))\r
+ (outline (path signal 152.4 -5334 -2044.7 -5334 -2400.3))\r
+ (outline (path signal 152.4 -3797.3 -2044.7 -5334 -2044.7))\r
+ (outline (path signal 152.4 -3797.3 -2400.3 -3797.3 -2044.7))\r
+ (outline (path signal 152.4 -5334 -1765.3 -3797.3 -1765.3))\r
+ (outline (path signal 152.4 -5334 -1409.7 -5334 -1765.3))\r
+ (outline (path signal 152.4 -3797.3 -1409.7 -5334 -1409.7))\r
+ (outline (path signal 152.4 -3797.3 -1765.3 -3797.3 -1409.7))\r
+ (outline (path signal 152.4 -5334 -1130.3 -3797.3 -1130.3))\r
+ (outline (path signal 152.4 -5334 -774.7 -5334 -1130.3))\r
+ (outline (path signal 152.4 -3797.3 -774.7 -5334 -774.7))\r
+ (outline (path signal 152.4 -3797.3 -1130.3 -3797.3 -774.7))\r
+ (outline (path signal 152.4 -5334 -495.3 -3797.3 -495.3))\r
+ (outline (path signal 152.4 -5334 -139.7 -5334 -495.3))\r
+ (outline (path signal 152.4 -3797.3 -139.7 -5334 -139.7))\r
+ (outline (path signal 152.4 -3797.3 -495.3 -3797.3 -139.7))\r
+ (outline (path signal 152.4 -5334 139.7 -3797.3 139.7))\r
+ (outline (path signal 152.4 -5334 495.3 -5334 139.7))\r
+ (outline (path signal 152.4 -3797.3 495.3 -5334 495.3))\r
+ (outline (path signal 152.4 -3797.3 139.7 -3797.3 495.3))\r
+ (outline (path signal 152.4 -5334 774.7 -3797.3 774.7))\r
+ (outline (path signal 152.4 -5334 1130.3 -5334 774.7))\r
+ (outline (path signal 152.4 -3797.3 1130.3 -5334 1130.3))\r
+ (outline (path signal 152.4 -3797.3 774.7 -3797.3 1130.3))\r
+ (outline (path signal 152.4 -5334 1409.7 -3797.3 1409.7))\r
+ (outline (path signal 152.4 -5334 1765.3 -5334 1409.7))\r
+ (outline (path signal 152.4 -3797.3 1765.3 -5334 1765.3))\r
+ (outline (path signal 152.4 -3797.3 1409.7 -3797.3 1765.3))\r
+ (outline (path signal 152.4 -5334 2044.7 -3797.3 2044.7))\r
+ (outline (path signal 152.4 -5334 2400.3 -5334 2044.7))\r
+ (outline (path signal 152.4 -3797.3 2400.3 -5334 2400.3))\r
+ (outline (path signal 152.4 -3797.3 2044.7 -3797.3 2400.3))\r
+ (outline (path signal 152.4 -5334 2679.7 -3797.3 2679.7))\r
+ (outline (path signal 152.4 -5334 3035.3 -5334 2679.7))\r
+ (outline (path signal 152.4 -3797.3 3035.3 -5334 3035.3))\r
+ (outline (path signal 152.4 -3797.3 2679.7 -3797.3 3035.3))\r
+ (outline (path signal 152.4 -5334 3314.7 -3797.3 3314.7))\r
+ (outline (path signal 152.4 -5334 3670.3 -5334 3314.7))\r
+ (outline (path signal 152.4 -3797.3 3670.3 -5334 3670.3))\r
+ (outline (path signal 152.4 -3797.3 3314.7 -3797.3 3670.3))\r
+ (outline (path signal 152.4 -5334 3949.7 -3797.3 3949.7))\r
+ (outline (path signal 152.4 -5334 4305.3 -5334 3949.7))\r
+ (outline (path signal 152.4 -3797.3 4305.3 -5334 4305.3))\r
+ (outline (path signal 152.4 -3797.3 3949.7 -3797.3 4305.3))\r
+ (outline (path signal 152.4 -5334 4584.7 -3797.3 4584.7))\r
+ (outline (path signal 152.4 -5334 4940.3 -5334 4584.7))\r
+ (outline (path signal 152.4 -3797.3 4940.3 -5334 4940.3))\r
+ (outline (path signal 152.4 -3797.3 4584.7 -3797.3 4940.3))\r
+ (outline (path signal 152.4 -5334 5219.7 -3797.3 5219.7))\r
+ (outline (path signal 152.4 -5334 5575.3 -5334 5219.7))\r
+ (outline (path signal 152.4 -3797.3 5575.3 -5334 5575.3))\r
+ (outline (path signal 152.4 -3797.3 5219.7 -3797.3 5575.3))\r
+ (outline (path signal 152.4 -5334 5854.7 -3797.3 5854.7))\r
+ (outline (path signal 152.4 -5334 6210.3 -5334 5854.7))\r
+ (outline (path signal 152.4 -3797.3 6210.3 -5334 6210.3))\r
+ (outline (path signal 152.4 -3797.3 5854.7 -3797.3 6210.3))\r
+ (outline (path signal 152.4 -5334 6489.7 -3797.3 6489.7))\r
+ (outline (path signal 152.4 -5334 6845.3 -5334 6489.7))\r
+ (outline (path signal 152.4 -3797.3 6845.3 -5334 6845.3))\r
+ (outline (path signal 152.4 -3797.3 6489.7 -3797.3 6845.3))\r
+ (outline (path signal 152.4 -5334 7124.7 -3797.3 7124.7))\r
+ (outline (path signal 152.4 -5334 7480.3 -5334 7124.7))\r
+ (outline (path signal 152.4 -3797.3 7480.3 -5334 7480.3))\r
+ (outline (path signal 152.4 -3797.3 7124.7 -3797.3 7480.3))\r
+ (pin Rect[T]Pad_2044.7x406.4_um 48 4667.25 7302.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 47 4667.25 6667.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 46 4667.25 6032.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 45 4667.25 5397.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 44 4667.25 4762.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 43 4667.25 4127.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 42 4667.25 3492.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 41 4667.25 2857.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 40 4667.25 2222.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 39 4667.25 1587.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 38 4667.25 952.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 37 4667.25 317.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 36 4667.25 -317.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 35 4667.25 -952.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 34 4667.25 -1587.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 33 4667.25 -2222.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 32 4667.25 -2857.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 31 4667.25 -3492.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 30 4667.25 -4127.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 29 4667.25 -4762.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 28 4667.25 -5397.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 27 4667.25 -6032.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 26 4667.25 -6667.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 25 4667.25 -7302.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 24 -4667.25 -7302.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 23 -4667.25 -6667.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 22 -4667.25 -6032.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 21 -4667.25 -5397.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 20 -4667.25 -4762.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 19 -4667.25 -4127.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 18 -4667.25 -3492.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 17 -4667.25 -2857.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 16 -4667.25 -2222.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 15 -4667.25 -1587.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 14 -4667.25 -952.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 13 -4667.25 -317.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 12 -4667.25 317.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 11 -4667.25 952.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 10 -4667.25 1587.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 9 -4667.25 2222.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 8 -4667.25 2857.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 7 -4667.25 3492.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 6 -4667.25 4127.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 5 -4667.25 4762.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 4 -4667.25 5397.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 3 -4667.25 6032.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 2 -4667.25 6667.5)\r
+ (pin Rect[T]Pad_2044.7x406.4_um 1 -4667.25 7302.5)\r
+ )\r
+ (padstack Round[A]Pad_1524_um\r
+ (shape (circle F.Cu 1524))\r
+ (shape (circle B.Cu 1524))\r
+ (attach off)\r
+ )\r
+ (padstack Round[A]Pad_1600_um\r
+ (shape (circle F.Cu 1600))\r
+ (shape (circle B.Cu 1600))\r
+ (attach off)\r
+ )\r
+ (padstack Round[A]Pad_2032_um\r
+ (shape (circle F.Cu 2032))\r
+ (shape (circle B.Cu 2032))\r
+ (attach off)\r
+ )\r
+ (padstack Oval[A]Pad_2216x1108_um\r
+ (shape (path F.Cu 1108 -554 0 554 0))\r
+ (shape (path B.Cu 1108 -554 0 554 0))\r
+ (attach off)\r
+ )\r
+ (padstack Oval[A]Pad_1600x1600_um\r
+ (shape (path F.Cu 1600 0 0 0 0))\r
+ (shape (path B.Cu 1600 0 0 0 0))\r
+ (attach off)\r
+ )\r
+ (padstack RoundRect[T]Pad_1425x2650_250.951_um\r
+ (shape (polygon F.Cu 0 506.077 1322.14 548.33 1310.82 587.975 1292.33 623.808 1267.24\r
+ 654.74 1236.31 679.83 1200.48 698.317 1160.83 709.638 1118.58\r
+ 713.451 1075 713.451 -1075 709.638 -1118.58 698.317 -1160.83\r
+ 679.83 -1200.47 654.74 -1236.31 623.808 -1267.24 587.976 -1292.33\r
+ 548.33 -1310.82 506.077 -1322.14 462.5 -1325.95 -462.5 -1325.95\r
+ -506.077 -1322.14 -548.33 -1310.82 -587.975 -1292.33 -623.808 -1267.24\r
+ -654.74 -1236.31 -679.83 -1200.48 -698.317 -1160.83 -709.638 -1118.58\r
+ -713.451 -1075 -713.451 1075 -709.638 1118.58 -698.317 1160.83\r
+ -679.83 1200.47 -654.74 1236.31 -623.808 1267.24 -587.976 1292.33\r
+ -548.33 1310.82 -506.077 1322.14 -462.5 1325.95 462.5 1325.95\r
+ 506.077 1322.14))\r
+ (attach off)\r
+ )\r
+ (padstack Rect[T]Pad_2044.7x406.4_um\r
+ (shape (rect F.Cu -1022.35 -203.2 1022.35 203.2))\r
+ (attach off)\r
+ )\r
+ (padstack Rect[A]Pad_1600x1600_um\r
+ (shape (rect F.Cu -800 -800 800 800))\r
+ (shape (rect B.Cu -800 -800 800 800))\r
+ (attach off)\r
+ )\r
+ (padstack Rect[T]Pad_1676.4x355.6_um\r
+ (shape (rect F.Cu -838.2 -177.8 838.2 177.8))\r
+ (attach off)\r
+ )\r
+ (padstack "Via[0-1]_800:400_um"\r
+ (shape (circle F.Cu 800))\r
+ (shape (circle B.Cu 800))\r
+ (attach off)\r
+ )\r
+ )\r
+ (network\r
+ (net 5V_SUP\r
+ (pins C15-2 C14-2 C13-2 C12-2 C11-2 C10-2 C9-2 C8-2 C6-1 C5-1 C1-1 U2-16 J3-6\r
+ J3-5 U3-16 U3-3 U4-16 U4-3 U5-16 U5-3 U6-16 U6-3 U7-16 U7-3 U8-16 U8-3 U9-16\r
+ U9-3 J2-2 U1-24 U1-18 U1-7 U1-1)\r
+ )\r
+ (net /SEGSET1_IN_A0\r
+ (pins U2-6 U1-2)\r
+ )\r
+ (net /SEGSET1_IN_A1\r
+ (pins U2-1 U1-3)\r
+ )\r
+ (net GND\r
+ (pins DSP1-1 DSP1-5 DSP1-8 DSP2-1 DSP2-5 DSP2-8 DSP3-1 DSP3-5 DSP3-8 DSP4-1\r
+ DSP4-5 DSP4-8 DSP5-1 DSP5-5 DSP5-8 DSP6-1 DSP6-5 DSP6-8 DSP7-1 DSP7-5 DSP7-8\r
+ C15-1 C14-1 C13-1 C12-1 C11-1 C10-1 C9-1 C8-1 C7-1 C6-2 C5-2 C4-1 C3-2 C2-2\r
+ C1-2 U2-8 U2-5 U2-4 J1-2 J1-1 J3-46 J3-45 J3-44 J3-43 J3-2 J3-1 U3-8 U3-2\r
+ U4-8 U4-2 U5-8 U5-2 U6-8 U6-2 U7-8 U7-2 U8-8 U8-2 U9-8 U9-2 J2-1 U1-48 U1-45\r
+ U1-39 U1-34 U1-28 U1-25 U1-21 U1-15 U1-10 U1-4)\r
+ )\r
+ (net /SEGSET1_IN_A2\r
+ (pins U2-2 U1-5)\r
+ )\r
+ (net /SEGSET1_IN_A3\r
+ (pins U2-3 U1-6)\r
+ )\r
+ (net "Net-(U1-Pad8)"\r
+ (pins U1-8)\r
+ )\r
+ (net "Net-(U1-Pad9)"\r
+ (pins U1-9)\r
+ )\r
+ (net "Net-(U1-Pad11)"\r
+ (pins U1-11)\r
+ )\r
+ (net "Net-(U1-Pad12)"\r
+ (pins U1-12)\r
+ )\r
+ (net "Net-(U1-Pad13)"\r
+ (pins U1-13)\r
+ )\r
+ (net "Net-(U1-Pad14)"\r
+ (pins U1-14)\r
+ )\r
+ (net "Net-(U1-Pad16)"\r
+ (pins U1-16)\r
+ )\r
+ (net "Net-(U1-Pad17)"\r
+ (pins U1-17)\r
+ )\r
+ (net "Net-(U1-Pad19)"\r
+ (pins U1-19)\r
+ )\r
+ (net "Net-(U1-Pad20)"\r
+ (pins U1-20)\r
+ )\r
+ (net "Net-(U1-Pad22)"\r
+ (pins U1-22)\r
+ )\r
+ (net "Net-(U1-Pad23)"\r
+ (pins U1-23)\r
+ )\r
+ (net "Net-(U1-Pad26)"\r
+ (pins U1-26)\r
+ )\r
+ (net "Net-(U1-Pad27)"\r
+ (pins U1-27)\r
+ )\r
+ (net "Net-(U1-Pad29)"\r
+ (pins U1-29)\r
+ )\r
+ (net "Net-(U1-Pad30)"\r
+ (pins U1-30)\r
+ )\r
+ (net 3.3_OUT\r
+ (pins C7-2 C4-2 C2-1 J3-4 J3-3 U1-42 U1-31)\r
+ )\r
+ (net "Net-(U1-Pad32)"\r
+ (pins U1-32)\r
+ )\r
+ (net "Net-(U1-Pad33)"\r
+ (pins U1-33)\r
+ )\r
+ (net "Net-(U1-Pad35)"\r
+ (pins U1-35)\r
+ )\r
+ (net "Net-(U1-Pad36)"\r
+ (pins U1-36)\r
+ )\r
+ (net "Net-(U1-Pad37)"\r
+ (pins U1-37)\r
+ )\r
+ (net "Net-(U1-Pad38)"\r
+ (pins U1-38)\r
+ )\r
+ (net "Net-(U1-Pad40)"\r
+ (pins U1-40)\r
+ )\r
+ (net "Net-(U1-Pad41)"\r
+ (pins U1-41)\r
+ )\r
+ (net /SEGSET1_I_3\r
+ (pins J3-14 U1-43)\r
+ )\r
+ (net /SEGSET1_I_2\r
+ (pins J3-13 U1-44)\r
+ )\r
+ (net /SEGSET1_I_1\r
+ (pins J3-12 U1-46)\r
+ )\r
+ (net /SEGSET1_I_0\r
+ (pins J3-11 U1-47)\r
+ )\r
+ (net "/Seg Logic/SEGCLK_7"\r
+ (pins U2-7 U9-1)\r
+ )\r
+ (net "Net-(U9-Pad4)"\r
+ (pins U9-4)\r
+ )\r
+ (net "Net-(U9-Pad5)"\r
+ (pins U9-5)\r
+ )\r
+ (net "/Seg Logic/SS7_6"\r
+ (pins DSP7-9 U9-6)\r
+ )\r
+ (net "/Seg Logic/SS7_7"\r
+ (pins DSP7-10 U9-7)\r
+ )\r
+ (net "/Seg Logic/SS7_4"\r
+ (pins DSP7-3 U9-9)\r
+ )\r
+ (net "/Seg Logic/SS7_1"\r
+ (pins DSP7-7 U9-10)\r
+ )\r
+ (net "/Seg Logic/SS7_5"\r
+ (pins DSP7-2 U9-11)\r
+ )\r
+ (net "/Seg Logic/SS7_2"\r
+ (pins DSP7-6 U9-12)\r
+ )\r
+ (net "/Seg Logic/SS7_3"\r
+ (pins DSP7-4 U9-13)\r
+ )\r
+ (net "Net-(U9-Pad14)"\r
+ (pins U9-14)\r
+ )\r
+ (net "/Seg Logic/CD_RST"\r
+ (pins U2-15 U3-15 U4-15 U5-15 U6-15 U7-15 U8-15 U9-15)\r
+ )\r
+ (net "Net-(U8-Pad14)"\r
+ (pins U8-14)\r
+ )\r
+ (net "/Seg Logic/SS6_3"\r
+ (pins DSP6-4 U8-13)\r
+ )\r
+ (net "/Seg Logic/SS6_2"\r
+ (pins DSP6-6 U8-12)\r
+ )\r
+ (net "/Seg Logic/SS6_5"\r
+ (pins DSP6-2 U8-11)\r
+ )\r
+ (net "/Seg Logic/SS6_1"\r
+ (pins DSP6-7 U8-10)\r
+ )\r
+ (net "/Seg Logic/SS6_4"\r
+ (pins DSP6-3 U8-9)\r
+ )\r
+ (net "/Seg Logic/SS6_7"\r
+ (pins DSP6-10 U8-7)\r
+ )\r
+ (net "/Seg Logic/SS6_6"\r
+ (pins DSP6-9 U8-6)\r
+ )\r
+ (net "Net-(U8-Pad5)"\r
+ (pins U8-5)\r
+ )\r
+ (net "Net-(U8-Pad4)"\r
+ (pins U8-4)\r
+ )\r
+ (net "/Seg Logic/SEGCLK_6"\r
+ (pins U2-9 U8-1)\r
+ )\r
+ (net "/Seg Logic/SEGCLK_5"\r
+ (pins U2-10 U7-1)\r
+ )\r
+ (net "Net-(U7-Pad4)"\r
+ (pins U7-4)\r
+ )\r
+ (net "Net-(U7-Pad5)"\r
+ (pins U7-5)\r
+ )\r
+ (net "/Seg Logic/SS5_6"\r
+ (pins DSP5-9 U7-6)\r
+ )\r
+ (net "/Seg Logic/SS5_7"\r
+ (pins DSP5-10 U7-7)\r
+ )\r
+ (net "/Seg Logic/SS5_4"\r
+ (pins DSP5-3 U7-9)\r
+ )\r
+ (net "/Seg Logic/SS5_1"\r
+ (pins DSP5-7 U7-10)\r
+ )\r
+ (net "/Seg Logic/SS5_5"\r
+ (pins DSP5-2 U7-11)\r
+ )\r
+ (net "/Seg Logic/SS5_2"\r
+ (pins DSP5-6 U7-12)\r
+ )\r
+ (net "/Seg Logic/SS5_3"\r
+ (pins DSP5-4 U7-13)\r
+ )\r
+ (net "Net-(U7-Pad14)"\r
+ (pins U7-14)\r
+ )\r
+ (net "Net-(U6-Pad14)"\r
+ (pins U6-14)\r
+ )\r
+ (net "/Seg Logic/SS4_3"\r
+ (pins DSP4-4 U6-13)\r
+ )\r
+ (net "/Seg Logic/SS4_2"\r
+ (pins DSP4-6 U6-12)\r
+ )\r
+ (net "/Seg Logic/SS4_5"\r
+ (pins DSP4-2 U6-11)\r
+ )\r
+ (net "/Seg Logic/SS4_1"\r
+ (pins DSP4-7 U6-10)\r
+ )\r
+ (net "/Seg Logic/SS4_4"\r
+ (pins DSP4-3 U6-9)\r
+ )\r
+ (net "/Seg Logic/SS4_7"\r
+ (pins DSP4-10 U6-7)\r
+ )\r
+ (net "/Seg Logic/SS4_6"\r
+ (pins DSP4-9 U6-6)\r
+ )\r
+ (net "Net-(U6-Pad5)"\r
+ (pins U6-5)\r
+ )\r
+ (net "Net-(U6-Pad4)"\r
+ (pins U6-4)\r
+ )\r
+ (net "/Seg Logic/SEGCLK_4"\r
+ (pins U2-11 U6-1)\r
+ )\r
+ (net "/Seg Logic/SEGCLK_3"\r
+ (pins U2-12 U5-1)\r
+ )\r
+ (net "Net-(U5-Pad4)"\r
+ (pins U5-4)\r
+ )\r
+ (net "Net-(U5-Pad5)"\r
+ (pins U5-5)\r
+ )\r
+ (net "/Seg Logic/SS3_6"\r
+ (pins DSP3-9 U5-6)\r
+ )\r
+ (net "/Seg Logic/SS3_7"\r
+ (pins DSP3-10 U5-7)\r
+ )\r
+ (net "/Seg Logic/SS3_4"\r
+ (pins DSP3-3 U5-9)\r
+ )\r
+ (net "/Seg Logic/SS3_1"\r
+ (pins DSP3-7 U5-10)\r
+ )\r
+ (net "/Seg Logic/SS3_5"\r
+ (pins DSP3-2 U5-11)\r
+ )\r
+ (net "/Seg Logic/SS3_2"\r
+ (pins DSP3-6 U5-12)\r
+ )\r
+ (net "/Seg Logic/SS3_3"\r
+ (pins DSP3-4 U5-13)\r
+ )\r
+ (net "Net-(U5-Pad14)"\r
+ (pins U5-14)\r
+ )\r
+ (net "Net-(U4-Pad14)"\r
+ (pins U4-14)\r
+ )\r
+ (net "/Seg Logic/SS2_3"\r
+ (pins DSP2-4 U4-13)\r
+ )\r
+ (net "/Seg Logic/SS2_2"\r
+ (pins DSP2-6 U4-12)\r
+ )\r
+ (net "/Seg Logic/SS2_5"\r
+ (pins DSP2-2 U4-11)\r
+ )\r
+ (net "/Seg Logic/SS2_1"\r
+ (pins DSP2-7 U4-10)\r
+ )\r
+ (net "/Seg Logic/SS2_4"\r
+ (pins DSP2-3 U4-9)\r
+ )\r
+ (net "/Seg Logic/SS2_7"\r
+ (pins DSP2-10 U4-7)\r
+ )\r
+ (net "/Seg Logic/SS2_6"\r
+ (pins DSP2-9 U4-6)\r
+ )\r
+ (net "Net-(U4-Pad5)"\r
+ (pins U4-5)\r
+ )\r
+ (net "Net-(U4-Pad4)"\r
+ (pins U4-4)\r
+ )\r
+ (net "/Seg Logic/SEGCLK_2"\r
+ (pins U2-13 U4-1)\r
+ )\r
+ (net "/Seg Logic/SEGCLK_1"\r
+ (pins U2-14 U3-1)\r
+ )\r
+ (net "Net-(U3-Pad4)"\r
+ (pins U3-4)\r
+ )\r
+ (net "Net-(U3-Pad5)"\r
+ (pins U3-5)\r
+ )\r
+ (net "/Seg Logic/SS1_6"\r
+ (pins DSP1-9 U3-6)\r
+ )\r
+ (net "/Seg Logic/SS1_7"\r
+ (pins DSP1-10 U3-7)\r
+ )\r
+ (net "/Seg Logic/SS1_4"\r
+ (pins DSP1-3 U3-9)\r
+ )\r
+ (net "/Seg Logic/SS1_1"\r
+ (pins DSP1-7 U3-10)\r
+ )\r
+ (net "/Seg Logic/SS1_5"\r
+ (pins DSP1-2 U3-11)\r
+ )\r
+ (net "/Seg Logic/SS1_2"\r
+ (pins DSP1-6 U3-12)\r
+ )\r
+ (net "/Seg Logic/SS1_3"\r
+ (pins DSP1-4 U3-13)\r
+ )\r
+ (net "Net-(U3-Pad14)"\r
+ (pins U3-14)\r
+ )\r
+ (net 5V_OUT\r
+ (pins C3-1 J3-8 J3-7)\r
+ )\r
+ (net PWR_BTN\r
+ (pins J3-9)\r
+ )\r
+ (net SYS_RESET\r
+ (pins J3-10)\r
+ )\r
+ (net "Net-(J3-Pad15)"\r
+ (pins J3-15)\r
+ )\r
+ (net "Net-(J3-Pad16)"\r
+ (pins J3-16)\r
+ )\r
+ (net "Net-(J3-Pad17)"\r
+ (pins J3-17)\r
+ )\r
+ (net "Net-(J3-Pad18)"\r
+ (pins J3-18)\r
+ )\r
+ (net "Net-(J3-Pad19)"\r
+ (pins J3-19)\r
+ )\r
+ (net "Net-(J3-Pad20)"\r
+ (pins J3-20)\r
+ )\r
+ (net "Net-(J3-Pad21)"\r
+ (pins J3-21)\r
+ )\r
+ (net "Net-(J3-Pad22)"\r
+ (pins J3-22)\r
+ )\r
+ (net "Net-(J3-Pad23)"\r
+ (pins J3-23)\r
+ )\r
+ (net "Net-(J3-Pad24)"\r
+ (pins J3-24)\r
+ )\r
+ (net "Net-(J3-Pad25)"\r
+ (pins J3-25)\r
+ )\r
+ (net "Net-(J3-Pad26)"\r
+ (pins J3-26)\r
+ )\r
+ (net "Net-(J3-Pad27)"\r
+ (pins J3-27)\r
+ )\r
+ (net "Net-(J3-Pad28)"\r
+ (pins J3-28)\r
+ )\r
+ (net "Net-(J3-Pad29)"\r
+ (pins J3-29)\r
+ )\r
+ (net "Net-(J3-Pad30)"\r
+ (pins J3-30)\r
+ )\r
+ (net "Net-(J3-Pad31)"\r
+ (pins J3-31)\r
+ )\r
+ (net "Net-(J3-Pad32)"\r
+ (pins J3-32)\r
+ )\r
+ (net "Net-(J3-Pad33)"\r
+ (pins J3-33)\r
+ )\r
+ (net "Net-(J3-Pad34)"\r
+ (pins J3-34)\r
+ )\r
+ (net "Net-(J3-Pad35)"\r
+ (pins J3-35)\r
+ )\r
+ (net "Net-(J3-Pad36)"\r
+ (pins J3-36)\r
+ )\r
+ (net "Net-(J3-Pad37)"\r
+ (pins J3-37)\r
+ )\r
+ (net "Net-(J3-Pad38)"\r
+ (pins J3-38)\r
+ )\r
+ (net "Net-(J3-Pad39)"\r
+ (pins J3-39)\r
+ )\r
+ (net "Net-(J3-Pad40)"\r
+ (pins J3-40)\r
+ )\r
+ (net "Net-(J3-Pad41)"\r
+ (pins J3-41)\r
+ )\r
+ (net "Net-(J3-Pad42)"\r
+ (pins J3-42)\r
+ )\r
+ (net "Net-(J1-Pad46)"\r
+ (pins J1-46)\r
+ )\r
+ (net "Net-(J1-Pad45)"\r
+ (pins J1-45)\r
+ )\r
+ (net "Net-(J1-Pad44)"\r
+ (pins J1-44)\r
+ )\r
+ (net "Net-(J1-Pad43)"\r
+ (pins J1-43)\r
+ )\r
+ (net "Net-(J1-Pad42)"\r
+ (pins J1-42)\r
+ )\r
+ (net "Net-(J1-Pad41)"\r
+ (pins J1-41)\r
+ )\r
+ (net "Net-(J1-Pad40)"\r
+ (pins J1-40)\r
+ )\r
+ (net "Net-(J1-Pad39)"\r
+ (pins J1-39)\r
+ )\r
+ (net "Net-(J1-Pad38)"\r
+ (pins J1-38)\r
+ )\r
+ (net "Net-(J1-Pad37)"\r
+ (pins J1-37)\r
+ )\r
+ (net "Net-(J1-Pad36)"\r
+ (pins J1-36)\r
+ )\r
+ (net "Net-(J1-Pad35)"\r
+ (pins J1-35)\r
+ )\r
+ (net "Net-(J1-Pad34)"\r
+ (pins J1-34)\r
+ )\r
+ (net "Net-(J1-Pad33)"\r
+ (pins J1-33)\r
+ )\r
+ (net "Net-(J1-Pad32)"\r
+ (pins J1-32)\r
+ )\r
+ (net "Net-(J1-Pad31)"\r
+ (pins J1-31)\r
+ )\r
+ (net "Net-(J1-Pad30)"\r
+ (pins J1-30)\r
+ )\r
+ (net "Net-(J1-Pad29)"\r
+ (pins J1-29)\r
+ )\r
+ (net "Net-(J1-Pad28)"\r
+ (pins J1-28)\r
+ )\r
+ (net "Net-(J1-Pad27)"\r
+ (pins J1-27)\r
+ )\r
+ (net "Net-(J1-Pad26)"\r
+ (pins J1-26)\r
+ )\r
+ (net "Net-(J1-Pad25)"\r
+ (pins J1-25)\r
+ )\r
+ (net "Net-(J1-Pad24)"\r
+ (pins J1-24)\r
+ )\r
+ (net "Net-(J1-Pad23)"\r
+ (pins J1-23)\r
+ )\r
+ (net "Net-(J1-Pad22)"\r
+ (pins J1-22)\r
+ )\r
+ (net "Net-(J1-Pad21)"\r
+ (pins J1-21)\r
+ )\r
+ (net "Net-(J1-Pad20)"\r
+ (pins J1-20)\r
+ )\r
+ (net "Net-(J1-Pad19)"\r
+ (pins J1-19)\r
+ )\r
+ (net "Net-(J1-Pad18)"\r
+ (pins J1-18)\r
+ )\r
+ (net "Net-(J1-Pad17)"\r
+ (pins J1-17)\r
+ )\r
+ (net "Net-(J1-Pad16)"\r
+ (pins J1-16)\r
+ )\r
+ (net "Net-(J1-Pad15)"\r
+ (pins J1-15)\r
+ )\r
+ (net "Net-(J1-Pad14)"\r
+ (pins J1-14)\r
+ )\r
+ (net "Net-(J1-Pad13)"\r
+ (pins J1-13)\r
+ )\r
+ (net "Net-(J1-Pad12)"\r
+ (pins J1-12)\r
+ )\r
+ (net "Net-(J1-Pad11)"\r
+ (pins J1-11)\r
+ )\r
+ (net "Net-(J1-Pad10)"\r
+ (pins J1-10)\r
+ )\r
+ (net "Net-(J1-Pad9)"\r
+ (pins J1-9)\r
+ )\r
+ (net "Net-(J1-Pad8)"\r
+ (pins J1-8)\r
+ )\r
+ (net "Net-(J1-Pad7)"\r
+ (pins J1-7)\r
+ )\r
+ (net "Net-(J1-Pad6)"\r
+ (pins J1-6)\r
+ )\r
+ (net "Net-(J1-Pad5)"\r
+ (pins J1-5)\r
+ )\r
+ (net "Net-(J1-Pad4)"\r
+ (pins J1-4)\r
+ )\r
+ (net "Net-(J1-Pad3)"\r
+ (pins J1-3)\r
+ )\r
+ (class kicad_default "" /SEGSET1_IN_A0 /SEGSET1_IN_A1 /SEGSET1_IN_A2 /SEGSET1_IN_A3\r
+ /SEGSET1_I_0 /SEGSET1_I_1 /SEGSET1_I_2 /SEGSET1_I_3 "/Seg Logic/CD_RST"\r
+ "/Seg Logic/SEGCLK_1" "/Seg Logic/SEGCLK_2" "/Seg Logic/SEGCLK_3" "/Seg Logic/SEGCLK_4"\r
+ "/Seg Logic/SEGCLK_5" "/Seg Logic/SEGCLK_6" "/Seg Logic/SEGCLK_7" "/Seg Logic/SS1_1"\r
+ "/Seg Logic/SS1_2" "/Seg Logic/SS1_3" "/Seg Logic/SS1_4" "/Seg Logic/SS1_5"\r
+ "/Seg Logic/SS1_6" "/Seg Logic/SS1_7" "/Seg Logic/SS2_1" "/Seg Logic/SS2_2"\r
+ "/Seg Logic/SS2_3" "/Seg Logic/SS2_4" "/Seg Logic/SS2_5" "/Seg Logic/SS2_6"\r
+ "/Seg Logic/SS2_7" "/Seg Logic/SS3_1" "/Seg Logic/SS3_2" "/Seg Logic/SS3_3"\r
+ "/Seg Logic/SS3_4" "/Seg Logic/SS3_5" "/Seg Logic/SS3_6" "/Seg Logic/SS3_7"\r
+ "/Seg Logic/SS4_1" "/Seg Logic/SS4_2" "/Seg Logic/SS4_3" "/Seg Logic/SS4_4"\r
+ "/Seg Logic/SS4_5" "/Seg Logic/SS4_6" "/Seg Logic/SS4_7" "/Seg Logic/SS5_1"\r
+ "/Seg Logic/SS5_2" "/Seg Logic/SS5_3" "/Seg Logic/SS5_4" "/Seg Logic/SS5_5"\r
+ "/Seg Logic/SS5_6" "/Seg Logic/SS5_7" "/Seg Logic/SS6_1" "/Seg Logic/SS6_2"\r
+ "/Seg Logic/SS6_3" "/Seg Logic/SS6_4" "/Seg Logic/SS6_5" "/Seg Logic/SS6_6"\r
+ "/Seg Logic/SS6_7" "/Seg Logic/SS7_1" "/Seg Logic/SS7_2" "/Seg Logic/SS7_3"\r
+ "/Seg Logic/SS7_4" "/Seg Logic/SS7_5" "/Seg Logic/SS7_6" "/Seg Logic/SS7_7"\r
+ 3.3_OUT 5V_OUT 5V_SUP GND "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)"\r
+ "Net-(J1-Pad13)" "Net-(J1-Pad14)" "Net-(J1-Pad15)" "Net-(J1-Pad16)"\r
+ "Net-(J1-Pad17)" "Net-(J1-Pad18)" "Net-(J1-Pad19)" "Net-(J1-Pad20)"\r
+ "Net-(J1-Pad21)" "Net-(J1-Pad22)" "Net-(J1-Pad23)" "Net-(J1-Pad24)"\r
+ "Net-(J1-Pad25)" "Net-(J1-Pad26)" "Net-(J1-Pad27)" "Net-(J1-Pad28)"\r
+ "Net-(J1-Pad29)" "Net-(J1-Pad3)" "Net-(J1-Pad30)" "Net-(J1-Pad31)" "Net-(J1-Pad32)"\r
+ "Net-(J1-Pad33)" "Net-(J1-Pad34)" "Net-(J1-Pad35)" "Net-(J1-Pad36)"\r
+ "Net-(J1-Pad37)" "Net-(J1-Pad38)" "Net-(J1-Pad39)" "Net-(J1-Pad4)" "Net-(J1-Pad40)"\r
+ "Net-(J1-Pad41)" "Net-(J1-Pad42)" "Net-(J1-Pad43)" "Net-(J1-Pad44)"\r
+ "Net-(J1-Pad45)" "Net-(J1-Pad46)" "Net-(J1-Pad5)" "Net-(J1-Pad6)" "Net-(J1-Pad7)"\r
+ "Net-(J1-Pad8)" "Net-(J1-Pad9)" "Net-(J3-Pad15)" "Net-(J3-Pad16)" "Net-(J3-Pad17)"\r
+ "Net-(J3-Pad18)" "Net-(J3-Pad19)" "Net-(J3-Pad20)" "Net-(J3-Pad21)"\r
+ "Net-(J3-Pad22)" "Net-(J3-Pad23)" "Net-(J3-Pad24)" "Net-(J3-Pad25)"\r
+ "Net-(J3-Pad26)" "Net-(J3-Pad27)" "Net-(J3-Pad28)" "Net-(J3-Pad29)"\r
+ "Net-(J3-Pad30)" "Net-(J3-Pad31)" "Net-(J3-Pad32)" "Net-(J3-Pad33)"\r
+ "Net-(J3-Pad34)" "Net-(J3-Pad35)" "Net-(J3-Pad36)" "Net-(J3-Pad37)"\r
+ "Net-(J3-Pad38)" "Net-(J3-Pad39)" "Net-(J3-Pad40)" "Net-(J3-Pad41)"\r
+ "Net-(J3-Pad42)" "Net-(U1-Pad11)" "Net-(U1-Pad12)" "Net-(U1-Pad13)"\r
+ "Net-(U1-Pad14)" "Net-(U1-Pad16)" "Net-(U1-Pad17)" "Net-(U1-Pad19)"\r
+ "Net-(U1-Pad20)" "Net-(U1-Pad22)" "Net-(U1-Pad23)" "Net-(U1-Pad26)"\r
+ "Net-(U1-Pad27)" "Net-(U1-Pad29)" "Net-(U1-Pad30)" "Net-(U1-Pad32)"\r
+ "Net-(U1-Pad33)" "Net-(U1-Pad35)" "Net-(U1-Pad36)" "Net-(U1-Pad37)"\r
+ "Net-(U1-Pad38)" "Net-(U1-Pad40)" "Net-(U1-Pad41)" "Net-(U1-Pad8)" "Net-(U1-Pad9)"\r
+ "Net-(U3-Pad14)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" "Net-(U4-Pad14)" "Net-(U4-Pad4)"\r
+ "Net-(U4-Pad5)" "Net-(U5-Pad14)" "Net-(U5-Pad4)" "Net-(U5-Pad5)" "Net-(U6-Pad14)"\r
+ "Net-(U6-Pad4)" "Net-(U6-Pad5)" "Net-(U7-Pad14)" "Net-(U7-Pad4)" "Net-(U7-Pad5)"\r
+ "Net-(U8-Pad14)" "Net-(U8-Pad4)" "Net-(U8-Pad5)" "Net-(U9-Pad14)" "Net-(U9-Pad4)"\r
+ "Net-(U9-Pad5)" PWR_BTN SYS_RESET\r
+ (circuit\r
+ (use_via Via[0-1]_800:400_um)\r
+ )\r
+ (rule\r
+ (width 250)\r
+ (clearance 200.1)\r
+ )\r
+ )\r
+ )\r
+ (wiring\r
+ )\r
+)\r
projects / bort-segs.git / commitdiff