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[esdi.git] / esdi.runs / synth_1 / esdi_ctl_phy.vds
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629d050f
IS		 1#-----------------------------------------------------------
2# Vivado v2019.1 (64-bit)
3# SW Build 2552052 on Fri May 24 14:49:42 MDT 2019
4# IP Build 2548770 on Fri May 24 18:01:18 MDT 2019
5# Start of session at: Tue Aug 13 10:38:50 2019
6# Process ID: 20424
7# Current directory: S:/vivado-projects/esdi/esdi/esdi.runs/synth_1
8# Command line: vivado.exe -log esdi_ctl_phy.vds -product Vivado -mode batch -messageDb vivado.pb -notrace -source esdi_ctl_phy.tcl
9# Log file: S:/vivado-projects/esdi/esdi/esdi.runs/synth_1/esdi_ctl_phy.vds
10# Journal file: S:/vivado-projects/esdi/esdi/esdi.runs/synth_1\vivado.jou
11#-----------------------------------------------------------
12source esdi_ctl_phy.tcl -notrace
13Command: synth_design -top esdi_ctl_phy -part xc7z007sclg225-1
14Starting synth_design
15Attempting to get a license for feature 'Synthesis' and/or device 'xc7z007s'
16INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7z007s'
17INFO: Launching helper process for spawning children vivado processes
18INFO: Helper process launched with PID 18332
19---------------------------------------------------------------------------------
20Starting Synthesize : Time (s): cpu = 00:00:03 ; elapsed = 00:00:03 . Memory (MB): peak = 600.180 ; gain = 179.551
21---------------------------------------------------------------------------------
22INFO: [Synth 8-6157] synthesizing module 'esdi_ctl_phy' [S:/vivado-projects/esdi/esdi/esdi.srcs/sources_1/new/esdi_phy_ctl.v:23]
23INFO: [Synth 8-6155] done synthesizing module 'esdi_ctl_phy' (1#1) [S:/vivado-projects/esdi/esdi/esdi.srcs/sources_1/new/esdi_phy_ctl.v:23]
24WARNING: [Synth 8-3330] design esdi_ctl_phy has an empty top module
25---------------------------------------------------------------------------------
26Finished Synthesize : Time (s): cpu = 00:00:04 ; elapsed = 00:00:04 . Memory (MB): peak = 663.480 ; gain = 242.852
27---------------------------------------------------------------------------------
28---------------------------------------------------------------------------------
29Finished Constraint Validation : Time (s): cpu = 00:00:04 ; elapsed = 00:00:04 . Memory (MB): peak = 663.480 ; gain = 242.852
30---------------------------------------------------------------------------------
31---------------------------------------------------------------------------------
32Start Loading Part and Timing Information
33---------------------------------------------------------------------------------
34Loading part: xc7z007sclg225-1
35---------------------------------------------------------------------------------
36Finished Loading Part and Timing Information : Time (s): cpu = 00:00:04 ; elapsed = 00:00:04 . Memory (MB): peak = 663.480 ; gain = 242.852
37---------------------------------------------------------------------------------
38INFO: [Device 21-403] Loading part xc7z007sclg225-1
39---------------------------------------------------------------------------------
40Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:04 ; elapsed = 00:00:05 . Memory (MB): peak = 663.480 ; gain = 242.852
41---------------------------------------------------------------------------------
42
43Report RTL Partitions:
44+-+--------------+------------+----------+
45| |RTL Partition |Replication |Instances |
46+-+--------------+------------+----------+
47+-+--------------+------------+----------+
48No constraint files found.
49---------------------------------------------------------------------------------
50Start RTL Component Statistics
51---------------------------------------------------------------------------------
52Detailed RTL Component Info :
53---------------------------------------------------------------------------------
54Finished RTL Component Statistics
55---------------------------------------------------------------------------------
56---------------------------------------------------------------------------------
57Start RTL Hierarchical Component Statistics
58---------------------------------------------------------------------------------
59Hierarchical RTL Component report
60---------------------------------------------------------------------------------
61Finished RTL Hierarchical Component Statistics
62---------------------------------------------------------------------------------
63---------------------------------------------------------------------------------
64Start Part Resource Summary
65---------------------------------------------------------------------------------
66Part Resources:
67DSPs: 66 (col length:40)
68BRAMs: 100 (col length: RAMB18 40 RAMB36 20)
69---------------------------------------------------------------------------------
70Finished Part Resource Summary
71---------------------------------------------------------------------------------
72No constraint files found.
73---------------------------------------------------------------------------------
74Start Cross Boundary and Area Optimization
75---------------------------------------------------------------------------------
76Warning: Parallel synthesis criteria is not met
77WARNING: [Synth 8-3330] design esdi_ctl_phy has an empty top module
78---------------------------------------------------------------------------------
79Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:08 ; elapsed = 00:00:09 . Memory (MB): peak = 794.840 ; gain = 374.211
80---------------------------------------------------------------------------------
81
82Report RTL Partitions:
83+-+--------------+------------+----------+
84| |RTL Partition |Replication |Instances |
85+-+--------------+------------+----------+
86+-+--------------+------------+----------+
87No constraint files found.
88---------------------------------------------------------------------------------
89Start Timing Optimization
90---------------------------------------------------------------------------------
91---------------------------------------------------------------------------------
92Finished Timing Optimization : Time (s): cpu = 00:00:08 ; elapsed = 00:00:09 . Memory (MB): peak = 794.840 ; gain = 374.211
93---------------------------------------------------------------------------------
94
95Report RTL Partitions:
96+-+--------------+------------+----------+
97| |RTL Partition |Replication |Instances |
98+-+--------------+------------+----------+
99+-+--------------+------------+----------+
100---------------------------------------------------------------------------------
101Start Technology Mapping
102---------------------------------------------------------------------------------
103---------------------------------------------------------------------------------
104Finished Technology Mapping : Time (s): cpu = 00:00:08 ; elapsed = 00:00:09 . Memory (MB): peak = 794.840 ; gain = 374.211
105---------------------------------------------------------------------------------
106
107Report RTL Partitions:
108+-+--------------+------------+----------+
109| |RTL Partition |Replication |Instances |
110+-+--------------+------------+----------+
111+-+--------------+------------+----------+
112---------------------------------------------------------------------------------
113Start IO Insertion
114---------------------------------------------------------------------------------
115---------------------------------------------------------------------------------
116Start Flattening Before IO Insertion
117---------------------------------------------------------------------------------
118---------------------------------------------------------------------------------
119Finished Flattening Before IO Insertion
120---------------------------------------------------------------------------------
121---------------------------------------------------------------------------------
122Start Final Netlist Cleanup
123---------------------------------------------------------------------------------
124---------------------------------------------------------------------------------
125Finished Final Netlist Cleanup
126---------------------------------------------------------------------------------
127---------------------------------------------------------------------------------
128Finished IO Insertion : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 794.840 ; gain = 374.211
129---------------------------------------------------------------------------------
130
131Report Check Netlist:
132+------+------------------+-------+---------+-------+------------------+
133| |Item |Errors |Warnings |Status |Description |
134+------+------------------+-------+---------+-------+------------------+
135|1 |multi_driven_nets | 0| 0|Passed |Multi driven nets |
136+------+------------------+-------+---------+-------+------------------+
137---------------------------------------------------------------------------------
138Start Renaming Generated Instances
139---------------------------------------------------------------------------------
140---------------------------------------------------------------------------------
141Finished Renaming Generated Instances : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 794.840 ; gain = 374.211
142---------------------------------------------------------------------------------
143
144Report RTL Partitions:
145+-+--------------+------------+----------+
146| |RTL Partition |Replication |Instances |
147+-+--------------+------------+----------+
148+-+--------------+------------+----------+
149---------------------------------------------------------------------------------
150Start Rebuilding User Hierarchy
151---------------------------------------------------------------------------------
152---------------------------------------------------------------------------------
153Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 794.840 ; gain = 374.211
154---------------------------------------------------------------------------------
155---------------------------------------------------------------------------------
156Start Renaming Generated Ports
157---------------------------------------------------------------------------------
158---------------------------------------------------------------------------------
159Finished Renaming Generated Ports : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 794.840 ; gain = 374.211
160---------------------------------------------------------------------------------
161---------------------------------------------------------------------------------
162Start Handling Custom Attributes
163---------------------------------------------------------------------------------
164---------------------------------------------------------------------------------
165Finished Handling Custom Attributes : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 794.840 ; gain = 374.211
166---------------------------------------------------------------------------------
167---------------------------------------------------------------------------------
168Start Renaming Generated Nets
169---------------------------------------------------------------------------------
170---------------------------------------------------------------------------------
171Finished Renaming Generated Nets : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 794.840 ; gain = 374.211
172---------------------------------------------------------------------------------
173---------------------------------------------------------------------------------
174Start Writing Synthesis Report
175---------------------------------------------------------------------------------
176
177Report BlackBoxes:
178+-+--------------+----------+
179| |BlackBox name |Instances |
180+-+--------------+----------+
181+-+--------------+----------+
182
183Report Cell Usage:
184+------+-------------+------+
185| |Cell |Count |
186+------+-------------+------+
187|1 |esdi_ctl_phy | 1|
188+------+-------------+------+
189
190Report Instance Areas:
191+------+---------+-------+------+
192| |Instance |Module |Cells |
193+------+---------+-------+------+
194|1 |top | | 0|
195+------+---------+-------+------+
196---------------------------------------------------------------------------------
197Finished Writing Synthesis Report : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 794.840 ; gain = 374.211
198---------------------------------------------------------------------------------
199Synthesis finished with 0 errors, 0 critical warnings and 2 warnings.
200Synthesis Optimization Runtime : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 794.840 ; gain = 374.211
201Synthesis Optimization Complete : Time (s): cpu = 00:00:10 ; elapsed = 00:00:11 . Memory (MB): peak = 794.840 ; gain = 374.211
202INFO: [Project 1-571] Translating synthesized netlist
203INFO: [Project 1-570] Preparing netlist for logic optimization
204INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
205Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 903.969 ; gain = 0.000
206INFO: [Project 1-111] Unisim Transformation Summary:
207No Unisim elements were transformed.
208
209INFO: [Common 17-83] Releasing license: Synthesis
2109 Infos, 2 Warnings, 0 Critical Warnings and 0 Errors encountered.
211synth_design completed successfully
212synth_design: Time (s): cpu = 00:00:14 ; elapsed = 00:00:16 . Memory (MB): peak = 903.969 ; gain = 507.191
213Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 903.969 ; gain = 0.000
214WARNING: [Constraints 18-5210] No constraints selected for write.
215Resolution: This message can indicate that there are no constraints for the design, or it can indicate that the used_in flags are set such that the constraints are ignored. This later case is used when running synth_design to not write synthesis constraints to the resulting checkpoint. Instead, project constraints are read when the synthesized design is opened.
216INFO: [Common 17-1381] The checkpoint 'S:/vivado-projects/esdi/esdi/esdi.runs/synth_1/esdi_ctl_phy.dcp' has been generated.
217INFO: [runtcl-4] Executing : report_utilization -file esdi_ctl_phy_utilization_synth.rpt -pb esdi_ctl_phy_utilization_synth.pb
218INFO: [Common 17-206] Exiting Vivado at Tue Aug 13 10:39:11 2019...
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