init

diff --git a/.pretty/DIP254P762X508-16.kicad_mod b/.pretty/DIP254P762X508-16.kicad_mod
new file mode 100644 (file)
index 0000000..1a88594
--- /dev/null
+++ b/.pretty/DIP254P762X508-16.kicad_mod
@@ -0,0 +1,100 @@
+(module DIP254P762X508-16 (layer F.Cu) (tedit 0)\r
+  (fp_text reference DIP254P762X508-16 (at -4.57835 -20.3229) (layer F.SilkS)\r
+    (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+  )\r
+  (fp_text value VAL** (at -4.32086 2.71959) (layer F.SilkS)\r
+    (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+  )\r
+  (fp_line (start -6.731 0.9652) (end -0.889 0.9652) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start -0.889 -18.7452) (end -3.5052 -18.7452) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start -3.5052 -18.7452) (end -4.1148 -18.7452) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start -4.1148 -18.7452) (end -6.2992 -18.7452) (layer F.SilkS) (width 0.1524))\r
+  (fp_arc (start -3.81 -18.7452) (end -4.1148 -18.7452) (angle -180) (layer F.SilkS) (width 0))\r
+  (fp_line (start -7.112 -17.2212) (end -7.112 -18.3388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -18.3388) (end -8.1788 -18.3388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -18.3388) (end -8.1788 -17.2212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -17.2212) (end -7.112 -17.2212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -14.6812) (end -7.112 -15.7988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -15.7988) (end -8.1788 -15.7988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -15.7988) (end -8.1788 -14.6812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -14.6812) (end -7.112 -14.6812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -12.1412) (end -7.112 -13.2588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -13.2588) (end -8.1788 -13.2588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -13.2588) (end -8.1788 -12.1412) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -12.1412) (end -7.112 -12.1412) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -9.6012) (end -7.112 -10.7188) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -10.7188) (end -8.1788 -10.7188) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -10.7188) (end -8.1788 -9.6012) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -9.6012) (end -7.112 -9.6012) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -7.0612) (end -7.112 -8.1788) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -8.1788) (end -8.1788 -8.1788) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -8.1788) (end -8.1788 -7.0612) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -7.0612) (end -7.112 -7.0612) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -4.5212) (end -7.112 -5.6388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -5.6388) (end -8.1788 -5.6388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -5.6388) (end -8.1788 -4.5212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -4.5212) (end -7.112 -4.5212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -1.9812) (end -7.112 -3.0988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -3.0988) (end -8.1788 -3.0988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -3.0988) (end -8.1788 -1.9812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -1.9812) (end -7.112 -1.9812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 0.5588) (end -7.112 -0.5588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -0.5588) (end -8.1788 -0.5588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -0.5588) (end -8.1788 0.5588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 0.5588) (end -7.112 0.5588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -0.5588) (end -0.508 0.5588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 0.5588) (end 0.5588 0.5588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 0.5588) (end 0.5588 -0.5588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -0.5588) (end -0.508 -0.5588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -3.0988) (end -0.508 -1.9812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -1.9812) (end 0.5588 -1.9812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -1.9812) (end 0.5588 -3.0988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -3.0988) (end -0.508 -3.0988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -5.6388) (end -0.508 -4.5212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -4.5212) (end 0.5588 -4.5212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -4.5212) (end 0.5588 -5.6388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -5.6388) (end -0.508 -5.6388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -8.1788) (end -0.508 -7.0612) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -7.0612) (end 0.5588 -7.0612) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -7.0612) (end 0.5588 -8.1788) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -8.1788) (end -0.508 -8.1788) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -10.7188) (end -0.508 -9.6012) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -9.6012) (end 0.5588 -9.6012) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -9.6012) (end 0.5588 -10.7188) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -10.7188) (end -0.508 -10.7188) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -13.2588) (end -0.508 -12.1412) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -12.1412) (end 0.5588 -12.1412) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -12.1412) (end 0.5588 -13.2588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -13.2588) (end -0.508 -13.2588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -15.7988) (end -0.508 -14.6812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -14.6812) (end 0.5588 -14.6812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -14.6812) (end 0.5588 -15.7988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -15.7988) (end -0.508 -15.7988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -18.3388) (end -0.508 -17.2212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -17.2212) (end 0.5588 -17.2212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -17.2212) (end 0.5588 -18.3388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start 0.5588 -18.3388) (end -0.508 -18.3388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 0.9652) (end -0.508 0.9652) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 0.9652) (end -0.508 -18.7452) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -0.508 -18.7452) (end -3.5052 -18.7452) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -3.5052 -18.7452) (end -4.1148 -18.7452) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -4.1148 -18.7452) (end -7.112 -18.7452) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -18.7452) (end -7.112 0.9652) (layer Dwgs.User) (width 0.1524))\r
+  (fp_arc (start -3.81 -18.7452) (end -4.1148 -18.7452) (angle -180) (layer Dwgs.User) (width 0))\r
+  (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 2 thru_hole circle (at -7.62 -15.24) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 3 thru_hole circle (at -7.62 -12.7) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 4 thru_hole circle (at -7.62 -10.16) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 5 thru_hole circle (at -7.62 -7.62) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 6 thru_hole circle (at -7.62 -5.08) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 7 thru_hole circle (at -7.62 -2.54) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 8 thru_hole circle (at -7.62 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 9 thru_hole circle (at 0 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 10 thru_hole circle (at 0 -2.54) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 11 thru_hole circle (at 0 -5.08) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 12 thru_hole circle (at 0 -7.62) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 13 thru_hole circle (at 0 -10.16) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 14 thru_hole circle (at 0 -12.7) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 15 thru_hole circle (at 0 -15.24) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+  (pad 16 thru_hole circle (at 0 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask))\r
+)\r

diff --git a/.pretty/NEW-640456-8.kicad_mod b/.pretty/NEW-640456-8.kicad_mod
new file mode 100644 (file)
index 0000000..5247e4d
--- /dev/null
+++ b/.pretty/NEW-640456-8.kicad_mod
@@ -0,0 +1,49 @@
+(module NEW-640456-8 (layer F.Cu) (tedit 5C265171)\r
+  (fp_text reference REF** (at 8.89 0) (layer F.SilkS)\r
+    (effects (font (size 1 1) (thickness 0.15)))\r
+  )\r
+  (fp_text value CONN8_640456-8 (at 8.89 0) (layer F.SilkS)\r
+    (effects (font (size 1 1) (thickness 0.15)))\r
+  )\r
+  (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0) (layer Cmts.User)\r
+    (effects (font (size 0.127 0.127) (thickness 0.002)))\r
+  )\r
+  (fp_text user * (at 0 0) (layer F.SilkS)\r
+    (effects (font (size 1 1) (thickness 0.15)))\r
+  )\r
+  (fp_text user * (at 0 0) (layer F.Fab)\r
+    (effects (font (size 1 1) (thickness 0.15)))\r
+  )\r
+  (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start 19.177 2.54) (end 19.177 -3.429) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start 19.177 -3.429) (end -1.397 -3.429) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start -1.397 -3.429) (end -1.397 2.54) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.Fab) (width 0.1524))\r
+  (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524))\r
+  (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524))\r
+  (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524))\r
+  (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524))\r
+  (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524))\r
+  (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524))\r
+  (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524))\r
+  (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524))\r
+  (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524))\r
+  (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524))\r
+  (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524))\r
+  (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524))\r
+  (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524))\r
+  (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524))\r
+  (pad 1 thru_hole circle (at 17.78 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))\r
+  (pad 2 thru_hole circle (at 15.24 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))\r
+  (pad 3 thru_hole circle (at 12.7 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))\r
+  (pad 4 thru_hole circle (at 10.16 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))\r
+  (pad 5 thru_hole circle (at 7.62 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))\r
+  (pad 6 thru_hole circle (at 5.08 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))\r
+  (pad 7 thru_hole circle (at 2.54 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))\r
+  (pad 8 thru_hole circle (at 0 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask))\r
+  (model ${KISYS3DMOD}/c-640456-8-aa-3d.stp\r
+    (offset (xyz 9 0.5 2.5))\r
+    (scale (xyz 1 1 1))\r
+    (rotate (xyz 0 0 0))\r
+  )\r
+)\r

diff --git a/166new.pretty/DIP254P762X508-16.kicad_mod b/166new.pretty/DIP254P762X508-16.kicad_mod
new file mode 100644 (file)
index 0000000..1a88594
--- /dev/null
+++ b/166new.pretty/DIP254P762X508-16.kicad_mod
@@ -0,0 +1,100 @@
+(module DIP254P762X508-16 (layer F.Cu) (tedit 0)\r
+  (fp_text reference DIP254P762X508-16 (at -4.57835 -20.3229) (layer F.SilkS)\r
+    (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+  )\r
+  (fp_text value VAL** (at -4.32086 2.71959) (layer F.SilkS)\r
+    (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+  )\r
+  (fp_line (start -6.731 0.9652) (end -0.889 0.9652) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start -0.889 -18.7452) (end -3.5052 -18.7452) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start -3.5052 -18.7452) (end -4.1148 -18.7452) (layer F.SilkS) (width 0.1524))\r
+  (fp_line (start -4.1148 -18.7452) (end -6.2992 -18.7452) (layer F.SilkS) (width 0.1524))\r
+  (fp_arc (start -3.81 -18.7452) (end -4.1148 -18.7452) (angle -180) (layer F.SilkS) (width 0))\r
+  (fp_line (start -7.112 -17.2212) (end -7.112 -18.3388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -18.3388) (end -8.1788 -18.3388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -18.3388) (end -8.1788 -17.2212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -17.2212) (end -7.112 -17.2212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -14.6812) (end -7.112 -15.7988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -15.7988) (end -8.1788 -15.7988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -15.7988) (end -8.1788 -14.6812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -14.6812) (end -7.112 -14.6812) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -12.1412) (end -7.112 -13.2588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -13.2588) (end -8.1788 -13.2588) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -13.2588) (end -8.1788 -12.1412) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -12.1412) (end -7.112 -12.1412) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -9.6012) (end -7.112 -10.7188) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -10.7188) (end -8.1788 -10.7188) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -10.7188) (end -8.1788 -9.6012) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -9.6012) (end -7.112 -9.6012) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -7.0612) (end -7.112 -8.1788) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -8.1788) (end -8.1788 -8.1788) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -8.1788) (end -8.1788 -7.0612) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -7.0612) (end -7.112 -7.0612) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -4.5212) (end -7.112 -5.6388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -5.6388) (end -8.1788 -5.6388) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -5.6388) (end -8.1788 -4.5212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -8.1788 -4.5212) (end -7.112 -4.5212) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -1.9812) (end -7.112 -3.0988) (layer Dwgs.User) (width 0.1524))\r
+  (fp_line (start -7.112 -3.0988) (end -8.1788 -3.0988) (layer Dwgs.User) (width 0.1524))\r
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diff --git a/4605x.stp b/4605x.stp
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diff --git a/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wings b/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wings
new file mode 100644 (file)
index 0000000..88ca061
Binary files /dev/null and b/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wings differ

diff --git a/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl b/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl
new file mode 100644 (file)
index 0000000..2cd537a
--- /dev/null
+++ b/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl
@@ -0,0 +1,21774 @@
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+          0.0 -1.0 0.0,
+          0.9805806756909203 0.0 -0.19611613513818338 ] }
+        normalIndex [
+          1, 5, 21, 17, -1,
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+          3, 47, 77, 89, -1,
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+          95, 125, 137, 107, -1,
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+          115, 118, 148, 145, -1,
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+          142, 146, 172, 169, -1,
+          143, 170, 179, 155, -1,
+          147, 150, 175, 173, -1,
+          151, 154, 178, 176, -1,
+          156, 159, 162, 165, -1,
+          168, 171, 174, 177, -1 ]
+      }
+    }
+  ]
+}
+

diff --git a/Socket_BeagleBone_Black.pretty/Socket_BeagleBone_Black.kicad_mod b/Socket_BeagleBone_Black.pretty/Socket_BeagleBone_Black.kicad_mod
new file mode 100644 (file)
index 0000000..fae230a
--- /dev/null
+++ b/Socket_BeagleBone_Black.pretty/Socket_BeagleBone_Black.kicad_mod
@@ -0,0 +1,73 @@
+(module Socket_BeagleBone_Black (layer F.Cu)
+  (descr "Through hole pin header")
+  (tags "pin header")
+  (fp_text reference REF** (at 0 -5.1) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Socket_BeagleBone_Black (at 0 -3.1) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -1.75 -1.75) (end -1.75 57.65) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 4.3 -1.75) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -1.75 57.65) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 3.81 57.15) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.27 57.15) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+  (fp_line (start 3.81 57.15) (end -1.27 57.15) (layer F.SilkS) (width 0.15))
+  (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
+  (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
+  (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+  (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
+  (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+  (model ${KIPRJMOD}/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl
+    (at (xyz 0.05 -1.1 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 90))
+  )
+)

diff --git a/_saved_bbb-bort.sch b/_saved_bbb-bort.sch
new file mode 100644 (file)
index 0000000..4f00ee6
--- /dev/null
+++ b/_saved_bbb-bort.sch
@@ -0,0 +1,1969 @@
+EESchema Schematic File Version 4\r
+LIBS:bbb-bort-cache\r
+EELAYER 26 0\r
+EELAYER END\r
+$Descr A4 11693 8268\r
+encoding utf-8\r
+Sheet 1 1\r
+Title "bort's brain"\r
+Date "2018-12-28"\r
+Rev "A1"\r
+Comp "kremlinware unlimited"\r
+Comment1 "i'm the one who press that button"\r
+Comment2 "sweaty palms get caught bluffin"\r
+Comment3 "fold a man into nothin, for nothin"\r
+Comment4 ""\r
+$EndDescr\r
+$Comp\r
+L power:GNDD #PWR01\r
+U 1 1 5589785A\r
+P 1200 3050\r
+F 0 "#PWR01" H 1200 2800 50  0001 C CNN\r
+F 1 "GNDD" H 1200 2900 50  0000 C CNN\r
+F 2 "" H 1200 3050 60  0000 C CNN\r
+F 3 "" H 1200 3050 60  0000 C CNN\r
+       1    1200 3050\r
+       1    0    0    -1  \r
+$EndComp\r
+Wire Wire Line\r
+       1450 2850 1500 2850\r
+Wire Wire Line\r
+       1500 2850 1500 2950\r
+Wire Wire Line\r
+       900  3050 900  2950\r
+Wire Wire Line\r
+       900  2850 950  2850\r
+Wire Wire Line\r
+       950  2950 900  2950\r
+Connection ~ 900  2950\r
+Wire Wire Line\r
+       1450 2950 1500 2950\r
+Connection ~ 1500 2950\r
+Connection ~ 1200 3050\r
+$Comp\r
+L power:+3.3V #PWR06\r
+U 1 1 55897A67\r
+P 1400 850\r
+F 0 "#PWR06" H 1400 700 50  0001 C CNN\r
+F 1 "+3V3" H 1400 990 50  0000 C CNN\r
+F 2 "" H 1400 850 60  0000 C CNN\r
+F 3 "" H 1400 850 60  0000 C CNN\r
+       1    1400 850 \r
+       0    1    1    0   \r
+$EndComp\r
+$Comp\r
+L power:+5V #PWR07\r
+U 1 1 55897A7F\r
+P 1550 950\r
+F 0 "#PWR07" H 1550 800 50  0001 C CNN\r
+F 1 "+5V" H 1550 1090 50  0000 C CNN\r
+F 2 "" H 1550 950 60  0000 C CNN\r
+F 3 "" H 1550 950 60  0000 C CNN\r
+       1    1550 950 \r
+       0    1    1    0   \r
+$EndComp\r
+Wire Wire Line\r
+       1450 850  1400 850 \r
+Wire Wire Line\r
+       1450 950  1550 950 \r
+Wire Wire Line\r
+       1750 1050 1450 1050\r
+$Comp\r
+L power:+3.3V #PWR08\r
+U 1 1 55897EE7\r
+P 800 850\r
+F 0 "#PWR08" H 800 700 50  0001 C CNN\r
+F 1 "+3V3" H 800 990 50  0000 C CNN\r
+F 2 "" H 800 850 60  0000 C CNN\r
+F 3 "" H 800 850 60  0000 C CNN\r
+       1    800  850 \r
+       0    -1   -1   0   \r
+$EndComp\r
+$Comp\r
+L power:+5V #PWR09\r
+U 1 1 55897EF8\r
+P 900 950\r
+F 0 "#PWR09" H 900 800 50  0001 C CNN\r
+F 1 "+5V" H 900 1090 50  0000 C CNN\r
+F 2 "" H 900 950 60  0000 C CNN\r
+F 3 "" H 900 950 60  0000 C CNN\r
+       1    900  950 \r
+       0    -1   -1   0   \r
+$EndComp\r
+Wire Wire Line\r
+       950  850  800  850 \r
+Wire Wire Line\r
+       950  950  900  950 \r
+$Comp\r
+L pwr_BeagleBone:SYS_5V #PWR010\r
+U 1 1 55898497\r
+P 1750 1050\r
+F 0 "#PWR010" H 1750 900 50  0001 C CNN\r
+F 1 "SYS_5V" H 1750 1190 50  0000 C CNN\r
+F 2 "" H 1750 1050 60  0000 C CNN\r
+F 3 "" H 1750 1050 60  0000 C CNN\r
+       1    1750 1050\r
+       0    1    1    0   \r
+$EndComp\r
+$Comp\r
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+       1    8300 5500\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0118\r
+U 1 1 5C80BF74\r
+P 10350 3500\r
+F 0 "#PWR0118" H 10350 3250 50  0001 C CNN\r
+F 1 "GND" H 10400 3300 50  0000 C CNN\r
+F 2 "" H 10350 3500 50  0001 C CNN\r
+F 3 "" H 10350 3500 50  0001 C CNN\r
+       1    10350 3500\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0119\r
+U 1 1 5C80C019\r
+P 8150 1750\r
+F 0 "#PWR0119" H 8150 1500 50  0001 C CNN\r
+F 1 "GND" V 8200 1575 50  0000 R CNN\r
+F 2 "" H 8150 1750 50  0001 C CNN\r
+F 3 "" H 8150 1750 50  0001 C CNN\r
+       1    8150 1750\r
+       0    -1   -1   0   \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0120\r
+U 1 1 5C80C066\r
+P 7100 2550\r
+F 0 "#PWR0120" H 7100 2300 50  0001 C CNN\r
+F 1 "GND" H 7125 2350 50  0000 C CNN\r
+F 2 "" H 7100 2550 50  0001 C CNN\r
+F 3 "" H 7100 2550 50  0001 C CNN\r
+       1    7100 2550\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0121\r
+U 1 1 5C80C2E8\r
+P 7150 4400\r
+F 0 "#PWR0121" H 7150 4150 50  0001 C CNN\r
+F 1 "GND" V 7125 4250 50  0000 R CNN\r
+F 2 "" H 7150 4400 50  0001 C CNN\r
+F 3 "" H 7150 4400 50  0001 C CNN\r
+       1    7150 4400\r
+       0    1    1    0   \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0122\r
+U 1 1 5C80C428\r
+P 8200 3600\r
+F 0 "#PWR0122" H 8200 3350 50  0001 C CNN\r
+F 1 "GND" V 8250 3425 50  0000 R CNN\r
+F 2 "" H 8200 3600 50  0001 C CNN\r
+F 3 "" H 8200 3600 50  0001 C CNN\r
+       1    8200 3600\r
+       0    -1   -1   0   \r
+$EndComp\r
+$Comp\r
+L Mechanical:MountingHole H4\r
+U 1 1 5C81EB00\r
+P 6625 1625\r
+F 0 "H4" H 6750 1650 50  0000 L CNN\r
+F 1 "MountingHole" H 6750 1550 50  0000 L CNN\r
+F 2 "MountingHole:MountingHole_2.2mm_M2" H 6625 1625 50  0001 C CNN\r
+F 3 "~" H 6625 1625 50  0001 C CNN\r
+       1    6625 1625\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L Mechanical:MountingHole H2\r
+U 1 1 5C81F04C\r
+P 6450 1625\r
+F 0 "H2" H 6575 1650 50  0000 L CNN\r
+F 1 "MountingHole" H 6575 1550 50  0000 L CNN\r
+F 2 "MountingHole:MountingHole_2.2mm_M2" H 6450 1625 50  0001 C CNN\r
+F 3 "~" H 6450 1625 50  0001 C CNN\r
+       1    6450 1625\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L Mechanical:MountingHole H3\r
+U 1 1 5C827EBA\r
+P 6625 1400\r
+F 0 "H3" H 6750 1425 50  0000 L CNN\r
+F 1 "MountingHole" H 6750 1325 50  0000 L CNN\r
+F 2 "MountingHole:MountingHole_2.2mm_M2" H 6625 1400 50  0001 C CNN\r
+F 3 "~" H 6625 1400 50  0001 C CNN\r
+       1    6625 1400\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L Mechanical:MountingHole H1\r
+U 1 1 5C827EC1\r
+P 6450 1400\r
+F 0 "H1" H 6550 1450 50  0000 L CNN\r
+F 1 "MountingHole" H 6550 1400 50  0000 L CNN\r
+F 2 "MountingHole:MountingHole_2.2mm_M2" H 6450 1400 50  0001 C CNN\r
+F 3 "~" H 6450 1400 50  0001 C CNN\r
+       1    6450 1400\r
+       1    0    0    -1  \r
+$EndComp\r
+Wire Bus Line\r
+       8750 1050 8750 1850\r
+Wire Bus Line\r
+       8900 4800 8900 5550\r
+Wire Bus Line\r
+       8800 2900 8800 3700\r
+Wire Bus Line\r
+       10950 900  10950 1700\r
+Wire Bus Line\r
+       10950 2800 10950 3550\r
+Wire Bus Line\r
+       11050 4900 11050 5700\r
+Wire Bus Line\r
+       4950 1050 4950 1850\r
+Wire Bus Line\r
+       4950 2100 4950 2900\r
+Wire Bus Line\r
+       4950 3100 4950 3900\r
+Wire Bus Line\r
+       6200 3100 6200 3900\r
+Wire Bus Line\r
+       6200 2100 6200 2900\r
+Wire Bus Line\r
+       6200 1050 6200 1850\r
+$EndSCHEMATC\r

diff --git a/bbb-bort b/bbb-bort
new file mode 100644 (file)
index 0000000..3bde5e5
--- /dev/null
+++ b/bbb-bort
@@ -0,0 +1,7 @@
+Reference Type, Quantity, Reference, Value, Footprint, Datasheet, manf#, Category, DK_Datasheet_Link, DK_Detail_Page, Description, Digi-Key_PN, Family, MPN, Manufacturer, Status
+"H","4","H4,H2,H3,H1,","MountingHole","MountingHole:MountingHole_2.2mm_M2","~"
+"J","6","J1,J2,J3,J4,J5,J6,","640456-8",".pretty:NEW-640456-8","","    640456-8","","","","","","","","",""
+"P","2","P8,P9,","BeagleBone_Black_Header","Socket_BeagleBone_Black:Socket_BeagleBone_Black","","67996-150HLF","","","","","","","","",""
+"RN","6","RN2,RN4,RN6,RN5,RN3,RN1,","4609X-101-103LF","digikey-footprints:USE-SIP-9_P2.54mm","https://www.bourns.com/docs/Product-Datasheets/4600x.pdf","4609X-101-103LF","Resistors","https://www.bourns.com/docs/Product-Datasheets/4600x.pdf","/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616","RES ARRAY 8 RES 10K OHM 9SIP","4609X-101-103LF-ND","Resistor Networks, Arrays","4609X-101-103LF","Bourns Inc.","Active"
+"U","2","U1,U2,","4504","kicad-library:NEW-DIP254P762X508-16","http://www.ti.com/lit/ds/symlink/cd4504b.pdf"," CD4504BEG4","","","","","","","","",""
+"U","6","U3,U7,U6,U5,U4,U8,","74166","kicad-library:NEW-DIP254P762X508-16","","SN74HC166N","","","","","","","","",""

diff --git a/bbb-bort-cache.dcm b/bbb-bort-cache.dcm
new file mode 100644 (file)
index 0000000..97f2422
--- /dev/null
+++ b/bbb-bort-cache.dcm
@@ -0,0 +1,7 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP VDD_ADC
+K POWER, PWR
+$ENDCMP
+#
+#End Doc Library

diff --git a/bbb-bort-cache.lib b/bbb-bort-cache.lib
new file mode 100644 (file)
index 0000000..68db1a1
--- /dev/null
+++ b/bbb-bort-cache.lib
@@ -0,0 +1,418 @@
+EESchema-LIBRARY Version 2.4\r
+#encoding utf-8\r
+#\r
+# 4xxx_4504\r
+#\r
+DEF 4xxx_4504 U 0 20 Y Y 1 F N\r
+F0 "U" -300 850 50 H V C CNN\r
+F1 "4xxx_4504" 250 850 50 H V C CNN\r
+F2 "" 0 -1300 50 H I C CNN\r
+F3 "" -650 -350 50 H I C CNN\r
+$FPLIST\r
+ DIP*W7.62mm*\r
+ SOIC*3.9x9.9mm*P1.27mm*\r
+ TSSOP*4.4x5mm*P0.65mm*\r
+$ENDFPLIST\r
+DRAW\r
+S -350 800 350 -800 1 1 10 f\r
+P 2 0 1 0 -140 -500 -40 -500 N\r
+P 2 0 1 0 -140 -300 -40 -300 N\r
+P 2 0 1 0 -140 -100 -40 -100 N\r
+P 2 0 1 0 -140 100 -40 100 N\r
+P 2 0 1 0 -140 300 -40 300 N\r
+P 2 0 1 0 -140 500 -40 500 N\r
+P 2 0 1 0 30 -500 130 -500 N\r
+P 2 0 1 0 30 -300 130 -300 N\r
+P 2 0 1 0 30 -100 130 -100 N\r
+P 2 0 1 0 30 100 130 100 N\r
+P 2 0 1 0 30 300 130 300 N\r
+P 2 0 1 0 30 500 130 500 N\r
+P 4 1 1 0 30 -500 -40 -540 -40 -460 30 -500 N\r
+P 4 1 1 0 30 -300 -40 -340 -40 -260 30 -300 N\r
+P 4 1 1 0 30 -100 -40 -140 -40 -60 30 -100 N\r
+P 4 1 1 0 30 100 -40 60 -40 140 30 100 N\r
+P 4 1 1 0 30 300 -40 260 -40 340 30 300 N\r
+P 4 1 1 0 30 500 -40 460 -40 540 30 500 N\r
+X VCC 1 -100 900 100 D 50 50 1 1 W\r
+X Dout 10 450 -100 100 L 50 50 1 1 O\r
+X Ein 11 -450 -300 100 R 50 50 1 1 I\r
+X Eout 12 450 -300 100 L 50 50 1 1 O\r
+X Select 13 -450 -700 100 R 50 50 1 1 I\r
+X Fin 14 -450 -500 100 R 50 50 1 1 I\r
+X Fout 15 450 -500 100 L 50 50 1 1 O\r
+X VDD 16 100 900 100 D 50 50 1 1 W\r
+X Aout 2 450 500 100 L 50 50 1 1 O\r
+X Ain 3 -450 500 100 R 50 50 1 1 I\r
+X Bout 4 450 300 100 L 50 50 1 1 O\r
+X Bin 5 -450 300 100 R 50 50 1 1 I\r
+X Cout 6 450 100 100 L 50 50 1 1 O\r
+X Cin 7 -450 100 100 R 50 50 1 1 I\r
+X VSS 8 0 -900 100 U 50 50 1 1 W\r
+X Din 9 -450 -100 100 R 50 50 1 1 I\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# 74xx_IEEE_74166\r
+#\r
+DEF 74xx_IEEE_74166 U 0 30 Y Y 1 F N\r
+F0 "U" 350 700 50 H V C CNN\r
+F1 "74xx_IEEE_74166" 300 -900 50 H V C CNN\r
+F2 "" 0 0 50 H I C CNN\r
+F3 "" 0 0 50 H I C CNN\r
+DRAW\r
+T 0 -90 240 60 0 0 0 1 Normal 0 C C\r
+S -250 -750 -250 -750 0 0 0 N\r
+S -250 -750 250 -850 0 0 0 N\r
+S -250 -650 250 -750 0 0 0 N\r
+S -250 -550 250 -650 0 0 0 N\r
+S -250 -450 250 -550 0 0 0 N\r
+S -250 -350 250 -450 0 0 0 N\r
+S -250 -250 250 -350 0 0 0 N\r
+S -250 -150 250 -250 0 0 0 N\r
+S -250 50 250 -150 0 0 0 N\r
+P 3 0 0 0 -170 200 -140 230 -140 230 N\r
+P 4 0 0 0 -170 270 -140 240 -170 210 -170 210 N\r
+P 4 0 0 0 0 300 50 250 0 200 0 200 N\r
+P 6 0 0 0 -250 350 0 350 0 100 -50 100 -50 50 -50 50 N\r
+P 9 0 0 0 -200 50 -200 100 -250 100 -250 650 250 650 250 100 200 100 200 50 200 50 N\r
+X GND 8 50 650 0 D 50 50 0 1 W\r
+X SER 1 -550 0 300 R 50 50 1 1 I\r
+X E 10 -550 -500 300 R 50 50 1 1 I\r
+X F 11 -550 -600 300 R 50 50 1 1 I\r
+X G 12 -550 -700 300 R 50 50 1 1 I\r
+X QH 13 550 -800 300 L 50 50 1 1 T\r
+X H 14 -550 -800 300 R 50 50 1 1 I\r
+X SHLD 15 -550 450 300 R 50 50 1 1 I\r
+X VCC 16 200 650 0 D 50 50 1 1 W\r
+X A 2 -550 -100 300 R 50 50 1 1 I\r
+X B 3 -550 -200 300 R 50 50 1 1 I\r
+X C 4 -550 -300 300 R 50 50 1 1 I\r
+X D 5 -550 -400 300 R 50 50 1 1 I\r
+X CLKINH 6 -550 300 300 R 50 50 1 1 I\r
+X CLK 7 -550 200 300 R 50 50 1 1 I C\r
+X ~CLR 9 -450 550 300 R 50 50 1 1 I I\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# Connector_Generic_Conn_02x23_Odd_Even\r
+#\r
+DEF Connector_Generic_Conn_02x23_Odd_Even J 0 40 Y N 1 F N\r
+F0 "J" 50 1200 50 H V C CNN\r
+F1 "Connector_Generic_Conn_02x23_Odd_Even" 50 -1200 50 H V C CNN\r
+F2 "" 0 0 50 H I C CNN\r
+F3 "" 0 0 50 H I C CNN\r
+$FPLIST\r
+ Connector*:*_2x??_*\r
+$ENDFPLIST\r
+DRAW\r
+S -50 -1095 0 -1105 1 1 6 N\r
+S -50 -995 0 -1005 1 1 6 N\r
+S -50 -895 0 -905 1 1 6 N\r
+S -50 -795 0 -805 1 1 6 N\r
+S -50 -695 0 -705 1 1 6 N\r
+S -50 -595 0 -605 1 1 6 N\r
+S -50 -495 0 -505 1 1 6 N\r
+S -50 -395 0 -405 1 1 6 N\r
+S -50 -295 0 -305 1 1 6 N\r
+S -50 -195 0 -205 1 1 6 N\r
+S -50 -95 0 -105 1 1 6 N\r
+S -50 5 0 -5 1 1 6 N\r
+S -50 105 0 95 1 1 6 N\r
+S -50 205 0 195 1 1 6 N\r
+S -50 305 0 295 1 1 6 N\r
+S -50 405 0 395 1 1 6 N\r
+S -50 505 0 495 1 1 6 N\r
+S -50 605 0 595 1 1 6 N\r
+S -50 705 0 695 1 1 6 N\r
+S -50 805 0 795 1 1 6 N\r
+S -50 905 0 895 1 1 6 N\r
+S -50 1005 0 995 1 1 6 N\r
+S -50 1105 0 1095 1 1 6 N\r
+S -50 1150 150 -1150 1 1 10 f\r
+S 150 -1095 100 -1105 1 1 6 N\r
+S 150 -995 100 -1005 1 1 6 N\r
+S 150 -895 100 -905 1 1 6 N\r
+S 150 -795 100 -805 1 1 6 N\r
+S 150 -695 100 -705 1 1 6 N\r
+S 150 -595 100 -605 1 1 6 N\r
+S 150 -495 100 -505 1 1 6 N\r
+S 150 -395 100 -405 1 1 6 N\r
+S 150 -295 100 -305 1 1 6 N\r
+S 150 -195 100 -205 1 1 6 N\r
+S 150 -95 100 -105 1 1 6 N\r
+S 150 5 100 -5 1 1 6 N\r
+S 150 105 100 95 1 1 6 N\r
+S 150 205 100 195 1 1 6 N\r
+S 150 305 100 295 1 1 6 N\r
+S 150 405 100 395 1 1 6 N\r
+S 150 505 100 495 1 1 6 N\r
+S 150 605 100 595 1 1 6 N\r
+S 150 705 100 695 1 1 6 N\r
+S 150 805 100 795 1 1 6 N\r
+S 150 905 100 895 1 1 6 N\r
+S 150 1005 100 995 1 1 6 N\r
+S 150 1105 100 1095 1 1 6 N\r
+X Pin_1 1 -200 1100 150 R 50 50 1 1 P\r
+X Pin_10 10 300 700 150 L 50 50 1 1 P\r
+X Pin_11 11 -200 600 150 R 50 50 1 1 P\r
+X Pin_12 12 300 600 150 L 50 50 1 1 P\r
+X Pin_13 13 -200 500 150 R 50 50 1 1 P\r
+X Pin_14 14 300 500 150 L 50 50 1 1 P\r
+X Pin_15 15 -200 400 150 R 50 50 1 1 P\r
+X Pin_16 16 300 400 150 L 50 50 1 1 P\r
+X Pin_17 17 -200 300 150 R 50 50 1 1 P\r
+X Pin_18 18 300 300 150 L 50 50 1 1 P\r
+X Pin_19 19 -200 200 150 R 50 50 1 1 P\r
+X Pin_2 2 300 1100 150 L 50 50 1 1 P\r
+X Pin_20 20 300 200 150 L 50 50 1 1 P\r
+X Pin_21 21 -200 100 150 R 50 50 1 1 P\r
+X Pin_22 22 300 100 150 L 50 50 1 1 P\r
+X Pin_23 23 -200 0 150 R 50 50 1 1 P\r
+X Pin_24 24 300 0 150 L 50 50 1 1 P\r
+X Pin_25 25 -200 -100 150 R 50 50 1 1 P\r
+X Pin_26 26 300 -100 150 L 50 50 1 1 P\r
+X Pin_27 27 -200 -200 150 R 50 50 1 1 P\r
+X Pin_28 28 300 -200 150 L 50 50 1 1 P\r
+X Pin_29 29 -200 -300 150 R 50 50 1 1 P\r
+X Pin_3 3 -200 1000 150 R 50 50 1 1 P\r
+X Pin_30 30 300 -300 150 L 50 50 1 1 P\r
+X Pin_31 31 -200 -400 150 R 50 50 1 1 P\r
+X Pin_32 32 300 -400 150 L 50 50 1 1 P\r
+X Pin_33 33 -200 -500 150 R 50 50 1 1 P\r
+X Pin_34 34 300 -500 150 L 50 50 1 1 P\r
+X Pin_35 35 -200 -600 150 R 50 50 1 1 P\r
+X Pin_36 36 300 -600 150 L 50 50 1 1 P\r
+X Pin_37 37 -200 -700 150 R 50 50 1 1 P\r
+X Pin_38 38 300 -700 150 L 50 50 1 1 P\r
+X Pin_39 39 -200 -800 150 R 50 50 1 1 P\r
+X Pin_4 4 300 1000 150 L 50 50 1 1 P\r
+X Pin_40 40 300 -800 150 L 50 50 1 1 P\r
+X Pin_41 41 -200 -900 150 R 50 50 1 1 P\r
+X Pin_42 42 300 -900 150 L 50 50 1 1 P\r
+X Pin_43 43 -200 -1000 150 R 50 50 1 1 P\r
+X Pin_44 44 300 -1000 150 L 50 50 1 1 P\r
+X Pin_45 45 -200 -1100 150 R 50 50 1 1 P\r
+X Pin_46 46 300 -1100 150 L 50 50 1 1 P\r
+X Pin_5 5 -200 900 150 R 50 50 1 1 P\r
+X Pin_6 6 300 900 150 L 50 50 1 1 P\r
+X Pin_7 7 -200 800 150 R 50 50 1 1 P\r
+X Pin_8 8 300 800 150 L 50 50 1 1 P\r
+X Pin_9 9 -200 700 150 R 50 50 1 1 P\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# Mechanical_MountingHole\r
+#\r
+DEF Mechanical_MountingHole H 0 40 Y Y 1 F N\r
+F0 "H" 0 200 50 H V C CNN\r
+F1 "Mechanical_MountingHole" 0 125 50 H V C CNN\r
+F2 "" 0 0 50 H I C CNN\r
+F3 "" 0 0 50 H I C CNN\r
+$FPLIST\r
+ MountingHole*\r
+$ENDFPLIST\r
+DRAW\r
+C 0 0 50 0 1 50 N\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# dk_Resistor-Networks-Arrays_4609X-101-103LF\r
+#\r
+DEF dk_Resistor-Networks-Arrays_4609X-101-103LF RN 0 40 Y Y 1 F N\r
+F0 "RN" -270 810 60 H V L CNN\r
+F1 "dk_Resistor-Networks-Arrays_4609X-101-103LF" 0 -820 60 H V C CNN\r
+F2 "digikey-footprints:SIP-9_P2.54mm" 200 200 60 H I L CNN\r
+F3 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" 200 300 60 V I L CNN\r
+F4 "4609X-101-103LF-ND" 200 400 60 H I L CNN "Digi-Key_PN"\r
+F5 "4609X-101-103LF" 200 500 60 H I L CNN "MPN"\r
+F6 "Resistors" 200 600 60 H I L CNN "Category"\r
+F7 "Resistor Networks, Arrays" 200 700 60 H I L CNN "Family"\r
+F8 "https://www.bourns.com/docs/Product-Datasheets/4600x.pdf" 200 800 60 H I L CNN "DK_Datasheet_Link"\r
+F9 "/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616" 200 900 60 H I L CNN "DK_Detail_Page"\r
+F10 "RES ARRAY 8 RES 10K OHM 9SIP" 200 1000 60 H I L CNN "Description"\r
+F11 "Bourns Inc." 200 1100 60 H I L CNN "Manufacturer"\r
+F12 "Active" 200 1200 60 H I L CNN "Status"\r
+DRAW\r
+S -260 -775 240 775 0 1 0 f\r
+P 2 0 1 0 -260 0 -185 0 N\r
+P 2 0 1 0 -185 -700 -185 700 N\r
+P 2 1 1 0 240 -700 165 -700 N\r
+P 2 1 1 0 240 -500 165 -500 N\r
+P 2 1 1 0 240 -300 165 -300 N\r
+P 2 1 1 0 240 -100 165 -100 N\r
+P 2 1 1 0 240 100 165 100 N\r
+P 2 1 1 0 240 300 165 300 N\r
+P 2 1 1 0 240 500 165 500 N\r
+P 2 1 1 0 240 700 165 700 N\r
+P 14 1 1 0 165 -700 140 -750 115 -650 90 -750 65 -650 40 -750 15 -650 -10 -750 -35 -650 -60 -750 -85 -650 -110 -750 -135 -700 -185 -700 N\r
+P 14 1 1 0 165 -500 140 -550 115 -450 90 -550 65 -450 40 -550 15 -450 -10 -550 -35 -450 -60 -550 -85 -450 -110 -550 -135 -500 -185 -500 N\r
+P 14 1 1 0 165 -300 140 -350 115 -250 90 -350 65 -250 40 -350 15 -250 -10 -350 -35 -250 -60 -350 -85 -250 -110 -350 -135 -300 -185 -300 N\r
+P 14 1 1 0 165 -100 140 -150 115 -50 90 -150 65 -50 40 -150 15 -50 -10 -150 -35 -50 -60 -150 -85 -50 -110 -150 -135 -100 -185 -100 N\r
+P 14 1 1 0 165 100 140 50 115 150 90 50 65 150 40 50 15 150 -10 50 -35 150 -60 50 -85 150 -110 50 -135 100 -185 100 N\r
+P 14 1 1 0 165 300 140 250 115 350 90 250 65 350 40 250 15 350 -10 250 -35 350 -60 250 -85 350 -110 250 -135 300 -185 300 N\r
+P 14 1 1 0 165 500 140 450 115 550 90 450 65 550 40 450 15 550 -10 450 -35 550 -60 450 -85 550 -110 450 -135 500 -185 500 N\r
+P 14 1 1 0 165 700 140 650 115 750 90 650 65 750 40 650 15 750 -10 650 -35 750 -60 650 -85 750 -110 650 -135 700 -185 700 N\r
+X ~ 1 -360 0 100 R 50 50 1 1 P\r
+X ~ 2 340 -700 100 L 50 50 1 1 P\r
+X ~ 3 340 -500 100 L 50 50 1 1 P\r
+X ~ 4 340 -300 100 L 50 50 1 1 P\r
+X ~ 5 340 -100 100 L 50 50 1 1 P\r
+X ~ 6 340 100 100 L 50 50 1 1 P\r
+X ~ 7 340 300 100 L 50 50 1 1 P\r
+X ~ 8 340 500 100 L 50 50 1 1 P\r
+X ~ 9 340 700 100 L 50 50 1 1 P\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# power_+3.3V\r
+#\r
+DEF power_+3.3V #PWR 0 0 Y Y 1 F P\r
+F0 "#PWR" 0 -150 50 H I C CNN\r
+F1 "power_+3.3V" 0 140 50 H V C CNN\r
+F2 "" 0 0 50 H I C CNN\r
+F3 "" 0 0 50 H I C CNN\r
+ALIAS +3.3V\r
+DRAW\r
+P 2 0 1 0 -30 50 0 100 N\r
+P 2 0 1 0 0 0 0 100 N\r
+P 2 0 1 0 0 100 30 50 N\r
+X +3V3 1 0 0 0 U 50 50 1 1 W N\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# power_+5V\r
+#\r
+DEF power_+5V #PWR 0 0 Y Y 1 F P\r
+F0 "#PWR" 0 -150 50 H I C CNN\r
+F1 "power_+5V" 0 140 50 H V C CNN\r
+F2 "" 0 0 50 H I C CNN\r
+F3 "" 0 0 50 H I C CNN\r
+DRAW\r
+P 2 0 1 0 -30 50 0 100 N\r
+P 2 0 1 0 0 0 0 100 N\r
+P 2 0 1 0 0 100 30 50 N\r
+X +5V 1 0 0 0 U 50 50 1 1 W N\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# power_GND\r
+#\r
+DEF power_GND #PWR 0 0 Y Y 1 F P\r
+F0 "#PWR" 0 -250 50 H I C CNN\r
+F1 "power_GND" 0 -150 50 H V C CNN\r
+F2 "" 0 0 50 H I C CNN\r
+F3 "" 0 0 50 H I C CNN\r
+DRAW\r
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N\r
+X GND 1 0 0 0 D 50 50 1 1 W N\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# power_GNDD\r
+#\r
+DEF power_GNDD #PWR 0 0 Y Y 1 F P\r
+F0 "#PWR" 0 -250 50 H I C CNN\r
+F1 "power_GNDD" 0 -125 50 H V C CNN\r
+F2 "" 0 0 50 H I C CNN\r
+F3 "" 0 0 50 H I C CNN\r
+DRAW\r
+S -50 -60 50 -80 0 1 10 F\r
+P 2 0 1 0 0 0 0 -60 N\r
+X GNDD 1 0 0 0 D 50 50 1 1 W N\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# pwr_BeagleBone_GNDA_ADC\r
+#\r
+DEF pwr_BeagleBone_GNDA_ADC #PWR 0 0 Y Y 1 F P\r
+F0 "#PWR" 0 -250 50 H I C CNN\r
+F1 "pwr_BeagleBone_GNDA_ADC" 0 -150 50 H V C CNN\r
+F2 "" 0 0 60 H V C CNN\r
+F3 "" 0 0 60 H V C CNN\r
+DRAW\r
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N\r
+X GNDA_ADC 1 0 0 0 D 50 50 1 1 W N\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# pwr_BeagleBone_SYS_5V\r
+#\r
+DEF pwr_BeagleBone_SYS_5V #PWR 0 0 Y Y 1 F P\r
+F0 "#PWR" 0 -150 50 H I C CNN\r
+F1 "pwr_BeagleBone_SYS_5V" 0 140 50 H V C CNN\r
+F2 "" 0 0 60 H V C CNN\r
+F3 "" 0 0 60 H V C CNN\r
+DRAW\r
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+P 2 0 1 0 0 0 0 100 N\r
+P 2 0 1 0 0 100 30 50 N\r
+X SYS_5V 1 0 0 0 U 50 50 1 1 W N\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+# pwr_BeagleBone_VDD_ADC\r
+#\r
+DEF pwr_BeagleBone_VDD_ADC #PWR 0 0 Y Y 1 F P\r
+F0 "#PWR" 0 -150 50 H I C CNN\r
+F1 "pwr_BeagleBone_VDD_ADC" 0 140 50 H V C CNN\r
+F2 "" 0 0 60 H V C CNN\r
+F3 "" 0 0 60 H V C CNN\r
+DRAW\r
+P 2 0 1 0 -30 50 0 100 N\r
+P 2 0 1 0 0 0 0 100 N\r
+P 2 0 1 0 0 100 30 50 N\r
+X VDD_ADC 1 0 0 0 U 50 50 1 1 W N\r
+ENDDRAW\r
+ENDDEF\r
+#\r
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+#\r
+DEF symbols_640456-8 J 0 10 Y Y 1 F N\r
+F0 "J" 350 250 60 H V C CNN\r
+F1 "symbols_640456-8" 400 -400 60 H V C CNN\r
+F2 "CONN8_640456-8" 400 -460 60 H I C CNN\r
+F3 "" 0 0 60 H V C CNN\r
+$FPLIST\r
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+$ENDFPLIST\r
+DRAW\r
+P 2 1 0 5 200 -800 500 -800 N\r
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+P 2 1 0 5 400 -100 350 -133 N\r
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+P 2 1 0 5 400 0 200 0 N\r
+P 2 1 0 5 400 0 350 -33 N\r
+P 2 1 0 5 400 0 350 33 N\r
+P 2 1 0 5 500 -800 500 100 N\r
+P 2 1 0 5 500 100 200 100 N\r
+X 1 1 0 0 200 R 59 59 1 0 U\r
+X 2 2 0 -100 200 R 59 59 1 0 U\r
+X 3 3 0 -200 200 R 59 59 1 0 U\r
+X 4 4 0 -300 200 R 59 59 1 0 U\r
+X 5 5 0 -400 200 R 59 59 1 0 U\r
+X 6 6 0 -500 200 R 59 59 1 0 U\r
+X 7 7 0 -600 200 R 59 59 1 0 U\r
+X 8 8 0 -700 200 R 59 59 1 0 U\r
+ENDDRAW\r
+ENDDEF\r
+#\r
+#End Library\r

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+    (net SYS_RESETN\r
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+    (net VDD_ADC\r
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+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net SR1_CLR\r
+      (pins U2-9 P8-17)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins U2-7 P8-15)\r
+    )\r
+    (net SR1_CLK\r
+      (pins U2-3 P8-11)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins U2-5 P8-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins U1-2 P8-4)\r
+    )\r
+    (net 5v\r
+      (pins U7-16 U8-16 U1-1 U2-16 U3-16 U4-16 U5-16 U6-16 P9-8 P9-7 P9-6 P9-5)\r
+    )\r
+    (net BB3.3\r
+      (pins U1-16 U2-1)\r
+    )\r
+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U7-9 U8-9 U2-10 U3-9 U4-9 U5-9 U6-9)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U7-15 U8-15 U2-6 U3-15 U4-15 U5-15 U6-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U7-6 U8-6 U2-4 U3-6 U4-6 U5-6 U6-6)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U7-7 U8-7 U2-2 U3-7 U4-7 U5-7 U6-7)\r
+    )\r
+    (net 7SEG_CLK\r
+      (pins U2-11 P8-45)\r
+    )\r
+    (net 7SEG_DIO\r
+      (pins U2-14 P8-43)\r
+    )\r
+    (net SR6_QH_T\r
+      (pins U1-15 P8-18)\r
+    )\r
+    (net SR5_QH_T\r
+      (pins U1-12 P8-16)\r
+    )\r
+    (net SR4_QH_T\r
+      (pins U1-10 P8-14)\r
+    )\r
+    (net SR3_QH_T\r
+      (pins U1-6 P8-12)\r
+    )\r
+    (net SR2_QH_T\r
+      (pins P8-6)\r
+    )\r
+    (net +3V3\r
+      (pins P9-4 P9-3)\r
+    )\r
+    (net SR2_QH__T\r
+      (pins U1-4)\r
+    )\r
+    (net SR2_QH\r
+      (pins U7-13 U1-5)\r
+    )\r
+    (net SR3_QH\r
+      (pins U8-13 U1-7)\r
+    )\r
+    (net SR4_QH\r
+      (pins U1-9 U6-13)\r
+    )\r
+    (net SR5_QH\r
+      (pins U1-11 U5-13)\r
+    )\r
+    (net SR6_QH\r
+      (pins U1-14 U4-13)\r
+    )\r
+    (net 7SEG_DIO_T\r
+      (pins U2-15)\r
+    )\r
+    (net 7SEG_CLK_T\r
+      (pins U2-12)\r
+    )\r
+    (net e8r\r
+      (pins J5-1 U3-2 RN4-9)\r
+    )\r
+    (net e7r\r
+      (pins J5-2 U3-3 RN4-8)\r
+    )\r
+    (net e6r\r
+      (pins J5-3 U3-4 RN4-7)\r
+    )\r
+    (net e5r\r
+      (pins J5-4 U3-5 RN4-6)\r
+    )\r
+    (net e4r\r
+      (pins J5-5 U3-10 RN4-5)\r
+    )\r
+    (net e3r\r
+      (pins J5-6 U3-11 RN4-4)\r
+    )\r
+    (net e2r\r
+      (pins J5-7 U3-12 RN4-3)\r
+    )\r
+    (net e1r\r
+      (pins J5-8 U3-14 RN4-2)\r
+    )\r
+    (net a1r\r
+      (pins J1-8 U4-14 RN1-2)\r
+    )\r
+    (net a2r\r
+      (pins J1-7 U4-12 RN1-3)\r
+    )\r
+    (net a3r\r
+      (pins J1-6 U4-11 RN1-4)\r
+    )\r
+    (net a4r\r
+      (pins J1-5 U4-10 RN1-5)\r
+    )\r
+    (net a5r\r
+      (pins J1-4 U4-5 RN1-6)\r
+    )\r
+    (net a6r\r
+      (pins J1-3 U4-4 RN1-7)\r
+    )\r
+    (net a7r\r
+      (pins J1-2 U4-3 RN1-8)\r
+    )\r
+    (net a8r\r
+      (pins J1-1 U4-2 RN1-9)\r
+    )\r
+    (net b8r\r
+      (pins J2-1 U5-2 RN3-9)\r
+    )\r
+    (net b7r\r
+      (pins J2-2 U5-3 RN3-8)\r
+    )\r
+    (net b6r\r
+      (pins J2-3 U5-4 RN3-7)\r
+    )\r
+    (net b5r\r
+      (pins J2-4 U5-5 RN3-6)\r
+    )\r
+    (net b4r\r
+      (pins J2-5 U5-10 RN3-5)\r
+    )\r
+    (net b3r\r
+      (pins J2-6 U5-11 RN3-4)\r
+    )\r
+    (net b2r\r
+      (pins J2-7 U5-12 RN3-3)\r
+    )\r
+    (net b1r\r
+      (pins J2-8 U5-14 RN3-2)\r
+    )\r
+    (net c1r\r
+      (pins J3-8 U6-14 RN5-2)\r
+    )\r
+    (net c2r\r
+      (pins J3-7 U6-12 RN5-3)\r
+    )\r
+    (net c3r\r
+      (pins J3-6 U6-11 RN5-4)\r
+    )\r
+    (net c4r\r
+      (pins J3-5 U6-10 RN5-5)\r
+    )\r
+    (net c5r\r
+      (pins J3-4 U6-5 RN5-6)\r
+    )\r
+    (net c6r\r
+      (pins J3-3 U6-4 RN5-7)\r
+    )\r
+    (net c7r\r
+      (pins J3-2 U6-3 RN5-8)\r
+    )\r
+    (net c8r\r
+      (pins J3-1 U6-2 RN5-9)\r
+    )\r
+    (net d8r\r
+      (pins J4-1 U7-2 RN2-9)\r
+    )\r
+    (net d7r\r
+      (pins J4-2 U7-3 RN2-8)\r
+    )\r
+    (net d6r\r
+      (pins J4-3 U7-4 RN2-7)\r
+    )\r
+    (net d5r\r
+      (pins J4-4 U7-5 RN2-6)\r
+    )\r
+    (net d4r\r
+      (pins J4-5 U7-10 RN2-5)\r
+    )\r
+    (net d3r\r
+      (pins J4-6 U7-11 RN2-4)\r
+    )\r
+    (net d2r\r
+      (pins J4-7 U7-12 RN2-3)\r
+    )\r
+    (net d1r\r
+      (pins J4-8 U7-14 RN2-2)\r
+    )\r
+    (net f1r\r
+      (pins J6-8 U8-14 RN6-2)\r
+    )\r
+    (net f2r\r
+      (pins J6-7 U8-12 RN6-3)\r
+    )\r
+    (net f3r\r
+      (pins J6-6 U8-11 RN6-4)\r
+    )\r
+    (net f4r\r
+      (pins J6-5 U8-10 RN6-5)\r
+    )\r
+    (net f5r\r
+      (pins J6-4 U8-5 RN6-6)\r
+    )\r
+    (net f6r\r
+      (pins J6-3 U8-4 RN6-7)\r
+    )\r
+    (net f7r\r
+      (pins J6-2 U8-3 RN6-8)\r
+    )\r
+    (net f8r\r
+      (pins J6-1 U8-2 RN6-9)\r
+    )\r
+    (net "Net-(P8-Pad2)"\r
+      (pins P8-2)\r
+    )\r
+    (net "Net-(P8-Pad1)"\r
+      (pins P8-1)\r
+    )\r
+    (net GNDD\r
+      (pins P9-46 P9-45 P9-44 P9-43)\r
+    )\r
+    (net GND\r
+      (pins U7-8 U7-1 U8-1 U8-8 U1-13 U1-8 U2-8 U2-13 U3-8 U3-1 U4-1 U4-8 U5-8 U5-1\r
+        U6-1 U6-8 RN1-1 RN2-1 RN3-1 RN5-1 RN6-1 RN4-1 P9-2)\r
+    )\r
+    (net "Net-(P9-Pad1)"\r
+      (pins P9-1)\r
+    )\r
+    (class kicad_default "" +3V3 /a1 /a2 /a3 /a4 /a5 /a6 /a7 /a8 /b1 /b2 /b3\r
+      /b4 /b5 /b6 /b7 /b8 /c1 /c2 /c3 /c4 /c5 /c6 /c7 /c8 /d1 /d2 /d3 /d4\r
+      /d5 /d6 /d7 /d8 /e1 /e2 /e3 /e4 /e5 /e6 /e7 /e8 /f1 /f2 /f3 /f4 /f5\r
+      /f6 /f7 /f8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 GND GNDA_ADC\r
+      GNDD "Net-(P8-Pad1)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)"\r
+      "Net-(P8-Pad2)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)"\r
+      "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)"\r
+      "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)"\r
+      "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)"\r
+      "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)"\r
+      "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)"\r
+      "Net-(P8-Pad46)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad1)"\r
+      "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)"\r
+      "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"\r
+      "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)"\r
+      "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"\r
+      "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)"\r
+      "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"\r
+      "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)"\r
+      "Net-(P9-Pad41)" "Net-(P9-Pad42)" "Net-(R1-Pad2)" "Net-(R10-Pad2)" "Net-(R11-Pad2)"\r
+      "Net-(R12-Pad2)" "Net-(R13-Pad2)" "Net-(R14-Pad2)" "Net-(R15-Pad2)"\r
+      "Net-(R16-Pad2)" "Net-(R17-Pad2)" "Net-(R18-Pad2)" "Net-(R19-Pad2)"\r
+      "Net-(R2-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)" "Net-(R22-Pad2)" "Net-(R23-Pad2)"\r
+      "Net-(R24-Pad2)" "Net-(R25-Pad2)" "Net-(R26-Pad2)" "Net-(R27-Pad2)"\r
+      "Net-(R28-Pad2)" "Net-(R29-Pad2)" "Net-(R3-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)"\r
+      "Net-(R32-Pad2)" "Net-(R33-Pad2)" "Net-(R34-Pad2)" "Net-(R35-Pad2)"\r
+      "Net-(R36-Pad2)" "Net-(R37-Pad2)" "Net-(R38-Pad2)" "Net-(R39-Pad2)"\r
+      "Net-(R4-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)" "Net-(R42-Pad2)" "Net-(R43-Pad2)"\r
+      "Net-(R44-Pad2)" "Net-(R45-Pad2)" "Net-(R46-Pad2)" "Net-(R47-Pad2)"\r
+      "Net-(R48-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)" "Net-(R7-Pad2)" "Net-(R8-Pad2)"\r
+      "Net-(R9-Pad2)" "Net-(RN1-Pad1)" "Net-(RN1-Pad2)" "Net-(RN1-Pad3)" "Net-(RN1-Pad4)"\r
+      "Net-(RN1-Pad5)" "Net-(RN1-Pad6)" "Net-(RN1-Pad7)" "Net-(RN1-Pad8)"\r
+      "Net-(RN1-Pad9)" "Net-(RN2-Pad1)" "Net-(RN2-Pad2)" "Net-(RN2-Pad3)"\r
+      "Net-(RN2-Pad4)" "Net-(RN2-Pad5)" "Net-(RN2-Pad6)" "Net-(RN2-Pad7)"\r
+      "Net-(RN2-Pad8)" "Net-(RN2-Pad9)" "Net-(RN3-Pad2)" "Net-(RN3-Pad3)"\r
+      "Net-(RN3-Pad4)" "Net-(RN3-Pad5)" "Net-(RN3-Pad6)" "Net-(RN3-Pad7)"\r
+      "Net-(RN3-Pad8)" "Net-(RN3-Pad9)" "Net-(RN4-Pad1)" "Net-(RN4-Pad2)"\r
+      "Net-(RN4-Pad3)" "Net-(RN4-Pad4)" "Net-(RN4-Pad5)" "Net-(RN4-Pad6)"\r
+      "Net-(RN4-Pad7)" "Net-(RN4-Pad8)" "Net-(RN4-Pad9)" "Net-(RN5-Pad1)"\r
+      "Net-(RN5-Pad2)" "Net-(RN5-Pad3)" "Net-(RN5-Pad4)" "Net-(RN5-Pad5)"\r
+      "Net-(RN5-Pad6)" "Net-(RN5-Pad7)" "Net-(RN5-Pad8)" "Net-(RN5-Pad9)"\r
+      "Net-(RN6-Pad1)" "Net-(RN6-Pad2)" "Net-(RN6-Pad3)" "Net-(RN6-Pad4)"\r
+      "Net-(RN6-Pad5)" "Net-(RN6-Pad6)" "Net-(RN6-Pad7)" "Net-(RN6-Pad8)"\r
+      "Net-(RN6-Pad9)" PGND PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T SR1_CLK_T\r
+      SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SR2_QH SR2_QH_T\r
+      SR2_QH__T SR3_QH SR3_QH_T SR4_QH SR4_QH_T SR5_QH SR5_QH_T SR6_QH SR6_QH_T\r
+      SYS_RESETN VDD_ADC a1r a2r a3r a4r a5r a6r a7r a8r b1r b2r b3r b4r b5r\r
+      b6r b7r b8r c1r c2r c3r c4r c5r c6r c7r c8r d1r d2r d3r d4r d5r d6r\r
+      d7r d8r e1r e2r e3r e4r e5r e6r e7r e8r f1r f2r f3r f4r f5r f6r f7r\r
+      f8r\r
+      (circuit\r
+        (use_via Via[0-1]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort-ff.bin b/bbb-bort-ff.bin
new file mode 100644 (file)
index 0000000..e68ac20
Binary files /dev/null and b/bbb-bort-ff.bin differ

diff --git a/bbb-bort-ff.dsn b/bbb-bort-ff.dsn
new file mode 100644 (file)
index 0000000..be3c1c9
--- /dev/null
+++ b/bbb-bort-ff.dsn
@@ -0,0 +1,822 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort-ff.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
+      (property\r
+        (index 0)\r
+      )\r
+    )\r
+    (layer B.Cu\r
+      (type signal)\r
+      (property\r
+        (index 1)\r
+      )\r
+    )\r
+    (boundary\r
+      (path pcb 0  187690 -154670  106410 -154670  106410 -28940  187690 -28940\r
+            187690 -154670)\r
+    )\r
+    (via "Via[0-1]_600:400_um")\r
+    (rule\r
+      (width 250)\r
+      (clearance 200.1)\r
+      (clearance 200.1 (type default_smd))\r
+      (clearance 50 (type smd_smd))\r
+    )\r
+  )\r
+  (placement\r
+    (component MountingHole:MountingHole_2.2mm_M2\r
+      (place H3 110220 -32750 front 0 (PN MountingHole))\r
+      (place H1 183880 -32750 front 0 (PN MountingHole))\r
+      (place H2 110220 -150860 front 0 (PN MountingHole))\r
+      (place H4 183880 -150860 front 0 (PN MountingHole))\r
+    )\r
+    (component ".pretty:NEW-640456-8"\r
+      (place J2 174790 -61112.4 front 90 (PN "640456-8"))\r
+      (place J3 142617 -61112.4 front 90 (PN "640456-8"))\r
+      (place J4 126530 -61112.4 front 90 (PN "640456-8"))\r
+      (place J5 158480 -61112.4 front 90 (PN "640456-8"))\r
+      (place J6 126530 -83972 front 90 (PN "640456-8"))\r
+      (place J1 174790 -83972 front 90 (PN "640456-8"))\r
+    )\r
+    (component "kicad-library:NEW-DIP254P762X508-16"\r
+      (place U7 154470 -128422 front 0 (PN 74166))\r
+      (place U8 168440 -128422 front 0 (PN 74166))\r
+      (place U1 160820 -83972 front 0 (PN 4504))\r
+      (place U2 140500 -66192.4 front 180 (PN 4504))\r
+      (place U3 140500 -106832 front 0 (PN 74166))\r
+      (place U4 140500 -128422 front 0 (PN 74166))\r
+      (place U5 154470 -106604 front 0 (PN 74166))\r
+      (place U6 168440 -106832 front 0 (PN 74166))\r
+    )\r
+    (component "digikey-footprints:USE-SIP-9_P2.54mm"\r
+      (place RN1 139430 -134350 front 0 (PN "4609X-101-103LF"))\r
+      (place RN2 134350 -61942.9 front 90 (PN "4609X-101-103LF"))\r
+      (place RN3 149590 -61942.9 front 90 (PN "4609X-101-103LF"))\r
+      (place RN5 139430 -140700 front 0 (PN "4609X-101-103LF"))\r
+      (place RN6 139430 -147050 front 0 (PN "4609X-101-103LF"))\r
+      (place RN4 166100 -61942.9 front 90 (PN "4609X-101-103LF"))\r
+    )\r
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (place P8 173520 -89052 front 0 (PN BeagleBone_Black_Header))\r
+      (place P9 125260 -89052 front 0 (PN BeagleBone_Black_Header))\r
+    )\r
+  )\r
+  (library\r
+    (image MountingHole:MountingHole_2.2mm_M2\r
+      (outline (path signal 50  2450 0  2373.03 -609.29  2146.95 -1180.3  1785.97 -1677.14\r
+            1312.78 -2068.6  757.092 -2330.09  153.837 -2445.16  -459.084 -2406.6\r
+            -1043.16 -2216.83  -1561.69 -1887.76  -1982.09 -1440.07  -2277.95 -901.905\r
+            -2430.68 -307.066  -2430.68 307.066  -2277.95 901.905  -1982.09 1440.07\r
+            -1561.69 1887.76  -1043.16 2216.83  -459.084 2406.6  153.837 2445.16\r
+            757.092 2330.09  1312.78 2068.6  1785.97 1677.14  2146.95 1180.3\r
+            2373.03 609.29  2450 0))\r
+      (outline (path signal 150  2200 0  2118.42 -593.553  1879.72 -1143.09  1501.62 -1607.84\r
+            1012.14 -1953.35  447.603 -2153.99  -150.133 -2194.87  -736.735 -2072.97\r
+            -1268.7 -1797.33  -1706.57 -1388.39  -2017.87 -876.482  -2179.51 -299.567\r
+            -2179.51 299.567  -2017.87 876.482  -1706.57 1388.39  -1268.7 1797.33\r
+            -736.735 2072.97  -150.133 2194.87  447.603 2153.99  1012.14 1953.35\r
+            1501.62 1607.84  1879.72 1143.09  2118.42 593.553  2200 0))\r
+      (keepout "" (circle F.Cu 2200))\r
+      (keepout "" (circle B.Cu 2200))\r
+    )\r
+    (image ".pretty:NEW-640456-8"\r
+      (outline (path signal 152.4  18161 -1905  18088.2 -2128.95  17897.7 -2267.35  17662.3 -2267.35\r
+            17471.8 -2128.95  17399 -1905  17471.8 -1681.05  17662.3 -1542.65\r
+            17897.7 -1542.65  18088.2 -1681.05  18161 -1905))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  19050 3302  -1270 3302))\r
+      (outline (path signal 152.4  19050 -2413  19050 3302))\r
+      (outline (path signal 152.4  -1270 -2413  19050 -2413))\r
+      (outline (path signal 152.4  -1270 3302  -1270 -2413))\r
+      (outline (path signal 152.4  19304 3556  -1524 3556))\r
+      (outline (path signal 152.4  19304 -2667  19304 3556))\r
+      (outline (path signal 152.4  -1524 -2667  19304 -2667))\r
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+      (pins P9-38)\r
+    )\r
+    (net "Net-(P9-Pad39)"\r
+      (pins P9-39)\r
+    )\r
+    (net "Net-(P9-Pad40)"\r
+      (pins P9-40)\r
+    )\r
+    (net "Net-(P9-Pad41)"\r
+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net SR1_CLR\r
+      (pins U2-9 P8-17)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins U2-7 P8-15)\r
+    )\r
+    (net SR1_CLK\r
+      (pins U2-3 P8-11)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins U2-5 P8-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins U1-2 P8-4)\r
+    )\r
+    (net 5v\r
+      (pins U7-16 U8-16 U1-1 U2-16 U3-16 U4-16 U5-16 U6-16 P9-8 P9-7 P9-6 P9-5)\r
+    )\r
+    (net BB3.3\r
+      (pins U1-16 U2-1)\r
+    )\r
+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U7-9 U8-9 U2-10 U3-9 U4-9 U5-9 U6-9)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U7-15 U8-15 U2-6 U3-15 U4-15 U5-15 U6-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U7-6 U8-6 U2-4 U3-6 U4-6 U5-6 U6-6)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U7-7 U8-7 U2-2 U3-7 U4-7 U5-7 U6-7)\r
+    )\r
+    (net 7SEG_CLK\r
+      (pins U2-11 P8-45)\r
+    )\r
+    (net 7SEG_DIO\r
+      (pins U2-14 P8-43)\r
+    )\r
+    (net SR6_QH_T\r
+      (pins U1-15 P8-18)\r
+    )\r
+    (net SR5_QH_T\r
+      (pins U1-12 P8-16)\r
+    )\r
+    (net SR4_QH_T\r
+      (pins U1-10 P8-14)\r
+    )\r
+    (net SR3_QH_T\r
+      (pins U1-6 P8-12)\r
+    )\r
+    (net SR2_QH_T\r
+      (pins P8-6)\r
+    )\r
+    (net +3V3\r
+      (pins P9-4 P9-3)\r
+    )\r
+    (net SR2_QH__T\r
+      (pins U1-4)\r
+    )\r
+    (net SR2_QH\r
+      (pins U7-13 U1-5)\r
+    )\r
+    (net SR3_QH\r
+      (pins U8-13 U1-7)\r
+    )\r
+    (net SR4_QH\r
+      (pins U1-9 U6-13)\r
+    )\r
+    (net SR5_QH\r
+      (pins U1-11 U5-13)\r
+    )\r
+    (net SR6_QH\r
+      (pins U1-14 U4-13)\r
+    )\r
+    (net 7SEG_DIO_T\r
+      (pins U2-15)\r
+    )\r
+    (net 7SEG_CLK_T\r
+      (pins U2-12)\r
+    )\r
+    (net e8r\r
+      (pins J5-1 U3-2 RN4-9)\r
+    )\r
+    (net e7r\r
+      (pins J5-2 U3-3 RN4-8)\r
+    )\r
+    (net e6r\r
+      (pins J5-3 U3-4 RN4-7)\r
+    )\r
+    (net e5r\r
+      (pins J5-4 U3-5 RN4-6)\r
+    )\r
+    (net e4r\r
+      (pins J5-5 U3-10 RN4-5)\r
+    )\r
+    (net e3r\r
+      (pins J5-6 U3-11 RN4-4)\r
+    )\r
+    (net e2r\r
+      (pins J5-7 U3-12 RN4-3)\r
+    )\r
+    (net e1r\r
+      (pins J5-8 U3-14 RN4-2)\r
+    )\r
+    (net a1r\r
+      (pins J1-8 U4-14 RN1-2)\r
+    )\r
+    (net a2r\r
+      (pins J1-7 U4-12 RN1-3)\r
+    )\r
+    (net a3r\r
+      (pins J1-6 U4-11 RN1-4)\r
+    )\r
+    (net a4r\r
+      (pins J1-5 U4-10 RN1-5)\r
+    )\r
+    (net a5r\r
+      (pins J1-4 U4-5 RN1-6)\r
+    )\r
+    (net a6r\r
+      (pins J1-3 U4-4 RN1-7)\r
+    )\r
+    (net a7r\r
+      (pins J1-2 U4-3 RN1-8)\r
+    )\r
+    (net a8r\r
+      (pins J1-1 U4-2 RN1-9)\r
+    )\r
+    (net b8r\r
+      (pins J2-1 U5-2 RN3-9)\r
+    )\r
+    (net b7r\r
+      (pins J2-2 U5-3 RN3-8)\r
+    )\r
+    (net b6r\r
+      (pins J2-3 U5-4 RN3-7)\r
+    )\r
+    (net b5r\r
+      (pins J2-4 U5-5 RN3-6)\r
+    )\r
+    (net b4r\r
+      (pins J2-5 U5-10 RN3-5)\r
+    )\r
+    (net b3r\r
+      (pins J2-6 U5-11 RN3-4)\r
+    )\r
+    (net b2r\r
+      (pins J2-7 U5-12 RN3-3)\r
+    )\r
+    (net b1r\r
+      (pins J2-8 U5-14 RN3-2)\r
+    )\r
+    (net c1r\r
+      (pins J3-8 U6-14 RN5-2)\r
+    )\r
+    (net c2r\r
+      (pins J3-7 U6-12 RN5-3)\r
+    )\r
+    (net c3r\r
+      (pins J3-6 U6-11 RN5-4)\r
+    )\r
+    (net c4r\r
+      (pins J3-5 U6-10 RN5-5)\r
+    )\r
+    (net c5r\r
+      (pins J3-4 U6-5 RN5-6)\r
+    )\r
+    (net c6r\r
+      (pins J3-3 U6-4 RN5-7)\r
+    )\r
+    (net c7r\r
+      (pins J3-2 U6-3 RN5-8)\r
+    )\r
+    (net c8r\r
+      (pins J3-1 U6-2 RN5-9)\r
+    )\r
+    (net d8r\r
+      (pins J4-1 U7-2 RN2-9)\r
+    )\r
+    (net d7r\r
+      (pins J4-2 U7-3 RN2-8)\r
+    )\r
+    (net d6r\r
+      (pins J4-3 U7-4 RN2-7)\r
+    )\r
+    (net d5r\r
+      (pins J4-4 U7-5 RN2-6)\r
+    )\r
+    (net d4r\r
+      (pins J4-5 U7-10 RN2-5)\r
+    )\r
+    (net d3r\r
+      (pins J4-6 U7-11 RN2-4)\r
+    )\r
+    (net d2r\r
+      (pins J4-7 U7-12 RN2-3)\r
+    )\r
+    (net d1r\r
+      (pins J4-8 U7-14 RN2-2)\r
+    )\r
+    (net f1r\r
+      (pins J6-8 U8-14 RN6-2)\r
+    )\r
+    (net f2r\r
+      (pins J6-7 U8-12 RN6-3)\r
+    )\r
+    (net f3r\r
+      (pins J6-6 U8-11 RN6-4)\r
+    )\r
+    (net f4r\r
+      (pins J6-5 U8-10 RN6-5)\r
+    )\r
+    (net f5r\r
+      (pins J6-4 U8-5 RN6-6)\r
+    )\r
+    (net f6r\r
+      (pins J6-3 U8-4 RN6-7)\r
+    )\r
+    (net f7r\r
+      (pins J6-2 U8-3 RN6-8)\r
+    )\r
+    (net f8r\r
+      (pins J6-1 U8-2 RN6-9)\r
+    )\r
+    (net "Net-(P8-Pad2)"\r
+      (pins P8-2)\r
+    )\r
+    (net "Net-(P8-Pad1)"\r
+      (pins P8-1)\r
+    )\r
+    (net GNDD\r
+      (pins P9-46 P9-45 P9-44 P9-43)\r
+    )\r
+    (net GND\r
+      (pins U7-8 U7-1 U8-8 U8-1 U1-13 U1-8 U2-13 U2-8 U3-8 U3-1 U4-8 U4-1 U5-8 U5-1\r
+        U6-8 U6-1 RN1-1 RN2-1 RN3-1 RN5-1 RN6-1 RN4-1 P9-2)\r
+    )\r
+    (net "Net-(P9-Pad1)"\r
+      (pins P9-1)\r
+    )\r
+    (class kicad_default "" +3V3 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T\r
+      BB3.3 GND GNDA_ADC GNDD "Net-(P8-Pad1)" "Net-(P8-Pad10)" "Net-(P8-Pad13)"\r
+      "Net-(P8-Pad19)" "Net-(P8-Pad2)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)"\r
+      "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)"\r
+      "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)"\r
+      "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)"\r
+      "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)"\r
+      "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)"\r
+      "Net-(P8-Pad44)" "Net-(P8-Pad46)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)"\r
+      "Net-(P9-Pad1)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)"\r
+      "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"\r
+      "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)"\r
+      "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"\r
+      "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)"\r
+      "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"\r
+      "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)"\r
+      "Net-(P9-Pad41)" "Net-(P9-Pad42)" PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T\r
+      SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SR2_QH\r
+      SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH SR4_QH_T SR5_QH SR5_QH_T SR6_QH\r
+      SR6_QH_T SYS_RESETN VDD_ADC a1r a2r a3r a4r a5r a6r a7r a8r b1r b2r\r
+      b3r b4r b5r b6r b7r b8r c1r c2r c3r c4r c5r c6r c7r c8r d1r d2r d3r\r
+      d4r d5r d6r d7r d8r e1r e2r e3r e4r e5r e6r e7r e8r f1r f2r f3r f4r\r
+      f5r f6r f7r f8r\r
+      (circuit\r
+        (use_via Via[0-1]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort-ff.ses b/bbb-bort-ff.ses
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/bbb-bort-test.dsn b/bbb-bort-test.dsn
new file mode 100644 (file)
index 0000000..886d060
--- /dev/null
+++ b/bbb-bort-test.dsn
@@ -0,0 +1,1130 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort-test.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
+      (property\r
+        (index 0)\r
+      )\r
+    )\r
+    (layer B.Cu\r
+      (type signal)\r
+      (property\r
+        (index 1)\r
+      )\r
+    )\r
+    (boundary\r
+      (path pcb 0  180070 -145780  115300 -145780  115300 -30210  180070 -30210\r
+            180070 -145780)\r
+    )\r
+    (via "Via[0-1]_600:400_um")\r
+    (rule\r
+      (width 250)\r
+      (clearance 200.1)\r
+      (clearance 200.1 (type default_smd))\r
+      (clearance 50 (type smd_smd))\r
+    )\r
+  )\r
+  (placement\r
+    (component "digikey-footprints:USE-SIP-9_P2.54mm"\r
+      (place RN1 136890 -128000 front 0 (PN "4609X-101-103LF"))\r
+      (place RN3 147050 -55592.9 front 90 (PN "4609X-101-103LF"))\r
+      (place RN6 136890 -140700 front 0 (PN "4609X-101-103LF"))\r
+    )\r
+    (component "digikey-footprints:USE-SIP-9_P2.54mm::1"\r
+      (place RN2 131810 -55592.9 front 90 (PN "4609X-101-103LF"))\r
+      (place RN5 136890 -134350 front 0 (PN "4609X-101-103LF"))\r
+      (place RN4 163560 -55592.9 front 90 (PN "4609X-101-103LF"))\r
+    )\r
+    (component "166new:DIP254P762X508-16"\r
+      (place U8 165900 -122072 front 0 (PN 74166))\r
+      (place U6 165900 -100482 front 0 (PN 74166))\r
+      (place U4 137960 -122072 front 0 (PN 74166))\r
+      (place U2 137960 -59842.4 front 180 (PN 4504))\r
+    )\r
+    (component "166new:DIP254P762X508-16::1"\r
+      (place U7 151930 -122072 front 0 (PN 74166))\r
+      (place U5 151930 -100254 front 0 (PN 74166))\r
+      (place U3 137960 -100482 front 0 (PN 74166))\r
+      (place U1 158280 -77622 front 0 (PN 4504))\r
+    )\r
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (place P8 170980 -82702 front 0 (PN BeagleBone_Black_Header))\r
+      (place P9 122720 -82702 front 0 (PN BeagleBone_Black_Header))\r
+    )\r
+    (component "footprints:640456-8"\r
+      (place J1 172250 -77622 front 90 (PN "640456-8"))\r
+      (place J3 140077 -54762.4 front 90 (PN "640456-8"))\r
+      (place J5 155940 -54762.4 front 90 (PN "640456-8"))\r
+    )\r
+    (component "footprints:640456-8::1"\r
+      (place J2 172250 -54762.4 front 90 (PN "640456-8"))\r
+      (place J4 123990 -54762.4 front 90 (PN "640456-8"))\r
+      (place J6 123990 -77622 front 90 (PN "640456-8"))\r
+    )\r
+  )\r
+  (library\r
+    (image "digikey-footprints:USE-SIP-9_P2.54mm"\r
+      (outline (path signal 100  -1240 1250  21570 1250))\r
+      (outline (path signal 100  -1240 -1250  21570 -1250))\r
+      (outline (path signal 100  -1240 1250  -1240 -1250))\r
+      (outline (path signal 100  21570 1250  21570 -1250))\r
+      (outline (path signal 100  -1400 -1400  -900 -1400))\r
+      (outline (path signal 100  -1400 1400  -1400 -1400))\r
+      (outline (path signal 100  -900 1400  -1400 1400))\r
+      (outline (path signal 100  21700 1400  21200 1400))\r
+      (outline (path signal 100  21700 1400  21700 900))\r
+      (outline (path signal 100  21700 -1400  21700 -900))\r
+      (outline (path signal 100  21700 -1400  21200 -1400))\r
+      (outline (path signal 50  -1490 1500  -1490 -1500))\r
+      (outline (path signal 50  21820 1500  21820 -1500))\r
+      (outline (path signal 50  21820 1500  -1490 1500))\r
+      (outline (path signal 50  21820 -1500  -1490 -1500))\r
+      (pin Round[A]Pad_1810_um 9 20320 0)\r
+      (pin Round[A]Pad_1810_um 8 17780 0)\r
+      (pin Round[A]Pad_1810_um 7 15240 0)\r
+      (pin Round[A]Pad_1810_um 6 12700 0)\r
+      (pin Round[A]Pad_1810_um 5 10160 0)\r
+      (pin Round[A]Pad_1810_um 4 7620 0)\r
+      (pin Round[A]Pad_1810_um 3 5080 0)\r
+      (pin Round[A]Pad_1810_um 2 2540 0)\r
+      (pin Rect[A]Pad_1810x1810_um 1 0 0)\r
+    )\r
+    (image "digikey-footprints:USE-SIP-9_P2.54mm::1"\r
+      (outline (path signal 50  21820 -1500  -1490 -1500))\r
+      (outline (path signal 50  21820 1500  -1490 1500))\r
+      (outline (path signal 50  21820 1500  21820 -1500))\r
+      (outline (path signal 50  -1490 1500  -1490 -1500))\r
+      (outline (path signal 100  21700 -1400  21200 -1400))\r
+      (outline (path signal 100  21700 -1400  21700 -900))\r
+      (outline (path signal 100  21700 1400  21700 900))\r
+      (outline (path signal 100  21700 1400  21200 1400))\r
+      (outline (path signal 100  -900 1400  -1400 1400))\r
+      (outline (path signal 100  -1400 1400  -1400 -1400))\r
+      (outline (path signal 100  -1400 -1400  -900 -1400))\r
+      (outline (path signal 100  21570 1250  21570 -1250))\r
+      (outline (path signal 100  -1240 1250  -1240 -1250))\r
+      (outline (path signal 100  -1240 -1250  21570 -1250))\r
+      (outline (path signal 100  -1240 1250  21570 1250))\r
+      (pin Rect[A]Pad_1810x1810_um 1 0 0)\r
+      (pin Round[A]Pad_1810_um 2 2540 0)\r
+      (pin Round[A]Pad_1810_um 3 5080 0)\r
+      (pin Round[A]Pad_1810_um 4 7620 0)\r
+      (pin Round[A]Pad_1810_um 5 10160 0)\r
+      (pin Round[A]Pad_1810_um 6 12700 0)\r
+      (pin Round[A]Pad_1810_um 7 15240 0)\r
+      (pin Round[A]Pad_1810_um 8 17780 0)\r
+      (pin Round[A]Pad_1810_um 9 20320 0)\r
+    )\r
+    (image "166new:DIP254P762X508-16"\r
+      (outline (path signal 152.4  -7112 18745.2  -7112 -965.2))\r
+      (outline (path signal 152.4  -4114.8 18745.2  -7112 18745.2))\r
+      (outline (path signal 152.4  -3505.2 18745.2  -4114.8 18745.2))\r
+      (outline (path signal 152.4  -508 18745.2  -3505.2 18745.2))\r
+      (outline (path signal 152.4  -508 -965.2  -508 18745.2))\r
+      (outline (path signal 152.4  -7112 -965.2  -508 -965.2))\r
+      (outline (path signal 152.4  558.8 18338.8  -508 18338.8))\r
+      (outline (path signal 152.4  558.8 17221.2  558.8 18338.8))\r
+      (outline (path signal 152.4  -508 17221.2  558.8 17221.2))\r
+      (outline (path signal 152.4  -508 18338.8  -508 17221.2))\r
+      (outline (path signal 152.4  558.8 15798.8  -508 15798.8))\r
+      (outline (path signal 152.4  558.8 14681.2  558.8 15798.8))\r
+      (outline (path signal 152.4  -508 14681.2  558.8 14681.2))\r
+      (outline (path signal 152.4  -508 15798.8  -508 14681.2))\r
+      (outline (path signal 152.4  558.8 13258.8  -508 13258.8))\r
+      (outline (path signal 152.4  558.8 12141.2  558.8 13258.8))\r
+      (outline (path signal 152.4  -508 12141.2  558.8 12141.2))\r
+      (outline (path signal 152.4  -508 13258.8  -508 12141.2))\r
+      (outline (path signal 152.4  558.8 10718.8  -508 10718.8))\r
+      (outline (path signal 152.4  558.8 9601.2  558.8 10718.8))\r
+      (outline (path signal 152.4  -508 9601.2  558.8 9601.2))\r
+      (outline (path signal 152.4  -508 10718.8  -508 9601.2))\r
+      (outline (path signal 152.4  558.8 8178.8  -508 8178.8))\r
+      (outline (path signal 152.4  558.8 7061.2  558.8 8178.8))\r
+      (outline (path signal 152.4  -508 7061.2  558.8 7061.2))\r
+      (outline (path signal 152.4  -508 8178.8  -508 7061.2))\r
+      (outline (path signal 152.4  558.8 5638.8  -508 5638.8))\r
+      (outline (path signal 152.4  558.8 4521.2  558.8 5638.8))\r
+      (outline (path signal 152.4  -508 4521.2  558.8 4521.2))\r
+      (outline (path signal 152.4  -508 5638.8  -508 4521.2))\r
+      (outline (path signal 152.4  558.8 3098.8  -508 3098.8))\r
+      (outline (path signal 152.4  558.8 1981.2  558.8 3098.8))\r
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+      (pin Round[A]Pad_1524_um 8 0 0)\r
+    )\r
+    (padstack Round[A]Pad_1524_um\r
+      (shape (circle F.Cu 1524))\r
+      (shape (circle B.Cu 1524))\r
+      (attach off)\r
+    )\r
+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Round[A]Pad_1810_um\r
+      (shape (circle F.Cu 1810))\r
+      (shape (circle B.Cu 1810))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1810x1810_um\r
+      (shape (rect F.Cu -905 -905 905 905))\r
+      (shape (rect B.Cu -905 -905 905 905))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-1]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
+    (net "Net-(P8-Pad3)"\r
+      (pins P8-3)\r
+    )\r
+    (net "Net-(P8-Pad7)"\r
+      (pins P8-7)\r
+    )\r
+    (net "Net-(P8-Pad8)"\r
+      (pins P8-8)\r
+    )\r
+    (net "Net-(P8-Pad9)"\r
+      (pins P8-9)\r
+    )\r
+    (net "Net-(P8-Pad10)"\r
+      (pins P8-10)\r
+    )\r
+    (net "Net-(P8-Pad13)"\r
+      (pins P8-13)\r
+    )\r
+    (net "Net-(P8-Pad19)"\r
+      (pins P8-19)\r
+    )\r
+    (net "Net-(P8-Pad20)"\r
+      (pins P8-20)\r
+    )\r
+    (net "Net-(P8-Pad21)"\r
+      (pins P8-21)\r
+    )\r
+    (net "Net-(P8-Pad22)"\r
+      (pins P8-22)\r
+    )\r
+    (net "Net-(P8-Pad23)"\r
+      (pins P8-23)\r
+    )\r
+    (net "Net-(P8-Pad24)"\r
+      (pins P8-24)\r
+    )\r
+    (net "Net-(P8-Pad25)"\r
+      (pins P8-25)\r
+    )\r
+    (net "Net-(P8-Pad26)"\r
+      (pins P8-26)\r
+    )\r
+    (net "Net-(P8-Pad27)"\r
+      (pins P8-27)\r
+    )\r
+    (net "Net-(P8-Pad28)"\r
+      (pins P8-28)\r
+    )\r
+    (net "Net-(P8-Pad29)"\r
+      (pins P8-29)\r
+    )\r
+    (net "Net-(P8-Pad30)"\r
+      (pins P8-30)\r
+    )\r
+    (net "Net-(P8-Pad31)"\r
+      (pins P8-31)\r
+    )\r
+    (net "Net-(P8-Pad32)"\r
+      (pins P8-32)\r
+    )\r
+    (net "Net-(P8-Pad33)"\r
+      (pins P8-33)\r
+    )\r
+    (net "Net-(P8-Pad34)"\r
+      (pins P8-34)\r
+    )\r
+    (net "Net-(P8-Pad35)"\r
+      (pins P8-35)\r
+    )\r
+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
+    )\r
+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
+    )\r
+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
+    )\r
+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
+    )\r
+    (net "Net-(P8-Pad40)"\r
+      (pins P8-40)\r
+    )\r
+    (net "Net-(P8-Pad41)"\r
+      (pins P8-41)\r
+    )\r
+    (net "Net-(P8-Pad42)"\r
+      (pins P8-42)\r
+    )\r
+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
+    )\r
+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
+    )\r
+    (net "Net-(P9-Pad11)"\r
+      (pins P9-11)\r
+    )\r
+    (net "Net-(P9-Pad12)"\r
+      (pins P9-12)\r
+    )\r
+    (net "Net-(P9-Pad13)"\r
+      (pins P9-13)\r
+    )\r
+    (net "Net-(P9-Pad14)"\r
+      (pins P9-14)\r
+    )\r
+    (net "Net-(P9-Pad15)"\r
+      (pins P9-15)\r
+    )\r
+    (net "Net-(P9-Pad16)"\r
+      (pins P9-16)\r
+    )\r
+    (net "Net-(P9-Pad17)"\r
+      (pins P9-17)\r
+    )\r
+    (net "Net-(P9-Pad18)"\r
+      (pins P9-18)\r
+    )\r
+    (net "Net-(P9-Pad19)"\r
+      (pins P9-19)\r
+    )\r
+    (net "Net-(P9-Pad20)"\r
+      (pins P9-20)\r
+    )\r
+    (net "Net-(P9-Pad21)"\r
+      (pins P9-21)\r
+    )\r
+    (net "Net-(P9-Pad22)"\r
+      (pins P9-22)\r
+    )\r
+    (net "Net-(P9-Pad23)"\r
+      (pins P9-23)\r
+    )\r
+    (net "Net-(P9-Pad24)"\r
+      (pins P9-24)\r
+    )\r
+    (net "Net-(P9-Pad25)"\r
+      (pins P9-25)\r
+    )\r
+    (net "Net-(P9-Pad26)"\r
+      (pins P9-26)\r
+    )\r
+    (net "Net-(P9-Pad27)"\r
+      (pins P9-27)\r
+    )\r
+    (net "Net-(P9-Pad28)"\r
+      (pins P9-28)\r
+    )\r
+    (net "Net-(P9-Pad29)"\r
+      (pins P9-29)\r
+    )\r
+    (net "Net-(P9-Pad30)"\r
+      (pins P9-30)\r
+    )\r
+    (net "Net-(P9-Pad31)"\r
+      (pins P9-31)\r
+    )\r
+    (net "Net-(P9-Pad33)"\r
+      (pins P9-33)\r
+    )\r
+    (net "Net-(P9-Pad35)"\r
+      (pins P9-35)\r
+    )\r
+    (net "Net-(P9-Pad36)"\r
+      (pins P9-36)\r
+    )\r
+    (net "Net-(P9-Pad37)"\r
+      (pins P9-37)\r
+    )\r
+    (net "Net-(P9-Pad38)"\r
+      (pins P9-38)\r
+    )\r
+    (net "Net-(P9-Pad39)"\r
+      (pins P9-39)\r
+    )\r
+    (net "Net-(P9-Pad40)"\r
+      (pins P9-40)\r
+    )\r
+    (net "Net-(P9-Pad41)"\r
+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net SR1_CLR\r
+      (pins U2-9 P8-17)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins U2-7 P8-15)\r
+    )\r
+    (net SR1_CLK\r
+      (pins U2-3 P8-11)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins U2-5 P8-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins U1-2 P8-4)\r
+    )\r
+    (net PGND\r
+      (pins RN1-1 RN2-1 RN3-1 RN5-1 RN6-1 RN4-1 U8-8 U8-1 U7-1 U7-8 U6-8 U6-1 U5-1\r
+        U5-8 U4-8 U4-1 U3-1 U3-8 U2-13 U2-8 U1-8 U1-13 P8-2 P8-1 P9-46 P9-45 P9-44\r
+        P9-43 P9-2 P9-1)\r
+    )\r
+    (net 5v\r
+      (pins U8-16 U7-16 U6-16 U5-16 U4-16 U3-16 U2-16 U1-1 P9-8 P9-7 P9-6 P9-5)\r
+    )\r
+    (net BB3.3\r
+      (pins U2-1 U1-16)\r
+    )\r
+    (net SR1_QH\r
+      (pins U3-13 U1-3)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U8-9 U7-9 U6-9 U5-9 U4-9 U3-9 U2-10)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U8-15 U7-15 U6-15 U5-15 U4-15 U3-15 U2-6)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U8-6 U7-6 U6-6 U5-6 U4-6 U3-6 U2-4)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U8-7 U7-7 U6-7 U5-7 U4-7 U3-7 U2-2)\r
+    )\r
+    (net 7SEG_CLK\r
+      (pins U2-11 P8-45)\r
+    )\r
+    (net 7SEG_DIO\r
+      (pins U2-14 P8-43)\r
+    )\r
+    (net SR6_QH_T\r
+      (pins U1-15 P8-18)\r
+    )\r
+    (net SR5_QH_T\r
+      (pins U1-12 P8-16)\r
+    )\r
+    (net SR4_QH_T\r
+      (pins U1-10 P8-14)\r
+    )\r
+    (net SR3_QH_T\r
+      (pins U1-6 P8-12)\r
+    )\r
+    (net SR2_QH_T\r
+      (pins P8-6)\r
+    )\r
+    (net +3V3\r
+      (pins P9-4 P9-3)\r
+    )\r
+    (net SR2_QH__T\r
+      (pins U1-4)\r
+    )\r
+    (net SR2_QH\r
+      (pins U7-13 U1-5)\r
+    )\r
+    (net SR3_QH\r
+      (pins U8-13 U1-7)\r
+    )\r
+    (net SR4_QH\r
+      (pins U6-13 U1-9)\r
+    )\r
+    (net SR5_QH\r
+      (pins U5-13 U1-11)\r
+    )\r
+    (net SR6_QH\r
+      (pins U4-13 U1-14)\r
+    )\r
+    (net 7SEG_DIO_T\r
+      (pins U2-15)\r
+    )\r
+    (net 7SEG_CLK_T\r
+      (pins U2-12)\r
+    )\r
+    (net e8r\r
+      (pins RN4-9 U3-2 J5-1)\r
+    )\r
+    (net e7r\r
+      (pins RN4-8 U3-3 J5-2)\r
+    )\r
+    (net e6r\r
+      (pins RN4-7 U3-4 J5-3)\r
+    )\r
+    (net e5r\r
+      (pins RN4-6 U3-5 J5-4)\r
+    )\r
+    (net e4r\r
+      (pins RN4-5 U3-10 J5-5)\r
+    )\r
+    (net e3r\r
+      (pins RN4-4 U3-11 J5-6)\r
+    )\r
+    (net e2r\r
+      (pins RN4-3 U3-12 J5-7)\r
+    )\r
+    (net e1r\r
+      (pins RN4-2 U3-14 J5-8)\r
+    )\r
+    (net a1r\r
+      (pins RN1-2 U4-14 J1-8)\r
+    )\r
+    (net a2r\r
+      (pins RN1-3 U4-12 J1-7)\r
+    )\r
+    (net a3r\r
+      (pins RN1-4 U4-11 J1-6)\r
+    )\r
+    (net a4r\r
+      (pins RN1-5 U4-10 J1-5)\r
+    )\r
+    (net a5r\r
+      (pins RN1-6 U4-5 J1-4)\r
+    )\r
+    (net a6r\r
+      (pins RN1-7 U4-4 J1-3)\r
+    )\r
+    (net a7r\r
+      (pins RN1-8 U4-3 J1-2)\r
+    )\r
+    (net a8r\r
+      (pins RN1-9 U4-2 J1-1)\r
+    )\r
+    (net b8r\r
+      (pins RN3-9 U5-2 J2-1)\r
+    )\r
+    (net b7r\r
+      (pins RN3-8 U5-3 J2-2)\r
+    )\r
+    (net b6r\r
+      (pins RN3-7 U5-4 J2-3)\r
+    )\r
+    (net b5r\r
+      (pins RN3-6 U5-5 J2-4)\r
+    )\r
+    (net b4r\r
+      (pins RN3-5 U5-10 J2-5)\r
+    )\r
+    (net b3r\r
+      (pins RN3-4 U5-11 J2-6)\r
+    )\r
+    (net b2r\r
+      (pins RN3-3 U5-12 J2-7)\r
+    )\r
+    (net b1r\r
+      (pins RN3-2 U5-14 J2-8)\r
+    )\r
+    (net c1r\r
+      (pins RN5-2 U6-14 J3-8)\r
+    )\r
+    (net c2r\r
+      (pins RN5-3 U6-12 J3-7)\r
+    )\r
+    (net c3r\r
+      (pins RN5-4 U6-11 J3-6)\r
+    )\r
+    (net c4r\r
+      (pins RN5-5 U6-10 J3-5)\r
+    )\r
+    (net c5r\r
+      (pins RN5-6 U6-5 J3-4)\r
+    )\r
+    (net c6r\r
+      (pins RN5-7 U6-4 J3-3)\r
+    )\r
+    (net c7r\r
+      (pins RN5-8 U6-3 J3-2)\r
+    )\r
+    (net c8r\r
+      (pins RN5-9 U6-2 J3-1)\r
+    )\r
+    (net d8r\r
+      (pins RN2-9 U7-2 J4-1)\r
+    )\r
+    (net d7r\r
+      (pins RN2-8 U7-3 J4-2)\r
+    )\r
+    (net d6r\r
+      (pins RN2-7 U7-4 J4-3)\r
+    )\r
+    (net d5r\r
+      (pins RN2-6 U7-5 J4-4)\r
+    )\r
+    (net d4r\r
+      (pins RN2-5 U7-10 J4-5)\r
+    )\r
+    (net d3r\r
+      (pins RN2-4 U7-11 J4-6)\r
+    )\r
+    (net d2r\r
+      (pins RN2-3 U7-12 J4-7)\r
+    )\r
+    (net d1r\r
+      (pins RN2-2 U7-14 J4-8)\r
+    )\r
+    (net f1r\r
+      (pins RN6-2 U8-14 J6-8)\r
+    )\r
+    (net f2r\r
+      (pins RN6-3 U8-12 J6-7)\r
+    )\r
+    (net f3r\r
+      (pins RN6-4 U8-11 J6-6)\r
+    )\r
+    (net f4r\r
+      (pins RN6-5 U8-10 J6-5)\r
+    )\r
+    (net f5r\r
+      (pins RN6-6 U8-5 J6-4)\r
+    )\r
+    (net f6r\r
+      (pins RN6-7 U8-4 J6-3)\r
+    )\r
+    (net f7r\r
+      (pins RN6-8 U8-3 J6-2)\r
+    )\r
+    (net f8r\r
+      (pins RN6-9 U8-2 J6-1)\r
+    )\r
+    (class kicad_default "" +3V3 /a1 /a2 /a3 /a4 /a5 /a6 /a7 /a8 /b1 /b2 /b3\r
+      /b4 /b5 /b6 /b7 /b8 /c1 /c2 /c3 /c4 /c5 /c6 /c7 /c8 /d1 /d2 /d3 /d4\r
+      /d5 /d6 /d7 /d8 /e1 /e2 /e3 /e4 /e5 /e6 /e7 /e8 /f1 /f2 /f3 /f4 /f5\r
+      /f6 /f7 /f8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 GNDA_ADC\r
+      "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"\r
+      "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)"\r
+      "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"\r
+      "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)"\r
+      "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"\r
+      "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)"\r
+      "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)"\r
+      "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)"\r
+      "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)"\r
+      "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)"\r
+      "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)"\r
+      "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)"\r
+      "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)"\r
+      "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)"\r
+      "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)"\r
+      "Net-(R1-Pad2)" "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)"\r
+      "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)"\r
+      "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R2-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)"\r
+      "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)"\r
+      "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)"\r
+      "Net-(R3-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)"\r
+      "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)"\r
+      "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R4-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)"\r
+      "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)"\r
+      "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)"\r
+      "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)" "Net-(RN1-Pad1)" "Net-(RN1-Pad2)"\r
+      "Net-(RN1-Pad3)" "Net-(RN1-Pad4)" "Net-(RN1-Pad5)" "Net-(RN1-Pad6)"\r
+      "Net-(RN1-Pad7)" "Net-(RN1-Pad8)" "Net-(RN1-Pad9)" "Net-(RN2-Pad1)"\r
+      "Net-(RN2-Pad2)" "Net-(RN2-Pad3)" "Net-(RN2-Pad4)" "Net-(RN2-Pad5)"\r
+      "Net-(RN2-Pad6)" "Net-(RN2-Pad7)" "Net-(RN2-Pad8)" "Net-(RN2-Pad9)"\r
+      "Net-(RN3-Pad2)" "Net-(RN3-Pad3)" "Net-(RN3-Pad4)" "Net-(RN3-Pad5)"\r
+      "Net-(RN3-Pad6)" "Net-(RN3-Pad7)" "Net-(RN3-Pad8)" "Net-(RN3-Pad9)"\r
+      "Net-(RN4-Pad1)" "Net-(RN4-Pad2)" "Net-(RN4-Pad3)" "Net-(RN4-Pad4)"\r
+      "Net-(RN4-Pad5)" "Net-(RN4-Pad6)" "Net-(RN4-Pad7)" "Net-(RN4-Pad8)"\r
+      "Net-(RN4-Pad9)" "Net-(RN5-Pad1)" "Net-(RN5-Pad2)" "Net-(RN5-Pad3)"\r
+      "Net-(RN5-Pad4)" "Net-(RN5-Pad5)" "Net-(RN5-Pad6)" "Net-(RN5-Pad7)"\r
+      "Net-(RN5-Pad8)" "Net-(RN5-Pad9)" "Net-(RN6-Pad1)" "Net-(RN6-Pad2)"\r
+      "Net-(RN6-Pad3)" "Net-(RN6-Pad4)" "Net-(RN6-Pad5)" "Net-(RN6-Pad6)"\r
+      "Net-(RN6-Pad7)" "Net-(RN6-Pad8)" "Net-(RN6-Pad9)" PGND PWR_BUT SR1_CLK\r
+      SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T\r
+      SR1_SHLD SR1_SHLD_T SR2_QH SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH\r
+      SR4_QH_T SR5_QH SR5_QH_T SR6_QH SR6_QH_T SYS_RESETN VDD_ADC a1r a2r\r
+      a3r a4r a5r a6r a7r a8r b1r b2r b3r b4r b5r b6r b7r b8r c1r c2r c3r\r
+      c4r c5r c6r c7r c8r d1r d2r d3r d4r d5r d6r d7r d8r e1r e2r e3r e4r\r
+      e5r e6r e7r e8r f1r f2r f3r f4r f5r f6r f7r f8r\r
+      (circuit\r
+        (use_via Via[0-1]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+    (wire (path B.Cu 250  137960 -59842.4  141770 -63652.5  141770 -76615.2  147219 -82064.3\r
+            147219 -84510.8  151532 -88824  153611 -88824  156379 -91592\r
+            160365 -91592  165445 -96672  166360 -96672  169791 -100103\r
+            169791 -101016  170608 -101833  170980 -101833)(net SR1_CLR)(type protect))\r
+    (wire (path B.Cu 250  170980 -103022  170980 -101833)(net SR1_CLR)(type protect))\r
+    (wire (path F.Cu 250  170980 -100482  172169 -100482  172169 -100110  172986 -99293.1\r
+            173860 -99293.1  174716 -98436.5  174716 -82211.4  161124 -68618.9\r
+            161124 -66097.2  158678 -63652  157889 -63652  152876 -58639.4\r
+            149323 -58639.4  145580 -62382.4)(net SR1_SHLD)(type protect))\r
+    (wire (path B.Cu 250  170980 -95402  169791 -95402  168602 -94213.1  165547 -94213.1\r
+            160386 -89052  155331 -89052  152563 -86284  151536 -86284  148120 -82867.4\r
+            148120 -75082.3  145580 -72542.4)(net SR1_CLK)(type protect))\r
+    (wire (path B.Cu 250  145580 -67462.4  149390 -71272  152766 -71272  155306 -73812\r
+            159368 -73812  169341 -83785  169341 -85325.5  170608 -86593.1\r
+            170980 -86593.1)(net SR1_CLKINH)(type protect))\r
+    (wire (path B.Cu 250  170980 -87782  170980 -86593.1)(net SR1_CLKINH)(type protect))\r
+    (wire (path B.Cu 250  150660 -62382  157010 -68732  161272 -68732  174710 -82170.1\r
+            174710 -83234.6  173892 -84053.1  173520 -84053.1)(net SR1_QH_T)(type protect))\r
+    (wire (path B.Cu 250  173520 -85242  173520 -84053.1)(net SR1_QH_T)(type protect))\r
+    (wire (path B.Cu 250  125260 -82702  122720 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  130340 -82702  125260 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  158280 -82702  157116 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  150660 -77622  152036 -77622  157116 -82702)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  130340 -82702  130340 -83865.5  130631 -83865.5  131544 -84778.9\r
+            131544 -99277.7  130340 -100482)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  145641 -82641.2  145474 -82474  145361 -82474)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  144310 -100254  145924 -98640.2  145924 -82924.3  145641 -82641.2\r
+            150660 -77622)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  170980 -82702  169791 -82702)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  159472 -73013.8  159472 -68654.2  158280 -67462)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  158280 -81538.5  157075 -80333.8  157075 -74641.2  157904 -73812\r
+            158674 -73812  159472 -73013.8)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  169791 -82702  160103 -73013.8  159472 -73013.8)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  158280 -82702  158280 -81538.5)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  158280 -104292  157116 -104292)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  155964 -102798  157116 -103951  157116 -104292)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  155964 -102798  158280 -100482)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  146854 -102798  155964 -102798)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  145474 -104292  146854 -102911  146854 -102798  144310 -100254)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  144310 -82474  145361 -82474)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  145514 -120868  144310 -122072)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  144310 -105456  144601 -105456  145514 -106369  145514 -120868\r
+            157076 -120868  158280 -122072)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  144310 -81310.5  144310 -80919.4  139515 -76124.1  139124 -76124.1)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  130340 -82702  131504 -82702  131504 -82411.1  137562 -76352.4\r
+            138895 -76352.4  139124 -76124.1)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  137960 -70002.4  139124 -71166  139124 -76124.1)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  144310 -82474  144310 -81310.5)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  125260 -136042  123909 -136042)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  125260 -138582  125260 -136042)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  122720 -136042  123909 -136042)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  125260 -138582  123909 -138582)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  122720 -138582  123909 -138582)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  173520 -82702  172331 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  170980 -82107.5  171737 -82107.5  172331 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  170980 -82702  170980 -82107.5)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  144310 -122072  143106 -123276  131544 -123276  130340 -122072)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  131544 -123276  131544 -128948  125640 -134853  125260 -134853)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  125260 -136042  125260 -134853)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  144310 -104292  144310 -105456)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  145580 -59842.4  139336 -66086  139336 -68626  137960 -70002.4)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  147050 -56823.2  145580 -58293.2  145580 -59842.4)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  144310 -104292  145474 -104292)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  130340 -100482  130340 -104292)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  147050 -55592.9  147050 -56823.2)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  122720 -87782  124071 -87782)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  125260 -87782  124071 -87782)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  122720 -87782  122720 -89133.1)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  122720 -90322  122720 -89133.1)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  151930 -104292  153094 -105456  164736 -105456  165900 -104292)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  151930 -104292  150766 -105456  139124 -105456  137960 -104292)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  125260 -91510.9  125632 -91510.9  126449 -92328.2  126449 -95699.4\r
+            129962 -99212  132880 -99212  137960 -104292)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  150660 -59842  149496 -59842)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  137960 -77622.4  136760 -76421.9  136760 -72066.5  137554 -71272.4\r
+            138336 -71272.4  143580 -66027.6  143580 -65237.2  145165 -63652.4\r
+            145977 -63652.4  149496 -60132.9  149496 -59842)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  137960 -82702  137960 -77622.4)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  151930 -82474  153322 -83865.6  164736 -83865.6  165900 -82702)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  151930 -104292  150267 -102629  150267 -84137.3  151930 -82474)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  125260 -90322  123909 -90322)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  122720 -90322  123909 -90322)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  125260 -90322  125260 -91510.9)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  125260 -87782  126449 -87782  127638 -86593.1  134069 -86593.1\r
+            137960 -82702)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  145580 -77622.4  145580 -76458.9)(net BB3.3)(type protect))\r
+    (wire (path B.Cu 250  158280 -59842  157116 -61005.6  150319 -61005.6  148014 -63311.1\r
+            148014 -64137.9  145959 -66192.4  145188 -66192.4  144416 -66963.7\r
+            144416 -75586.4  145289 -76458.9  145580 -76458.9)(net BB3.3)(type protect))\r
+    (wire (path B.Cu 250  143609 -81102.9  143526 -81102.9  139336 -85292.8  139336 -88945.6\r
+            137960 -90322)(net SR1_QH)(type protect))\r
+    (wire (path F.Cu 250  150660 -64922  149496 -66085.6  149496 -75915.9  144309 -81102.9\r
+            143609 -81102.9)(net SR1_QH)(type protect))\r
+    (wire (path B.Cu 250  165900 -122072  164729 -120901  153101 -120901  151930 -122072)(net SR1_CLR_T)(type protect))\r
+    (wire (path B.Cu 250  165900 -100482  167104 -101686  167104 -120868  165900 -122072)(net SR1_CLR_T)(type protect))\r
+    (wire (path F.Cu 250  137960 -100482  136309 -98831.2  136309 -64033.2  137960 -62382.4)(net SR1_CLR_T)(type protect))\r
+    (wire (path F.Cu 250  165900 -100482  164695 -99277.1  152907 -99277.1  151930 -100254)(net SR1_CLR_T)(type protect))\r
+    (wire (path B.Cu 250  137960 -100482  139379 -99063.4  150739 -99063.4  151930 -100254)(net SR1_CLR_T)(type protect))\r
+    (wire (path B.Cu 250  137960 -122072  139151 -120881  150739 -120881  151930 -122072)(net SR1_CLR_T)(type protect))\r
+    (wire (path F.Cu 250  137960 -85242  139574 -83628.1  139574 -70928.5  145580 -64922.4)(net SR1_SHLD_T)(type protect))\r
+    (wire (path F.Cu 250  137960 -85242  139620 -86902.4  139620 -105172  137960 -106832)(net SR1_SHLD_T)(type protect))\r
+    (wire (path F.Cu 250  153134 -105628  151930 -106832)(net SR1_SHLD_T)(type protect))\r
+    (wire (path F.Cu 250  151930 -85014  150717 -86226.9  150717 -100977  153134 -103394\r
+            153134 -105628  164696 -105628  165900 -106832)(net SR1_SHLD_T)(type protect))\r
+    (wire (path B.Cu 250  151930 -85014  153349 -86432.6  164709 -86432.6  165900 -85242)(net SR1_SHLD_T)(type protect))\r
+    (wire (path B.Cu 250  137960 -106832  139151 -108023  150739 -108023  151930 -106832)(net SR1_SHLD_T)(type protect))\r
+    (wire (path B.Cu 250  130340 -116992  131531 -115801  143119 -115801  144310 -116992)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path B.Cu 250  144310 -95174  145497 -93986.9  156865 -93986.9  158280 -95402)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path F.Cu 250  144310 -95174  142514 -93378  142514 -73068.4  145580 -70002.4)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path F.Cu 250  130340 -95402  129176 -96565.5  129176 -115828  130340 -116992)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path B.Cu 250  130340 -95402  131506 -94235.7  143372 -94235.7  144310 -95174)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path B.Cu 250  144310 -116992  145501 -115801  157089 -115801  158280 -116992)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path B.Cu 250  144310 -119532  143143 -118365  131507 -118365  130340 -119532)(net SR1_CLK_T)(type protect))\r
+    (wire (path B.Cu 250  144310 -119532  145501 -118341  157089 -118341  158280 -119532)(net SR1_CLK_T)(type protect))\r
+    (wire (path F.Cu 250  144310 -97714  145474 -96550.5  145474 -94688.9  144689 -93904\r
+            143935 -93904  142964 -92933.7  142964 -77698.1  145580 -75082.4)(net SR1_CLK_T)(type protect))\r
+    (wire (path F.Cu 250  144310 -119532  143106 -118328  143106 -98918.2  144310 -97714)(net SR1_CLK_T)(type protect))\r
+    (wire (path B.Cu 250  158280 -97942  156861 -96523.4  145501 -96523.4  144310 -97714)(net SR1_CLK_T)(type protect))\r
+    (wire (path B.Cu 250  130340 -97942  131518 -96763.5  143360 -96763.5  144310 -97714)(net SR1_CLK_T)(type protect))\r
+    (wire (path B.Cu 250  170980 -138582  170980 -137393  170608 -137393  169791 -136576\r
+            169791 -102696  166307 -99212  165523 -99212  160443 -94132\r
+            157904 -94132  155136 -91364  151532 -91364  145810 -85642.3\r
+            145810 -81310.4  139947 -75447  139947 -66909.3  137960 -64922.4)(net 7SEG_CLK)(type protect))\r
+    (wire (path F.Cu 250  170980 -136042  169791 -136042  158970 -125220  145777 -125220\r
+            139512 -118955  139512 -114343  138351 -113182  137574 -113182\r
+            136773 -112381  136773 -103764  139170 -101367  139170 -92403\r
+            138359 -91592  137578 -91592  136760 -90774.1  136760 -84778.2\r
+            137566 -83972  138352 -83972  139124 -83200.5  139124 -73705.9\r
+            137960 -72542.4)(net 7SEG_DIO)(type protect))\r
+    (wire (path F.Cu 250  173520 -101833  173892 -101833  175169 -100556  175169 -79002.9\r
+            172677 -76511.3  172114 -76511.3  161574 -65971.4  161574 -65676\r
+            158280 -62382)(net SR6_QH_T)(type protect))\r
+    (wire (path F.Cu 250  173520 -103022  173520 -101833)(net SR6_QH_T)(type protect))\r
+    (wire (path B.Cu 250  158280 -70002  169791 -81513.1  169791 -83700.4  169982 -83890.9\r
+            171367 -83890.9  172250 -84774  172250 -90789.6  173029 -91569\r
+            173927 -91569  174727 -92368.3  174727 -98457.9  173892 -99293.1\r
+            173520 -99293.1)(net SR5_QH_T)(type protect))\r
+    (wire (path B.Cu 250  173520 -100482  173520 -99293.1)(net SR5_QH_T)(type protect))\r
+    (wire (path F.Cu 250  173520 -97942  173520 -96753.1  173148 -96753.1  172331 -95935.8\r
+            172331 -89969.8  171377 -89015.7  170472 -89015.7  167452 -85996.5\r
+            167452 -85133.1  166291 -83972  165523 -83972  159656 -78105.4\r
+            159656 -76458.4  158280 -75082)(net SR4_QH_T)(type protect))\r
+    (wire (path B.Cu 250  173520 -94213.1  173148 -94213.1  172331 -93395.8  172331 -92509.8\r
+            171413 -91592  170502 -91592  168890 -89980.3  168890 -83980.7\r
+            161328 -76417.9  154536 -76417.9  150660 -72542)(net SR3_QH_T)(type protect))\r
+    (wire (path B.Cu 250  173520 -95402  173520 -94213.1)(net SR3_QH_T)(type protect))\r
+    (wire (path B.Cu 250  122720 -85242  125260 -85242)(net +3V3)(type protect))\r
+    (wire (path F.Cu 250  151930 -111912  149789 -109771  149789 -81038.2  152305 -78521.4\r
+            152305 -71647.4  150660 -70002)(net SR2_QH)(type protect))\r
+    (wire (path F.Cu 250  150660 -75082  151855 -76277  151855 -78334.9  149338 -80851.7\r
+            149338 -111039  151402 -113103  164709 -113103  165900 -111912)(net SR3_QH)(type protect))\r
+    (wire (path F.Cu 250  158280 -77622  164524 -83865.6  164524 -88945.6  165900 -90322)(net SR4_QH)(type protect))\r
+    (wire (path F.Cu 250  158280 -72542  153306 -77515.6  153306 -88717.6  151930 -90094)(net SR5_QH)(type protect))\r
+    (wire (path F.Cu 250  158280 -64922  157116 -63758  150156 -63758  147110 -66803.6\r
+            147110 -67584.9  145963 -68732.4  145190 -68732.4  140438 -73483.9\r
+            140438 -109434  137960 -111912)(net SR6_QH)(type protect))\r
+    (via "Via[0-1]_600:400_um"  143609 -81102.9 (net SR1_QH)(type protect))\r
+  )\r
+)\r

diff --git a/bbb-bort.bak b/bbb-bort.bak
new file mode 100644 (file)
index 0000000..82a3a1b
--- /dev/null
+++ b/bbb-bort.bak
@@ -0,0 +1,1967 @@
+EESchema Schematic File Version 4\r
+LIBS:bbb-bort-cache\r
+EELAYER 26 0\r
+EELAYER END\r
+$Descr A4 11693 8268\r
+encoding utf-8\r
+Sheet 1 1\r
+Title "bort's brain"\r
+Date "2018-12-28"\r
+Rev "A1"\r
+Comp "kremlinware unlimited"\r
+Comment1 "i'm the one who press that button"\r
+Comment2 "sweaty palms get caught bluffin"\r
+Comment3 "fold a man into nothin, for nothin"\r
+Comment4 ""\r
+$EndDescr\r
+$Comp\r
+L power:GNDD #PWR01\r
+U 1 1 5589785A\r
+P 1200 3050\r
+F 0 "#PWR01" H 1200 2800 50  0001 C CNN\r
+F 1 "GNDD" H 1200 2900 50  0000 C CNN\r
+F 2 "" H 1200 3050 60  0000 C CNN\r
+F 3 "" H 1200 3050 60  0000 C CNN\r
+       1    1200 3050\r
+       1    0    0    -1  \r
+$EndComp\r
+Wire Wire Line\r
+       1450 2850 1500 2850\r
+Wire Wire Line\r
+       1500 2850 1500 2950\r
+Wire Wire Line\r
+       900  3050 900  2950\r
+Wire Wire Line\r
+       900  2850 950  2850\r
+Wire Wire Line\r
+       950  2950 900  2950\r
+Connection ~ 900  2950\r
+Wire Wire Line\r
+       1450 2950 1500 2950\r
+Connection ~ 1500 2950\r
+Connection ~ 1200 3050\r
+$Comp\r
+L power:+3.3V #PWR06\r
+U 1 1 55897A67\r
+P 1400 850\r
+F 0 "#PWR06" H 1400 700 50  0001 C CNN\r
+F 1 "+3V3" H 1400 990 50  0000 C CNN\r
+F 2 "" H 1400 850 60  0000 C CNN\r
+F 3 "" H 1400 850 60  0000 C CNN\r
+       1    1400 850 \r
+       0    1    1    0   \r
+$EndComp\r
+$Comp\r
+L power:+5V #PWR07\r
+U 1 1 55897A7F\r
+P 1550 950\r
+F 0 "#PWR07" H 1550 800 50  0001 C CNN\r
+F 1 "+5V" H 1550 1090 50  0000 C CNN\r
+F 2 "" H 1550 950 60  0000 C CNN\r
+F 3 "" H 1550 950 60  0000 C CNN\r
+       1    1550 950 \r
+       0    1    1    0   \r
+$EndComp\r
+Wire Wire Line\r
+       1450 850  1400 850 \r
+Wire Wire Line\r
+       1450 950  1550 950 \r
+Wire Wire Line\r
+       1750 1050 1450 1050\r
+$Comp\r
+L power:+3.3V #PWR08\r
+U 1 1 55897EE7\r
+P 800 850\r
+F 0 "#PWR08" H 800 700 50  0001 C CNN\r
+F 1 "+3V3" H 800 990 50  0000 C CNN\r
+F 2 "" H 800 850 60  0000 C CNN\r
+F 3 "" H 800 850 60  0000 C CNN\r
+       1    800  850 \r
+       0    -1   -1   0   \r
+$EndComp\r
+$Comp\r
+L power:+5V #PWR09\r
+U 1 1 55897EF8\r
+P 900 950\r
+F 0 "#PWR09" H 900 800 50  0001 C CNN\r
+F 1 "+5V" H 900 1090 50  0000 C CNN\r
+F 2 "" H 900 950 60  0000 C CNN\r
+F 3 "" H 900 950 60  0000 C CNN\r
+       1    900  950 \r
+       0    -1   -1   0   \r
+$EndComp\r
+Wire Wire Line\r
+       950  850  800  850 \r
+Wire Wire Line\r
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+$Comp\r
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diff --git a/bbb-bort.dsn b/bbb-bort.dsn
new file mode 100644 (file)
index 0000000..a69674c
--- /dev/null
+++ b/bbb-bort.dsn
@@ -0,0 +1,692 @@
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+      (outline (path signal 152.4  -8178.8 13258.8  -8178.8 12141.2))\r
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+      (outline (path signal 152.4  -8178.8 14681.2  -7112 14681.2))\r
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+      (outline (path signal 152.4  -7112 17221.2  -7112 18338.8))\r
+      (outline (path signal 152.4  -4114.8 18745.2  -6299.2 18745.2))\r
+      (outline (path signal 152.4  -3505.2 18745.2  -4114.8 18745.2))\r
+      (outline (path signal 152.4  -889 18745.2  -3505.2 18745.2))\r
+      (outline (path signal 152.4  -6731 -965.2  -889 -965.2))\r
+      (pin Round[A]Pad_1676.4_um 16 0 17780)\r
+      (pin Round[A]Pad_1676.4_um 15 0 15240)\r
+      (pin Round[A]Pad_1676.4_um 14 0 12700)\r
+      (pin Round[A]Pad_1676.4_um 13 0 10160)\r
+      (pin Round[A]Pad_1676.4_um 12 0 7620)\r
+      (pin Round[A]Pad_1676.4_um 11 0 5080)\r
+      (pin Round[A]Pad_1676.4_um 10 0 2540)\r
+      (pin Round[A]Pad_1676.4_um 9 0 0)\r
+      (pin Round[A]Pad_1676.4_um 8 -7620 0)\r
+      (pin Round[A]Pad_1676.4_um 7 -7620 2540)\r
+      (pin Round[A]Pad_1676.4_um 6 -7620 5080)\r
+      (pin Round[A]Pad_1676.4_um 5 -7620 7620)\r
+      (pin Round[A]Pad_1676.4_um 4 -7620 10160)\r
+      (pin Round[A]Pad_1676.4_um 3 -7620 12700)\r
+      (pin Round[A]Pad_1676.4_um 2 -7620 15240)\r
+      (pin Rect[A]Pad_1676.4x1676.4_um 1 -7620 17780)\r
+    )\r
+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-1]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
+    (net "Net-(P8-Pad3)"\r
+      (pins P8-3)\r
+    )\r
+    (net "Net-(P8-Pad6)"\r
+      (pins P8-6)\r
+    )\r
+    (net "Net-(P8-Pad7)"\r
+      (pins P8-7)\r
+    )\r
+    (net "Net-(P8-Pad8)"\r
+      (pins P8-8)\r
+    )\r
+    (net "Net-(P8-Pad9)"\r
+      (pins P8-9)\r
+    )\r
+    (net "Net-(P8-Pad10)"\r
+      (pins P8-10)\r
+    )\r
+    (net "Net-(P8-Pad12)"\r
+      (pins P8-12)\r
+    )\r
+    (net "Net-(P8-Pad13)"\r
+      (pins P8-13)\r
+    )\r
+    (net "Net-(P8-Pad14)"\r
+      (pins P8-14)\r
+    )\r
+    (net "Net-(P8-Pad16)"\r
+      (pins P8-16)\r
+    )\r
+    (net "Net-(P8-Pad18)"\r
+      (pins P8-18)\r
+    )\r
+    (net "Net-(P8-Pad19)"\r
+      (pins P8-19)\r
+    )\r
+    (net "Net-(P8-Pad20)"\r
+      (pins P8-20)\r
+    )\r
+    (net "Net-(P8-Pad21)"\r
+      (pins P8-21)\r
+    )\r
+    (net "Net-(P8-Pad22)"\r
+      (pins P8-22)\r
+    )\r
+    (net "Net-(P8-Pad23)"\r
+      (pins P8-23)\r
+    )\r
+    (net "Net-(P8-Pad24)"\r
+      (pins P8-24)\r
+    )\r
+    (net "Net-(P8-Pad25)"\r
+      (pins P8-25)\r
+    )\r
+    (net "Net-(P8-Pad26)"\r
+      (pins P8-26)\r
+    )\r
+    (net "Net-(P8-Pad27)"\r
+      (pins P8-27)\r
+    )\r
+    (net "Net-(P8-Pad28)"\r
+      (pins P8-28)\r
+    )\r
+    (net "Net-(P8-Pad29)"\r
+      (pins P8-29)\r
+    )\r
+    (net "Net-(P8-Pad30)"\r
+      (pins P8-30)\r
+    )\r
+    (net "Net-(P8-Pad31)"\r
+      (pins P8-31)\r
+    )\r
+    (net "Net-(P8-Pad32)"\r
+      (pins P8-32)\r
+    )\r
+    (net "Net-(P8-Pad33)"\r
+      (pins P8-33)\r
+    )\r
+    (net "Net-(P8-Pad34)"\r
+      (pins P8-34)\r
+    )\r
+    (net "Net-(P8-Pad35)"\r
+      (pins P8-35)\r
+    )\r
+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
+    )\r
+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
+    )\r
+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
+    )\r
+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
+    )\r
+    (net "Net-(P8-Pad40)"\r
+      (pins P8-40)\r
+    )\r
+    (net "Net-(P8-Pad41)"\r
+      (pins P8-41)\r
+    )\r
+    (net "Net-(P8-Pad42)"\r
+      (pins P8-42)\r
+    )\r
+    (net "Net-(P8-Pad43)"\r
+      (pins P8-43)\r
+    )\r
+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
+    )\r
+    (net "Net-(P8-Pad45)"\r
+      (pins P8-45)\r
+    )\r
+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
+    )\r
+    (net "Net-(P9-Pad11)"\r
+      (pins P9-11)\r
+    )\r
+    (net "Net-(P9-Pad12)"\r
+      (pins P9-12)\r
+    )\r
+    (net "Net-(P9-Pad13)"\r
+      (pins P9-13)\r
+    )\r
+    (net "Net-(P9-Pad14)"\r
+      (pins P9-14)\r
+    )\r
+    (net "Net-(P9-Pad15)"\r
+      (pins P9-15)\r
+    )\r
+    (net "Net-(P9-Pad16)"\r
+      (pins P9-16)\r
+    )\r
+    (net "Net-(P9-Pad17)"\r
+      (pins P9-17)\r
+    )\r
+    (net "Net-(P9-Pad18)"\r
+      (pins P9-18)\r
+    )\r
+    (net "Net-(P9-Pad19)"\r
+      (pins P9-19)\r
+    )\r
+    (net "Net-(P9-Pad20)"\r
+      (pins P9-20)\r
+    )\r
+    (net "Net-(P9-Pad21)"\r
+      (pins P9-21)\r
+    )\r
+    (net "Net-(P9-Pad22)"\r
+      (pins P9-22)\r
+    )\r
+    (net "Net-(P9-Pad23)"\r
+      (pins P9-23)\r
+    )\r
+    (net "Net-(P9-Pad24)"\r
+      (pins P9-24)\r
+    )\r
+    (net "Net-(P9-Pad25)"\r
+      (pins P9-25)\r
+    )\r
+    (net "Net-(P9-Pad26)"\r
+      (pins P9-26)\r
+    )\r
+    (net "Net-(P9-Pad27)"\r
+      (pins P9-27)\r
+    )\r
+    (net "Net-(P9-Pad28)"\r
+      (pins P9-28)\r
+    )\r
+    (net "Net-(P9-Pad29)"\r
+      (pins P9-29)\r
+    )\r
+    (net "Net-(P9-Pad30)"\r
+      (pins P9-30)\r
+    )\r
+    (net "Net-(P9-Pad31)"\r
+      (pins P9-31)\r
+    )\r
+    (net "Net-(P9-Pad33)"\r
+      (pins P9-33)\r
+    )\r
+    (net "Net-(P9-Pad35)"\r
+      (pins P9-35)\r
+    )\r
+    (net "Net-(P9-Pad36)"\r
+      (pins P9-36)\r
+    )\r
+    (net "Net-(P9-Pad37)"\r
+      (pins P9-37)\r
+    )\r
+    (net "Net-(P9-Pad38)"\r
+      (pins P9-38)\r
+    )\r
+    (net "Net-(P9-Pad39)"\r
+      (pins P9-39)\r
+    )\r
+    (net "Net-(P9-Pad40)"\r
+      (pins P9-40)\r
+    )\r
+    (net "Net-(P9-Pad41)"\r
+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net GNDD\r
+      (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-13 U1-8 U2-13 U2-8 U3-8\r
+        U3-1)\r
+    )\r
+    (net +3V3\r
+      (pins P9-4 P9-3 U1-16 U2-1)\r
+    )\r
+    (net +5V\r
+      (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net /GPIO1_7_SR_QH\r
+      (pins P8-4 U1-2)\r
+    )\r
+    (net /GPIO1_2_SR_CLKINH\r
+      (pins P8-5 U2-5)\r
+    )\r
+    (net /GPIO1_13_SR_CLK\r
+      (pins P8-11 U2-3)\r
+    )\r
+    (net /GPIO1_15_SR_SHLD\r
+      (pins P8-15 U2-7)\r
+    )\r
+    (net /GPIO0_27_SR_CLR\r
+      (pins P8-17 U2-9)\r
+    )\r
+    (net "Net-(U1-Pad3)"\r
+      (pins U1-3 U3-13)\r
+    )\r
+    (net "Net-(U1-Pad4)"\r
+      (pins U1-4)\r
+    )\r
+    (net "Net-(U1-Pad5)"\r
+      (pins U1-5)\r
+    )\r
+    (net "Net-(U1-Pad6)"\r
+      (pins U1-6)\r
+    )\r
+    (net "Net-(U1-Pad7)"\r
+      (pins U1-7)\r
+    )\r
+    (net "Net-(U1-Pad9)"\r
+      (pins U1-9)\r
+    )\r
+    (net "Net-(U1-Pad10)"\r
+      (pins U1-10)\r
+    )\r
+    (net "Net-(U1-Pad11)"\r
+      (pins U1-11)\r
+    )\r
+    (net "Net-(U1-Pad12)"\r
+      (pins U1-12)\r
+    )\r
+    (net "Net-(U1-Pad14)"\r
+      (pins U1-14)\r
+    )\r
+    (net "Net-(U1-Pad15)"\r
+      (pins U1-15)\r
+    )\r
+    (net "Net-(U2-Pad15)"\r
+      (pins U2-15)\r
+    )\r
+    (net "Net-(U2-Pad14)"\r
+      (pins U2-14)\r
+    )\r
+    (net "Net-(U2-Pad12)"\r
+      (pins U2-12)\r
+    )\r
+    (net "Net-(U2-Pad11)"\r
+      (pins U2-11)\r
+    )\r
+    (net "Net-(U2-Pad10)"\r
+      (pins U2-10 U3-9)\r
+    )\r
+    (net "Net-(U2-Pad6)"\r
+      (pins U2-6 U3-15)\r
+    )\r
+    (net "Net-(U2-Pad4)"\r
+      (pins U2-4 U3-6)\r
+    )\r
+    (net "Net-(U2-Pad2)"\r
+      (pins U2-2 U3-7)\r
+    )\r
+    (net "Net-(U3-Pad2)"\r
+      (pins U3-2)\r
+    )\r
+    (net "Net-(U3-Pad3)"\r
+      (pins U3-3)\r
+    )\r
+    (net "Net-(U3-Pad4)"\r
+      (pins U3-4)\r
+    )\r
+    (net "Net-(U3-Pad5)"\r
+      (pins U3-5)\r
+    )\r
+    (net "Net-(U3-Pad10)"\r
+      (pins U3-10)\r
+    )\r
+    (net "Net-(U3-Pad11)"\r
+      (pins U3-11)\r
+    )\r
+    (net "Net-(U3-Pad12)"\r
+      (pins U3-12)\r
+    )\r
+    (net "Net-(U3-Pad14)"\r
+      (pins U3-14)\r
+    )\r
+    (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD\r
+      /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH GNDA_ADC GNDD "Net-(P8-Pad10)" "Net-(P8-Pad11)"\r
+      "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad15)"\r
+      "Net-(P8-Pad16)" "Net-(P8-Pad17)" "Net-(P8-Pad18)" "Net-(P8-Pad19)"\r
+      "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)"\r
+      "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)"\r
+      "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)"\r
+      "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)"\r
+      "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)"\r
+      "Net-(P8-Pad4)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)"\r
+      "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad5)" "Net-(P8-Pad6)"\r
+      "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)"\r
+      "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)"\r
+      "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)"\r
+      "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)"\r
+      "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)"\r
+      "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)"\r
+      "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)"\r
+      "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)"\r
+      "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)" "Net-(U1-Pad14)"\r
+      "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" "Net-(U1-Pad6)"\r
+      "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)" "Net-(U2-Pad12)"\r
+      "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)" "Net-(U2-Pad6)"\r
+      "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)"\r
+      "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PWR_BUT\r
+      SYS_5V SYS_RESETN VDD_ADC\r
+      (circuit\r
+        (use_via Via[0-1]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort.kicad_pcb b/bbb-bort.kicad_pcb
new file mode 100644 (file)
index 0000000..68c4c64
--- /dev/null
+++ b/bbb-bort.kicad_pcb
@@ -0,0 +1,2399 @@
+(kicad_pcb (version 20171130) (host pcbnew "(5.0.1)-3")\r
+\r
+  (general\r
+    (thickness 1.6)\r
+    (drawings 5)\r
+    (tracks 0)\r
+    (zones 0)\r
+    (modules 26)\r
+    (nets 148)\r
+  )\r
+\r
+  (page A4)\r
+  (layers\r
+    (0 F.Cu signal)\r
+    (31 B.Cu signal)\r
+    (32 B.Adhes user)\r
+    (33 F.Adhes user)\r
+    (34 B.Paste user)\r
+    (35 F.Paste user)\r
+    (36 B.SilkS user)\r
+    (37 F.SilkS user)\r
+    (38 B.Mask user)\r
+    (39 F.Mask user)\r
+    (40 Dwgs.User user)\r
+    (41 Cmts.User user)\r
+    (42 Eco1.User user)\r
+    (43 Eco2.User user)\r
+    (44 Edge.Cuts user)\r
+    (45 Margin user)\r
+    (46 B.CrtYd user)\r
+    (47 F.CrtYd user)\r
+    (48 B.Fab user)\r
+    (49 F.Fab user)\r
+  )\r
+\r
+  (setup\r
+    (last_trace_width 0.25)\r
+    (trace_clearance 0.2)\r
+    (zone_clearance 0.508)\r
+    (zone_45_only no)\r
+    (trace_min 0.2)\r
+    (segment_width 0.2)\r
+    (edge_width 0.00254)\r
+    (via_size 0.6)\r
+    (via_drill 0.4)\r
+    (via_min_size 0.4)\r
+    (via_min_drill 0.3)\r
+    (uvia_size 0.3)\r
+    (uvia_drill 0.1)\r
+    (uvias_allowed no)\r
+    (uvia_min_size 0.2)\r
+    (uvia_min_drill 0.1)\r
+    (pcb_text_width 0.3)\r
+    (pcb_text_size 1.5 1.5)\r
+    (mod_edge_width 0.15)\r
+    (mod_text_size 1 1)\r
+    (mod_text_width 0.15)\r
+    (pad_size 1.7272 1.7272)\r
+    (pad_drill 1.016)\r
+    (pad_to_mask_clearance 0)\r
+    (solder_mask_min_width 0.25)\r
+    (aux_axis_origin 0 0)\r
+    (grid_origin 185.15 154.67)\r
+    (visible_elements 7FFFF7FF)\r
+    (pcbplotparams\r
+      (layerselection 0x01030_80000001)\r
+      (usegerberextensions false)\r
+      (usegerberattributes false)\r
+      (usegerberadvancedattributes false)\r
+      (creategerberjobfile false)\r
+      (excludeedgelayer true)\r
+      (linewidth 0.100000)\r
+      (plotframeref false)\r
+      (viasonmask false)\r
+      (mode 1)\r
+      (useauxorigin false)\r
+      (hpglpennumber 1)\r
+      (hpglpenspeed 20)\r
+      (hpglpendiameter 15.000000)\r
+      (psnegative false)\r
+      (psa4output false)\r
+      (plotreference true)\r
+      (plotvalue true)\r
+      (plotinvisibletext false)\r
+      (padsonsilk false)\r
+      (subtractmaskfromsilk false)\r
+      (outputformat 4)\r
+      (mirror false)\r
+      (drillshape 0)\r
+      (scaleselection 1)\r
+      (outputdirectory ""))\r
+  )\r
+\r
+  (net 0 "")\r
+  (net 1 "Net-(P8-Pad3)")\r
+  (net 2 "Net-(P8-Pad7)")\r
+  (net 3 "Net-(P8-Pad8)")\r
+  (net 4 "Net-(P8-Pad9)")\r
+  (net 5 "Net-(P8-Pad10)")\r
+  (net 6 "Net-(P8-Pad13)")\r
+  (net 7 "Net-(P8-Pad19)")\r
+  (net 8 "Net-(P8-Pad20)")\r
+  (net 9 "Net-(P8-Pad21)")\r
+  (net 10 "Net-(P8-Pad22)")\r
+  (net 11 "Net-(P8-Pad23)")\r
+  (net 12 "Net-(P8-Pad24)")\r
+  (net 13 "Net-(P8-Pad25)")\r
+  (net 14 "Net-(P8-Pad26)")\r
+  (net 15 "Net-(P8-Pad27)")\r
+  (net 16 "Net-(P8-Pad28)")\r
+  (net 17 "Net-(P8-Pad29)")\r
+  (net 18 "Net-(P8-Pad30)")\r
+  (net 19 "Net-(P8-Pad31)")\r
+  (net 20 "Net-(P8-Pad32)")\r
+  (net 21 "Net-(P8-Pad33)")\r
+  (net 22 "Net-(P8-Pad34)")\r
+  (net 23 "Net-(P8-Pad35)")\r
+  (net 24 "Net-(P8-Pad36)")\r
+  (net 25 "Net-(P8-Pad37)")\r
+  (net 26 "Net-(P8-Pad38)")\r
+  (net 27 "Net-(P8-Pad39)")\r
+  (net 28 "Net-(P8-Pad40)")\r
+  (net 29 "Net-(P8-Pad41)")\r
+  (net 30 "Net-(P8-Pad42)")\r
+  (net 31 "Net-(P8-Pad44)")\r
+  (net 32 "Net-(P8-Pad46)")\r
+  (net 33 "Net-(P9-Pad11)")\r
+  (net 34 "Net-(P9-Pad12)")\r
+  (net 35 "Net-(P9-Pad13)")\r
+  (net 36 "Net-(P9-Pad14)")\r
+  (net 37 "Net-(P9-Pad15)")\r
+  (net 38 "Net-(P9-Pad16)")\r
+  (net 39 "Net-(P9-Pad17)")\r
+  (net 40 "Net-(P9-Pad18)")\r
+  (net 41 "Net-(P9-Pad19)")\r
+  (net 42 "Net-(P9-Pad20)")\r
+  (net 43 "Net-(P9-Pad21)")\r
+  (net 44 "Net-(P9-Pad22)")\r
+  (net 45 "Net-(P9-Pad23)")\r
+  (net 46 "Net-(P9-Pad24)")\r
+  (net 47 "Net-(P9-Pad25)")\r
+  (net 48 "Net-(P9-Pad26)")\r
+  (net 49 "Net-(P9-Pad27)")\r
+  (net 50 "Net-(P9-Pad28)")\r
+  (net 51 "Net-(P9-Pad29)")\r
+  (net 52 "Net-(P9-Pad30)")\r
+  (net 53 "Net-(P9-Pad31)")\r
+  (net 54 "Net-(P9-Pad33)")\r
+  (net 55 "Net-(P9-Pad35)")\r
+  (net 56 "Net-(P9-Pad36)")\r
+  (net 57 "Net-(P9-Pad37)")\r
+  (net 58 "Net-(P9-Pad38)")\r
+  (net 59 "Net-(P9-Pad39)")\r
+  (net 60 "Net-(P9-Pad40)")\r
+  (net 61 "Net-(P9-Pad41)")\r
+  (net 62 "Net-(P9-Pad42)")\r
+  (net 63 PWR_BUT)\r
+  (net 64 SYS_RESETN)\r
+  (net 65 VDD_ADC)\r
+  (net 66 GNDA_ADC)\r
+  (net 67 SR1_CLR)\r
+  (net 68 SR1_SHLD)\r
+  (net 69 SR1_CLK)\r
+  (net 70 SR1_CLKINH)\r
+  (net 71 SR1_QH_T)\r
+  (net 72 5v)\r
+  (net 73 BB3.3)\r
+  (net 74 SR1_QH)\r
+  (net 75 SR1_CLR_T)\r
+  (net 76 SR1_SHLD_T)\r
+  (net 77 SR1_CLKINH_T)\r
+  (net 78 SR1_CLK_T)\r
+  (net 79 7SEG_CLK)\r
+  (net 80 7SEG_DIO)\r
+  (net 81 SR6_QH_T)\r
+  (net 82 SR5_QH_T)\r
+  (net 83 SR4_QH_T)\r
+  (net 84 SR3_QH_T)\r
+  (net 85 SR2_QH_T)\r
+  (net 86 +3V3)\r
+  (net 87 SR2_QH__T)\r
+  (net 88 SR2_QH)\r
+  (net 89 SR3_QH)\r
+  (net 90 SR4_QH)\r
+  (net 91 SR5_QH)\r
+  (net 92 SR6_QH)\r
+  (net 93 7SEG_DIO_T)\r
+  (net 94 7SEG_CLK_T)\r
+  (net 95 e8r)\r
+  (net 96 e7r)\r
+  (net 97 e6r)\r
+  (net 98 e5r)\r
+  (net 99 e4r)\r
+  (net 100 e3r)\r
+  (net 101 e2r)\r
+  (net 102 e1r)\r
+  (net 103 a1r)\r
+  (net 104 a2r)\r
+  (net 105 a3r)\r
+  (net 106 a4r)\r
+  (net 107 a5r)\r
+  (net 108 a6r)\r
+  (net 109 a7r)\r
+  (net 110 a8r)\r
+  (net 111 b8r)\r
+  (net 112 b7r)\r
+  (net 113 b6r)\r
+  (net 114 b5r)\r
+  (net 115 b4r)\r
+  (net 116 b3r)\r
+  (net 117 b2r)\r
+  (net 118 b1r)\r
+  (net 119 c1r)\r
+  (net 120 c2r)\r
+  (net 121 c3r)\r
+  (net 122 c4r)\r
+  (net 123 c5r)\r
+  (net 124 c6r)\r
+  (net 125 c7r)\r
+  (net 126 c8r)\r
+  (net 127 d8r)\r
+  (net 128 d7r)\r
+  (net 129 d6r)\r
+  (net 130 d5r)\r
+  (net 131 d4r)\r
+  (net 132 d3r)\r
+  (net 133 d2r)\r
+  (net 134 d1r)\r
+  (net 135 f1r)\r
+  (net 136 f2r)\r
+  (net 137 f3r)\r
+  (net 138 f4r)\r
+  (net 139 f5r)\r
+  (net 140 f6r)\r
+  (net 141 f7r)\r
+  (net 142 f8r)\r
+  (net 143 "Net-(P8-Pad2)")\r
+  (net 144 "Net-(P8-Pad1)")\r
+  (net 145 GNDD)\r
+  (net 146 GND)\r
+  (net 147 "Net-(P9-Pad1)")\r
+\r
+  (net_class Default "To jest domyślna klasa połączeń."\r
+    (clearance 0.2)\r
+    (trace_width 0.25)\r
+    (via_dia 0.6)\r
+    (via_drill 0.4)\r
+    (uvia_dia 0.3)\r
+    (uvia_drill 0.1)\r
+    (add_net +3V3)\r
+    (add_net 5v)\r
+    (add_net 7SEG_CLK)\r
+    (add_net 7SEG_CLK_T)\r
+    (add_net 7SEG_DIO)\r
+    (add_net 7SEG_DIO_T)\r
+    (add_net BB3.3)\r
+    (add_net GND)\r
+    (add_net GNDA_ADC)\r
+    (add_net GNDD)\r
+    (add_net "Net-(P8-Pad1)")\r
+    (add_net "Net-(P8-Pad10)")\r
+    (add_net "Net-(P8-Pad13)")\r
+    (add_net "Net-(P8-Pad19)")\r
+    (add_net "Net-(P8-Pad2)")\r
+    (add_net "Net-(P8-Pad20)")\r
+    (add_net "Net-(P8-Pad21)")\r
+    (add_net "Net-(P8-Pad22)")\r
+    (add_net "Net-(P8-Pad23)")\r
+    (add_net "Net-(P8-Pad24)")\r
+    (add_net "Net-(P8-Pad25)")\r
+    (add_net "Net-(P8-Pad26)")\r
+    (add_net "Net-(P8-Pad27)")\r
+    (add_net "Net-(P8-Pad28)")\r
+    (add_net "Net-(P8-Pad29)")\r
+    (add_net "Net-(P8-Pad3)")\r
+    (add_net "Net-(P8-Pad30)")\r
+    (add_net "Net-(P8-Pad31)")\r
+    (add_net "Net-(P8-Pad32)")\r
+    (add_net "Net-(P8-Pad33)")\r
+    (add_net "Net-(P8-Pad34)")\r
+    (add_net "Net-(P8-Pad35)")\r
+    (add_net "Net-(P8-Pad36)")\r
+    (add_net "Net-(P8-Pad37)")\r
+    (add_net "Net-(P8-Pad38)")\r
+    (add_net "Net-(P8-Pad39)")\r
+    (add_net "Net-(P8-Pad40)")\r
+    (add_net "Net-(P8-Pad41)")\r
+    (add_net "Net-(P8-Pad42)")\r
+    (add_net "Net-(P8-Pad44)")\r
+    (add_net "Net-(P8-Pad46)")\r
+    (add_net "Net-(P8-Pad7)")\r
+    (add_net "Net-(P8-Pad8)")\r
+    (add_net "Net-(P8-Pad9)")\r
+    (add_net "Net-(P9-Pad1)")\r
+    (add_net "Net-(P9-Pad11)")\r
+    (add_net "Net-(P9-Pad12)")\r
+    (add_net "Net-(P9-Pad13)")\r
+    (add_net "Net-(P9-Pad14)")\r
+    (add_net "Net-(P9-Pad15)")\r
+    (add_net "Net-(P9-Pad16)")\r
+    (add_net "Net-(P9-Pad17)")\r
+    (add_net "Net-(P9-Pad18)")\r
+    (add_net "Net-(P9-Pad19)")\r
+    (add_net "Net-(P9-Pad20)")\r
+    (add_net "Net-(P9-Pad21)")\r
+    (add_net "Net-(P9-Pad22)")\r
+    (add_net "Net-(P9-Pad23)")\r
+    (add_net "Net-(P9-Pad24)")\r
+    (add_net "Net-(P9-Pad25)")\r
+    (add_net "Net-(P9-Pad26)")\r
+    (add_net "Net-(P9-Pad27)")\r
+    (add_net "Net-(P9-Pad28)")\r
+    (add_net "Net-(P9-Pad29)")\r
+    (add_net "Net-(P9-Pad30)")\r
+    (add_net "Net-(P9-Pad31)")\r
+    (add_net "Net-(P9-Pad33)")\r
+    (add_net "Net-(P9-Pad35)")\r
+    (add_net "Net-(P9-Pad36)")\r
+    (add_net "Net-(P9-Pad37)")\r
+    (add_net "Net-(P9-Pad38)")\r
+    (add_net "Net-(P9-Pad39)")\r
+    (add_net "Net-(P9-Pad40)")\r
+    (add_net "Net-(P9-Pad41)")\r
+    (add_net "Net-(P9-Pad42)")\r
+    (add_net PWR_BUT)\r
+    (add_net SR1_CLK)\r
+    (add_net SR1_CLKINH)\r
+    (add_net SR1_CLKINH_T)\r
+    (add_net SR1_CLK_T)\r
+    (add_net SR1_CLR)\r
+    (add_net SR1_CLR_T)\r
+    (add_net SR1_QH)\r
+    (add_net SR1_QH_T)\r
+    (add_net SR1_SHLD)\r
+    (add_net SR1_SHLD_T)\r
+    (add_net SR2_QH)\r
+    (add_net SR2_QH_T)\r
+    (add_net SR2_QH__T)\r
+    (add_net SR3_QH)\r
+    (add_net SR3_QH_T)\r
+    (add_net SR4_QH)\r
+    (add_net SR4_QH_T)\r
+    (add_net SR5_QH)\r
+    (add_net SR5_QH_T)\r
+    (add_net SR6_QH)\r
+    (add_net SR6_QH_T)\r
+    (add_net SYS_RESETN)\r
+    (add_net VDD_ADC)\r
+    (add_net a1r)\r
+    (add_net a2r)\r
+    (add_net a3r)\r
+    (add_net a4r)\r
+    (add_net a5r)\r
+    (add_net a6r)\r
+    (add_net a7r)\r
+    (add_net a8r)\r
+    (add_net b1r)\r
+    (add_net b2r)\r
+    (add_net b3r)\r
+    (add_net b4r)\r
+    (add_net b5r)\r
+    (add_net b6r)\r
+    (add_net b7r)\r
+    (add_net b8r)\r
+    (add_net c1r)\r
+    (add_net c2r)\r
+    (add_net c3r)\r
+    (add_net c4r)\r
+    (add_net c5r)\r
+    (add_net c6r)\r
+    (add_net c7r)\r
+    (add_net c8r)\r
+    (add_net d1r)\r
+    (add_net d2r)\r
+    (add_net d3r)\r
+    (add_net d4r)\r
+    (add_net d5r)\r
+    (add_net d6r)\r
+    (add_net d7r)\r
+    (add_net d8r)\r
+    (add_net e1r)\r
+    (add_net e2r)\r
+    (add_net e3r)\r
+    (add_net e4r)\r
+    (add_net e5r)\r
+    (add_net e6r)\r
+    (add_net e7r)\r
+    (add_net e8r)\r
+    (add_net f1r)\r
+    (add_net f2r)\r
+    (add_net f3r)\r
+    (add_net f4r)\r
+    (add_net f5r)\r
+    (add_net f6r)\r
+    (add_net f7r)\r
+    (add_net f8r)\r
+  )\r
+\r
+  (module MountingHole:MountingHole_2.2mm_M2 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5C8066D6)\r
+    (at 110.22 32.75)\r
+    (descr "Mounting Hole 2.2mm, no annular, M2")\r
+    (tags "mounting hole 2.2mm no annular m2")\r
+    (path /5C827EBA)\r
+    (attr virtual)\r
+    (fp_text reference H3 (at 0 -3.2) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value MountingHole (at 0 3.2) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_circle (center 0 0) (end 2.45 0) (layer F.CrtYd) (width 0.05))\r
+    (fp_circle (center 0 0) (end 2.2 0) (layer Cmts.User) (width 0.15))\r
+    (fp_text user %R (at 0.3 0) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (pad 1 np_thru_hole circle (at 0 0) (size 2.2 2.2) (drill 2.2) (layers *.Cu *.Mask))\r
+  )\r
+\r
+  (module MountingHole:MountingHole_2.2mm_M2 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5C8066C6)\r
+    (at 183.88 32.75)\r
+    (descr "Mounting Hole 2.2mm, no annular, M2")\r
+    (tags "mounting hole 2.2mm no annular m2")\r
+    (path /5C827EC1)\r
+    (attr virtual)\r
+    (fp_text reference H1 (at 0 -3.2) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value MountingHole (at 0 3.2) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_circle (center 0 0) (end 2.45 0) (layer F.CrtYd) (width 0.05))\r
+    (fp_circle (center 0 0) (end 2.2 0) (layer Cmts.User) (width 0.15))\r
+    (fp_text user %R (at 0.3 0) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (pad 1 np_thru_hole circle (at 0 0) (size 2.2 2.2) (drill 2.2) (layers *.Cu *.Mask))\r
+  )\r
+\r
+  (module .pretty:NEW-640456-8 (layer F.Cu) (tedit 5C265171) (tstamp 5C7374E9)\r
+    (at 174.79 61.1124 90)\r
+    (path /5C29AA60)\r
+    (fp_text reference J2 (at 8.89 0 90) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value 640456-8 (at 8.89 0 90) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524))\r
+    (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524))\r
+    (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524))\r
+    (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524))\r
+    (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524))\r
+    (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524))\r
+    (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.Fab) (width 0.1524))\r
+    (fp_line (start -1.397 -3.429) (end -1.397 2.54) (layer F.SilkS) (width 0.1524))\r
+    (fp_line (start 19.177 -3.429) (end -1.397 -3.429) (layer F.SilkS) (width 0.1524))\r
+    (fp_line (start 19.177 2.54) (end 19.177 -3.429) (layer F.SilkS) (width 0.1524))\r
+    (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524))\r
+    (fp_text user * (at 0 0 90) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text user * (at 0 0 90) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0 90) (layer Cmts.User)\r
+      (effects (font (size 0.127 0.127) (thickness 0.002)))\r
+    )\r
+    (pad 8 thru_hole circle (at 0 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 118 b1r))\r
+    (pad 7 thru_hole circle (at 2.54 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 117 b2r))\r
+    (pad 6 thru_hole circle (at 5.08 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 116 b3r))\r
+    (pad 5 thru_hole circle (at 7.62 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 115 b4r))\r
+    (pad 4 thru_hole circle (at 10.16 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 114 b5r))\r
+    (pad 3 thru_hole circle (at 12.7 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 113 b6r))\r
+    (pad 2 thru_hole circle (at 15.24 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 112 b7r))\r
+    (pad 1 thru_hole circle (at 17.78 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 111 b8r))\r
+    (model ${KISYS3DMOD}/c-640456-8-aa-3d.stp\r
+      (offset (xyz 9 0.5 2.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module .pretty:NEW-640456-8 (layer F.Cu) (tedit 5C265171) (tstamp 5C7374C8)\r
+    (at 142.617 61.1124 90)\r
+    (path /5C29ACD3)\r
+    (fp_text reference J3 (at 8.89 0 90) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value 640456-8 (at 8.89 0 90) (layer F.SilkS)\r
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+      (net 109 a7r))\r
+    (pad 1 thru_hole circle (at 17.78 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 110 a8r))\r
+    (model ${KISYS3DMOD}/c-640456-8-aa-3d.stp\r
+      (offset (xyz 9 0.5 2.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E47A)\r
+    (at 154.47 128.422)\r
+    (path /5C339CD5)\r
+    (fp_text reference U7 (at -4.57835 -20.3229) (layer F.SilkS)\r
+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+      (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+    )\r
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+      (net 72 5v))\r
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+      (net 134 d1r))\r
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+      (net 88 SR2_QH))\r
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+      (net 133 d2r))\r
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+      (net 132 d3r))\r
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+      (net 131 d4r))\r
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+      (net 75 SR1_CLR_T))\r
+    (pad 8 thru_hole circle (at -7.62 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
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+      (net 78 SR1_CLK_T))\r
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+      (net 77 SR1_CLKINH_T))\r
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+      (net 130 d5r))\r
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+      (net 128 d7r))\r
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+      (net 127 d8r))\r
+    (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step\r
+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E41B)\r
+    (at 168.44 128.422)\r
+    (path /5C343F96)\r
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+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+    )\r
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+      (net 135 f1r))\r
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+      (net 136 f2r))\r
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+      (net 138 f4r))\r
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+      (net 75 SR1_CLR_T))\r
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+      (net 146 GND))\r
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+      (net 77 SR1_CLKINH_T))\r
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+      (net 141 f7r))\r
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+      (net 142 f8r))\r
+    (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step\r
+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E3BC)\r
+    (at 160.82 83.972)\r
+    (path /5C2E1ABC)\r
+    (fp_text reference U1 (at -4.57835 -20.3229) (layer F.SilkS)\r
+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+      (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+    )\r
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+      (net 73 BB3.3))\r
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+      (net 81 SR6_QH_T))\r
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+      (net 91 SR5_QH))\r
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+      (net 83 SR4_QH_T))\r
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+      (net 90 SR4_QH))\r
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+      (net 146 GND))\r
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+      (net 84 SR3_QH_T))\r
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+      (net 74 SR1_QH))\r
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+      (net 71 SR1_QH_T))\r
+    (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 72 5v))\r
+    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step\r
+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E35D)\r
+    (at 140.5 66.1924 180)\r
+    (path /5C2E1BA8)\r
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+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+      (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+    )\r
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+    (pad 6 thru_hole circle (at -7.62 -5.08) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 77 SR1_CLKINH_T))\r
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+      (net 98 e5r))\r
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+      (net 97 e6r))\r
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+      (net 96 e7r))\r
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+      (net 95 e8r))\r
+    (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step\r
+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E29F)\r
+    (at 140.5 128.422)\r
+    (path /5C347042)\r
+    (fp_text reference U4 (at -4.57835 -20.3229) (layer F.SilkS)\r
+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+      (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+    )\r
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+    (pad 16 thru_hole circle (at 0 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 72 5v))\r
+    (pad 15 thru_hole circle (at 0 -15.24) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 76 SR1_SHLD_T))\r
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+      (net 103 a1r))\r
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+      (net 92 SR6_QH))\r
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+      (net 104 a2r))\r
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+      (net 105 a3r))\r
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+      (net 106 a4r))\r
+    (pad 9 thru_hole circle (at 0 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 75 SR1_CLR_T))\r
+    (pad 8 thru_hole circle (at -7.62 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
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+      (net 78 SR1_CLK_T))\r
+    (pad 6 thru_hole circle (at -7.62 -5.08) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 77 SR1_CLKINH_T))\r
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+      (net 107 a5r))\r
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+      (net 108 a6r))\r
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+      (net 109 a7r))\r
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+      (net 110 a8r))\r
+    (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step\r
+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E240)\r
+    (at 154.47 106.604)\r
+    (path /5C346672)\r
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+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+      (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+    )\r
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+    )\r
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+      (net 146 GND))\r
+    (model ${KIPRJMOD}/4609x.stp\r
+      (offset (xyz -1.25 0 1.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D6600)\r
+    (at 134.35 61.9429 90)\r
+    (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+    (path /5C2907A3)\r
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+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
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+      (net 133 d2r))\r
+    (pad 2 thru_hole circle (at 2.54 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 134 d1r))\r
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KIPRJMOD}/4609x.stp\r
+      (offset (xyz -1.25 0 1.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D65E4)\r
+    (at 149.59 61.9429 90)\r
+    (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+    (path /5C3CDF3A)\r
+    (fp_text reference RN3 (at 10.3 -2.2 90) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value 4609X-101-103LF (at 9.7 2.7 90) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
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+      (net 111 b8r))\r
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+      (net 112 b7r))\r
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+      (net 113 b6r))\r
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+      (net 114 b5r))\r
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+      (net 115 b4r))\r
+    (pad 4 thru_hole circle (at 7.62 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 116 b3r))\r
+    (pad 3 thru_hole circle (at 5.08 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 117 b2r))\r
+    (pad 2 thru_hole circle (at 2.54 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 118 b1r))\r
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KIPRJMOD}/4609x.stp\r
+      (offset (xyz -1.25 0 1.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D65C8)\r
+    (at 139.43 140.7)\r
+    (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+    (path /5C3CDE16)\r
+    (fp_text reference RN5 (at 10.3 -2.2) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value 4609X-101-103LF (at 9.7 2.7) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_line (start -1.24 -1.25) (end 21.57 -1.25) (layer F.Fab) (width 0.1))\r
+    (fp_line (start -1.24 1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1))\r
+    (fp_line (start -1.24 -1.25) (end -1.24 1.25) (layer F.Fab) (width 0.1))\r
+    (fp_line (start 21.57 -1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1))\r
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+    (fp_text user %R (at 9.3 0.1) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
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+    (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05))\r
+    (pad 9 thru_hole circle (at 20.32 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 126 c8r))\r
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+      (net 125 c7r))\r
+    (pad 7 thru_hole circle (at 15.24 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 124 c6r))\r
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+      (net 123 c5r))\r
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+      (net 122 c4r))\r
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+      (net 121 c3r))\r
+    (pad 3 thru_hole circle (at 5.08 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 120 c2r))\r
+    (pad 2 thru_hole circle (at 2.54 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 119 c1r))\r
+    (pad 1 thru_hole rect (at 0 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KIPRJMOD}/4609x.stp\r
+      (offset (xyz -1.25 0 1.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D65AC)\r
+    (at 139.43 147.05)\r
+    (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+    (path /5C3CDDAC)\r
+    (fp_text reference RN6 (at 10.3 -2.2) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value 4609X-101-103LF (at 9.7 2.7) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_line (start -1.24 -1.25) (end 21.57 -1.25) (layer F.Fab) (width 0.1))\r
+    (fp_line (start -1.24 1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1))\r
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+    (fp_line (start 21.7 -1.4) (end 21.2 -1.4) (layer F.SilkS) (width 0.1))\r
+    (fp_line (start 21.7 -1.4) (end 21.7 -0.9) (layer F.SilkS) (width 0.1))\r
+    (fp_line (start 21.7 1.4) (end 21.7 0.9) (layer F.SilkS) (width 0.1))\r
+    (fp_line (start 21.7 1.4) (end 21.2 1.4) (layer F.SilkS) (width 0.1))\r
+    (fp_text user %R (at 9.3 0.1) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
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+    (fp_line (start 21.82 -1.5) (end -1.49 -1.5) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05))\r
+    (pad 9 thru_hole circle (at 20.32 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 142 f8r))\r
+    (pad 8 thru_hole circle (at 17.78 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 141 f7r))\r
+    (pad 7 thru_hole circle (at 15.24 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 140 f6r))\r
+    (pad 6 thru_hole circle (at 12.7 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 139 f5r))\r
+    (pad 5 thru_hole circle (at 10.16 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 138 f4r))\r
+    (pad 4 thru_hole circle (at 7.62 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 137 f3r))\r
+    (pad 3 thru_hole circle (at 5.08 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 136 f2r))\r
+    (pad 2 thru_hole circle (at 2.54 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 135 f1r))\r
+    (pad 1 thru_hole rect (at 0 0) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KIPRJMOD}/4609x.stp\r
+      (offset (xyz -1.25 0 1.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module digikey-footprints:USE-SIP-9_P2.54mm (layer F.Cu) (tedit 5C264B03) (tstamp 5C4D6590)\r
+    (at 166.1 61.9429 90)\r
+    (descr http://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+    (path /5C3CDCE8)\r
+    (fp_text reference RN4 (at 10.3 -2.2 90) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value 4609X-101-103LF (at 9.7 2.7 90) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_line (start -1.24 -1.25) (end 21.57 -1.25) (layer F.Fab) (width 0.1))\r
+    (fp_line (start -1.24 1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1))\r
+    (fp_line (start -1.24 -1.25) (end -1.24 1.25) (layer F.Fab) (width 0.1))\r
+    (fp_line (start 21.57 -1.25) (end 21.57 1.25) (layer F.Fab) (width 0.1))\r
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+    (fp_line (start -1.4 -1.4) (end -1.4 1.4) (layer F.SilkS) (width 0.1))\r
+    (fp_line (start -0.9 -1.4) (end -1.4 -1.4) (layer F.SilkS) (width 0.1))\r
+    (fp_line (start 21.7 -1.4) (end 21.2 -1.4) (layer F.SilkS) (width 0.1))\r
+    (fp_line (start 21.7 -1.4) (end 21.7 -0.9) (layer F.SilkS) (width 0.1))\r
+    (fp_line (start 21.7 1.4) (end 21.7 0.9) (layer F.SilkS) (width 0.1))\r
+    (fp_line (start 21.7 1.4) (end 21.2 1.4) (layer F.SilkS) (width 0.1))\r
+    (fp_text user %R (at 9.3 0.1 90) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_line (start -1.49 -1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start 21.82 -1.5) (end 21.82 1.5) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start 21.82 -1.5) (end -1.49 -1.5) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start 21.82 1.5) (end -1.49 1.5) (layer F.CrtYd) (width 0.05))\r
+    (pad 9 thru_hole circle (at 20.32 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 95 e8r))\r
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+      (net 96 e7r))\r
+    (pad 7 thru_hole circle (at 15.24 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 97 e6r))\r
+    (pad 6 thru_hole circle (at 12.7 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 98 e5r))\r
+    (pad 5 thru_hole circle (at 10.16 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 99 e4r))\r
+    (pad 4 thru_hole circle (at 7.62 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 100 e3r))\r
+    (pad 3 thru_hole circle (at 5.08 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 101 e2r))\r
+    (pad 2 thru_hole circle (at 2.54 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 102 e1r))\r
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.81 1.81) (drill 0.81) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KIPRJMOD}/4609x.stp\r
+      (offset (xyz -1.25 0 1.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module Socket_BeagleBone_Black:Socket_BeagleBone_Black (layer F.Cu) (tedit 0) (tstamp 55DF7717)\r
+    (at 173.52 89.052)\r
+    (descr "Through hole pin header")\r
+    (tags "pin header")\r
+    (path /55DF7DE1)\r
+    (fp_text reference P8 (at 0 -5.1) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value BeagleBone_Black_Header (at 0 -3.1) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 57.15) (end -1.27 57.15) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start -1.27 57.15) (end -1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 57.15) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start -1.75 57.65) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start 4.3 -1.75) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start -1.75 -1.75) (end -1.75 57.65) (layer F.CrtYd) (width 0.05))\r
+    (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 32 "Net-(P8-Pad46)"))\r
+    (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 79 7SEG_CLK))\r
+    (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 31 "Net-(P8-Pad44)"))\r
+    (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 80 7SEG_DIO))\r
+    (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 30 "Net-(P8-Pad42)"))\r
+    (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 29 "Net-(P8-Pad41)"))\r
+    (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 28 "Net-(P8-Pad40)"))\r
+    (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 27 "Net-(P8-Pad39)"))\r
+    (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 26 "Net-(P8-Pad38)"))\r
+    (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 25 "Net-(P8-Pad37)"))\r
+    (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 24 "Net-(P8-Pad36)"))\r
+    (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 23 "Net-(P8-Pad35)"))\r
+    (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 22 "Net-(P8-Pad34)"))\r
+    (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 21 "Net-(P8-Pad33)"))\r
+    (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 20 "Net-(P8-Pad32)"))\r
+    (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 19 "Net-(P8-Pad31)"))\r
+    (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 18 "Net-(P8-Pad30)"))\r
+    (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 17 "Net-(P8-Pad29)"))\r
+    (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 16 "Net-(P8-Pad28)"))\r
+    (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 15 "Net-(P8-Pad27)"))\r
+    (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 14 "Net-(P8-Pad26)"))\r
+    (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 13 "Net-(P8-Pad25)"))\r
+    (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 12 "Net-(P8-Pad24)"))\r
+    (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 11 "Net-(P8-Pad23)"))\r
+    (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 10 "Net-(P8-Pad22)"))\r
+    (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 9 "Net-(P8-Pad21)"))\r
+    (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 8 "Net-(P8-Pad20)"))\r
+    (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 7 "Net-(P8-Pad19)"))\r
+    (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 81 SR6_QH_T))\r
+    (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 67 SR1_CLR))\r
+    (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 82 SR5_QH_T))\r
+    (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 68 SR1_SHLD))\r
+    (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 83 SR4_QH_T))\r
+    (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 6 "Net-(P8-Pad13)"))\r
+    (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 84 SR3_QH_T))\r
+    (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 69 SR1_CLK))\r
+    (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 5 "Net-(P8-Pad10)"))\r
+    (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 4 "Net-(P8-Pad9)"))\r
+    (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 3 "Net-(P8-Pad8)"))\r
+    (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 2 "Net-(P8-Pad7)"))\r
+    (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 85 SR2_QH_T))\r
+    (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 70 SR1_CLKINH))\r
+    (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 71 SR1_QH_T))\r
+    (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 1 "Net-(P8-Pad3)"))\r
+    (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 143 "Net-(P8-Pad2)"))\r
+    (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 144 "Net-(P8-Pad1)"))\r
+    (model ${KIPRJMOD}/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl\r
+      (offset (xyz 1.269999980926514 -27.9399995803833 0))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module Socket_BeagleBone_Black:Socket_BeagleBone_Black (layer F.Cu) (tedit 0) (tstamp 55DF7748)\r
+    (at 125.26 89.052)\r
+    (descr "Through hole pin header")\r
+    (tags "pin header")\r
+    (path /55DF7DBA)\r
+    (fp_text reference P9 (at 0 -5.1) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value BeagleBone_Black_Header (at 0 -3.1) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 57.15) (end -1.27 57.15) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start -1.27 57.15) (end -1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 57.15) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start -1.75 57.65) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start 4.3 -1.75) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start -1.75 -1.75) (end -1.75 57.65) (layer F.CrtYd) (width 0.05))\r
+    (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 145 GNDD))\r
+    (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 145 GNDD))\r
+    (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 145 GNDD))\r
+    (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 145 GNDD))\r
+    (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 62 "Net-(P9-Pad42)"))\r
+    (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 61 "Net-(P9-Pad41)"))\r
+    (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 60 "Net-(P9-Pad40)"))\r
+    (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 59 "Net-(P9-Pad39)"))\r
+    (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 58 "Net-(P9-Pad38)"))\r
+    (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 57 "Net-(P9-Pad37)"))\r
+    (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 56 "Net-(P9-Pad36)"))\r
+    (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 55 "Net-(P9-Pad35)"))\r
+    (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 66 GNDA_ADC))\r
+    (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 54 "Net-(P9-Pad33)"))\r
+    (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 65 VDD_ADC))\r
+    (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 53 "Net-(P9-Pad31)"))\r
+    (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 52 "Net-(P9-Pad30)"))\r
+    (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 51 "Net-(P9-Pad29)"))\r
+    (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 50 "Net-(P9-Pad28)"))\r
+    (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 49 "Net-(P9-Pad27)"))\r
+    (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 48 "Net-(P9-Pad26)"))\r
+    (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 47 "Net-(P9-Pad25)"))\r
+    (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 46 "Net-(P9-Pad24)"))\r
+    (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 45 "Net-(P9-Pad23)"))\r
+    (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 44 "Net-(P9-Pad22)"))\r
+    (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 43 "Net-(P9-Pad21)"))\r
+    (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 42 "Net-(P9-Pad20)"))\r
+    (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 41 "Net-(P9-Pad19)"))\r
+    (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 40 "Net-(P9-Pad18)"))\r
+    (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 39 "Net-(P9-Pad17)"))\r
+    (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 38 "Net-(P9-Pad16)"))\r
+    (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 37 "Net-(P9-Pad15)"))\r
+    (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 36 "Net-(P9-Pad14)"))\r
+    (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 35 "Net-(P9-Pad13)"))\r
+    (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 34 "Net-(P9-Pad12)"))\r
+    (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 33 "Net-(P9-Pad11)"))\r
+    (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 64 SYS_RESETN))\r
+    (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 63 PWR_BUT))\r
+    (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 72 5v))\r
+    (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 72 5v))\r
+    (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 72 5v))\r
+    (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 72 5v))\r
+    (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 86 +3V3))\r
+    (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 86 +3V3))\r
+    (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 146 GND))\r
+    (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 147 "Net-(P9-Pad1)"))\r
+    (model ${KIPRJMOD}/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl\r
+      (offset (xyz 1.269999980926514 -27.9399995803833 0))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module MountingHole:MountingHole_2.2mm_M2 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5C8066CE)\r
+    (at 110.22 150.86)\r
+    (descr "Mounting Hole 2.2mm, no annular, M2")\r
+    (tags "mounting hole 2.2mm no annular m2")\r
+    (path /5C81F04C)\r
+    (attr virtual)\r
+    (fp_text reference H2 (at 0 -3.2) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value MountingHole (at 0 3.2) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_circle (center 0 0) (end 2.45 0) (layer F.CrtYd) (width 0.05))\r
+    (fp_circle (center 0 0) (end 2.2 0) (layer Cmts.User) (width 0.15))\r
+    (fp_text user %R (at 0.3 0) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (pad 1 np_thru_hole circle (at 0 0) (size 2.2 2.2) (drill 2.2) (layers *.Cu *.Mask))\r
+  )\r
+\r
+  (module MountingHole:MountingHole_2.2mm_M2 (layer F.Cu) (tedit 56D1B4CB) (tstamp 5C8066DE)\r
+    (at 183.88 150.86)\r
+    (descr "Mounting Hole 2.2mm, no annular, M2")\r
+    (tags "mounting hole 2.2mm no annular m2")\r
+    (path /5C81EB00)\r
+    (attr virtual)\r
+    (fp_text reference H4 (at 0 -3.2) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value MountingHole (at 0 3.2) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_circle (center 0 0) (end 2.45 0) (layer F.CrtYd) (width 0.05))\r
+    (fp_circle (center 0 0) (end 2.2 0) (layer Cmts.User) (width 0.15))\r
+    (fp_text user %R (at 0.3 0) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (pad 1 np_thru_hole circle (at 0 0) (size 2.2 2.2) (drill 2.2) (layers *.Cu *.Mask))\r
+  )\r
+\r
+  (gr_line (start 106.41 154.67) (end 187.69 154.67) (layer Edge.Cuts) (width 0.00254))\r
+  (gr_line (start 106.41 28.94) (end 106.41 154.67) (layer Edge.Cuts) (width 0.00254))\r
+  (gr_line (start 110.22 28.94) (end 106.41 28.94) (layer Edge.Cuts) (width 0.00254))\r
+  (gr_line (start 187.69 28.94) (end 110.22 28.94) (layer Edge.Cuts) (width 0.00254))\r
+  (gr_line (start 187.69 154.67) (end 187.69 28.94) (layer Edge.Cuts) (width 0.00254))\r
+\r
+)\r

diff --git a/bbb-bort.kicad_pcb-bak b/bbb-bort.kicad_pcb-bak
new file mode 100644 (file)
index 0000000..ac4b4cd
--- /dev/null
+++ b/bbb-bort.kicad_pcb-bak
@@ -0,0 +1,2319 @@
+(kicad_pcb (version 20171130) (host pcbnew "(5.0.1)-3")\r
+\r
+  (general\r
+    (thickness 1.6)\r
+    (drawings 5)\r
+    (tracks 0)\r
+    (zones 0)\r
+    (modules 22)\r
+    (nets 148)\r
+  )\r
+\r
+  (page A4)\r
+  (layers\r
+    (0 F.Cu signal)\r
+    (31 B.Cu signal)\r
+    (32 B.Adhes user)\r
+    (33 F.Adhes user)\r
+    (34 B.Paste user)\r
+    (35 F.Paste user)\r
+    (36 B.SilkS user)\r
+    (37 F.SilkS user)\r
+    (38 B.Mask user)\r
+    (39 F.Mask user)\r
+    (40 Dwgs.User user)\r
+    (41 Cmts.User user)\r
+    (42 Eco1.User user)\r
+    (43 Eco2.User user)\r
+    (44 Edge.Cuts user)\r
+    (45 Margin user)\r
+    (46 B.CrtYd user)\r
+    (47 F.CrtYd user)\r
+    (48 B.Fab user)\r
+    (49 F.Fab user)\r
+  )\r
+\r
+  (setup\r
+    (last_trace_width 0.25)\r
+    (trace_clearance 0.2)\r
+    (zone_clearance 0.508)\r
+    (zone_45_only no)\r
+    (trace_min 0.2)\r
+    (segment_width 0.2)\r
+    (edge_width 0.00254)\r
+    (via_size 0.6)\r
+    (via_drill 0.4)\r
+    (via_min_size 0.4)\r
+    (via_min_drill 0.3)\r
+    (uvia_size 0.3)\r
+    (uvia_drill 0.1)\r
+    (uvias_allowed no)\r
+    (uvia_min_size 0.2)\r
+    (uvia_min_drill 0.1)\r
+    (pcb_text_width 0.3)\r
+    (pcb_text_size 1.5 1.5)\r
+    (mod_edge_width 0.15)\r
+    (mod_text_size 1 1)\r
+    (mod_text_width 0.15)\r
+    (pad_size 1.7272 1.7272)\r
+    (pad_drill 1.016)\r
+    (pad_to_mask_clearance 0)\r
+    (solder_mask_min_width 0.25)\r
+    (aux_axis_origin 0 0)\r
+    (grid_origin 115.3 145.78)\r
+    (visible_elements 7FFFF7FF)\r
+    (pcbplotparams\r
+      (layerselection 0x01030_80000001)\r
+      (usegerberextensions false)\r
+      (usegerberattributes false)\r
+      (usegerberadvancedattributes false)\r
+      (creategerberjobfile false)\r
+      (excludeedgelayer true)\r
+      (linewidth 0.100000)\r
+      (plotframeref false)\r
+      (viasonmask false)\r
+      (mode 1)\r
+      (useauxorigin false)\r
+      (hpglpennumber 1)\r
+      (hpglpenspeed 20)\r
+      (hpglpendiameter 15.000000)\r
+      (psnegative false)\r
+      (psa4output false)\r
+      (plotreference true)\r
+      (plotvalue true)\r
+      (plotinvisibletext false)\r
+      (padsonsilk false)\r
+      (subtractmaskfromsilk false)\r
+      (outputformat 4)\r
+      (mirror false)\r
+      (drillshape 0)\r
+      (scaleselection 1)\r
+      (outputdirectory ""))\r
+  )\r
+\r
+  (net 0 "")\r
+  (net 1 "Net-(P8-Pad3)")\r
+  (net 2 "Net-(P8-Pad7)")\r
+  (net 3 "Net-(P8-Pad8)")\r
+  (net 4 "Net-(P8-Pad9)")\r
+  (net 5 "Net-(P8-Pad10)")\r
+  (net 6 "Net-(P8-Pad13)")\r
+  (net 7 "Net-(P8-Pad19)")\r
+  (net 8 "Net-(P8-Pad20)")\r
+  (net 9 "Net-(P8-Pad21)")\r
+  (net 10 "Net-(P8-Pad22)")\r
+  (net 11 "Net-(P8-Pad23)")\r
+  (net 12 "Net-(P8-Pad24)")\r
+  (net 13 "Net-(P8-Pad25)")\r
+  (net 14 "Net-(P8-Pad26)")\r
+  (net 15 "Net-(P8-Pad27)")\r
+  (net 16 "Net-(P8-Pad28)")\r
+  (net 17 "Net-(P8-Pad29)")\r
+  (net 18 "Net-(P8-Pad30)")\r
+  (net 19 "Net-(P8-Pad31)")\r
+  (net 20 "Net-(P8-Pad32)")\r
+  (net 21 "Net-(P8-Pad33)")\r
+  (net 22 "Net-(P8-Pad34)")\r
+  (net 23 "Net-(P8-Pad35)")\r
+  (net 24 "Net-(P8-Pad36)")\r
+  (net 25 "Net-(P8-Pad37)")\r
+  (net 26 "Net-(P8-Pad38)")\r
+  (net 27 "Net-(P8-Pad39)")\r
+  (net 28 "Net-(P8-Pad40)")\r
+  (net 29 "Net-(P8-Pad41)")\r
+  (net 30 "Net-(P8-Pad42)")\r
+  (net 31 "Net-(P8-Pad44)")\r
+  (net 32 "Net-(P8-Pad46)")\r
+  (net 33 "Net-(P9-Pad11)")\r
+  (net 34 "Net-(P9-Pad12)")\r
+  (net 35 "Net-(P9-Pad13)")\r
+  (net 36 "Net-(P9-Pad14)")\r
+  (net 37 "Net-(P9-Pad15)")\r
+  (net 38 "Net-(P9-Pad16)")\r
+  (net 39 "Net-(P9-Pad17)")\r
+  (net 40 "Net-(P9-Pad18)")\r
+  (net 41 "Net-(P9-Pad19)")\r
+  (net 42 "Net-(P9-Pad20)")\r
+  (net 43 "Net-(P9-Pad21)")\r
+  (net 44 "Net-(P9-Pad22)")\r
+  (net 45 "Net-(P9-Pad23)")\r
+  (net 46 "Net-(P9-Pad24)")\r
+  (net 47 "Net-(P9-Pad25)")\r
+  (net 48 "Net-(P9-Pad26)")\r
+  (net 49 "Net-(P9-Pad27)")\r
+  (net 50 "Net-(P9-Pad28)")\r
+  (net 51 "Net-(P9-Pad29)")\r
+  (net 52 "Net-(P9-Pad30)")\r
+  (net 53 "Net-(P9-Pad31)")\r
+  (net 54 "Net-(P9-Pad33)")\r
+  (net 55 "Net-(P9-Pad35)")\r
+  (net 56 "Net-(P9-Pad36)")\r
+  (net 57 "Net-(P9-Pad37)")\r
+  (net 58 "Net-(P9-Pad38)")\r
+  (net 59 "Net-(P9-Pad39)")\r
+  (net 60 "Net-(P9-Pad40)")\r
+  (net 61 "Net-(P9-Pad41)")\r
+  (net 62 "Net-(P9-Pad42)")\r
+  (net 63 PWR_BUT)\r
+  (net 64 SYS_RESETN)\r
+  (net 65 VDD_ADC)\r
+  (net 66 GNDA_ADC)\r
+  (net 67 SR1_CLR)\r
+  (net 68 SR1_SHLD)\r
+  (net 69 SR1_CLK)\r
+  (net 70 SR1_CLKINH)\r
+  (net 71 SR1_QH_T)\r
+  (net 72 5v)\r
+  (net 73 BB3.3)\r
+  (net 74 SR1_QH)\r
+  (net 75 SR1_CLR_T)\r
+  (net 76 SR1_SHLD_T)\r
+  (net 77 SR1_CLKINH_T)\r
+  (net 78 SR1_CLK_T)\r
+  (net 79 7SEG_CLK)\r
+  (net 80 7SEG_DIO)\r
+  (net 81 SR6_QH_T)\r
+  (net 82 SR5_QH_T)\r
+  (net 83 SR4_QH_T)\r
+  (net 84 SR3_QH_T)\r
+  (net 85 SR2_QH_T)\r
+  (net 86 +3V3)\r
+  (net 87 SR2_QH__T)\r
+  (net 88 SR2_QH)\r
+  (net 89 SR3_QH)\r
+  (net 90 SR4_QH)\r
+  (net 91 SR5_QH)\r
+  (net 92 SR6_QH)\r
+  (net 93 7SEG_DIO_T)\r
+  (net 94 7SEG_CLK_T)\r
+  (net 95 e8r)\r
+  (net 96 e7r)\r
+  (net 97 e6r)\r
+  (net 98 e5r)\r
+  (net 99 e4r)\r
+  (net 100 e3r)\r
+  (net 101 e2r)\r
+  (net 102 e1r)\r
+  (net 103 a1r)\r
+  (net 104 a2r)\r
+  (net 105 a3r)\r
+  (net 106 a4r)\r
+  (net 107 a5r)\r
+  (net 108 a6r)\r
+  (net 109 a7r)\r
+  (net 110 a8r)\r
+  (net 111 b8r)\r
+  (net 112 b7r)\r
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+  (net 114 b5r)\r
+  (net 115 b4r)\r
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+  (net 117 b2r)\r
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+  (net 120 c2r)\r
+  (net 121 c3r)\r
+  (net 122 c4r)\r
+  (net 123 c5r)\r
+  (net 124 c6r)\r
+  (net 125 c7r)\r
+  (net 126 c8r)\r
+  (net 127 d8r)\r
+  (net 128 d7r)\r
+  (net 129 d6r)\r
+  (net 130 d5r)\r
+  (net 131 d4r)\r
+  (net 132 d3r)\r
+  (net 133 d2r)\r
+  (net 134 d1r)\r
+  (net 135 f1r)\r
+  (net 136 f2r)\r
+  (net 137 f3r)\r
+  (net 138 f4r)\r
+  (net 139 f5r)\r
+  (net 140 f6r)\r
+  (net 141 f7r)\r
+  (net 142 f8r)\r
+  (net 143 "Net-(P8-Pad2)")\r
+  (net 144 "Net-(P8-Pad1)")\r
+  (net 145 GNDD)\r
+  (net 146 GND)\r
+  (net 147 "Net-(P9-Pad1)")\r
+\r
+  (net_class Default "To jest domyślna klasa połączeń."\r
+    (clearance 0.2)\r
+    (trace_width 0.25)\r
+    (via_dia 0.6)\r
+    (via_drill 0.4)\r
+    (uvia_dia 0.3)\r
+    (uvia_drill 0.1)\r
+    (add_net +3V3)\r
+    (add_net 5v)\r
+    (add_net 7SEG_CLK)\r
+    (add_net 7SEG_CLK_T)\r
+    (add_net 7SEG_DIO)\r
+    (add_net 7SEG_DIO_T)\r
+    (add_net BB3.3)\r
+    (add_net GND)\r
+    (add_net GNDA_ADC)\r
+    (add_net GNDD)\r
+    (add_net "Net-(P8-Pad1)")\r
+    (add_net "Net-(P8-Pad10)")\r
+    (add_net "Net-(P8-Pad13)")\r
+    (add_net "Net-(P8-Pad19)")\r
+    (add_net "Net-(P8-Pad2)")\r
+    (add_net "Net-(P8-Pad20)")\r
+    (add_net "Net-(P8-Pad21)")\r
+    (add_net "Net-(P8-Pad22)")\r
+    (add_net "Net-(P8-Pad23)")\r
+    (add_net "Net-(P8-Pad24)")\r
+    (add_net "Net-(P8-Pad25)")\r
+    (add_net "Net-(P8-Pad26)")\r
+    (add_net "Net-(P8-Pad27)")\r
+    (add_net "Net-(P8-Pad28)")\r
+    (add_net "Net-(P8-Pad29)")\r
+    (add_net "Net-(P8-Pad3)")\r
+    (add_net "Net-(P8-Pad30)")\r
+    (add_net "Net-(P8-Pad31)")\r
+    (add_net "Net-(P8-Pad32)")\r
+    (add_net "Net-(P8-Pad33)")\r
+    (add_net "Net-(P8-Pad34)")\r
+    (add_net "Net-(P8-Pad35)")\r
+    (add_net "Net-(P8-Pad36)")\r
+    (add_net "Net-(P8-Pad37)")\r
+    (add_net "Net-(P8-Pad38)")\r
+    (add_net "Net-(P8-Pad39)")\r
+    (add_net "Net-(P8-Pad40)")\r
+    (add_net "Net-(P8-Pad41)")\r
+    (add_net "Net-(P8-Pad42)")\r
+    (add_net "Net-(P8-Pad44)")\r
+    (add_net "Net-(P8-Pad46)")\r
+    (add_net "Net-(P8-Pad7)")\r
+    (add_net "Net-(P8-Pad8)")\r
+    (add_net "Net-(P8-Pad9)")\r
+    (add_net "Net-(P9-Pad1)")\r
+    (add_net "Net-(P9-Pad11)")\r
+    (add_net "Net-(P9-Pad12)")\r
+    (add_net "Net-(P9-Pad13)")\r
+    (add_net "Net-(P9-Pad14)")\r
+    (add_net "Net-(P9-Pad15)")\r
+    (add_net "Net-(P9-Pad16)")\r
+    (add_net "Net-(P9-Pad17)")\r
+    (add_net "Net-(P9-Pad18)")\r
+    (add_net "Net-(P9-Pad19)")\r
+    (add_net "Net-(P9-Pad20)")\r
+    (add_net "Net-(P9-Pad21)")\r
+    (add_net "Net-(P9-Pad22)")\r
+    (add_net "Net-(P9-Pad23)")\r
+    (add_net "Net-(P9-Pad24)")\r
+    (add_net "Net-(P9-Pad25)")\r
+    (add_net "Net-(P9-Pad26)")\r
+    (add_net "Net-(P9-Pad27)")\r
+    (add_net "Net-(P9-Pad28)")\r
+    (add_net "Net-(P9-Pad29)")\r
+    (add_net "Net-(P9-Pad30)")\r
+    (add_net "Net-(P9-Pad31)")\r
+    (add_net "Net-(P9-Pad33)")\r
+    (add_net "Net-(P9-Pad35)")\r
+    (add_net "Net-(P9-Pad36)")\r
+    (add_net "Net-(P9-Pad37)")\r
+    (add_net "Net-(P9-Pad38)")\r
+    (add_net "Net-(P9-Pad39)")\r
+    (add_net "Net-(P9-Pad40)")\r
+    (add_net "Net-(P9-Pad41)")\r
+    (add_net "Net-(P9-Pad42)")\r
+    (add_net PWR_BUT)\r
+    (add_net SR1_CLK)\r
+    (add_net SR1_CLKINH)\r
+    (add_net SR1_CLKINH_T)\r
+    (add_net SR1_CLK_T)\r
+    (add_net SR1_CLR)\r
+    (add_net SR1_CLR_T)\r
+    (add_net SR1_QH)\r
+    (add_net SR1_QH_T)\r
+    (add_net SR1_SHLD)\r
+    (add_net SR1_SHLD_T)\r
+    (add_net SR2_QH)\r
+    (add_net SR2_QH_T)\r
+    (add_net SR2_QH__T)\r
+    (add_net SR3_QH)\r
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+    (add_net SR4_QH)\r
+    (add_net SR4_QH_T)\r
+    (add_net SR5_QH)\r
+    (add_net SR5_QH_T)\r
+    (add_net SR6_QH)\r
+    (add_net SR6_QH_T)\r
+    (add_net SYS_RESETN)\r
+    (add_net VDD_ADC)\r
+    (add_net a1r)\r
+    (add_net a2r)\r
+    (add_net a3r)\r
+    (add_net a4r)\r
+    (add_net a5r)\r
+    (add_net a6r)\r
+    (add_net a7r)\r
+    (add_net a8r)\r
+    (add_net b1r)\r
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+    (add_net b3r)\r
+    (add_net b4r)\r
+    (add_net b5r)\r
+    (add_net b6r)\r
+    (add_net b7r)\r
+    (add_net b8r)\r
+    (add_net c1r)\r
+    (add_net c2r)\r
+    (add_net c3r)\r
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+    (add_net c6r)\r
+    (add_net c7r)\r
+    (add_net c8r)\r
+    (add_net d1r)\r
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+    (add_net f2r)\r
+    (add_net f3r)\r
+    (add_net f4r)\r
+    (add_net f5r)\r
+    (add_net f6r)\r
+    (add_net f7r)\r
+    (add_net f8r)\r
+  )\r
+\r
+  (module .pretty:NEW-640456-8 (layer F.Cu) (tedit 5C265171) (tstamp 5C7374E9)\r
+    (at 172.25 54.7624 90)\r
+    (path /5C29AA60)\r
+    (fp_text reference J2 (at 8.89 0 90) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value 640456-8 (at 8.89 0 90) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_circle (center 17.78 1.905) (end 18.161 1.905) (layer F.Fab) (width 0.1524))\r
+    (fp_circle (center 19.812 0) (end 20.193 0) (layer B.SilkS) (width 0.1524))\r
+    (fp_circle (center 19.812 0) (end 20.193 0) (layer F.SilkS) (width 0.1524))\r
+    (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.27 2.413) (end 19.05 2.413) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start 19.304 -3.556) (end -1.524 -3.556) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start 19.304 2.667) (end 19.304 -3.556) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.524 2.667) (end 19.304 2.667) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.524 -3.556) (end -1.524 2.667) (layer F.CrtYd) (width 0.1524))\r
+    (fp_line (start -1.27 -3.302) (end -1.27 2.413) (layer F.Fab) (width 0.1524))\r
+    (fp_line (start 19.05 -3.302) (end -1.27 -3.302) (layer F.Fab) (width 0.1524))\r
+    (fp_line (start 19.05 2.413) (end 19.05 -3.302) (layer F.Fab) (width 0.1524))\r
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+    (fp_line (start -1.397 2.54) (end 19.177 2.54) (layer F.SilkS) (width 0.1524))\r
+    (fp_text user * (at 0 0 90) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text user * (at 0 0 90) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0 90) (layer Cmts.User)\r
+      (effects (font (size 0.127 0.127) (thickness 0.002)))\r
+    )\r
+    (pad 8 thru_hole circle (at 0 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 118 b1r))\r
+    (pad 7 thru_hole circle (at 2.54 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 117 b2r))\r
+    (pad 6 thru_hole circle (at 5.08 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 116 b3r))\r
+    (pad 5 thru_hole circle (at 7.62 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 115 b4r))\r
+    (pad 4 thru_hole circle (at 10.16 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 114 b5r))\r
+    (pad 3 thru_hole circle (at 12.7 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 113 b6r))\r
+    (pad 2 thru_hole circle (at 15.24 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 112 b7r))\r
+    (pad 1 thru_hole circle (at 17.78 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
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+      (net 109 a7r))\r
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+      (net 108 a6r))\r
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+      (net 107 a5r))\r
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+      (net 106 a4r))\r
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+      (net 105 a3r))\r
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+      (net 104 a2r))\r
+    (pad 8 thru_hole circle (at 0 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask)\r
+      (net 103 a1r))\r
+    (model ${KISYS3DMOD}/c-640456-8-aa-3d.stp\r
+      (offset (xyz 9 0.5 2.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E47A)\r
+    (at 151.93 122.072)\r
+    (path /5C339CD5)\r
+    (fp_text reference U7 (at -4.57835 -20.3229) (layer F.SilkS)\r
+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
+    (fp_text value 74166 (at -4.32086 2.71959) (layer F.SilkS)\r
+      (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+    )\r
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+    (pad 16 thru_hole circle (at 0 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 72 5v))\r
+    (pad 15 thru_hole circle (at 0 -15.24) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 76 SR1_SHLD_T))\r
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+      (net 134 d1r))\r
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+      (net 88 SR2_QH))\r
+    (pad 12 thru_hole circle (at 0 -7.62) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 133 d2r))\r
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+      (net 132 d3r))\r
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+      (net 131 d4r))\r
+    (pad 9 thru_hole circle (at 0 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 75 SR1_CLR_T))\r
+    (pad 8 thru_hole circle (at -7.62 0) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (pad 7 thru_hole circle (at -7.62 -2.54) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 78 SR1_CLK_T))\r
+    (pad 6 thru_hole circle (at -7.62 -5.08) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 77 SR1_CLKINH_T))\r
+    (pad 5 thru_hole circle (at -7.62 -7.62) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 130 d5r))\r
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+      (net 129 d6r))\r
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+      (net 128 d7r))\r
+    (pad 2 thru_hole circle (at -7.62 -15.24) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 127 d8r))\r
+    (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step\r
+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E41B)\r
+    (at 165.9 122.072)\r
+    (path /5C343F96)\r
+    (fp_text reference U8 (at -4.57835 -20.3229) (layer F.SilkS)\r
+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+      (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+    )\r
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+      (net 142 f8r))\r
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+      (net 77 SR1_CLKINH_T))\r
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+      (net 78 SR1_CLK_T))\r
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+      (net 146 GND))\r
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+      (net 138 f4r))\r
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+      (net 137 f3r))\r
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+      (net 136 f2r))\r
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+      (net 89 SR3_QH))\r
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+      (net 135 f1r))\r
+    (pad 15 thru_hole circle (at 0 -15.24) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 76 SR1_SHLD_T))\r
+    (pad 16 thru_hole circle (at 0 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 72 5v))\r
+    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step\r
+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E3BC)\r
+    (at 158.28 77.622)\r
+    (path /5C2E1ABC)\r
+    (fp_text reference U1 (at -4.57835 -20.3229) (layer F.SilkS)\r
+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+      (effects (font (size 1.64108 1.64108) (thickness 0.05)))\r
+    )\r
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+      (net 73 BB3.3))\r
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+      (net 81 SR6_QH_T))\r
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+      (net 82 SR5_QH_T))\r
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+      (net 91 SR5_QH))\r
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+      (net 83 SR4_QH_T))\r
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+      (net 90 SR4_QH))\r
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+      (net 146 GND))\r
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+      (net 84 SR3_QH_T))\r
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+      (net 88 SR2_QH))\r
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+      (net 87 SR2_QH__T))\r
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+      (net 74 SR1_QH))\r
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+      (net 71 SR1_QH_T))\r
+    (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 72 5v))\r
+    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step\r
+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E35D)\r
+    (at 137.96 59.8424 180)\r
+    (path /5C2E1BA8)\r
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+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+    )\r
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+      (net 99 e4r))\r
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+      (net 95 e8r))\r
+    (pad 1 thru_hole rect (at -7.62 -17.78) (size 1.6764 1.6764) (drill 1.1176) (layers *.Cu *.Mask)\r
+      (net 146 GND))\r
+    (model ${KISYS3DMOD}/Package_DIP.3dshapes/DIP-16_W7.62mm.step\r
+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
+  (module kicad-library:NEW-DIP254P762X508-16 (layer F.Cu) (tedit 5C264D94) (tstamp 5C66E29F)\r
+    (at 137.96 122.072)\r
+    (path /5C347042)\r
+    (fp_text reference U4 (at -4.57835 -20.3229) (layer F.SilkS)\r
+      (effects (font (size 1.64228 1.64228) (thickness 0.05)))\r
+    )\r
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+    )\r
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+      (net 146 GND))\r
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+      (net 110 a8r))\r
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+      (net 109 a7r))\r
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+      (net 108 a6r))\r
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+      (net 107 a5r))\r
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+      (net 77 SR1_CLKINH_T))\r
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+      (net 78 SR1_CLK_T))\r
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+      (net 146 GND))\r
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+      (net 75 SR1_CLR_T))\r
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+      (net 106 a4r))\r
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+      (net 105 a3r))\r
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+      (net 92 SR6_QH))\r
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+      (net 103 a1r))\r
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+      (net 72 5v))\r
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+      (offset (xyz -7.5 17.8 -0.2))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 0))\r
+    )\r
+  )\r
+\r
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+    (at 151.93 100.254)\r
+    (path /5C346672)\r
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+    )\r
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+    )\r
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+\r
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+      (net 95 e8r))\r
+    (model ${KIPRJMOD}/4609x.stp\r
+      (offset (xyz -1.25 0 1.5))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module Socket_BeagleBone_Black:Socket_BeagleBone_Black (layer F.Cu) (tedit 0) (tstamp 55DF7717)\r
+    (at 170.98 82.702)\r
+    (descr "Through hole pin header")\r
+    (tags "pin header")\r
+    (path /55DF7DE1)\r
+    (fp_text reference P8 (at 0 -5.1) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value BeagleBone_Black_Header (at 0 -3.1) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 57.15) (end -1.27 57.15) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start -1.27 57.15) (end -1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 57.15) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start -1.75 57.65) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start 4.3 -1.75) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start -1.75 -1.75) (end -1.75 57.65) (layer F.CrtYd) (width 0.05))\r
+    (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 32 "Net-(P8-Pad46)"))\r
+    (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 79 7SEG_CLK))\r
+    (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 31 "Net-(P8-Pad44)"))\r
+    (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 80 7SEG_DIO))\r
+    (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 30 "Net-(P8-Pad42)"))\r
+    (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 29 "Net-(P8-Pad41)"))\r
+    (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 28 "Net-(P8-Pad40)"))\r
+    (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 27 "Net-(P8-Pad39)"))\r
+    (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 26 "Net-(P8-Pad38)"))\r
+    (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 25 "Net-(P8-Pad37)"))\r
+    (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 24 "Net-(P8-Pad36)"))\r
+    (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 23 "Net-(P8-Pad35)"))\r
+    (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 22 "Net-(P8-Pad34)"))\r
+    (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 21 "Net-(P8-Pad33)"))\r
+    (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 20 "Net-(P8-Pad32)"))\r
+    (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 19 "Net-(P8-Pad31)"))\r
+    (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 18 "Net-(P8-Pad30)"))\r
+    (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 17 "Net-(P8-Pad29)"))\r
+    (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 16 "Net-(P8-Pad28)"))\r
+    (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 15 "Net-(P8-Pad27)"))\r
+    (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 14 "Net-(P8-Pad26)"))\r
+    (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 13 "Net-(P8-Pad25)"))\r
+    (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 12 "Net-(P8-Pad24)"))\r
+    (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 11 "Net-(P8-Pad23)"))\r
+    (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 10 "Net-(P8-Pad22)"))\r
+    (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 9 "Net-(P8-Pad21)"))\r
+    (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 8 "Net-(P8-Pad20)"))\r
+    (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 7 "Net-(P8-Pad19)"))\r
+    (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 81 SR6_QH_T))\r
+    (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 67 SR1_CLR))\r
+    (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 82 SR5_QH_T))\r
+    (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 68 SR1_SHLD))\r
+    (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 83 SR4_QH_T))\r
+    (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 6 "Net-(P8-Pad13)"))\r
+    (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 84 SR3_QH_T))\r
+    (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 69 SR1_CLK))\r
+    (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 5 "Net-(P8-Pad10)"))\r
+    (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 4 "Net-(P8-Pad9)"))\r
+    (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 3 "Net-(P8-Pad8)"))\r
+    (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 2 "Net-(P8-Pad7)"))\r
+    (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 85 SR2_QH_T))\r
+    (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 70 SR1_CLKINH))\r
+    (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 71 SR1_QH_T))\r
+    (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 1 "Net-(P8-Pad3)"))\r
+    (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 143 "Net-(P8-Pad2)"))\r
+    (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 144 "Net-(P8-Pad1)"))\r
+    (model ${KIPRJMOD}/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl\r
+      (offset (xyz 1.269999980926514 -27.9399995803833 0))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (module Socket_BeagleBone_Black:Socket_BeagleBone_Black (layer F.Cu) (tedit 0) (tstamp 55DF7748)\r
+    (at 122.72 82.702)\r
+    (descr "Through hole pin header")\r
+    (tags "pin header")\r
+    (path /55DF7DBA)\r
+    (fp_text reference P9 (at 0 -5.1) (layer F.SilkS)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_text value BeagleBone_Black_Header (at 0 -3.1) (layer F.Fab)\r
+      (effects (font (size 1 1) (thickness 0.15)))\r
+    )\r
+    (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 57.15) (end -1.27 57.15) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start -1.27 57.15) (end -1.27 1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start 3.81 57.15) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))\r
+    (fp_line (start -1.75 57.65) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start 4.3 -1.75) (end 4.3 57.65) (layer F.CrtYd) (width 0.05))\r
+    (fp_line (start -1.75 -1.75) (end -1.75 57.65) (layer F.CrtYd) (width 0.05))\r
+    (pad 46 thru_hole oval (at 2.54 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 145 GNDD))\r
+    (pad 45 thru_hole oval (at 0 55.88) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 145 GNDD))\r
+    (pad 44 thru_hole oval (at 2.54 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 145 GNDD))\r
+    (pad 43 thru_hole oval (at 0 53.34) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 145 GNDD))\r
+    (pad 42 thru_hole oval (at 2.54 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 62 "Net-(P9-Pad42)"))\r
+    (pad 41 thru_hole oval (at 0 50.8) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 61 "Net-(P9-Pad41)"))\r
+    (pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 60 "Net-(P9-Pad40)"))\r
+    (pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 59 "Net-(P9-Pad39)"))\r
+    (pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 58 "Net-(P9-Pad38)"))\r
+    (pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 57 "Net-(P9-Pad37)"))\r
+    (pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 56 "Net-(P9-Pad36)"))\r
+    (pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 55 "Net-(P9-Pad35)"))\r
+    (pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 66 GNDA_ADC))\r
+    (pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 54 "Net-(P9-Pad33)"))\r
+    (pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 65 VDD_ADC))\r
+    (pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 53 "Net-(P9-Pad31)"))\r
+    (pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 52 "Net-(P9-Pad30)"))\r
+    (pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 51 "Net-(P9-Pad29)"))\r
+    (pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 50 "Net-(P9-Pad28)"))\r
+    (pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 49 "Net-(P9-Pad27)"))\r
+    (pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 48 "Net-(P9-Pad26)"))\r
+    (pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 47 "Net-(P9-Pad25)"))\r
+    (pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 46 "Net-(P9-Pad24)"))\r
+    (pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 45 "Net-(P9-Pad23)"))\r
+    (pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 44 "Net-(P9-Pad22)"))\r
+    (pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 43 "Net-(P9-Pad21)"))\r
+    (pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 42 "Net-(P9-Pad20)"))\r
+    (pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 41 "Net-(P9-Pad19)"))\r
+    (pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 40 "Net-(P9-Pad18)"))\r
+    (pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 39 "Net-(P9-Pad17)"))\r
+    (pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 38 "Net-(P9-Pad16)"))\r
+    (pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 37 "Net-(P9-Pad15)"))\r
+    (pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 36 "Net-(P9-Pad14)"))\r
+    (pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 35 "Net-(P9-Pad13)"))\r
+    (pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 34 "Net-(P9-Pad12)"))\r
+    (pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 33 "Net-(P9-Pad11)"))\r
+    (pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 64 SYS_RESETN))\r
+    (pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 63 PWR_BUT))\r
+    (pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 72 5v))\r
+    (pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 72 5v))\r
+    (pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 72 5v))\r
+    (pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 72 5v))\r
+    (pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 86 +3V3))\r
+    (pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 86 +3V3))\r
+    (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 146 GND))\r
+    (pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)\r
+      (net 147 "Net-(P9-Pad1)"))\r
+    (model ${KIPRJMOD}/Socket_BeagleBone_Black.3dshapes/Socket_BeagleBone_Black.wrl\r
+      (offset (xyz 1.269999980926514 -27.9399995803833 0))\r
+      (scale (xyz 1 1 1))\r
+      (rotate (xyz 0 0 90))\r
+    )\r
+  )\r
+\r
+  (gr_line (start 180.07 145.78) (end 115.3 145.78) (layer Edge.Cuts) (width 0.00254))\r
+  (gr_line (start 180.07 144.51) (end 180.07 145.78) (layer Edge.Cuts) (width 0.00254))\r
+  (gr_line (start 180.07 30.21) (end 180.07 144.51) (layer Edge.Cuts) (width 0.00254))\r
+  (gr_line (start 115.3 30.21) (end 180.07 30.21) (layer Edge.Cuts) (width 0.00254))\r
+  (gr_line (start 115.3 145.78) (end 115.3 30.21) (layer Edge.Cuts) (width 0.00254))\r
+\r
+)\r

diff --git a/bbb-bort.net b/bbb-bort.net
new file mode 100644 (file)
index 0000000..eba961b
--- /dev/null
+++ b/bbb-bort.net
@@ -0,0 +1,883 @@
+(export (version D)\r
+  (design\r
+    (source C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort.sch)\r
+    (date "12/28/2018 10:56:58 AM")\r
+    (tool "Eeschema (5.0.1)-3")\r
+    (sheet (number 1) (name /) (tstamps /)\r
+      (title_block\r
+        (title "bort's brain")\r
+        (company "kremlinware unlimited")\r
+        (rev A1)\r
+        (date 2018-12-28)\r
+        (source bbb-bort.sch)\r
+        (comment (number 1) (value "i'm the one who press that button"))\r
+        (comment (number 2) (value "sweaty palms get caught bluffin"))\r
+        (comment (number 3) (value "fold a man into nothin, for nothin"))\r
+        (comment (number 4) (value "")))))\r
+  (components\r
+    (comp (ref P8)\r
+      (value BeagleBone_Black_Header)\r
+      (footprint Socket_BeagleBone_Black:Socket_BeagleBone_Black)\r
+      (libsource (lib Connector_Generic) (part Conn_02x23_Odd_Even) (description "Generic connector, double row, 02x23, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 55DF7DE1))\r
+    (comp (ref U3)\r
+      (value 74166)\r
+      (footprint kicad-library:NEW-DIP254P762X508-16)\r
+      (libsource (lib 74xx_IEEE) (part 74166) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C2DCFC3))\r
+    (comp (ref U1)\r
+      (value 4504)\r
+      (footprint kicad-library:NEW-DIP254P762X508-16)\r
+      (datasheet http://www.ti.com/lit/ds/symlink/cd4504b.pdf)\r
+      (libsource (lib 4xxx) (part 4504) (description "CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS, DIP-16/SOIC-16/TSSOP-16"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C2E1ABC))\r
+    (comp (ref U2)\r
+      (value 4504)\r
+      (footprint kicad-library:NEW-DIP254P762X508-16)\r
+      (datasheet http://www.ti.com/lit/ds/symlink/cd4504b.pdf)\r
+      (libsource (lib 4xxx) (part 4504) (description "CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS, DIP-16/SOIC-16/TSSOP-16"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C2E1BA8))\r
+    (comp (ref U7)\r
+      (value 74166)\r
+      (footprint kicad-library:NEW-DIP254P762X508-16)\r
+      (libsource (lib 74xx_IEEE) (part 74166) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C339CD5))\r
+    (comp (ref U6)\r
+      (value 74166)\r
+      (footprint kicad-library:NEW-DIP254P762X508-16)\r
+      (libsource (lib 74xx_IEEE) (part 74166) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C345D5D))\r
+    (comp (ref U5)\r
+      (value 74166)\r
+      (footprint kicad-library:NEW-DIP254P762X508-16)\r
+      (libsource (lib 74xx_IEEE) (part 74166) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C346672))\r
+    (comp (ref U4)\r
+      (value 74166)\r
+      (footprint kicad-library:NEW-DIP254P762X508-16)\r
+      (libsource (lib 74xx_IEEE) (part 74166) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C347042))\r
+    (comp (ref J1)\r
+      (value 640456-8)\r
+      (footprint .pretty:NEW-640456-8)\r
+      (libsource (lib symbols) (part 640456-8) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C29A912))\r
+    (comp (ref J2)\r
+      (value 640456-8)\r
+      (footprint .pretty:NEW-640456-8)\r
+      (libsource (lib symbols) (part 640456-8) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C29AA60))\r
+    (comp (ref J3)\r
+      (value 640456-8)\r
+      (footprint .pretty:NEW-640456-8)\r
+      (libsource (lib symbols) (part 640456-8) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C29ACD3))\r
+    (comp (ref J4)\r
+      (value 640456-8)\r
+      (footprint .pretty:NEW-640456-8)\r
+      (libsource (lib symbols) (part 640456-8) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C29AD70))\r
+    (comp (ref J5)\r
+      (value 640456-8)\r
+      (footprint .pretty:NEW-640456-8)\r
+      (libsource (lib symbols) (part 640456-8) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C29AE73))\r
+    (comp (ref J6)\r
+      (value 640456-8)\r
+      (footprint .pretty:NEW-640456-8)\r
+      (libsource (lib symbols) (part 640456-8) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C29AF80))\r
+    (comp (ref RN2)\r
+      (value 4609X-101-103LF)\r
+      (footprint digikey-footprints:USE-SIP-9_P2.54mm)\r
+      (datasheet https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+      (fields\r
+        (field (name Category) Resistors)\r
+        (field (name DK_Datasheet_Link) https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+        (field (name DK_Detail_Page) /product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616)\r
+        (field (name Description) "RES ARRAY 8 RES 10K OHM 9SIP")\r
+        (field (name Digi-Key_PN) 4609X-101-103LF-ND)\r
+        (field (name Family) "Resistor Networks, Arrays")\r
+        (field (name MPN) 4609X-101-103LF)\r
+        (field (name Manufacturer) "Bourns Inc.")\r
+        (field (name Status) Active))\r
+      (libsource (lib dk_Resistor-Networks-Arrays) (part 4609X-101-103LF) (description "RES ARRAY 8 RES 10K OHM 9SIP"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C2907A3))\r
+    (comp (ref RN4)\r
+      (value 4609X-101-103LF)\r
+      (footprint digikey-footprints:USE-SIP-9_P2.54mm)\r
+      (datasheet https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+      (fields\r
+        (field (name Category) Resistors)\r
+        (field (name DK_Datasheet_Link) https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+        (field (name DK_Detail_Page) /product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616)\r
+        (field (name Description) "RES ARRAY 8 RES 10K OHM 9SIP")\r
+        (field (name Digi-Key_PN) 4609X-101-103LF-ND)\r
+        (field (name Family) "Resistor Networks, Arrays")\r
+        (field (name MPN) 4609X-101-103LF)\r
+        (field (name Manufacturer) "Bourns Inc.")\r
+        (field (name Status) Active))\r
+      (libsource (lib dk_Resistor-Networks-Arrays) (part 4609X-101-103LF) (description "RES ARRAY 8 RES 10K OHM 9SIP"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C3CDCE8))\r
+    (comp (ref RN6)\r
+      (value 4609X-101-103LF)\r
+      (footprint digikey-footprints:USE-SIP-9_P2.54mm)\r
+      (datasheet https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+      (fields\r
+        (field (name Category) Resistors)\r
+        (field (name DK_Datasheet_Link) https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+        (field (name DK_Detail_Page) /product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616)\r
+        (field (name Description) "RES ARRAY 8 RES 10K OHM 9SIP")\r
+        (field (name Digi-Key_PN) 4609X-101-103LF-ND)\r
+        (field (name Family) "Resistor Networks, Arrays")\r
+        (field (name MPN) 4609X-101-103LF)\r
+        (field (name Manufacturer) "Bourns Inc.")\r
+        (field (name Status) Active))\r
+      (libsource (lib dk_Resistor-Networks-Arrays) (part 4609X-101-103LF) (description "RES ARRAY 8 RES 10K OHM 9SIP"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C3CDDAC))\r
+    (comp (ref RN5)\r
+      (value 4609X-101-103LF)\r
+      (footprint digikey-footprints:USE-SIP-9_P2.54mm)\r
+      (datasheet https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+      (fields\r
+        (field (name Category) Resistors)\r
+        (field (name DK_Datasheet_Link) https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+        (field (name DK_Detail_Page) /product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616)\r
+        (field (name Description) "RES ARRAY 8 RES 10K OHM 9SIP")\r
+        (field (name Digi-Key_PN) 4609X-101-103LF-ND)\r
+        (field (name Family) "Resistor Networks, Arrays")\r
+        (field (name MPN) 4609X-101-103LF)\r
+        (field (name Manufacturer) "Bourns Inc.")\r
+        (field (name Status) Active))\r
+      (libsource (lib dk_Resistor-Networks-Arrays) (part 4609X-101-103LF) (description "RES ARRAY 8 RES 10K OHM 9SIP"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C3CDE16))\r
+    (comp (ref RN3)\r
+      (value 4609X-101-103LF)\r
+      (footprint digikey-footprints:USE-SIP-9_P2.54mm)\r
+      (datasheet https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+      (fields\r
+        (field (name Category) Resistors)\r
+        (field (name DK_Datasheet_Link) https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+        (field (name DK_Detail_Page) /product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616)\r
+        (field (name Description) "RES ARRAY 8 RES 10K OHM 9SIP")\r
+        (field (name Digi-Key_PN) 4609X-101-103LF-ND)\r
+        (field (name Family) "Resistor Networks, Arrays")\r
+        (field (name MPN) 4609X-101-103LF)\r
+        (field (name Manufacturer) "Bourns Inc.")\r
+        (field (name Status) Active))\r
+      (libsource (lib dk_Resistor-Networks-Arrays) (part 4609X-101-103LF) (description "RES ARRAY 8 RES 10K OHM 9SIP"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C3CDF3A))\r
+    (comp (ref RN1)\r
+      (value 4609X-101-103LF)\r
+      (footprint digikey-footprints:USE-SIP-9_P2.54mm)\r
+      (datasheet https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+      (fields\r
+        (field (name Category) Resistors)\r
+        (field (name DK_Datasheet_Link) https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+        (field (name DK_Detail_Page) /product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616)\r
+        (field (name Description) "RES ARRAY 8 RES 10K OHM 9SIP")\r
+        (field (name Digi-Key_PN) 4609X-101-103LF-ND)\r
+        (field (name Family) "Resistor Networks, Arrays")\r
+        (field (name MPN) 4609X-101-103LF)\r
+        (field (name Manufacturer) "Bourns Inc.")\r
+        (field (name Status) Active))\r
+      (libsource (lib dk_Resistor-Networks-Arrays) (part 4609X-101-103LF) (description "RES ARRAY 8 RES 10K OHM 9SIP"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C3CDFB6))\r
+    (comp (ref P9)\r
+      (value BeagleBone_Black_Header)\r
+      (footprint Socket_BeagleBone_Black:Socket_BeagleBone_Black)\r
+      (libsource (lib Connector_Generic) (part Conn_02x23_Odd_Even) (description "Generic connector, double row, 02x23, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 55DF7DBA))\r
+    (comp (ref U8)\r
+      (value 74166)\r
+      (footprint kicad-library:NEW-DIP254P762X508-16)\r
+      (libsource (lib 74xx_IEEE) (part 74166) (description ""))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C343F96))\r
+    (comp (ref H4)\r
+      (value MountingHole)\r
+      (footprint MountingHole:MountingHole_2.2mm_M2)\r
+      (datasheet ~)\r
+      (libsource (lib Mechanical) (part MountingHole) (description "Mounting Hole without connection"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C81EB00))\r
+    (comp (ref H2)\r
+      (value MountingHole)\r
+      (footprint MountingHole:MountingHole_2.2mm_M2)\r
+      (datasheet ~)\r
+      (libsource (lib Mechanical) (part MountingHole) (description "Mounting Hole without connection"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C81F04C))\r
+    (comp (ref H3)\r
+      (value MountingHole)\r
+      (footprint MountingHole:MountingHole_2.2mm_M2)\r
+      (datasheet ~)\r
+      (libsource (lib Mechanical) (part MountingHole) (description "Mounting Hole without connection"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C827EBA))\r
+    (comp (ref H1)\r
+      (value MountingHole)\r
+      (footprint MountingHole:MountingHole_2.2mm_M2)\r
+      (datasheet ~)\r
+      (libsource (lib Mechanical) (part MountingHole) (description "Mounting Hole without connection"))\r
+      (sheetpath (names /) (tstamps /))\r
+      (tstamp 5C827EC1)))\r
+  (libparts\r
+    (libpart (lib 4xxx) (part 4504)\r
+      (description "CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS, DIP-16/SOIC-16/TSSOP-16")\r
+      (docs http://www.ti.com/lit/ds/symlink/cd4504b.pdf)\r
+      (footprints\r
+        (fp DIP*W7.62mm*)\r
+        (fp SOIC*3.9x9.9mm*P1.27mm*)\r
+        (fp TSSOP*4.4x5mm*P0.65mm*))\r
+      (fields\r
+        (field (name Reference) U)\r
+        (field (name Value) 4504))\r
+      (pins\r
+        (pin (num 1) (name VCC) (type power_in))\r
+        (pin (num 2) (name Aout) (type output))\r
+        (pin (num 3) (name Ain) (type input))\r
+        (pin (num 4) (name Bout) (type output))\r
+        (pin (num 5) (name Bin) (type input))\r
+        (pin (num 6) (name Cout) (type output))\r
+        (pin (num 7) (name Cin) (type input))\r
+        (pin (num 8) (name VSS) (type power_in))\r
+        (pin (num 9) (name Din) (type input))\r
+        (pin (num 10) (name Dout) (type output))\r
+        (pin (num 11) (name Ein) (type input))\r
+        (pin (num 12) (name Eout) (type output))\r
+        (pin (num 13) (name Select) (type input))\r
+        (pin (num 14) (name Fin) (type input))\r
+        (pin (num 15) (name Fout) (type output))\r
+        (pin (num 16) (name VDD) (type power_in))))\r
+    (libpart (lib 74xx_IEEE) (part 74166)\r
+      (fields\r
+        (field (name Reference) U)\r
+        (field (name Value) 74166))\r
+      (pins\r
+        (pin (num 1) (name SER) (type input))\r
+        (pin (num 2) (name A) (type input))\r
+        (pin (num 3) (name B) (type input))\r
+        (pin (num 4) (name C) (type input))\r
+        (pin (num 5) (name D) (type input))\r
+        (pin (num 6) (name CLKINH) (type input))\r
+        (pin (num 7) (name CLK) (type input))\r
+        (pin (num 8) (name GND) (type power_in))\r
+        (pin (num 9) (name ~CLR) (type input))\r
+        (pin (num 10) (name E) (type input))\r
+        (pin (num 11) (name F) (type input))\r
+        (pin (num 12) (name G) (type input))\r
+        (pin (num 13) (name QH) (type 3state))\r
+        (pin (num 14) (name H) (type input))\r
+        (pin (num 15) (name SHLD) (type input))\r
+        (pin (num 16) (name VCC) (type power_in))))\r
+    (libpart (lib Connector_Generic) (part Conn_02x23_Odd_Even)\r
+      (description "Generic connector, double row, 02x23, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)")\r
+      (docs ~)\r
+      (footprints\r
+        (fp Connector*:*_2x??_*))\r
+      (fields\r
+        (field (name Reference) J)\r
+        (field (name Value) Conn_02x23_Odd_Even))\r
+      (pins\r
+        (pin (num 1) (name Pin_1) (type passive))\r
+        (pin (num 2) (name Pin_2) (type passive))\r
+        (pin (num 3) (name Pin_3) (type passive))\r
+        (pin (num 4) (name Pin_4) (type passive))\r
+        (pin (num 5) (name Pin_5) (type passive))\r
+        (pin (num 6) (name Pin_6) (type passive))\r
+        (pin (num 7) (name Pin_7) (type passive))\r
+        (pin (num 8) (name Pin_8) (type passive))\r
+        (pin (num 9) (name Pin_9) (type passive))\r
+        (pin (num 10) (name Pin_10) (type passive))\r
+        (pin (num 11) (name Pin_11) (type passive))\r
+        (pin (num 12) (name Pin_12) (type passive))\r
+        (pin (num 13) (name Pin_13) (type passive))\r
+        (pin (num 14) (name Pin_14) (type passive))\r
+        (pin (num 15) (name Pin_15) (type passive))\r
+        (pin (num 16) (name Pin_16) (type passive))\r
+        (pin (num 17) (name Pin_17) (type passive))\r
+        (pin (num 18) (name Pin_18) (type passive))\r
+        (pin (num 19) (name Pin_19) (type passive))\r
+        (pin (num 20) (name Pin_20) (type passive))\r
+        (pin (num 21) (name Pin_21) (type passive))\r
+        (pin (num 22) (name Pin_22) (type passive))\r
+        (pin (num 23) (name Pin_23) (type passive))\r
+        (pin (num 24) (name Pin_24) (type passive))\r
+        (pin (num 25) (name Pin_25) (type passive))\r
+        (pin (num 26) (name Pin_26) (type passive))\r
+        (pin (num 27) (name Pin_27) (type passive))\r
+        (pin (num 28) (name Pin_28) (type passive))\r
+        (pin (num 29) (name Pin_29) (type passive))\r
+        (pin (num 30) (name Pin_30) (type passive))\r
+        (pin (num 31) (name Pin_31) (type passive))\r
+        (pin (num 32) (name Pin_32) (type passive))\r
+        (pin (num 33) (name Pin_33) (type passive))\r
+        (pin (num 34) (name Pin_34) (type passive))\r
+        (pin (num 35) (name Pin_35) (type passive))\r
+        (pin (num 36) (name Pin_36) (type passive))\r
+        (pin (num 37) (name Pin_37) (type passive))\r
+        (pin (num 38) (name Pin_38) (type passive))\r
+        (pin (num 39) (name Pin_39) (type passive))\r
+        (pin (num 40) (name Pin_40) (type passive))\r
+        (pin (num 41) (name Pin_41) (type passive))\r
+        (pin (num 42) (name Pin_42) (type passive))\r
+        (pin (num 43) (name Pin_43) (type passive))\r
+        (pin (num 44) (name Pin_44) (type passive))\r
+        (pin (num 45) (name Pin_45) (type passive))\r
+        (pin (num 46) (name Pin_46) (type passive))))\r
+    (libpart (lib Mechanical) (part MountingHole)\r
+      (description "Mounting Hole without connection")\r
+      (docs ~)\r
+      (footprints\r
+        (fp MountingHole*))\r
+      (fields\r
+        (field (name Reference) H)\r
+        (field (name Value) MountingHole)))\r
+    (libpart (lib dk_Resistor-Networks-Arrays) (part 4609X-101-103LF)\r
+      (description "RES ARRAY 8 RES 10K OHM 9SIP")\r
+      (docs https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+      (fields\r
+        (field (name Reference) RN)\r
+        (field (name Value) 4609X-101-103LF)\r
+        (field (name Footprint) digikey-footprints:SIP-9_P2.54mm)\r
+        (field (name Datasheet) https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+        (field (name Digi-Key_PN) 4609X-101-103LF-ND)\r
+        (field (name MPN) 4609X-101-103LF)\r
+        (field (name Category) Resistors)\r
+        (field (name Family) "Resistor Networks, Arrays")\r
+        (field (name DK_Datasheet_Link) https://www.bourns.com/docs/Product-Datasheets/4600x.pdf)\r
+        (field (name DK_Detail_Page) /product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616)\r
+        (field (name Description) "RES ARRAY 8 RES 10K OHM 9SIP")\r
+        (field (name Manufacturer) "Bourns Inc.")\r
+        (field (name Status) Active))\r
+      (pins\r
+        (pin (num 1) (name ~) (type passive))\r
+        (pin (num 2) (name ~) (type passive))\r
+        (pin (num 3) (name ~) (type passive))\r
+        (pin (num 4) (name ~) (type passive))\r
+        (pin (num 5) (name ~) (type passive))\r
+        (pin (num 6) (name ~) (type passive))\r
+        (pin (num 7) (name ~) (type passive))\r
+        (pin (num 8) (name ~) (type passive))\r
+        (pin (num 9) (name ~) (type passive))))\r
+    (libpart (lib symbols) (part 640456-8)\r
+      (footprints\r
+        (fp CONN8_640456-8))\r
+      (fields\r
+        (field (name Reference) J)\r
+        (field (name Value) 640456-8)\r
+        (field (name Footprint) CONN8_640456-8))\r
+      (pins\r
+        (pin (num 1) (name 1) (type unspc))\r
+        (pin (num 2) (name 2) (type unspc))\r
+        (pin (num 3) (name 3) (type unspc))\r
+        (pin (num 4) (name 4) (type unspc))\r
+        (pin (num 5) (name 5) (type unspc))\r
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+    (library (logical Connector_Generic)\r
+      (uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Connector_Generic.lib"))\r
+    (library (logical Mechanical)\r
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+      (node (ref RN2) (pin 3)))\r
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+      (node (ref U7) (pin 11))\r
+      (node (ref J4) (pin 6))\r
+      (node (ref RN2) (pin 4)))\r
+    (net (code 149) (name d4r)\r
+      (node (ref RN2) (pin 5))\r
+      (node (ref U7) (pin 10))\r
+      (node (ref J4) (pin 5)))\r
+    (net (code 150) (name d5r)\r
+      (node (ref RN2) (pin 6))\r
+      (node (ref J4) (pin 4))\r
+      (node (ref U7) (pin 5)))\r
+    (net (code 151) (name d6r)\r
+      (node (ref RN2) (pin 7))\r
+      (node (ref J4) (pin 3))\r
+      (node (ref U7) (pin 4)))\r
+    (net (code 152) (name d7r)\r
+      (node (ref RN2) (pin 8))\r
+      (node (ref U7) (pin 3))\r
+      (node (ref J4) (pin 2)))\r
+    (net (code 153) (name d8r)\r
+      (node (ref U7) (pin 2))\r
+      (node (ref RN2) (pin 9))\r
+      (node (ref J4) (pin 1)))\r
+    (net (code 154) (name e1r)\r
+      (node (ref RN4) (pin 2))\r
+      (node (ref U3) (pin 14))\r
+      (node (ref J5) (pin 8)))\r
+    (net (code 155) (name e2r)\r
+      (node (ref U3) (pin 12))\r
+      (node (ref RN4) (pin 3))\r
+      (node (ref J5) (pin 7)))))
\ No newline at end of file

diff --git a/bbb-bort.plt b/bbb-bort.plt
new file mode 100644 (file)
index 0000000..96cbd78
--- /dev/null
+++ b/bbb-bort.plt
@@ -0,0 +1,38368 @@
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diff --git a/bbb-bort.pro b/bbb-bort.pro
new file mode 100644 (file)
index 0000000..796d189
--- /dev/null
+++ b/bbb-bort.pro
@@ -0,0 +1,40 @@
+update=12/28/2018 9:59:52 AM\r
+version=1\r
+last_client=kicad\r
+[pcbnew]\r
+version=1\r
+LastNetListRead=\r
+UseCmpFile=1\r
+PadDrill=0.600000000000\r
+PadDrillOvalY=0.600000000000\r
+PadSizeH=1.500000000000\r
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+PcbTextSizeV=1.500000000000\r
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+SolderMaskClearance=0.000000000000\r
+SolderMaskMinWidth=0.000000000000\r
+DrawSegmentWidth=0.200000000000\r
+BoardOutlineThickness=0.100000000000\r
+ModuleOutlineThickness=0.150000000000\r
+[cvpcb]\r
+version=1\r
+NetIExt=net\r
+[general]\r
+version=1\r
+[eeschema]\r
+version=1\r
+LibDir=\r
+[schematic_editor]\r
+version=1\r
+PageLayoutDescrFile=\r
+PlotDirectoryName=./\r
+SubpartIdSeparator=0\r
+SubpartFirstId=65\r
+NetFmtName=Pcbnew\r
+SpiceAjustPassiveValues=0\r
+LabSize=50\r
+ERC_TestSimilarLabels=1\r

diff --git a/bbb-bort.sch b/bbb-bort.sch
new file mode 100644 (file)
index 0000000..4f00ee6
--- /dev/null
+++ b/bbb-bort.sch
@@ -0,0 +1,1969 @@
+EESchema Schematic File Version 4\r
+LIBS:bbb-bort-cache\r
+EELAYER 26 0\r
+EELAYER END\r
+$Descr A4 11693 8268\r
+encoding utf-8\r
+Sheet 1 1\r
+Title "bort's brain"\r
+Date "2018-12-28"\r
+Rev "A1"\r
+Comp "kremlinware unlimited"\r
+Comment1 "i'm the one who press that button"\r
+Comment2 "sweaty palms get caught bluffin"\r
+Comment3 "fold a man into nothin, for nothin"\r
+Comment4 ""\r
+$EndDescr\r
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+$EndComp\r
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+       1    7750 5500\r
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+$EndComp\r
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+$Comp\r
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+$EndComp\r
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+       2050 4800 2050 4950\r
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+       2000 5000 2000 5100\r
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+       1850 5200 1850 5300\r
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+Text Label 3150 1600 0    50   ~ 0\r
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+7SEG_CLK\r
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+7SEG_DIO\r
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+Wire Wire Line\r
+       2250 5000 2500 5000\r
+Wire Wire Line\r
+       2500 5200 2400 5200\r
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+       2400 5200 2400 5300\r
+Text GLabel 3400 5000 2    50   Input ~ 0\r
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+$Comp\r
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+F 2 "" H 3400 7660 50  0001 C CNN\r
+F 3 "" H 3400 7660 50  0001 C CNN\r
+       1    3400 7660\r
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+$EndComp\r
+$Comp\r
+L power:GND #PWR0107\r
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+F 2 "" H 5050 7660 50  0001 C CNN\r
+F 3 "" H 5050 7660 50  0001 C CNN\r
+       1    5050 7660\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0108\r
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+F 0 "#PWR0108" H 7250 6050 50  0001 C CNN\r
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+F 2 "" H 7250 6300 50  0001 C CNN\r
+F 3 "" H 7250 6300 50  0001 C CNN\r
+       1    7250 6300\r
+       0    1    1    0   \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0109\r
+U 1 1 5C8025C9\r
+P 800 5500\r
+F 0 "#PWR0109" H 800 5250 50  0001 C CNN\r
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+F 2 "" H 800 5500 50  0001 C CNN\r
+F 3 "" H 800 5500 50  0001 C CNN\r
+       1    800  5500\r
+       0    1    1    0   \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0110\r
+U 1 1 5C80271E\r
+P 2500 5650\r
+F 0 "#PWR0110" H 2500 5400 50  0001 C CNN\r
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+F 2 "" H 2500 5650 50  0001 C CNN\r
+F 3 "" H 2500 5650 50  0001 C CNN\r
+       1    2500 5650\r
+       1    0    0    -1  \r
+$EndComp\r
+Connection ~ 2500 5650\r
+Wire Wire Line\r
+       2500 5400 2500 5650\r
+$Comp\r
+L Connector_Generic:Conn_02x23_Odd_Even P9\r
+U 1 1 55DF7DBA\r
+P 1150 1850\r
+F 0 "P9" H 1150 3050 50  0000 C CNN\r
+F 1 "BeagleBone_Black_Header" V 1200 1900 50  0000 C CNN\r
+F 2 "Socket_BeagleBone_Black:Socket_BeagleBone_Black" H 1150 1000 60  0001 C CNN\r
+F 3 "" H 1150 1000 60  0000 C CNN\r
+F 4 "67996-150HLF" H 0   0   50  0001 C CNN "manf#"\r
+       1    1150 1850\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0111\r
+U 1 1 5C802AFB\r
+P 1450 750\r
+F 0 "#PWR0111" H 1450 500 50  0001 C CNN\r
+F 1 "GND" H 1450 550 50  0000 C CNN\r
+F 2 "" H 1450 750 50  0001 C CNN\r
+F 3 "" H 1450 750 50  0001 C CNN\r
+       1    1450 750 \r
+       -1   0    0    1   \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0112\r
+U 1 1 5C802CDC\r
+P 9750 2350\r
+F 0 "#PWR0112" H 9750 2100 50  0001 C CNN\r
+F 1 "GND" V 9800 2175 50  0000 R CNN\r
+F 2 "" H 9750 2350 50  0001 C CNN\r
+F 3 "" H 9750 2350 50  0001 C CNN\r
+       1    9750 2350\r
+       0    -1   -1   0   \r
+$EndComp\r
+Wire Wire Line\r
+       9750 2350 9750 2250\r
+$Comp\r
+L power:GND #PWR0113\r
+U 1 1 5C802DE3\r
+P 10350 1600\r
+F 0 "#PWR0113" H 10350 1350 50  0001 C CNN\r
+F 1 "GND" H 10400 1375 50  0000 C CNN\r
+F 2 "" H 10350 1600 50  0001 C CNN\r
+F 3 "" H 10350 1600 50  0001 C CNN\r
+       1    10350 1600\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0114\r
+U 1 1 5C802EFE\r
+P 9750 4350\r
+F 0 "#PWR0114" H 9750 4100 50  0001 C CNN\r
+F 1 "GND" H 9800 4150 50  0000 C CNN\r
+F 2 "" H 9750 4350 50  0001 C CNN\r
+F 3 "" H 9750 4350 50  0001 C CNN\r
+       1    9750 4350\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0115\r
+U 1 1 5C802F3C\r
+P 9850 6350\r
+F 0 "#PWR0115" H 9850 6100 50  0001 C CNN\r
+F 1 "GND" H 9900 6150 50  0000 C CNN\r
+F 2 "" H 9850 6350 50  0001 C CNN\r
+F 3 "" H 9850 6350 50  0001 C CNN\r
+       1    9850 6350\r
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+$EndComp\r
+$Comp\r
+L power:GND #PWR0116\r
+U 1 1 5C802F73\r
+P 10450 5600\r
+F 0 "#PWR0116" H 10450 5350 50  0001 C CNN\r
+F 1 "GND" H 10500 5400 50  0000 C CNN\r
+F 2 "" H 10450 5600 50  0001 C CNN\r
+F 3 "" H 10450 5600 50  0001 C CNN\r
+       1    10450 5600\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L 74xx_IEEE:74166 U8\r
+U 1 1 5C343F96\r
+P 9900 5600\r
+F 0 "U8" H 9900 4585 50  0000 C CNN\r
+F 1 "74166" H 9900 4676 50  0000 C CNN\r
+F 2 "kicad-library:NEW-DIP254P762X508-16" H 9900 5600 50  0001 C CNN\r
+F 3 "" H 9900 5600 50  0001 C CNN\r
+F 4 "SN74HC166N" H 0   0   50  0001 C CNN "manf#"\r
+       1    9900 5600\r
+       -1   0    0    1   \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0117\r
+U 1 1 5C80BE8D\r
+P 8300 5500\r
+F 0 "#PWR0117" H 8300 5250 50  0001 C CNN\r
+F 1 "GND" H 8350 5300 50  0000 C CNN\r
+F 2 "" H 8300 5500 50  0001 C CNN\r
+F 3 "" H 8300 5500 50  0001 C CNN\r
+       1    8300 5500\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0118\r
+U 1 1 5C80BF74\r
+P 10350 3500\r
+F 0 "#PWR0118" H 10350 3250 50  0001 C CNN\r
+F 1 "GND" H 10400 3300 50  0000 C CNN\r
+F 2 "" H 10350 3500 50  0001 C CNN\r
+F 3 "" H 10350 3500 50  0001 C CNN\r
+       1    10350 3500\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0119\r
+U 1 1 5C80C019\r
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+F 0 "#PWR0119" H 8150 1500 50  0001 C CNN\r
+F 1 "GND" V 8200 1575 50  0000 R CNN\r
+F 2 "" H 8150 1750 50  0001 C CNN\r
+F 3 "" H 8150 1750 50  0001 C CNN\r
+       1    8150 1750\r
+       0    -1   -1   0   \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0120\r
+U 1 1 5C80C066\r
+P 7100 2550\r
+F 0 "#PWR0120" H 7100 2300 50  0001 C CNN\r
+F 1 "GND" H 7125 2350 50  0000 C CNN\r
+F 2 "" H 7100 2550 50  0001 C CNN\r
+F 3 "" H 7100 2550 50  0001 C CNN\r
+       1    7100 2550\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L power:GND #PWR0121\r
+U 1 1 5C80C2E8\r
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+F 0 "#PWR0121" H 7150 4150 50  0001 C CNN\r
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+F 2 "" H 7150 4400 50  0001 C CNN\r
+F 3 "" H 7150 4400 50  0001 C CNN\r
+       1    7150 4400\r
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+$EndComp\r
+$Comp\r
+L power:GND #PWR0122\r
+U 1 1 5C80C428\r
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+F 2 "" H 8200 3600 50  0001 C CNN\r
+F 3 "" H 8200 3600 50  0001 C CNN\r
+       1    8200 3600\r
+       0    -1   -1   0   \r
+$EndComp\r
+$Comp\r
+L Mechanical:MountingHole H4\r
+U 1 1 5C81EB00\r
+P 6625 1625\r
+F 0 "H4" H 6750 1650 50  0000 L CNN\r
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+F 2 "MountingHole:MountingHole_2.2mm_M2" H 6625 1625 50  0001 C CNN\r
+F 3 "~" H 6625 1625 50  0001 C CNN\r
+       1    6625 1625\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L Mechanical:MountingHole H2\r
+U 1 1 5C81F04C\r
+P 6450 1625\r
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+F 1 "MountingHole" H 6575 1550 50  0000 L CNN\r
+F 2 "MountingHole:MountingHole_2.2mm_M2" H 6450 1625 50  0001 C CNN\r
+F 3 "~" H 6450 1625 50  0001 C CNN\r
+       1    6450 1625\r
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+$EndComp\r
+$Comp\r
+L Mechanical:MountingHole H3\r
+U 1 1 5C827EBA\r
+P 6625 1400\r
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+F 1 "MountingHole" H 6750 1325 50  0000 L CNN\r
+F 2 "MountingHole:MountingHole_2.2mm_M2" H 6625 1400 50  0001 C CNN\r
+F 3 "~" H 6625 1400 50  0001 C CNN\r
+       1    6625 1400\r
+       1    0    0    -1  \r
+$EndComp\r
+$Comp\r
+L Mechanical:MountingHole H1\r
+U 1 1 5C827EC1\r
+P 6450 1400\r
+F 0 "H1" H 6550 1450 50  0000 L CNN\r
+F 1 "MountingHole" H 6550 1400 50  0000 L CNN\r
+F 2 "MountingHole:MountingHole_2.2mm_M2" H 6450 1400 50  0001 C CNN\r
+F 3 "~" H 6450 1400 50  0001 C CNN\r
+       1    6450 1400\r
+       1    0    0    -1  \r
+$EndComp\r
+Wire Bus Line\r
+       8750 1050 8750 1850\r
+Wire Bus Line\r
+       8900 4800 8900 5550\r
+Wire Bus Line\r
+       8800 2900 8800 3700\r
+Wire Bus Line\r
+       10950 900  10950 1700\r
+Wire Bus Line\r
+       10950 2800 10950 3550\r
+Wire Bus Line\r
+       11050 4900 11050 5700\r
+Wire Bus Line\r
+       4950 1050 4950 1850\r
+Wire Bus Line\r
+       4950 2100 4950 2900\r
+Wire Bus Line\r
+       4950 3100 4950 3900\r
+Wire Bus Line\r
+       6200 3100 6200 3900\r
+Wire Bus Line\r
+       6200 2100 6200 2900\r
+Wire Bus Line\r
+       6200 1050 6200 1850\r
+$EndSCHEMATC\r

diff --git a/bbb-bort.xml b/bbb-bort.xml
new file mode 100644 (file)
index 0000000..b5a9ab9
--- /dev/null
+++ b/bbb-bort.xml
@@ -0,0 +1,1152 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<export version="D">
+  <design>
+    <source>C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort.sch</source>
+    <date>12/28/2018 11:39:30 AM</date>
+    <tool>Eeschema (5.0.1)-3</tool>
+    <sheet number="1" name="/" tstamps="/">
+      <title_block>
+        <title>bort's brain</title>
+        <company>kremlinware unlimited</company>
+        <rev>A1</rev>
+        <date>2018-12-28</date>
+        <source>bbb-bort.sch</source>
+        <comment number="1" value="i'm the one who press that button"/>
+        <comment number="2" value="sweaty palms get caught bluffin"/>
+        <comment number="3" value="fold a man into nothin, for nothin"/>
+        <comment number="4" value=""/>
+      </title_block>
+    </sheet>
+  </design>
+  <components>
+    <comp ref="P8">
+      <value>BeagleBone_Black_Header</value>
+      <footprint>Socket_BeagleBone_Black:Socket_BeagleBone_Black</footprint>
+      <fields>
+        <field name="manf#">67996-150HLF</field>
+      </fields>
+      <libsource lib="Connector_Generic" part="Conn_02x23_Odd_Even" description="Generic connector, double row, 02x23, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>55DF7DE1</tstamp>
+    </comp>
+    <comp ref="U3">
+      <value>74166</value>
+      <footprint>kicad-library:NEW-DIP254P762X508-16</footprint>
+      <fields>
+        <field name="manf#">SN74HC166N</field>
+      </fields>
+      <libsource lib="74xx_IEEE" part="74166" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C2DCFC3</tstamp>
+    </comp>
+    <comp ref="U1">
+      <value>4504</value>
+      <footprint>kicad-library:NEW-DIP254P762X508-16</footprint>
+      <datasheet>http://www.ti.com/lit/ds/symlink/cd4504b.pdf</datasheet>
+      <fields>
+        <field name="manf#">   CD4504BEG4</field>
+      </fields>
+      <libsource lib="4xxx" part="4504" description="CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS, DIP-16/SOIC-16/TSSOP-16"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C2E1ABC</tstamp>
+    </comp>
+    <comp ref="U2">
+      <value>4504</value>
+      <footprint>kicad-library:NEW-DIP254P762X508-16</footprint>
+      <datasheet>http://www.ti.com/lit/ds/symlink/cd4504b.pdf</datasheet>
+      <fields>
+        <field name="manf#">   CD4504BEG4</field>
+      </fields>
+      <libsource lib="4xxx" part="4504" description="CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS, DIP-16/SOIC-16/TSSOP-16"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C2E1BA8</tstamp>
+    </comp>
+    <comp ref="U7">
+      <value>74166</value>
+      <footprint>kicad-library:NEW-DIP254P762X508-16</footprint>
+      <fields>
+        <field name="manf#">SN74HC166N</field>
+      </fields>
+      <libsource lib="74xx_IEEE" part="74166" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C339CD5</tstamp>
+    </comp>
+    <comp ref="U6">
+      <value>74166</value>
+      <footprint>kicad-library:NEW-DIP254P762X508-16</footprint>
+      <fields>
+        <field name="manf#">SN74HC166N</field>
+      </fields>
+      <libsource lib="74xx_IEEE" part="74166" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C345D5D</tstamp>
+    </comp>
+    <comp ref="U5">
+      <value>74166</value>
+      <footprint>kicad-library:NEW-DIP254P762X508-16</footprint>
+      <fields>
+        <field name="manf#">SN74HC166N</field>
+      </fields>
+      <libsource lib="74xx_IEEE" part="74166" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C346672</tstamp>
+    </comp>
+    <comp ref="U4">
+      <value>74166</value>
+      <footprint>kicad-library:NEW-DIP254P762X508-16</footprint>
+      <fields>
+        <field name="manf#">SN74HC166N</field>
+      </fields>
+      <libsource lib="74xx_IEEE" part="74166" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C347042</tstamp>
+    </comp>
+    <comp ref="J1">
+      <value>640456-8</value>
+      <footprint>.pretty:NEW-640456-8</footprint>
+      <fields>
+        <field name="manf#">   640456-8</field>
+      </fields>
+      <libsource lib="symbols" part="640456-8" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C29A912</tstamp>
+    </comp>
+    <comp ref="J2">
+      <value>640456-8</value>
+      <footprint>.pretty:NEW-640456-8</footprint>
+      <fields>
+        <field name="manf#">   640456-8</field>
+      </fields>
+      <libsource lib="symbols" part="640456-8" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C29AA60</tstamp>
+    </comp>
+    <comp ref="J3">
+      <value>640456-8</value>
+      <footprint>.pretty:NEW-640456-8</footprint>
+      <fields>
+        <field name="manf#">   640456-8</field>
+      </fields>
+      <libsource lib="symbols" part="640456-8" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C29ACD3</tstamp>
+    </comp>
+    <comp ref="J4">
+      <value>640456-8</value>
+      <footprint>.pretty:NEW-640456-8</footprint>
+      <fields>
+        <field name="manf#">   640456-8</field>
+      </fields>
+      <libsource lib="symbols" part="640456-8" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C29AD70</tstamp>
+    </comp>
+    <comp ref="J5">
+      <value>640456-8</value>
+      <footprint>.pretty:NEW-640456-8</footprint>
+      <fields>
+        <field name="manf#">   640456-8</field>
+      </fields>
+      <libsource lib="symbols" part="640456-8" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C29AE73</tstamp>
+    </comp>
+    <comp ref="J6">
+      <value>640456-8</value>
+      <footprint>.pretty:NEW-640456-8</footprint>
+      <fields>
+        <field name="manf#">   640456-8</field>
+      </fields>
+      <libsource lib="symbols" part="640456-8" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C29AF80</tstamp>
+    </comp>
+    <comp ref="RN2">
+      <value>4609X-101-103LF</value>
+      <footprint>digikey-footprints:USE-SIP-9_P2.54mm</footprint>
+      <datasheet>https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</datasheet>
+      <fields>
+        <field name="Category">Resistors</field>
+        <field name="DK_Datasheet_Link">https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</field>
+        <field name="DK_Detail_Page">/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616</field>
+        <field name="Description">RES ARRAY 8 RES 10K OHM 9SIP</field>
+        <field name="Digi-Key_PN">4609X-101-103LF-ND</field>
+        <field name="Family">Resistor Networks, Arrays</field>
+        <field name="MPN">4609X-101-103LF</field>
+        <field name="Manufacturer">Bourns Inc.</field>
+        <field name="Status">Active</field>
+        <field name="manf#">4609X-101-103LF</field>
+      </fields>
+      <libsource lib="dk_Resistor-Networks-Arrays" part="4609X-101-103LF" description="RES ARRAY 8 RES 10K OHM 9SIP"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C2907A3</tstamp>
+    </comp>
+    <comp ref="RN4">
+      <value>4609X-101-103LF</value>
+      <footprint>digikey-footprints:USE-SIP-9_P2.54mm</footprint>
+      <datasheet>https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</datasheet>
+      <fields>
+        <field name="Category">Resistors</field>
+        <field name="DK_Datasheet_Link">https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</field>
+        <field name="DK_Detail_Page">/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616</field>
+        <field name="Description">RES ARRAY 8 RES 10K OHM 9SIP</field>
+        <field name="Digi-Key_PN">4609X-101-103LF-ND</field>
+        <field name="Family">Resistor Networks, Arrays</field>
+        <field name="MPN">4609X-101-103LF</field>
+        <field name="Manufacturer">Bourns Inc.</field>
+        <field name="Status">Active</field>
+        <field name="manf#">4609X-101-103LF</field>
+      </fields>
+      <libsource lib="dk_Resistor-Networks-Arrays" part="4609X-101-103LF" description="RES ARRAY 8 RES 10K OHM 9SIP"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C3CDCE8</tstamp>
+    </comp>
+    <comp ref="RN6">
+      <value>4609X-101-103LF</value>
+      <footprint>digikey-footprints:USE-SIP-9_P2.54mm</footprint>
+      <datasheet>https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</datasheet>
+      <fields>
+        <field name="Category">Resistors</field>
+        <field name="DK_Datasheet_Link">https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</field>
+        <field name="DK_Detail_Page">/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616</field>
+        <field name="Description">RES ARRAY 8 RES 10K OHM 9SIP</field>
+        <field name="Digi-Key_PN">4609X-101-103LF-ND</field>
+        <field name="Family">Resistor Networks, Arrays</field>
+        <field name="MPN">4609X-101-103LF</field>
+        <field name="Manufacturer">Bourns Inc.</field>
+        <field name="Status">Active</field>
+        <field name="manf#">4609X-101-103LF</field>
+      </fields>
+      <libsource lib="dk_Resistor-Networks-Arrays" part="4609X-101-103LF" description="RES ARRAY 8 RES 10K OHM 9SIP"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C3CDDAC</tstamp>
+    </comp>
+    <comp ref="RN5">
+      <value>4609X-101-103LF</value>
+      <footprint>digikey-footprints:USE-SIP-9_P2.54mm</footprint>
+      <datasheet>https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</datasheet>
+      <fields>
+        <field name="Category">Resistors</field>
+        <field name="DK_Datasheet_Link">https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</field>
+        <field name="DK_Detail_Page">/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616</field>
+        <field name="Description">RES ARRAY 8 RES 10K OHM 9SIP</field>
+        <field name="Digi-Key_PN">4609X-101-103LF-ND</field>
+        <field name="Family">Resistor Networks, Arrays</field>
+        <field name="MPN">4609X-101-103LF</field>
+        <field name="Manufacturer">Bourns Inc.</field>
+        <field name="Status">Active</field>
+        <field name="manf#">4609X-101-103LF</field>
+      </fields>
+      <libsource lib="dk_Resistor-Networks-Arrays" part="4609X-101-103LF" description="RES ARRAY 8 RES 10K OHM 9SIP"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C3CDE16</tstamp>
+    </comp>
+    <comp ref="RN3">
+      <value>4609X-101-103LF</value>
+      <footprint>digikey-footprints:USE-SIP-9_P2.54mm</footprint>
+      <datasheet>https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</datasheet>
+      <fields>
+        <field name="Category">Resistors</field>
+        <field name="DK_Datasheet_Link">https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</field>
+        <field name="DK_Detail_Page">/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616</field>
+        <field name="Description">RES ARRAY 8 RES 10K OHM 9SIP</field>
+        <field name="Digi-Key_PN">4609X-101-103LF-ND</field>
+        <field name="Family">Resistor Networks, Arrays</field>
+        <field name="MPN">4609X-101-103LF</field>
+        <field name="Manufacturer">Bourns Inc.</field>
+        <field name="Status">Active</field>
+        <field name="manf#">4609X-101-103LF</field>
+      </fields>
+      <libsource lib="dk_Resistor-Networks-Arrays" part="4609X-101-103LF" description="RES ARRAY 8 RES 10K OHM 9SIP"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C3CDF3A</tstamp>
+    </comp>
+    <comp ref="RN1">
+      <value>4609X-101-103LF</value>
+      <footprint>digikey-footprints:USE-SIP-9_P2.54mm</footprint>
+      <datasheet>https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</datasheet>
+      <fields>
+        <field name="Category">Resistors</field>
+        <field name="DK_Datasheet_Link">https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</field>
+        <field name="DK_Detail_Page">/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616</field>
+        <field name="Description">RES ARRAY 8 RES 10K OHM 9SIP</field>
+        <field name="Digi-Key_PN">4609X-101-103LF-ND</field>
+        <field name="Family">Resistor Networks, Arrays</field>
+        <field name="MPN">4609X-101-103LF</field>
+        <field name="Manufacturer">Bourns Inc.</field>
+        <field name="Status">Active</field>
+        <field name="manf#">4609X-101-103LF</field>
+      </fields>
+      <libsource lib="dk_Resistor-Networks-Arrays" part="4609X-101-103LF" description="RES ARRAY 8 RES 10K OHM 9SIP"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C3CDFB6</tstamp>
+    </comp>
+    <comp ref="P9">
+      <value>BeagleBone_Black_Header</value>
+      <footprint>Socket_BeagleBone_Black:Socket_BeagleBone_Black</footprint>
+      <fields>
+        <field name="manf#">67996-150HLF</field>
+      </fields>
+      <libsource lib="Connector_Generic" part="Conn_02x23_Odd_Even" description="Generic connector, double row, 02x23, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>55DF7DBA</tstamp>
+    </comp>
+    <comp ref="U8">
+      <value>74166</value>
+      <footprint>kicad-library:NEW-DIP254P762X508-16</footprint>
+      <fields>
+        <field name="manf#">SN74HC166N</field>
+      </fields>
+      <libsource lib="74xx_IEEE" part="74166" description=""/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C343F96</tstamp>
+    </comp>
+    <comp ref="H4">
+      <value>MountingHole</value>
+      <footprint>MountingHole:MountingHole_2.2mm_M2</footprint>
+      <datasheet>~</datasheet>
+      <libsource lib="Mechanical" part="MountingHole" description="Mounting Hole without connection"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C81EB00</tstamp>
+    </comp>
+    <comp ref="H2">
+      <value>MountingHole</value>
+      <footprint>MountingHole:MountingHole_2.2mm_M2</footprint>
+      <datasheet>~</datasheet>
+      <libsource lib="Mechanical" part="MountingHole" description="Mounting Hole without connection"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C81F04C</tstamp>
+    </comp>
+    <comp ref="H3">
+      <value>MountingHole</value>
+      <footprint>MountingHole:MountingHole_2.2mm_M2</footprint>
+      <datasheet>~</datasheet>
+      <libsource lib="Mechanical" part="MountingHole" description="Mounting Hole without connection"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C827EBA</tstamp>
+    </comp>
+    <comp ref="H1">
+      <value>MountingHole</value>
+      <footprint>MountingHole:MountingHole_2.2mm_M2</footprint>
+      <datasheet>~</datasheet>
+      <libsource lib="Mechanical" part="MountingHole" description="Mounting Hole without connection"/>
+      <sheetpath names="/" tstamps="/"/>
+      <tstamp>5C827EC1</tstamp>
+    </comp>
+  </components>
+  <libparts>
+    <libpart lib="4xxx" part="4504">
+      <description>CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS, DIP-16/SOIC-16/TSSOP-16</description>
+      <docs>http://www.ti.com/lit/ds/symlink/cd4504b.pdf</docs>
+      <footprints>
+        <fp>DIP*W7.62mm*</fp>
+        <fp>SOIC*3.9x9.9mm*P1.27mm*</fp>
+        <fp>TSSOP*4.4x5mm*P0.65mm*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">U</field>
+        <field name="Value">4504</field>
+      </fields>
+      <pins>
+        <pin num="1" name="VCC" type="power_in"/>
+        <pin num="2" name="Aout" type="output"/>
+        <pin num="3" name="Ain" type="input"/>
+        <pin num="4" name="Bout" type="output"/>
+        <pin num="5" name="Bin" type="input"/>
+        <pin num="6" name="Cout" type="output"/>
+        <pin num="7" name="Cin" type="input"/>
+        <pin num="8" name="VSS" type="power_in"/>
+        <pin num="9" name="Din" type="input"/>
+        <pin num="10" name="Dout" type="output"/>
+        <pin num="11" name="Ein" type="input"/>
+        <pin num="12" name="Eout" type="output"/>
+        <pin num="13" name="Select" type="input"/>
+        <pin num="14" name="Fin" type="input"/>
+        <pin num="15" name="Fout" type="output"/>
+        <pin num="16" name="VDD" type="power_in"/>
+      </pins>
+    </libpart>
+    <libpart lib="74xx_IEEE" part="74166">
+      <fields>
+        <field name="Reference">U</field>
+        <field name="Value">74166</field>
+      </fields>
+      <pins>
+        <pin num="1" name="SER" type="input"/>
+        <pin num="2" name="A" type="input"/>
+        <pin num="3" name="B" type="input"/>
+        <pin num="4" name="C" type="input"/>
+        <pin num="5" name="D" type="input"/>
+        <pin num="6" name="CLKINH" type="input"/>
+        <pin num="7" name="CLK" type="input"/>
+        <pin num="8" name="GND" type="power_in"/>
+        <pin num="9" name="~CLR" type="input"/>
+        <pin num="10" name="E" type="input"/>
+        <pin num="11" name="F" type="input"/>
+        <pin num="12" name="G" type="input"/>
+        <pin num="13" name="QH" type="3state"/>
+        <pin num="14" name="H" type="input"/>
+        <pin num="15" name="SHLD" type="input"/>
+        <pin num="16" name="VCC" type="power_in"/>
+      </pins>
+    </libpart>
+    <libpart lib="Connector_Generic" part="Conn_02x23_Odd_Even">
+      <description>Generic connector, double row, 02x23, odd/even pin numbering scheme (row 1 odd numbers, row 2 even numbers), script generated (kicad-library-utils/schlib/autogen/connector/)</description>
+      <docs>~</docs>
+      <footprints>
+        <fp>Connector*:*_2x??_*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">J</field>
+        <field name="Value">Conn_02x23_Odd_Even</field>
+      </fields>
+      <pins>
+        <pin num="1" name="Pin_1" type="passive"/>
+        <pin num="2" name="Pin_2" type="passive"/>
+        <pin num="3" name="Pin_3" type="passive"/>
+        <pin num="4" name="Pin_4" type="passive"/>
+        <pin num="5" name="Pin_5" type="passive"/>
+        <pin num="6" name="Pin_6" type="passive"/>
+        <pin num="7" name="Pin_7" type="passive"/>
+        <pin num="8" name="Pin_8" type="passive"/>
+        <pin num="9" name="Pin_9" type="passive"/>
+        <pin num="10" name="Pin_10" type="passive"/>
+        <pin num="11" name="Pin_11" type="passive"/>
+        <pin num="12" name="Pin_12" type="passive"/>
+        <pin num="13" name="Pin_13" type="passive"/>
+        <pin num="14" name="Pin_14" type="passive"/>
+        <pin num="15" name="Pin_15" type="passive"/>
+        <pin num="16" name="Pin_16" type="passive"/>
+        <pin num="17" name="Pin_17" type="passive"/>
+        <pin num="18" name="Pin_18" type="passive"/>
+        <pin num="19" name="Pin_19" type="passive"/>
+        <pin num="20" name="Pin_20" type="passive"/>
+        <pin num="21" name="Pin_21" type="passive"/>
+        <pin num="22" name="Pin_22" type="passive"/>
+        <pin num="23" name="Pin_23" type="passive"/>
+        <pin num="24" name="Pin_24" type="passive"/>
+        <pin num="25" name="Pin_25" type="passive"/>
+        <pin num="26" name="Pin_26" type="passive"/>
+        <pin num="27" name="Pin_27" type="passive"/>
+        <pin num="28" name="Pin_28" type="passive"/>
+        <pin num="29" name="Pin_29" type="passive"/>
+        <pin num="30" name="Pin_30" type="passive"/>
+        <pin num="31" name="Pin_31" type="passive"/>
+        <pin num="32" name="Pin_32" type="passive"/>
+        <pin num="33" name="Pin_33" type="passive"/>
+        <pin num="34" name="Pin_34" type="passive"/>
+        <pin num="35" name="Pin_35" type="passive"/>
+        <pin num="36" name="Pin_36" type="passive"/>
+        <pin num="37" name="Pin_37" type="passive"/>
+        <pin num="38" name="Pin_38" type="passive"/>
+        <pin num="39" name="Pin_39" type="passive"/>
+        <pin num="40" name="Pin_40" type="passive"/>
+        <pin num="41" name="Pin_41" type="passive"/>
+        <pin num="42" name="Pin_42" type="passive"/>
+        <pin num="43" name="Pin_43" type="passive"/>
+        <pin num="44" name="Pin_44" type="passive"/>
+        <pin num="45" name="Pin_45" type="passive"/>
+        <pin num="46" name="Pin_46" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="Mechanical" part="MountingHole">
+      <description>Mounting Hole without connection</description>
+      <docs>~</docs>
+      <footprints>
+        <fp>MountingHole*</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">H</field>
+        <field name="Value">MountingHole</field>
+      </fields>
+    </libpart>
+    <libpart lib="dk_Resistor-Networks-Arrays" part="4609X-101-103LF">
+      <description>RES ARRAY 8 RES 10K OHM 9SIP</description>
+      <docs>https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</docs>
+      <fields>
+        <field name="Reference">RN</field>
+        <field name="Value">4609X-101-103LF</field>
+        <field name="Footprint">digikey-footprints:SIP-9_P2.54mm</field>
+        <field name="Datasheet">https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</field>
+        <field name="Digi-Key_PN">4609X-101-103LF-ND</field>
+        <field name="MPN">4609X-101-103LF</field>
+        <field name="Category">Resistors</field>
+        <field name="Family">Resistor Networks, Arrays</field>
+        <field name="DK_Datasheet_Link">https://www.bourns.com/docs/Product-Datasheets/4600x.pdf</field>
+        <field name="DK_Detail_Page">/product-detail/en/bourns-inc/4609X-101-103LF/4609X-101-103LF-ND/2634616</field>
+        <field name="Description">RES ARRAY 8 RES 10K OHM 9SIP</field>
+        <field name="Manufacturer">Bourns Inc.</field>
+        <field name="Status">Active</field>
+      </fields>
+      <pins>
+        <pin num="1" name="~" type="passive"/>
+        <pin num="2" name="~" type="passive"/>
+        <pin num="3" name="~" type="passive"/>
+        <pin num="4" name="~" type="passive"/>
+        <pin num="5" name="~" type="passive"/>
+        <pin num="6" name="~" type="passive"/>
+        <pin num="7" name="~" type="passive"/>
+        <pin num="8" name="~" type="passive"/>
+        <pin num="9" name="~" type="passive"/>
+      </pins>
+    </libpart>
+    <libpart lib="symbols" part="640456-8">
+      <footprints>
+        <fp>CONN8_640456-8</fp>
+      </footprints>
+      <fields>
+        <field name="Reference">J</field>
+        <field name="Value">640456-8</field>
+        <field name="Footprint">CONN8_640456-8</field>
+      </fields>
+      <pins>
+        <pin num="1" name="1" type="unspc"/>
+        <pin num="2" name="2" type="unspc"/>
+        <pin num="3" name="3" type="unspc"/>
+        <pin num="4" name="4" type="unspc"/>
+        <pin num="5" name="5" type="unspc"/>
+        <pin num="6" name="6" type="unspc"/>
+        <pin num="7" name="7" type="unspc"/>
+        <pin num="8" name="8" type="unspc"/>
+      </pins>
+    </libpart>
+  </libparts>
+  <libraries>
+    <library logical="4xxx">
+      <uri>C:\Program Files\KiCad\share\kicad\library/4xxx.lib</uri>
+    </library>
+    <library logical="74xx_IEEE">
+      <uri>C:\Program Files\KiCad\share\kicad\library/74xx_IEEE.lib</uri>
+    </library>
+    <library logical="Connector_Generic">
+      <uri>C:\Program Files\KiCad\share\kicad\library/Connector_Generic.lib</uri>
+    </library>
+    <library logical="Mechanical">
+      <uri>C:\Program Files\KiCad\share\kicad\library/Mechanical.lib</uri>
+    </library>
+    <library logical="dk_Resistor-Networks-Arrays">
+      <uri>C:/Users/kremlin/kicad/libraries/digikey-kicad-library/digikey-symbols/dk_Resistor-Networks-Arrays.lib</uri>
+    </library>
+    <library logical="symbols">
+      <uri>C:/Users/kremlin/kicad/libraries/misc/KiCAD/symbols.lib</uri>
+    </library>
+  </libraries>
+  <nets>
+    <net code="1" name="GND">
+      <node ref="U4" pin="1"/>
+      <node ref="U4" pin="8"/>
+      <node ref="U2" pin="13"/>
+      <node ref="U7" pin="1"/>
+      <node ref="U7" pin="8"/>
+      <node ref="U8" pin="1"/>
+      <node ref="U8" pin="8"/>
+      <node ref="RN1" pin="1"/>
+      <node ref="U1" pin="8"/>
+      <node ref="U1" pin="13"/>
+      <node ref="RN4" pin="1"/>
+      <node ref="RN6" pin="1"/>
+      <node ref="U5" pin="1"/>
+      <node ref="U5" pin="8"/>
+      <node ref="P9" pin="2"/>
+      <node ref="RN5" pin="1"/>
+      <node ref="U6" pin="1"/>
+      <node ref="U3" pin="1"/>
+      <node ref="U3" pin="8"/>
+      <node ref="RN3" pin="1"/>
+      <node ref="U2" pin="8"/>
+      <node ref="U6" pin="8"/>
+      <node ref="RN2" pin="1"/>
+    </net>
+    <net code="8" name="Net-(P9-Pad29)">
+      <node ref="P9" pin="29"/>
+    </net>
+    <net code="9" name="Net-(P9-Pad15)">
+      <node ref="P9" pin="15"/>
+    </net>
+    <net code="10" name="Net-(P9-Pad16)">
+      <node ref="P9" pin="16"/>
+    </net>
+    <net code="11" name="Net-(P9-Pad17)">
+      <node ref="P9" pin="17"/>
+    </net>
+    <net code="12" name="Net-(P9-Pad18)">
+      <node ref="P9" pin="18"/>
+    </net>
+    <net code="13" name="Net-(P9-Pad19)">
+      <node ref="P9" pin="19"/>
+    </net>
+    <net code="14" name="Net-(P9-Pad20)">
+      <node ref="P9" pin="20"/>
+    </net>
+    <net code="15" name="Net-(P9-Pad21)">
+      <node ref="P9" pin="21"/>
+    </net>
+    <net code="16" name="Net-(P9-Pad22)">
+      <node ref="P9" pin="22"/>
+    </net>
+    <net code="17" name="Net-(P9-Pad23)">
+      <node ref="P9" pin="23"/>
+    </net>
+    <net code="18" name="Net-(P9-Pad24)">
+      <node ref="P9" pin="24"/>
+    </net>
+    <net code="19" name="Net-(P9-Pad25)">
+      <node ref="P9" pin="25"/>
+    </net>
+    <net code="20" name="Net-(P9-Pad26)">
+      <node ref="P9" pin="26"/>
+    </net>
+    <net code="21" name="Net-(P9-Pad27)">
+      <node ref="P9" pin="27"/>
+    </net>
+    <net code="22" name="Net-(P9-Pad28)">
+      <node ref="P9" pin="28"/>
+    </net>
+    <net code="23" name="Net-(P9-Pad14)">
+      <node ref="P9" pin="14"/>
+    </net>
+    <net code="24" name="Net-(P9-Pad30)">
+      <node ref="P9" pin="30"/>
+    </net>
+    <net code="25" name="Net-(P9-Pad31)">
+      <node ref="P9" pin="31"/>
+    </net>
+    <net code="26" name="Net-(P9-Pad33)">
+      <node ref="P9" pin="33"/>
+    </net>
+    <net code="27" name="Net-(P9-Pad35)">
+      <node ref="P9" pin="35"/>
+    </net>
+    <net code="28" name="Net-(P9-Pad36)">
+      <node ref="P9" pin="36"/>
+    </net>
+    <net code="29" name="Net-(P9-Pad37)">
+      <node ref="P9" pin="37"/>
+    </net>
+    <net code="30" name="Net-(P9-Pad38)">
+      <node ref="P9" pin="38"/>
+    </net>
+    <net code="31" name="Net-(P9-Pad39)">
+      <node ref="P9" pin="39"/>
+    </net>
+    <net code="32" name="Net-(P9-Pad40)">
+      <node ref="P9" pin="40"/>
+    </net>
+    <net code="33" name="Net-(P9-Pad41)">
+      <node ref="P9" pin="41"/>
+    </net>
+    <net code="34" name="Net-(P9-Pad42)">
+      <node ref="P9" pin="42"/>
+    </net>
+    <net code="35" name="Net-(P9-Pad1)">
+      <node ref="P9" pin="1"/>
+    </net>
+    <net code="36" name="Net-(P9-Pad11)">
+      <node ref="P9" pin="11"/>
+    </net>
+    <net code="37" name="Net-(P9-Pad12)">
+      <node ref="P9" pin="12"/>
+    </net>
+    <net code="38" name="Net-(P9-Pad13)">
+      <node ref="P9" pin="13"/>
+    </net>
+    <net code="39" name="GNDD">
+      <node ref="P9" pin="43"/>
+      <node ref="P9" pin="46"/>
+      <node ref="P9" pin="45"/>
+      <node ref="P9" pin="44"/>
+    </net>
+    <net code="40" name="5v">
+      <node ref="U3" pin="16"/>
+      <node ref="U2" pin="16"/>
+      <node ref="U1" pin="1"/>
+      <node ref="U6" pin="16"/>
+      <node ref="P9" pin="5"/>
+      <node ref="U4" pin="16"/>
+      <node ref="U8" pin="16"/>
+      <node ref="P9" pin="8"/>
+      <node ref="P9" pin="7"/>
+      <node ref="P9" pin="6"/>
+      <node ref="U5" pin="16"/>
+      <node ref="U7" pin="16"/>
+    </net>
+    <net code="41" name="PWR_BUT">
+      <node ref="P9" pin="9"/>
+    </net>
+    <net code="42" name="SR3_QH">
+      <node ref="U8" pin="13"/>
+      <node ref="U1" pin="7"/>
+    </net>
+    <net code="43" name="a5r">
+      <node ref="J1" pin="4"/>
+      <node ref="U4" pin="5"/>
+      <node ref="RN1" pin="6"/>
+    </net>
+    <net code="44" name="a1r">
+      <node ref="J1" pin="8"/>
+      <node ref="RN1" pin="2"/>
+      <node ref="U4" pin="14"/>
+    </net>
+    <net code="45" name="a2r">
+      <node ref="RN1" pin="3"/>
+      <node ref="J1" pin="7"/>
+      <node ref="U4" pin="12"/>
+    </net>
+    <net code="46" name="a3r">
+      <node ref="RN1" pin="4"/>
+      <node ref="U4" pin="11"/>
+      <node ref="J1" pin="6"/>
+    </net>
+    <net code="47" name="a4r">
+      <node ref="J1" pin="5"/>
+      <node ref="RN1" pin="5"/>
+      <node ref="U4" pin="10"/>
+    </net>
+    <net code="48" name="a6r">
+      <node ref="RN1" pin="7"/>
+      <node ref="U4" pin="4"/>
+      <node ref="J1" pin="3"/>
+    </net>
+    <net code="49" name="a7r">
+      <node ref="J1" pin="2"/>
+      <node ref="U4" pin="3"/>
+      <node ref="RN1" pin="8"/>
+    </net>
+    <net code="50" name="a8r">
+      <node ref="J1" pin="1"/>
+      <node ref="RN1" pin="9"/>
+      <node ref="U4" pin="2"/>
+    </net>
+    <net code="53" name="SR1_QH_T">
+      <node ref="P8" pin="4"/>
+      <node ref="U1" pin="2"/>
+    </net>
+    <net code="54" name="SR2_QH">
+      <node ref="U1" pin="5"/>
+      <node ref="U7" pin="13"/>
+    </net>
+    <net code="55" name="SR6_QH_T">
+      <node ref="U1" pin="15"/>
+      <node ref="P8" pin="18"/>
+    </net>
+    <net code="56" name="SR1_QH">
+      <node ref="U1" pin="3"/>
+      <node ref="U3" pin="13"/>
+    </net>
+    <net code="57" name="BB3.3">
+      <node ref="U2" pin="1"/>
+      <node ref="U1" pin="16"/>
+    </net>
+    <net code="58" name="SR1_CLR_T">
+      <node ref="U4" pin="9"/>
+      <node ref="U5" pin="9"/>
+      <node ref="U7" pin="9"/>
+      <node ref="U6" pin="9"/>
+      <node ref="U3" pin="9"/>
+      <node ref="U2" pin="10"/>
+      <node ref="U8" pin="9"/>
+    </net>
+    <net code="59" name="7SEG_CLK_T">
+      <node ref="U2" pin="12"/>
+    </net>
+    <net code="60" name="7SEG_DIO">
+      <node ref="U2" pin="14"/>
+      <node ref="P8" pin="43"/>
+    </net>
+    <net code="61" name="7SEG_DIO_T">
+      <node ref="U2" pin="15"/>
+    </net>
+    <net code="62" name="SR1_CLK">
+      <node ref="U2" pin="3"/>
+      <node ref="P8" pin="11"/>
+    </net>
+    <net code="63" name="SR1_CLKINH_T">
+      <node ref="U2" pin="4"/>
+      <node ref="U4" pin="6"/>
+      <node ref="U6" pin="6"/>
+      <node ref="U7" pin="6"/>
+      <node ref="U3" pin="6"/>
+      <node ref="U5" pin="6"/>
+      <node ref="U8" pin="6"/>
+    </net>
+    <net code="64" name="SR1_CLKINH">
+      <node ref="P8" pin="5"/>
+      <node ref="U2" pin="5"/>
+    </net>
+    <net code="65" name="SR1_SHLD_T">
+      <node ref="U7" pin="15"/>
+      <node ref="U6" pin="15"/>
+      <node ref="U2" pin="6"/>
+      <node ref="U5" pin="15"/>
+      <node ref="U3" pin="15"/>
+      <node ref="U8" pin="15"/>
+      <node ref="U4" pin="15"/>
+    </net>
+    <net code="66" name="SR1_SHLD">
+      <node ref="U2" pin="7"/>
+      <node ref="P8" pin="15"/>
+    </net>
+    <net code="67" name="SR1_CLR">
+      <node ref="U2" pin="9"/>
+      <node ref="P8" pin="17"/>
+    </net>
+    <net code="68" name="SR4_QH">
+      <node ref="U1" pin="9"/>
+      <node ref="U6" pin="13"/>
+    </net>
+    <net code="69" name="SR2_QH__T">
+      <node ref="U1" pin="4"/>
+    </net>
+    <net code="70" name="SR3_QH_T">
+      <node ref="P8" pin="12"/>
+      <node ref="U1" pin="6"/>
+    </net>
+    <net code="71" name="Net-(P8-Pad19)">
+      <node ref="P8" pin="19"/>
+    </net>
+    <net code="72" name="GNDA_ADC">
+      <node ref="P9" pin="34"/>
+    </net>
+    <net code="73" name="SYS_RESETN">
+      <node ref="P9" pin="10"/>
+    </net>
+    <net code="74" name="Net-(P8-Pad1)">
+      <node ref="P8" pin="1"/>
+    </net>
+    <net code="75" name="Net-(P8-Pad10)">
+      <node ref="P8" pin="10"/>
+    </net>
+    <net code="76" name="Net-(P8-Pad13)">
+      <node ref="P8" pin="13"/>
+    </net>
+    <net code="77" name="Net-(P8-Pad2)">
+      <node ref="P8" pin="2"/>
+    </net>
+    <net code="78" name="Net-(P8-Pad20)">
+      <node ref="P8" pin="20"/>
+    </net>
+    <net code="79" name="Net-(P8-Pad21)">
+      <node ref="P8" pin="21"/>
+    </net>
+    <net code="80" name="Net-(P8-Pad22)">
+      <node ref="P8" pin="22"/>
+    </net>
+    <net code="81" name="Net-(P8-Pad23)">
+      <node ref="P8" pin="23"/>
+    </net>
+    <net code="82" name="Net-(P8-Pad24)">
+      <node ref="P8" pin="24"/>
+    </net>
+    <net code="83" name="Net-(P8-Pad25)">
+      <node ref="P8" pin="25"/>
+    </net>
+    <net code="84" name="Net-(P8-Pad26)">
+      <node ref="P8" pin="26"/>
+    </net>
+    <net code="85" name="Net-(P8-Pad27)">
+      <node ref="P8" pin="27"/>
+    </net>
+    <net code="86" name="Net-(P8-Pad28)">
+      <node ref="P8" pin="28"/>
+    </net>
+    <net code="87" name="Net-(P8-Pad29)">
+      <node ref="P8" pin="29"/>
+    </net>
+    <net code="88" name="Net-(P8-Pad3)">
+      <node ref="P8" pin="3"/>
+    </net>
+    <net code="89" name="Net-(P8-Pad30)">
+      <node ref="P8" pin="30"/>
+    </net>
+    <net code="90" name="Net-(P8-Pad31)">
+      <node ref="P8" pin="31"/>
+    </net>
+    <net code="91" name="Net-(P8-Pad32)">
+      <node ref="P8" pin="32"/>
+    </net>
+    <net code="92" name="+3V3">
+      <node ref="P9" pin="3"/>
+      <node ref="P9" pin="4"/>
+    </net>
+    <net code="93" name="Net-(P8-Pad33)">
+      <node ref="P8" pin="33"/>
+    </net>
+    <net code="94" name="VDD_ADC">
+      <node ref="P9" pin="32"/>
+    </net>
+    <net code="95" name="SR1_CLK_T">
+      <node ref="U8" pin="7"/>
+      <node ref="U6" pin="7"/>
+      <node ref="U7" pin="7"/>
+      <node ref="U3" pin="7"/>
+      <node ref="U2" pin="2"/>
+      <node ref="U4" pin="7"/>
+      <node ref="U5" pin="7"/>
+    </net>
+    <net code="96" name="SR4_QH_T">
+      <node ref="U1" pin="10"/>
+      <node ref="P8" pin="14"/>
+    </net>
+    <net code="97" name="SR5_QH">
+      <node ref="U1" pin="11"/>
+      <node ref="U5" pin="13"/>
+    </net>
+    <net code="98" name="SR5_QH_T">
+      <node ref="P8" pin="16"/>
+      <node ref="U1" pin="12"/>
+    </net>
+    <net code="99" name="SR2_QH_T">
+      <node ref="P8" pin="6"/>
+    </net>
+    <net code="100" name="Net-(P8-Pad34)">
+      <node ref="P8" pin="34"/>
+    </net>
+    <net code="101" name="Net-(P8-Pad35)">
+      <node ref="P8" pin="35"/>
+    </net>
+    <net code="102" name="Net-(P8-Pad36)">
+      <node ref="P8" pin="36"/>
+    </net>
+    <net code="103" name="Net-(P8-Pad37)">
+      <node ref="P8" pin="37"/>
+    </net>
+    <net code="104" name="Net-(P8-Pad38)">
+      <node ref="P8" pin="38"/>
+    </net>
+    <net code="105" name="Net-(P8-Pad39)">
+      <node ref="P8" pin="39"/>
+    </net>
+    <net code="106" name="Net-(P8-Pad40)">
+      <node ref="P8" pin="40"/>
+    </net>
+    <net code="107" name="Net-(P8-Pad41)">
+      <node ref="P8" pin="41"/>
+    </net>
+    <net code="108" name="Net-(P8-Pad42)">
+      <node ref="P8" pin="42"/>
+    </net>
+    <net code="109" name="Net-(P8-Pad44)">
+      <node ref="P8" pin="44"/>
+    </net>
+    <net code="110" name="Net-(P8-Pad46)">
+      <node ref="P8" pin="46"/>
+    </net>
+    <net code="111" name="Net-(P8-Pad7)">
+      <node ref="P8" pin="7"/>
+    </net>
+    <net code="112" name="Net-(P8-Pad8)">
+      <node ref="P8" pin="8"/>
+    </net>
+    <net code="113" name="Net-(P8-Pad9)">
+      <node ref="P8" pin="9"/>
+    </net>
+    <net code="114" name="SR6_QH">
+      <node ref="U1" pin="14"/>
+      <node ref="U4" pin="13"/>
+    </net>
+    <net code="115" name="7SEG_CLK">
+      <node ref="P8" pin="45"/>
+      <node ref="U2" pin="11"/>
+    </net>
+    <net code="116" name="e6r">
+      <node ref="J5" pin="3"/>
+      <node ref="RN4" pin="7"/>
+      <node ref="U3" pin="4"/>
+    </net>
+    <net code="117" name="e7r">
+      <node ref="RN4" pin="8"/>
+      <node ref="U3" pin="3"/>
+      <node ref="J5" pin="2"/>
+    </net>
+    <net code="118" name="e8r">
+      <node ref="RN4" pin="9"/>
+      <node ref="J5" pin="1"/>
+      <node ref="U3" pin="2"/>
+    </net>
+    <net code="119" name="f1r">
+      <node ref="U8" pin="14"/>
+      <node ref="RN6" pin="2"/>
+      <node ref="J6" pin="8"/>
+    </net>
+    <net code="120" name="f2r">
+      <node ref="RN6" pin="3"/>
+      <node ref="U8" pin="12"/>
+      <node ref="J6" pin="7"/>
+    </net>
+    <net code="121" name="f3r">
+      <node ref="RN6" pin="4"/>
+      <node ref="J6" pin="6"/>
+      <node ref="U8" pin="11"/>
+    </net>
+    <net code="122" name="f4r">
+      <node ref="U8" pin="10"/>
+      <node ref="RN6" pin="5"/>
+      <node ref="J6" pin="5"/>
+    </net>
+    <net code="123" name="f5r">
+      <node ref="U8" pin="5"/>
+      <node ref="RN6" pin="6"/>
+      <node ref="J6" pin="4"/>
+    </net>
+    <net code="124" name="f6r">
+      <node ref="J6" pin="3"/>
+      <node ref="RN6" pin="7"/>
+      <node ref="U8" pin="4"/>
+    </net>
+    <net code="125" name="f7r">
+      <node ref="U8" pin="3"/>
+      <node ref="J6" pin="2"/>
+      <node ref="RN6" pin="8"/>
+    </net>
+    <net code="126" name="f8r">
+      <node ref="U8" pin="2"/>
+      <node ref="RN6" pin="9"/>
+      <node ref="J6" pin="1"/>
+    </net>
+    <net code="127" name="e4r">
+      <node ref="RN4" pin="5"/>
+      <node ref="U3" pin="10"/>
+      <node ref="J5" pin="5"/>
+    </net>
+    <net code="128" name="e5r">
+      <node ref="U3" pin="5"/>
+      <node ref="RN4" pin="6"/>
+      <node ref="J5" pin="4"/>
+    </net>
+    <net code="129" name="e3r">
+      <node ref="U3" pin="11"/>
+      <node ref="RN4" pin="4"/>
+      <node ref="J5" pin="6"/>
+    </net>
+    <net code="130" name="c4r">
+      <node ref="J3" pin="5"/>
+      <node ref="RN5" pin="5"/>
+      <node ref="U6" pin="10"/>
+    </net>
+    <net code="131" name="b1r">
+      <node ref="U5" pin="14"/>
+      <node ref="J2" pin="8"/>
+      <node ref="RN3" pin="2"/>
+    </net>
+    <net code="132" name="b2r">
+      <node ref="U5" pin="12"/>
+      <node ref="RN3" pin="3"/>
+      <node ref="J2" pin="7"/>
+    </net>
+    <net code="133" name="b3r">
+      <node ref="RN3" pin="4"/>
+      <node ref="U5" pin="11"/>
+      <node ref="J2" pin="6"/>
+    </net>
+    <net code="134" name="b4r">
+      <node ref="U5" pin="10"/>
+      <node ref="J2" pin="5"/>
+      <node ref="RN3" pin="5"/>
+    </net>
+    <net code="135" name="b5r">
+      <node ref="RN3" pin="6"/>
+      <node ref="U5" pin="5"/>
+      <node ref="J2" pin="4"/>
+    </net>
+    <net code="136" name="b6r">
+      <node ref="RN3" pin="7"/>
+      <node ref="U5" pin="4"/>
+      <node ref="J2" pin="3"/>
+    </net>
+    <net code="137" name="b7r">
+      <node ref="U5" pin="3"/>
+      <node ref="J2" pin="2"/>
+      <node ref="RN3" pin="8"/>
+    </net>
+    <net code="138" name="b8r">
+      <node ref="U5" pin="2"/>
+      <node ref="RN3" pin="9"/>
+      <node ref="J2" pin="1"/>
+    </net>
+    <net code="139" name="c1r">
+      <node ref="J3" pin="8"/>
+      <node ref="RN5" pin="2"/>
+      <node ref="U6" pin="14"/>
+    </net>
+    <net code="140" name="c2r">
+      <node ref="RN5" pin="3"/>
+      <node ref="U6" pin="12"/>
+      <node ref="J3" pin="7"/>
+    </net>
+    <net code="141" name="c3r">
+      <node ref="RN5" pin="4"/>
+      <node ref="J3" pin="6"/>
+      <node ref="U6" pin="11"/>
+    </net>
+    <net code="142" name="c5r">
+      <node ref="RN5" pin="6"/>
+      <node ref="J3" pin="4"/>
+      <node ref="U6" pin="5"/>
+    </net>
+    <net code="143" name="c6r">
+      <node ref="RN5" pin="7"/>
+      <node ref="J3" pin="3"/>
+      <node ref="U6" pin="4"/>
+    </net>
+    <net code="144" name="c7r">
+      <node ref="RN5" pin="8"/>
+      <node ref="J3" pin="2"/>
+      <node ref="U6" pin="3"/>
+    </net>
+    <net code="145" name="c8r">
+      <node ref="RN5" pin="9"/>
+      <node ref="U6" pin="2"/>
+      <node ref="J3" pin="1"/>
+    </net>
+    <net code="146" name="d1r">
+      <node ref="U7" pin="14"/>
+      <node ref="J4" pin="8"/>
+      <node ref="RN2" pin="2"/>
+    </net>
+    <net code="147" name="d2r">
+      <node ref="J4" pin="7"/>
+      <node ref="U7" pin="12"/>
+      <node ref="RN2" pin="3"/>
+    </net>
+    <net code="148" name="d3r">
+      <node ref="U7" pin="11"/>
+      <node ref="J4" pin="6"/>
+      <node ref="RN2" pin="4"/>
+    </net>
+    <net code="149" name="d4r">
+      <node ref="RN2" pin="5"/>
+      <node ref="U7" pin="10"/>
+      <node ref="J4" pin="5"/>
+    </net>
+    <net code="150" name="d5r">
+      <node ref="RN2" pin="6"/>
+      <node ref="J4" pin="4"/>
+      <node ref="U7" pin="5"/>
+    </net>
+    <net code="151" name="d6r">
+      <node ref="RN2" pin="7"/>
+      <node ref="J4" pin="3"/>
+      <node ref="U7" pin="4"/>
+    </net>
+    <net code="152" name="d7r">
+      <node ref="RN2" pin="8"/>
+      <node ref="U7" pin="3"/>
+      <node ref="J4" pin="2"/>
+    </net>
+    <net code="153" name="d8r">
+      <node ref="U7" pin="2"/>
+      <node ref="RN2" pin="9"/>
+      <node ref="J4" pin="1"/>
+    </net>
+    <net code="154" name="e1r">
+      <node ref="RN4" pin="2"/>
+      <node ref="U3" pin="14"/>
+      <node ref="J5" pin="8"/>
+    </net>
+    <net code="155" name="e2r">
+      <node ref="U3" pin="12"/>
+      <node ref="RN4" pin="3"/>
+      <node ref="J5" pin="7"/>
+    </net>
+  </nets>
+</export>

diff --git a/bbb-bort10.dsn b/bbb-bort10.dsn
new file mode 100644 (file)
index 0000000..03ec174
--- /dev/null
+++ b/bbb-bort10.dsn
@@ -0,0 +1,990 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort10.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
+      (property\r
+        (index 0)\r
+      )\r
+    )\r
+    (layer B.Cu\r
+      (type signal)\r
+      (property\r
+        (index 1)\r
+      )\r
+    )\r
+    (boundary\r
+      (path pcb 0  122720 -181762  54140.1 -181762  54140.1 -49682.4  122720 -49682.4\r
+            122720 -181762)\r
+    )\r
+    (via "Via[0-1]_600:400_um")\r
+    (rule\r
+      (width 250)\r
+      (clearance 200.1)\r
+      (clearance 200.1 (type default_smd))\r
+      (clearance 50 (type smd_smd))\r
+    )\r
+  )\r
+  (placement\r
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (place P8 111290 -116992 front 0 (PN BeagleBone_Black_Header))\r
+      (place P9 63030.1 -116992 front 0 (PN BeagleBone_Black_Header))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"\r
+      (place U1 71920.1 -105562 front 0 (PN 4504))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"\r
+      (place U2 108750 -105562 front 0 (PN 4504))\r
+    )\r
+    (component "SN74HC166N:DIP254P762X508-16"\r
+      (place U3 90335.1 -105562 front 0 (PN 74166))\r
+      (place U4 68110.1 -77622.4 front 0 (PN 74166))\r
+      (place U6 92875.1 -77622.4 front 0 (PN 74166))\r
+      (place U7 105258 -77622.4 front 0 (PN 74166))\r
+    )\r
+    (component "SN74HC166N:DIP254P762X508-16::1"\r
+      (place U5 80492.6 -77622.4 front 0 (PN 74166))\r
+      (place U8 117640 -77622.4 front 0 (PN 74166))\r
+    )\r
+  )\r
+  (library\r
+    (image Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (outline (path signal 150  -1550 1550  -1550 0))\r
+      (outline (path signal 150  1270 -1270  -1270 -1270))\r
+      (outline (path signal 150  1270 1270  1270 -1270))\r
+      (outline (path signal 150  0 1550  -1550 1550))\r
+      (outline (path signal 150  3810 1270  1270 1270))\r
+      (outline (path signal 150  3810 -57150  -1270 -57150))\r
+      (outline (path signal 150  -1270 -57150  -1270 -1270))\r
+      (outline (path signal 150  3810 -57150  3810 1270))\r
+      (outline (path signal 50  -1750 -57650  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  4300 1750))\r
+      (outline (path signal 50  4300 1750  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  -1750 -57650))\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 46 2540 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 45 0 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 44 2540 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 43 0 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 42 2540 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 41 0 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 40 2540 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 39 0 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 38 2540 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 37 0 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 36 2540 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 35 0 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 34 2540 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 33 0 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 32 2540 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 31 0 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 30 2540 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 29 0 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 28 2540 -33020)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 27 0 -33020)\r
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+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-1]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
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+      (pins P8-3)\r
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+      (pins P8-7)\r
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+    (net "Net-(P8-Pad24)"\r
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+      (pins P8-26)\r
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+      (pins P8-28)\r
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+    (net "Net-(P8-Pad30)"\r
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+    (net "Net-(P8-Pad31)"\r
+      (pins P8-31)\r
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+    (net "Net-(P8-Pad32)"\r
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+    (net "Net-(P8-Pad33)"\r
+      (pins P8-33)\r
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+      (pins P8-34)\r
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+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
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+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
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+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
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+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
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+    (net "Net-(P8-Pad40)"\r
+      (pins P8-40)\r
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+    (net "Net-(P8-Pad41)"\r
+      (pins P8-41)\r
+    )\r
+    (net "Net-(P8-Pad42)"\r
+      (pins P8-42)\r
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+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
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+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
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+    (net "Net-(P9-Pad11)"\r
+      (pins P9-11)\r
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+      (pins P9-14)\r
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+    (net "Net-(P9-Pad15)"\r
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+    (net "Net-(P9-Pad17)"\r
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+    (net "Net-(P9-Pad18)"\r
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+      (pins P9-41)\r
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+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
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+      (pins P9-9)\r
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+    (net SYS_RESETN\r
+      (pins P9-10)\r
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+    (net VDD_ADC\r
+      (pins P9-32)\r
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+    (net GNDA_ADC\r
+      (pins P9-34)\r
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+    (net SR1_CLR\r
+      (pins P8-17 U2-9)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins P8-15 U2-7)\r
+    )\r
+    (net SR1_CLK\r
+      (pins P8-11 U2-3)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins P8-5 U2-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins P8-4 U1-2)\r
+    )\r
+    (net PGND\r
+      (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-8 U1-13 U2-13 U2-8 U3-1\r
+        U3-8 U4-1 U4-8 U5-8 U5-1 U6-1 U6-8 U7-1 U7-8 U8-8 U8-1)\r
+    )\r
+    (net 5v\r
+      (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16 U4-16 U5-16 U6-16 U7-16 U8-16)\r
+    )\r
+    (net BB3.3\r
+      (pins U1-16 U2-1)\r
+    )\r
+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
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+    (net SR1_CLR_T\r
+      (pins U2-10 U3-9 U4-9 U5-9 U6-9 U7-9 U8-9)\r
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+    (net SR1_SHLD_T\r
+      (pins U2-6 U3-15 U4-15 U5-15 U6-15 U7-15 U8-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U2-4 U3-6 U4-6 U5-6 U6-6 U7-6 U8-6)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U2-2 U3-7 U4-7 U5-7 U6-7 U7-7 U8-7)\r
+    )\r
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+      (pins P8-43 U2-14)\r
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+      (pins U5-10)\r
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+      (pins U5-5)\r
+    )\r
+    (net "Net-(U5-Pad4)"\r
+      (pins U5-4)\r
+    )\r
+    (net "Net-(U5-Pad3)"\r
+      (pins U5-3)\r
+    )\r
+    (net "Net-(U5-Pad2)"\r
+      (pins U5-2)\r
+    )\r
+    (net "Net-(U6-Pad2)"\r
+      (pins U6-2)\r
+    )\r
+    (net "Net-(U6-Pad3)"\r
+      (pins U6-3)\r
+    )\r
+    (net "Net-(U6-Pad4)"\r
+      (pins U6-4)\r
+    )\r
+    (net "Net-(U6-Pad5)"\r
+      (pins U6-5)\r
+    )\r
+    (net "Net-(U6-Pad10)"\r
+      (pins U6-10)\r
+    )\r
+    (net "Net-(U6-Pad11)"\r
+      (pins U6-11)\r
+    )\r
+    (net "Net-(U6-Pad12)"\r
+      (pins U6-12)\r
+    )\r
+    (net "Net-(U6-Pad14)"\r
+      (pins U6-14)\r
+    )\r
+    (net "Net-(U7-Pad2)"\r
+      (pins U7-2)\r
+    )\r
+    (net "Net-(U7-Pad3)"\r
+      (pins U7-3)\r
+    )\r
+    (net "Net-(U7-Pad4)"\r
+      (pins U7-4)\r
+    )\r
+    (net "Net-(U7-Pad5)"\r
+      (pins U7-5)\r
+    )\r
+    (net "Net-(U7-Pad10)"\r
+      (pins U7-10)\r
+    )\r
+    (net "Net-(U7-Pad11)"\r
+      (pins U7-11)\r
+    )\r
+    (net "Net-(U7-Pad12)"\r
+      (pins U7-12)\r
+    )\r
+    (net "Net-(U7-Pad14)"\r
+      (pins U7-14)\r
+    )\r
+    (net "Net-(U8-Pad14)"\r
+      (pins U8-14)\r
+    )\r
+    (net "Net-(U8-Pad12)"\r
+      (pins U8-12)\r
+    )\r
+    (net "Net-(U8-Pad11)"\r
+      (pins U8-11)\r
+    )\r
+    (net "Net-(U8-Pad10)"\r
+      (pins U8-10)\r
+    )\r
+    (net "Net-(U8-Pad5)"\r
+      (pins U8-5)\r
+    )\r
+    (net "Net-(U8-Pad4)"\r
+      (pins U8-4)\r
+    )\r
+    (net "Net-(U8-Pad3)"\r
+      (pins U8-3)\r
+    )\r
+    (net "Net-(U8-Pad2)"\r
+      (pins U8-2)\r
+    )\r
+    (class kicad_default "" +3V3 /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1 /p2 /p3\r
+      /p4 /p5 /p6 /p7 /p8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3\r
+      GNDA_ADC "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)"\r
+      "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)"\r
+      "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"\r
+      "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)"\r
+      "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"\r
+      "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)"\r
+      "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"\r
+      "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)"\r
+      "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)"\r
+      "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)"\r
+      "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)"\r
+      "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"\r
+      "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)"\r
+      "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"\r
+      "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)"\r
+      "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"\r
+      "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)"\r
+      "Net-(P9-Pad41)" "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)"\r
+      "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad4)" "Net-(U1-Pad5)"\r
+      "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad11)" "Net-(U2-Pad12)"\r
+      "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U3-Pad10)" "Net-(U3-Pad11)"\r
+      "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)"\r
+      "Net-(U3-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)"\r
+      "Net-(U4-Pad2)" "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U5-Pad10)"\r
+      "Net-(U5-Pad11)" "Net-(U5-Pad12)" "Net-(U5-Pad14)" "Net-(U5-Pad2)" "Net-(U5-Pad3)"\r
+      "Net-(U5-Pad4)" "Net-(U5-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)"\r
+      "Net-(U6-Pad14)" "Net-(U6-Pad2)" "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)"\r
+      "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)"\r
+      "Net-(U7-Pad2)" "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U8-Pad10)"\r
+      "Net-(U8-Pad11)" "Net-(U8-Pad12)" "Net-(U8-Pad14)" "Net-(U8-Pad2)" "Net-(U8-Pad3)"\r
+      "Net-(U8-Pad4)" "Net-(U8-Pad5)" PGND PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T\r
+      SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SR2_QH\r
+      SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH SR4_QH_T SR5_QH SR5_QH_T SR6_QH\r
+      SR6_QH_T SYS_RESETN VDD_ADC\r
+      (circuit\r
+        (use_via Via[0-1]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort10.rules b/bbb-bort10.rules
new file mode 100644 (file)
index 0000000..54ebc34
--- /dev/null
+++ b/bbb-bort10.rules
@@ -0,0 +1,93 @@
+
+(rules PCB bbb-bort10
+  (snap_angle 
+    fortyfive_degree
+  )
+  (autoroute_settings
+    (fanout off)
+    (autoroute on)
+    (postroute on)
+    (vias on)
+    (via_costs 50)
+    (plane_via_costs 5)
+    (start_ripup_costs 100)
+    (start_pass_no 910)
+    (layer_rule F.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 2.9)
+    )
+    (layer_rule B.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 1.5)
+    )
+  )
+  (rule
+    (width 250.0)
+    (clear 200.2)
+    (clear 125.0 (type smd_to_turn_gap))
+    (clear 50.0 (type smd_smd))
+  )
+  (padstack "Via[0-1]_600:400_um"
+    (shape
+      (circle F.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle B.Cu 600.0 0.0 0.0)
+    )
+    (attach off)
+  )
+  (via 
+    "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default
+  )
+  (via 
+    "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default"
+  )
+  (via_rule
+    default "Via[0-1]_600:400_um"
+  )
+  (via_rule
+    "kicad_default" "Via[0-1]_600:400_um-kicad_default"
+  )
+  (class default
+    (clearance_class default)
+    (via_rule default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+  (class "kicad_default"
+    "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"
+    "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"
+    "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"
+    "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)"
+    "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"
+    "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"
+    "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"
+    "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN"
+    "VDD_ADC" "GNDA_ADC" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND
+    5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK"
+    "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T"
+    "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(U3-Pad2)"
+    "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U4-Pad2)"
+    "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)" "Net-(U5-Pad14)"
+    "Net-(U5-Pad12)" "Net-(U5-Pad11)" "Net-(U5-Pad10)" "Net-(U5-Pad5)" "Net-(U5-Pad4)" "Net-(U5-Pad3)" "Net-(U5-Pad2)" "Net-(U6-Pad2)"
+    "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)" "Net-(U6-Pad14)" "Net-(U7-Pad2)"
+    "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)" "Net-(U8-Pad14)"
+    "Net-(U8-Pad12)" "Net-(U8-Pad11)" "Net-(U8-Pad10)" "Net-(U8-Pad5)" "Net-(U8-Pad4)" "Net-(U8-Pad3)" "Net-(U8-Pad2)"
+    (clearance_class "kicad_default")
+    (via_rule kicad_default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort10.ses b/bbb-bort10.ses
new file mode 100644 (file)
index 0000000..500115b
--- /dev/null
+++ b/bbb-bort10.ses
@@ -0,0 +1,1008 @@
+
+(session "bbb-bort10.ses"
+  (base_design "bbb-bort10.dsn")
+  (placement
+    (resolution um 10)
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black
+      (place P8 1112900 -1169920 front 0)
+      (place P9 630301 -1169920 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"
+      (place U1 719201 -1055620 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"
+      (place U2 1087500 -1055620 front 0)
+    )
+    (component "SN74HC166N:DIP254P762X508-16"
+      (place U3 903351 -1055620 front 0)
+      (place U4 681101 -776224 front 0)
+      (place U6 928751 -776224 front 0)
+      (place U7 1052580 -776224 front 0)
+    )
+    (component "SN74HC166N:DIP254P762X508-16::1"
+      (place U5 804926 -776224 front 0)
+      (place U8 1176400 -776224 front 0)
+    )
+  )
+  (was_is
+  )
+  (routes 
+    (resolution um 10)
+    (parser
+      (host_cad "KiCad's Pcbnew")
+      (host_version "(5.0.1)-3")
+    )
+    (library_out 
+      (padstack "Via[0-1]_600:400_um"
+        (shape
+          (circle F.Cu 6000 0 0)
+        )
+        (shape
+          (circle B.Cu 6000 0 0)
+        )
+        (attach off)
+      )
+    )
+    (network_out 
+      (net SR1_CLR
+        (wire
+          (path F.Cu 2500
+            1112900 -1373120
+            1112900 -1361231
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1087500 -1055620
+            1124789 -1092909
+            1124789 -1353058
+            1116616 -1361231
+            1112900 -1361231
+          )
+        )
+      )
+      (net SR1_SHLD
+        (wire
+          (path F.Cu 2500
+            1112900 -1335831
+            1109591 -1335831
+            1030137 -1256377
+            1030137 -1049057
+            1011300 -1030220
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1112900 -1347720
+            1112900 -1335831
+          )
+        )
+      )
+      (net SR1_CLK
+        (wire
+          (path F.Cu 2500
+            1011300 -928620
+            999509 -940411
+            999509 -984313
+            1007316 -992120
+            1015214 -992120
+            1034641 -1011547
+            1034641 -1210487
+            1109185 -1285031
+            1112900 -1285031
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1112900 -1296920
+            1112900 -1285031
+          )
+        )
+      )
+      (net SR1_CLKINH
+        (wire
+          (path F.Cu 2500
+            1112900 -1220720
+            1112900 -1208831
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1011300 -979420
+            1053217 -1021337
+            1053217 -1152863
+            1109185 -1208831
+            1112900 -1208831
+          )
+        )
+      )
+      (net SR1_QH_T
+        (wire
+          (path B.Cu 2500
+            1138300 -1195320
+            1138300 -1183431
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            643001 -903220
+            631365 -891584
+            631365 -868090
+            637854 -861601
+            1087938 -861601
+            1150434 -924097
+            1150434 -1174992
+            1141995 -1183431
+            1138300 -1183431
+          )
+        )
+      )
+      (net PGND
+        (wire
+          (path B.Cu 2500
+            1138300 -1169920
+            1126411 -1169920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1112900 -1163975
+            1120466 -1163975
+            1126411 -1169920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1112900 -1163975
+            1112900 -1158031
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1112900 -1169920
+            1112900 -1163975
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1071045 -1055620
+            1084809 -1041856
+            1092971 -1041856
+            1099136 -1035691
+            1099136 -965656
+            1087500 -954020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1011300 -1055620
+            1071045 -1055620
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1071045 -1055620
+            1071045 -1116176
+            1112900 -1158031
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            852551 -598424
+            840916 -598424
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            840916 -598424
+            829281 -610059
+            728726 -610059
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            716682 -619194
+            716682 -764180
+            728726 -776224
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            728726 -610059
+            725817 -610059
+            716682 -619194
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            716682 -619194
+            707547 -610059
+            628171 -610059
+            616536 -598424
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -598424
+            616536 -598424
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            651985 -1691431
+            643812 -1683258
+            643812 -1191604
+            634017 -1181809
+            630301 -1181809
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1691431
+            651985 -1691431
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            651985 -1691431
+            642190 -1701226
+            642190 -1703320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1703320
+            642190 -1703320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1728720
+            642190 -1728720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1728720
+            655701 -1703320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1728720
+            642190 -1728720
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            728726 -776224
+            716562 -788388
+            617065 -788388
+            604901 -776224
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            852551 -776224
+            840854 -787921
+            740423 -787921
+            728726 -776224
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            827151 -1055620
+            725551 -954020
+            719201 -954020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            852551 -598424
+            864186 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            976380 -598424
+            964745 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            964745 -598424
+            953110 -610059
+            875821 -610059
+            864186 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            982198 -598424
+            976380 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1100200 -776224
+            1088370 -788054
+            988210 -788054
+            976380 -776224
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            644533 -1055620
+            644533 -1146863
+            655701 -1158031
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            719201 -954020
+            705437 -967784
+            705437 -994716
+            644533 -1055620
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -1055620
+            644533 -1055620
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1169920
+            655701 -1158031
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1703320
+            655701 -1691431
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1169920
+            630301 -1181809
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            630301 -1169920
+            655701 -1169920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1100200 -598424
+            1100200 -610059
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1100200 -776224
+            1088565 -764589
+            1088565 -618784
+            1097290 -610059
+            1100200 -610059
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1087500 -954020
+            1100200 -941320
+            1100200 -776224
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            728726 -776224
+            730845 -778343
+            730845 -942376
+            719201 -954020
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            728726 -598424
+            728726 -610059
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            852551 -776224
+            827151 -801624
+            827151 -877820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            982198 -598424
+            988015 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1100200 -598424
+            1088565 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1088565 -598424
+            1076930 -610059
+            999650 -610059
+            988015 -598424
+          )
+        )
+      )
+      (net 5v
+        (wire
+          (path B.Cu 2500
+            1087500 -877820
+            1075864 -889456
+            914987 -889456
+            903351 -877820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1052580 -610330
+            1055756 -610330
+            1065280 -619854
+            1065280 -855600
+            1087500 -877820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1052580 -598424
+            1052580 -610330
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1052580 -610330
+            940657 -610330
+            928751 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1176400 -598424
+            1164764 -586788
+            1064216 -586788
+            1052580 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            928751 -598424
+            917115 -586788
+            816562 -586788
+            804926 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            903351 -877820
+            891716 -889455
+            666271 -889455
+            654636 -877820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            643001 -877820
+            654636 -877820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1220720
+            630301 -1208831
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -877820
+            643001 -889455
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -889455
+            640092 -889455
+            618167 -911380
+            618167 -1200392
+            626606 -1208831
+            630301 -1208831
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1220720
+            655701 -1246120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1220720
+            630301 -1246120
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            630301 -1220720
+            655701 -1220720
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            804926 -598424
+            793290 -586788
+            692737 -586788
+            681101 -598424
+          )
+        )
+      )
+      (net BB3.3
+        (wire
+          (path B.Cu 2500
+            1011300 -877820
+            999665 -877820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            999665 -877820
+            988029 -866184
+            730837 -866184
+            719201 -877820
+          )
+        )
+      )
+      (net SR1_QH
+        (wire
+          (path B.Cu 2500
+            903351 -954020
+            890651 -941320
+            655701 -941320
+            643001 -928620
+          )
+        )
+      )
+      (net SR1_CLR_T
+        (wire
+          (path F.Cu 2500
+            1052580 -776224
+            1052580 -995300
+            1087500 -1030220
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1087500 -1030220
+            1074800 -1042920
+            916051 -1042920
+            903351 -1055620
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            804926 -776224
+            750678 -776224
+            738584 -764130
+            723077 -764130
+            710983 -776224
+            681101 -776224
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            928751 -776224
+            916845 -764318
+            845426 -764318
+            833520 -776224
+            804926 -776224
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1111839 -776224
+            1111839 -781329
+            1100610 -792558
+            945085 -792558
+            928751 -776224
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1052580 -776224
+            1082457 -776224
+            1094540 -764141
+            1105043 -764141
+            1111839 -770937
+            1111839 -776224
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1176400 -776224
+            1111839 -776224
+          )
+        )
+      )
+      (net SR1_SHLD_T
+        (wire
+          (path B.Cu 2500
+            1176400 -623824
+            1164325 -611749
+            1091378 -611749
+            1079303 -623824
+            1052580 -623824
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            906526 -900045
+            903351 -903220
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            940657 -635730
+            940657 -865914
+            906526 -900045
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            906526 -900045
+            1011300 -1004820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            940657 -635730
+            928751 -623824
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1052580 -623824
+            1040674 -635730
+            940657 -635730
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            928751 -623824
+            917115 -635460
+            816562 -635460
+            804926 -623824
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            681101 -623824
+            692737 -635460
+            793290 -635460
+            804926 -623824
+          )
+        )
+      )
+      (net SR1_CLKINH_T
+        (wire
+          (path B.Cu 2500
+            827151 -1004820
+            840915 -991056
+            974264 -991056
+            1011300 -954020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            976380 -725424
+            964681 -713725
+            864250 -713725
+            852551 -725424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1100200 -725424
+            1088564 -713788
+            988016 -713788
+            976380 -725424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            604901 -725424
+            616573 -737096
+            694707 -737096
+            699194 -741583
+            712567 -741583
+            728726 -725424
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            976380 -725424
+            1023343 -772387
+            1023343 -941977
+            1011300 -954020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            728726 -725424
+            740632 -737330
+            840645 -737330
+            852551 -725424
+          )
+        )
+      )
+      (net SR1_CLK_T
+        (wire
+          (path B.Cu 2500
+            1011300 -903220
+            948864 -965656
+            857597 -965656
+            831133 -992120
+            823010 -992120
+            815191 -999939
+            815191 -1018260
+            827151 -1030220
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            976380 -750824
+            997536 -771980
+            997536 -889456
+            1011300 -903220
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            852551 -750824
+            840826 -762549
+            753381 -762549
+            741656 -750824
+            728726 -750824
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            976380 -750824
+            964506 -738950
+            864425 -738950
+            852551 -750824
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            728726 -750824
+            717054 -762496
+            616573 -762496
+            604901 -750824
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1100200 -750824
+            1088294 -762730
+            988286 -762730
+            976380 -750824
+          )
+        )
+      )
+      (net 7SEG_CLK
+        (wire
+          (path F.Cu 2500
+            1112900 -1728720
+            1124789 -1728720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1087500 -1004820
+            1155243 -1072563
+            1155243 -1703864
+            1142276 -1716831
+            1132962 -1716831
+            1124789 -1725004
+            1124789 -1728720
+          )
+        )
+      )
+      (net 7SEG_DIO
+        (wire
+          (path F.Cu 2500
+            1087500 -928620
+            1075575 -940545
+            1075575 -1010201
+            1081830 -1016456
+            1090192 -1016456
+            1150224 -1076488
+            1150224 -1378097
+            1141691 -1386630
+            1132639 -1386630
+            1124789 -1394480
+            1124789 -1683258
+            1116616 -1691431
+            1112900 -1691431
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1112900 -1703320
+            1112900 -1691431
+          )
+        )
+      )
+      (net SR6_QH_T
+        (wire
+          (path B.Cu 2500
+            1138300 -1373120
+            1126411 -1373120
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            719201 -903220
+            706501 -915920
+            639220 -915920
+            631252 -923888
+            631252 -1009579
+            639191 -1017518
+            646935 -1017518
+            990648 -1361231
+            1118238 -1361231
+            1126411 -1369404
+            1126411 -1373120
+          )
+        )
+      )
+      (net SR5_QH_T
+        (wire
+          (path B.Cu 2500
+            1138300 -1347720
+            1138300 -1335831
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            719201 -979420
+            998601 -1258820
+            1142520 -1258820
+            1150189 -1266489
+            1150189 -1327658
+            1142016 -1335831
+            1138300 -1335831
+          )
+        )
+      )
+      (net SR4_QH_T
+        (wire
+          (path B.Cu 2500
+            1126411 -1322320
+            1126411 -1318604
+            1118238 -1310431
+            999412 -1310431
+            719201 -1030220
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1138300 -1322320
+            1126411 -1322320
+          )
+        )
+      )
+      (net SR3_QH_T
+        (wire
+          (path B.Cu 2500
+            1138300 -1296920
+            1126411 -1296920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            643001 -1004820
+            655701 -1017520
+            730215 -1017520
+            997726 -1285031
+            1118238 -1285031
+            1126411 -1293204
+            1126411 -1296920
+          )
+        )
+      )
+      (net +3V3
+        (wire
+          (path B.Cu 2500
+            630301 -1195320
+            655701 -1195320
+          )
+        )
+      )
+      (net SR2_QH
+        (wire
+          (path F.Cu 2500
+            701784 -735330
+            701784 -920637
+            643001 -979420
+          )
+        )
+        (via "Via[0-1]_600:400_um" 701784 -735330
+        )
+        (wire
+          (path B.Cu 2500
+            1052580 -674624
+            1039880 -687324
+            776910 -687324
+            751510 -712724
+            724390 -712724
+            701784 -735330
+          )
+        )
+      )
+      (net SR3_QH
+        (wire
+          (path B.Cu 2500
+            1176400 -674624
+            1188071 -686295
+            1188071 -781453
+            1113082 -856442
+            636587 -856442
+            626727 -866302
+            626727 -1013946
+            643001 -1030220
+          )
+        )
+      )
+      (net SR4_QH
+        (wire
+          (path F.Cu 2500
+            928751 -674624
+            873607 -729768
+            873607 -746948
+            857031 -763524
+            848441 -763524
+            788479 -823486
+            788479 -986342
+            719201 -1055620
+          )
+        )
+      )
+      (net SR5_QH
+        (wire
+          (path F.Cu 2500
+            804926 -674624
+            743755 -735795
+            743755 -980266
+            719201 -1004820
+          )
+        )
+      )
+      (net SR6_QH
+        (wire
+          (path F.Cu 2500
+            719201 -928620
+            707121 -916540
+            707121 -738837
+            708037 -737921
+            708037 -701560
+            681101 -674624
+          )
+        )
+      )
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort11.dsn b/bbb-bort11.dsn
new file mode 100644 (file)
index 0000000..5ccf84a
--- /dev/null
+++ b/bbb-bort11.dsn
@@ -0,0 +1,9889 @@
+
+(PCB "bbb-bort11"
+  (parser
+    (string_quote ")
+    (space_in_quoted_tokens on)
+    (host_cad "KiCad's Pcbnew")
+    (host_version "(5.0.1)-3")
+    (generated_by_freeroute)
+  )
+  (resolution um 10)
+  (structure
+    (boundary
+      (rect pcb 55310.1 -180592.0 120280.0 -62282.4)
+    )
+    (boundary
+      (polygon signal 0
+        55410.1 -180492.0
+        120180.0 -180492.0
+        120180.0 -62382.4
+        55410.1 -62382.4
+      )
+    )
+    (snap_angle 
+      fortyfive_degree
+    )
+    (via "Via[0-1]_600:400_um")
+    (control
+      (via_at_smd off)
+    )
+    (rule
+      (width 250.0)
+      (clear 200.2)
+      (clear 125.0 (type smd_to_turn_gap))
+      (clear 50.0 (type smd_smd))
+    )
+    (layer F.Cu
+      (type signal)
+    )
+    (layer B.Cu
+      (type signal)
+    )
+    (autoroute_settings
+      (fanout off)
+      (autoroute on)
+      (postroute on)
+      (vias on)
+      (via_costs 50)
+      (plane_via_costs 5)
+      (start_ripup_costs 100)
+      (start_pass_no 10391)
+      (layer_rule F.Cu
+        (active on)
+        (preferred_direction vertical)
+        (preferred_direction_trace_costs 1.0)
+        (against_preferred_direction_trace_costs 2.8)
+      )
+      (layer_rule B.Cu
+        (active on)
+        (preferred_direction horizontal)
+        (preferred_direction_trace_costs 1.0)
+        (against_preferred_direction_trace_costs 1.5)
+      )
+    )
+  )
+  (placement
+    (component "Socket_BeagleBone_Black:Socket_BeagleBone_Black"
+      (place 
+        P8 111290.0 -116992.0 front 0
+        (pin 46 (clearance_class "kicad_default"))
+        (pin 45 (clearance_class "kicad_default"))
+        (pin 44 (clearance_class "kicad_default"))
+        (pin 43 (clearance_class "kicad_default"))
+        (pin 42 (clearance_class "kicad_default"))
+        (pin 41 (clearance_class "kicad_default"))
+        (pin 40 (clearance_class "kicad_default"))
+        (pin 39 (clearance_class "kicad_default"))
+        (pin 38 (clearance_class "kicad_default"))
+        (pin 37 (clearance_class "kicad_default"))
+        (pin 36 (clearance_class "kicad_default"))
+        (pin 35 (clearance_class "kicad_default"))
+        (pin 34 (clearance_class "kicad_default"))
+        (pin 33 (clearance_class "kicad_default"))
+        (pin 32 (clearance_class "kicad_default"))
+        (pin 31 (clearance_class "kicad_default"))
+        (pin 30 (clearance_class "kicad_default"))
+        (pin 29 (clearance_class "kicad_default"))
+        (pin 28 (clearance_class "kicad_default"))
+        (pin 27 (clearance_class "kicad_default"))
+        (pin 26 (clearance_class "kicad_default"))
+        (pin 25 (clearance_class "kicad_default"))
+        (pin 24 (clearance_class "kicad_default"))
+        (pin 23 (clearance_class "kicad_default"))
+        (pin 22 (clearance_class "kicad_default"))
+        (pin 21 (clearance_class "kicad_default"))
+        (pin 20 (clearance_class "kicad_default"))
+        (pin 19 (clearance_class "kicad_default"))
+        (pin 18 (clearance_class "kicad_default"))
+        (pin 17 (clearance_class "kicad_default"))
+        (pin 16 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        P9 63030.1 -116992.0 front 0
+        (pin 46 (clearance_class "kicad_default"))
+        (pin 45 (clearance_class "kicad_default"))
+        (pin 44 (clearance_class "kicad_default"))
+        (pin 43 (clearance_class "kicad_default"))
+        (pin 42 (clearance_class "kicad_default"))
+        (pin 41 (clearance_class "kicad_default"))
+        (pin 40 (clearance_class "kicad_default"))
+        (pin 39 (clearance_class "kicad_default"))
+        (pin 38 (clearance_class "kicad_default"))
+        (pin 37 (clearance_class "kicad_default"))
+        (pin 36 (clearance_class "kicad_default"))
+        (pin 35 (clearance_class "kicad_default"))
+        (pin 34 (clearance_class "kicad_default"))
+        (pin 33 (clearance_class "kicad_default"))
+        (pin 32 (clearance_class "kicad_default"))
+        (pin 31 (clearance_class "kicad_default"))
+        (pin 30 (clearance_class "kicad_default"))
+        (pin 29 (clearance_class "kicad_default"))
+        (pin 28 (clearance_class "kicad_default"))
+        (pin 27 (clearance_class "kicad_default"))
+        (pin 26 (clearance_class "kicad_default"))
+        (pin 25 (clearance_class "kicad_default"))
+        (pin 24 (clearance_class "kicad_default"))
+        (pin 23 (clearance_class "kicad_default"))
+        (pin 22 (clearance_class "kicad_default"))
+        (pin 21 (clearance_class "kicad_default"))
+        (pin 20 (clearance_class "kicad_default"))
+        (pin 19 (clearance_class "kicad_default"))
+        (pin 18 (clearance_class "kicad_default"))
+        (pin 17 (clearance_class "kicad_default"))
+        (pin 16 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"
+      (place 
+        U1 98590.1 -111912.0 front 0
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 16 (clearance_class "kicad_default"))
+      )
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"
+      (place 
+        U2 78270.1 -94132.4 front 180
+        (pin 16 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+    )
+    (component "SN74HC166N:DIP254P762X508-16"
+      (place 
+        U3 78270.1 -134772.0 front 0
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 16 (clearance_class "kicad_default"))
+      )
+      (place 
+        U4 78270.1 -156362.0 front 0
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 16 (clearance_class "kicad_default"))
+      )
+      (place 
+        U6 106210.0 -134772.0 front 0
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 16 (clearance_class "kicad_default"))
+      )
+      (place 
+        U7 92240.1 -156362.0 front 0
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 16 (clearance_class "kicad_default"))
+      )
+    )
+    (component "SN74HC166N:DIP254P762X508-16::1"
+      (place 
+        U5 92240.1 -134544.0 front 0
+        (pin 16 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        U8 106210.0 -156362.0 front 0
+        (pin 16 (clearance_class "kicad_default"))
+        (pin 15 (clearance_class "kicad_default"))
+        (pin 14 (clearance_class "kicad_default"))
+        (pin 13 (clearance_class "kicad_default"))
+        (pin 12 (clearance_class "kicad_default"))
+        (pin 11 (clearance_class "kicad_default"))
+        (pin 10 (clearance_class "kicad_default"))
+        (pin 9 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+    )
+    (component "footprints:640456-8"
+      (place 
+        J1 112560.0 -111912.0 front 90
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        J3 80386.8 -89052.4 front 90
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        J5 96473.4 -89052.4 front 90
+        (pin 8 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+    )
+    (component "footprints:640456-8::1"
+      (place 
+        J2 112560.0 -89052.4 front 90
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+      )
+      (place 
+        J4 64300.1 -89052.4 front 90
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+      )
+      (place 
+        J6 64300.1 -111912.0 front 90
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 3 (clearance_class "kicad_default"))
+        (pin 4 (clearance_class "kicad_default"))
+        (pin 5 (clearance_class "kicad_default"))
+        (pin 6 (clearance_class "kicad_default"))
+        (pin 7 (clearance_class "kicad_default"))
+        (pin 8 (clearance_class "kicad_default"))
+      )
+    )
+    (component "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical"
+      (place 
+        R1 72569.9 -103693.0 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R3 72569.9 -101543.0 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R5 72569.9 -99393.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R7 89339.4 -88834.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R9 78764.6 -167612.0 front 90
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R11 72569.9 -95093.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R13 72569.9 -90793.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R15 104787.0 -97243.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R17 104787.0 -92943.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R19 83064.6 -167612.0 front 90
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R20 89339.4 -86684.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R21 104787.0 -90793.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R23 85214.6 -167612.0 front 90
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R26 89339.4 -82384.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R29 72569.9 -84343.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R31 91664.6 -167612.0 front 90
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R33 72569.9 -82193.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R35 89339.4 -75934.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R37 72569.9 -80043.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R39 89342.0 -67329.5 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R41 93814.6 -167612.0 front 90
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R43 104787.0 -80043.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R45 98114.6 -167612.0 front 90
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+      (place 
+        R47 89339.4 -69484.4 front 180
+        (pin 2 (clearance_class "kicad_default"))
+        (pin 1 (clearance_class "kicad_default"))
+      )
+    )
+    (component "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical::1"
+      (place 
+        R2 104787.0 -103693.0 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R4 76614.6 -167612.0 front 90
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R6 104787.0 -101543.0 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R8 104787.0 -99393.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R10 72569.9 -97243.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R12 72569.9 -92943.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R14 72569.9 -88643.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R16 104787.0 -95093.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R18 80914.6 -167612.0 front 90
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R22 89339.4 -84534.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R24 104787.0 -88643.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R25 87364.6 -167612.0 front 90
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R27 72569.9 -86493.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R28 89514.6 -167612.0 front 90
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R30 89339.4 -80234.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R32 89339.4 -78084.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R34 104787.0 -86493.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R36 104787.0 -84343.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R38 89339.4 -73784.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R40 104787.0 -82193.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R42 95964.6 -167612.0 front 90
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R44 89315.8 -65198.5 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R46 89339.4 -71634.4 front 180
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+      (place 
+        R48 100265.0 -167612.0 front 90
+        (pin 1 (clearance_class "kicad_default"))
+        (pin 2 (clearance_class "kicad_default"))
+      )
+    )
+  )
+  (library
+    (image "Socket_BeagleBone_Black:Socket_BeagleBone_Black"
+      (side front)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 46 2540.0 -55880.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 45 0.0 -55880.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 44 2540.0 -53340.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 43 0.0 -53340.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 42 2540.0 -50800.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 41 0.0 -50800.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 40 2540.0 -48260.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 39 0.0 -48260.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 38 2540.0 -45720.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 37 0.0 -45720.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 36 2540.0 -43180.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 35 0.0 -43180.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 34 2540.0 -40640.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 33 0.0 -40640.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 32 2540.0 -38100.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 31 0.0 -38100.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 30 2540.0 -35560.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 29 0.0 -35560.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 28 2540.0 -33020.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 27 0.0 -33020.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 26 2540.0 -30480.0)
+      (pin "Oval[A]Pad_1727.2x1727.2_um" 25 0.0 -30480.0)
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+      (pins
+        R12-2
+        U5-10
+      )
+    )
+    (net "Net-(R13-Pad2)" 1
+      (pins
+        R13-2
+        U5-5
+      )
+    )
+    (net "Net-(R14-Pad2)" 1
+      (pins
+        R14-2
+        U5-4
+      )
+    )
+    (net "Net-(R15-Pad2)" 1
+      (pins
+        R15-2
+        U5-3
+      )
+    )
+    (net "Net-(R16-Pad2)" 1
+      (pins
+        R16-2
+        U5-2
+      )
+    )
+    (net "Net-(R17-Pad2)" 1
+      (pins
+        R17-2
+        U6-14
+      )
+    )
+    (net "Net-(R18-Pad2)" 1
+      (pins
+        R18-2
+        U6-12
+      )
+    )
+    (net "Net-(R19-Pad2)" 1
+      (pins
+        R19-2
+        U6-11
+      )
+    )
+    (net "Net-(R20-Pad2)" 1
+      (pins
+        R20-2
+        U6-10
+      )
+    )
+    (net "Net-(R21-Pad2)" 1
+      (pins
+        R21-2
+        U6-5
+      )
+    )
+    (net "Net-(R22-Pad2)" 1
+      (pins
+        R22-2
+        U6-4
+      )
+    )
+    (net "Net-(R23-Pad2)" 1
+      (pins
+        R23-2
+        U6-3
+      )
+    )
+    (net "Net-(R24-Pad2)" 1
+      (pins
+        R24-2
+        U6-2
+      )
+    )
+    (net "Net-(R25-Pad2)" 1
+      (pins
+        R25-2
+        U7-14
+      )
+    )
+    (net "Net-(R26-Pad2)" 1
+      (pins
+        R26-2
+        U7-12
+      )
+    )
+    (net "Net-(R27-Pad2)" 1
+      (pins
+        R27-2
+        U7-11
+      )
+    )
+    (net "Net-(R28-Pad2)" 1
+      (pins
+        R28-2
+        U7-10
+      )
+    )
+    (net "Net-(R29-Pad2)" 1
+      (pins
+        R29-2
+        U7-5
+      )
+    )
+    (net "Net-(R30-Pad2)" 1
+      (pins
+        R30-2
+        U7-4
+      )
+    )
+    (net "Net-(R31-Pad2)" 1
+      (pins
+        R31-2
+        U7-3
+      )
+    )
+    (net "Net-(R32-Pad2)" 1
+      (pins
+        R32-2
+        U7-2
+      )
+    )
+    (net "Net-(R33-Pad2)" 1
+      (pins
+        R33-2
+        U3-14
+      )
+    )
+    (net "Net-(R34-Pad2)" 1
+      (pins
+        R34-2
+        U3-12
+      )
+    )
+    (net "Net-(R35-Pad2)" 1
+      (pins
+        R35-2
+        U3-11
+      )
+    )
+    (net "Net-(R36-Pad2)" 1
+      (pins
+        R36-2
+        U3-10
+      )
+    )
+    (net "Net-(R37-Pad2)" 1
+      (pins
+        R37-2
+        U3-5
+      )
+    )
+    (net "Net-(R38-Pad2)" 1
+      (pins
+        R38-2
+        U3-4
+      )
+    )
+    (net "Net-(R39-Pad2)" 1
+      (pins
+        R39-2
+        U3-3
+      )
+    )
+    (net "Net-(R40-Pad2)" 1
+      (pins
+        R40-2
+        U3-2
+      )
+    )
+    (net "Net-(R41-Pad2)" 1
+      (pins
+        R41-2
+        U8-14
+      )
+    )
+    (net "Net-(R42-Pad2)" 1
+      (pins
+        R42-2
+        U8-12
+      )
+    )
+    (net "Net-(R43-Pad2)" 1
+      (pins
+        R43-2
+        U8-11
+      )
+    )
+    (net "Net-(R44-Pad2)" 1
+      (pins
+        R44-2
+        U8-10
+      )
+    )
+    (net "Net-(R45-Pad2)" 1
+      (pins
+        R45-2
+        U8-5
+      )
+    )
+    (net "Net-(R46-Pad2)" 1
+      (pins
+        R46-2
+        U8-4
+      )
+    )
+    (net "Net-(R47-Pad2)" 1
+      (pins
+        R47-2
+        U8-3
+      )
+    )
+    (net "Net-(R48-Pad2)" 1
+      (pins
+        R48-2
+        U8-2
+      )
+    )
+    (via 
+      "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default
+    )
+    (via 
+      "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default"
+    )
+    (via_rule
+      default "Via[0-1]_600:400_um"
+    )
+    (via_rule
+      "kicad_default" "Via[0-1]_600:400_um-kicad_default"
+    )
+    (class default
+      (clearance_class default)
+      (via_rule default)
+      (rule
+        (width 250.0)
+      )
+      (circuit 
+        (use_layer F.Cu B.Cu)
+      )
+    )
+    (class "kicad_default"
+      "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"
+      "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"
+      "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"
+      "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)"
+      "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"
+      "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"
+      "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"
+      "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN"
+      "VDD_ADC" "GNDA_ADC" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND
+      5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK"
+      "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T"
+      "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(R1-Pad2)"
+      "Net-(R2-Pad2)" "Net-(R3-Pad2)" "Net-(R4-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)" "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)"
+      "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)" "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)"
+      "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)" "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)"
+      "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)"
+      "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)" "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)"
+      "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)" "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)"
+      (clearance_class "kicad_default")
+      (via_rule kicad_default)
+      (rule
+        (width 250.0)
+      )
+      (circuit 
+        (use_layer F.Cu B.Cu)
+      )
+    )
+  )
+  (wiring
+    (wire
+      (polyline_path F.Cu 250.0
+        93201.5 -86788.4 93201.6 -86788.4 
+        93201.5 -86788.4 93201.5 -89257.0 
+        93201.5 -89257.0 96300.8 -92356.3 
+        96300.8 -92356.3 96300.8 -113357.2 
+        96300.8 -113357.2 96993.6 -114050.0 
+        96993.6 -114050.0 96993.6 -122604.0 
+        97625.2 -123235.6 98590.0 -124200.4 
+        98590.0 -124200.4 98590.0 -124612.0 
+        98590.0 -124612.0 98589.9 -124612.0 
+      )
+      (net "Net-(R22-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        98590.0 -115828.5 98589.9 -115828.5 
+        98590.0 -115828.5 98590.0 -115008.0 
+        98590.0 -115008.0 96976.2 -113394.2 
+        96976.2 -113394.2 96976.2 -103365.9 
+        96976.2 -103365.9 98590.1 -101752.0 
+        98590.1 -101752.0 98590.2 -101752.1 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        87439.4 -69484.4 87439.5 -69484.3 
+        87439.4 -69484.4 88514.4 -70559.4 
+        88514.4 -70559.4 89715.1 -70559.4 
+        89715.1 -70559.4 92576.3 -73420.6 
+        92576.2 -73420.7 92576.2 -91627.4 
+        92576.2 -91627.4 95850.4 -94901.6 
+        95850.4 -94901.6 95850.4 -113589.1 
+        95850.4 -113589.1 96428.9 -114167.6 
+        96428.9 -114167.6 96428.9 -122724.2 
+        96428.9 -122724.2 96829.3 -123124.6 
+        96829.3 -123124.6 96829.3 -141901.3 
+        96829.3 -141901.3 98590.0 -143662.0 
+        98590.0 -143662.0 98589.9 -143662.1 
+      )
+      (net "Net-(R47-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        87439.4 -84534.4 87439.3 -84534.4 
+        87439.4 -84534.4 87439.5 -84534.3 
+        89714.6 -83459.4 90364.8 -83459.4 
+        93201.5 -86788.4 93201.6 -86788.5 
+        93201.5 -86788.4 93201.4 -86788.4 
+      )
+      (net "Net-(R22-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        70669.9 -103693.0 70670.0 -103692.9 
+        70669.9 -103693.0 72539.3 -105562.4 
+        72539.3 -105562.4 78655.9 -105562.4 
+        78655.9 -105562.4 79440.9 -106347.4 
+        79440.9 -106347.4 79440.9 -107315.7 
+        79440.9 -107315.7 78654.2 -108102.4 
+        78654.2 -108102.4 77891.3 -108102.4 
+        77891.3 -108102.4 75250.7 -110743.0 
+        75250.7 -110743.0 75250.7 -140642.6 
+        75250.7 -140642.6 78270.1 -143662.0 
+        78270.1 -143662.0 78270.0 -143662.1 
+      )
+      (net "Net-(R1-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        78270.1 -106832.4 78270.2 -106832.5 
+        78270.1 -106832.4 74800.4 -110302.1 
+        74800.4 -110302.1 74800.4 -146940.7 
+        74800.4 -146940.7 77921.3 -150061.6 
+        77921.3 -150061.6 78760.6 -150061.6 
+        78760.6 -150061.6 79839.6 -151140.6 
+        79839.6 -151140.6 79839.6 -168026.9 
+        79839.6 -168026.9 82144.7 -170332.0 
+        82144.7 -170332.0 111290.0 -170332.0 
+        111290.0 -170332.0 111290.0 -170332.1 
+      )
+      (net "7SEG_DIO" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        111290.0 -171683.1 111290.0 -171683.0 
+        111290.0 -171683.1 111659.5 -171683.1 
+        111659.5 -171683.1 112506.3 -170836.3 
+        112506.3 -170836.3 112506.3 -169845.0 
+        112506.3 -169845.0 111804.3 -169143.0 
+        111804.3 -169143.0 110588.2 -169143.0 
+        110588.2 -169143.0 110587.4 -169143.8 
+        110587.4 -169143.8 83114.8 -169143.8 
+        83114.8 -169143.8 81989.6 -168018.6 
+        81989.6 -168018.6 81989.6 -150723.0 
+        81989.6 -150723.0 78738.6 -147472.0 
+        78738.6 -147472.0 77844.7 -147472.0 
+        77844.7 -147472.0 77062.0 -146689.3 
+        77062.0 -146689.3 77062.0 -145715.1 
+        77062.0 -145715.1 77845.1 -144932.0 
+        77845.1 -144932.0 78668.5 -144932.0 
+        78668.5 -144932.0 79927.9 -143672.6 
+        79927.9 -143672.6 79927.9 -137928.8 
+        79927.9 -137928.8 78206.0 -136206.9 
+        78206.0 -136206.9 78019.0 -136206.9 
+        78019.0 -136206.9 76612.2 -134800.1 
+        76612.2 -134800.1 76612.2 -122032.3 
+        76612.2 -122032.3 77948.9 -120695.6 
+        77948.9 -120695.6 78794.9 -120695.6 
+        78794.9 -120695.6 79437.9 -120052.6 
+        79437.9 -120052.6 79437.9 -114025.8 
+        79437.9 -114025.8 79376.6 -113964.5 
+        79376.6 -113964.5 79376.6 -113446.5 
+        79376.6 -113446.5 79891.2 -112931.9 
+        79891.2 -112931.9 79891.2 -100833.5 
+        79891.2 -100833.5 78270.1 -99212.4 
+        78270.1 -99212.4 78270.2 -99212.3 
+      )
+      (net "7SEG_CLK" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        70669.9 -102568.3 70669.9 -102568.4 
+        70669.9 -102568.3 70285.4 -102568.3 
+        70285.4 -102568.3 69597.5 -103256.2 
+        69597.5 -103256.2 69597.5 -106895.6 
+        69597.5 -106895.6 73177.2 -110475.3 
+        73177.2 -110475.3 73177.2 -146189.1 
+        73177.2 -146189.1 78270.1 -151282.0 
+        78270.1 -151282.0 78270.0 -151282.1 
+      )
+      (net "Net-(R3-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        104787.0 -86493.4 112541.0 -86493.4 
+        112541.0 -86493.4 112560.0 -86512.4 
+        112560.0 -86512.4 112559.9 -86512.5 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        104787.0 -86493.4 104787.0 -86493.3 
+        104787.0 -86493.4 112541.0 -86493.4 
+        112541.0 -86493.4 112541.0 -86493.3 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        104787.0 -86493.4 112541.0 -86493.4 
+        112541.0 -86493.4 112541.0 -86493.3 
+        110039.0 -86493.4 112560.0 -83972.4 
+        112560.0 -83972.4 112560.1 -83972.5 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        92240.1 -119304.0 92240.0 -119304.1 
+        92240.1 -119304.0 88533.8 -115597.7 
+        88533.8 -115597.7 88533.8 -99692.3 
+        88533.8 -99692.3 89034.5 -99191.6 
+        88596.4 -99629.7 88596.3 -99629.6 
+      )
+      (net "SR1_SHLD_T" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        85890.1 -99212.4 85890.1 -99212.5 
+        85890.1 -99212.4 85890.2 -99212.5 
+        85472.8 -99629.7 88596.4 -99629.7 
+        88596.4 -99629.7 88596.4 -99629.8 
+      )
+      (net "SR1_SHLD_T" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        92240.1 -141122.0 92240.0 -141121.9 
+        92240.1 -141122.0 93407.6 -139954.5 
+        93407.6 -139954.5 93407.6 -120471.5 
+        92543.4 -119607.3 92543.3 -119607.2 
+        92240.1 -119304.0 92240.2 -119303.9 
+      )
+      (net "SR1_SHLD_T" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        106210.0 -156362.0 106210.1 -156362.1 
+        106210.0 -156362.0 104458.6 -158113.4 
+        95339.2 -157675.5 95339.1 -157675.5 
+        93991.5 -158113.4 92240.1 -156362.0 
+        92240.1 -156362.0 92240.2 -156361.9 
+      )
+      (net "SR1_CLR_T" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        106210.0 -134772.0 106210.1 -134771.9 
+        106210.0 -134772.0 107384.4 -135946.4 
+        107384.4 -135946.4 107384.4 -155187.6 
+        106679.2 -155892.8 104937.6 -157634.4 
+        106210.0 -156362.0 106209.9 -156361.9 
+      )
+      (net "SR1_CLR_T" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        86870.5 -126634.4 86870.4 -126634.3 
+        86870.5 -126634.4 87053.6 -126451.3 
+        87053.6 -126451.3 87053.6 -103807.4 
+        87053.6 -103807.4 86268.6 -103022.4 
+        86268.6 -103022.4 85478.0 -103022.4 
+        85478.0 -103022.4 84156.8 -101701.2 
+        84156.8 -101701.2 84156.8 -95141.4 
+        84156.8 -95141.4 82157.0 -93141.6 
+        82281.0 -93265.6 82280.9 -93265.7 
+      )
+      (net "Net-(R12-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        70669.9 -92943.4 70670.0 -92943.3 
+        70669.9 -92943.4 71709.2 -93982.7 
+        71709.2 -93982.7 73935.0 -93982.7 
+        73935.0 -93982.7 74948.8 -92968.9 
+        74948.8 -92968.9 80193.1 -92968.9 
+        80193.1 -92968.9 80489.8 -93265.6 
+        80489.8 -93265.6 82281.0 -93265.6 
+        82281.0 -93265.6 82281.0 -93265.7 
+      )
+      (net "Net-(R12-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        71356.4 -98366.2 71356.4 -98366.1 
+        71592.5 -98366.2 70194.9 -98366.2 
+        70194.9 -98366.2 68696.6 -99864.5 
+        68696.6 -99864.5 68696.6 -112902.0 
+        68696.6 -112902.0 72276.4 -116481.8 
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+      (net "Net-(R5-Pad2)" 1)
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+      (net BB3.3 1)
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+      (net "Net-(R2-Pad2)" 1)
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+        104982.8 -118367.2 104982.7 -118367.2 
+        93239.3 -118304.8 92240.1 -119304.0 
+        92240.1 -119304.0 92240.0 -119303.9 
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+        87439.4 -80234.4 87439.4 -80234.5 
+        0.0 -81259.7 0.1 -81259.7 
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+      (net "Net-(R30-Pad2)" 1)
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+        77062.6 -126712.2 77892.8 -125882.0 
+        77892.8 -125882.0 78656.3 -125882.0 
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+        80686.6 -123851.7 80686.6 -108490.0 
+        80686.6 -108490.0 80341.1 -108144.5 
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+        70270.7 -147472.0 69481.3 -146682.6 
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+        97426.4 -150118.4 85783.7 -150118.4 
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+        100704.8 -147388.4 102420.2 -145673.0 
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+        105834.6 -104718.4 103649.9 -106903.1 
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+        99754.0 -146700.6 99754.0 -143157.6 
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+        98988.4 -142392.0 98198.6 -142392.0 
+        98198.6 -142392.0 97390.6 -141584.0 
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+        61841.1 -118056.9 62046.2 -118262.0 
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+        78750.6 -123237.3 67924.3 -123237.3 
+        67924.3 -123237.3 66759.0 -122072.0 
+        66759.0 -122072.0 66759.1 -122071.9 
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+      (net 5v 1)
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+    (wire
+      (polyline_path B.Cu 250.0
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+        70650.1 -134772.0 71854.5 -133567.6 
+        71854.5 -133567.6 83643.7 -133567.6 
+        83709.4 -133633.3 84620.1 -134544.0 
+        84620.1 -134544.0 84620.0 -134544.1 
+      )
+      (net PGND 1)
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+    (wire
+      (polyline_path B.Cu 250.0
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+        70669.9 -86493.4 70669.9 -86493.5 
+        0.0 -87518.7 0.1 -87518.7 
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+      (polyline_path F.Cu 250.0
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+        80061.3 -122820.8 80061.3 -113705.5 
+        80061.3 -113705.5 80061.4 -113705.5 
+      )
+      (net "SR1_QH" 1)
+      (clearance_class "kicad_default")
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+    (wire
+      (polyline_path F.Cu 250.0
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+        0.0 -91818.7 0.1 -91818.7 
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+      (net "Net-(R21-Pad2)" 1)
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+    (wire
+      (polyline_path B.Cu 250.0
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+        97639.1 -133182.9 85799.0 -133182.9 
+        85799.0 -133182.9 84620.1 -132004.0 
+        84620.1 -132004.0 84620.2 -132003.9 
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+      (polyline_path F.Cu 250.0
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+        98590.0 -141122.0 100265.0 -142797.0 
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+        100265.0 -165712.0 100264.9 -165712.0 
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+      (net "Net-(R48-Pad2)" 1)
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+        71855.0 -131027.1 83643.2 -131027.1 
+        83643.2 -131027.1 84620.1 -132004.0 
+        84620.1 -132004.0 84620.0 -132004.1 
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+      (polyline_path B.Cu 250.0
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+        89339.4 -72709.4 89339.4 -69484.4 
+        89339.4 -71634.4 89339.5 -71634.4 
+      )
+      (net PGND 1)
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+        87439.4 -73784.4 87439.4 -73784.5 
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+        70650.1 -153822.0 70650.0 -153822.1 
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+        70669.9 -101543.0 70669.9 -101543.1 
+        0.0 -102568.3 0.1 -102568.3 
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+      (net "Net-(R3-Pad2)" 1)
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+        72569.9 -97243.4 72569.8 -97243.4 
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+        94889.6 -166787.0 94889.6 -168059.2 
+        94889.6 -168059.2 95523.8 -168693.4 
+        95523.8 -168693.4 100640.9 -168693.4 
+        100640.9 -168693.4 107849.5 -161484.8 
+        107849.5 -161484.8 107849.5 -145301.5 
+        107849.5 -145301.5 106210.0 -143662.0 
+        106210.0 -143662.0 106210.1 -143661.9 
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+        110918.4 -136123.1 110101.1 -135305.8 
+        110101.1 -135305.8 110101.1 -82403.6 
+        109826.7 -82403.6 109826.6 -82403.5 
+        91832.0 -64134.5 85917.2 -64134.5 
+        85917.2 -64134.5 75475.4 -74576.3 
+        75475.4 -74576.3 75475.4 -93852.5 
+        75475.4 -93852.5 75475.3 -93852.5 
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+        87439.4 -78084.4 87439.4 -78084.5 
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+        112560.0 -96672.0 112559.9 -96672.0 
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+        111290.0 -137312.0 111290.0 -137311.9 
+        0.0 -136123.1 -0.1 -136123.1 
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+        75475.4 -93852.5 75475.5 -93852.4 
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+        102887.0 -95093.4 102886.9 -95093.4 
+        101861.7 0.0 101861.7 -0.1 
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+        70669.9 -88643.4 70669.9 -88643.5 
+        0.0 -89668.7 0.1 -89668.7 
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+        84620.2 -156362.1 84620.1 -156362.0 
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+        70669.9 -99393.4 70669.9 -99393.5 
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+        66759.0 0.0 66759.0 0.1 
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+        112478.9 0.0 112478.9 0.1 
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+        112641.1 0.0 112641.1 -0.1 
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+        79443.2 -139948.9 79443.2 -138108.6 
+        79443.2 -138108.6 78151.1 -136816.5 
+        78151.1 -136816.5 77912.3 -136816.5 
+        77912.3 -136816.5 76161.9 -135066.1 
+        76161.9 -135066.1 76161.9 -121640.2 
+        76161.9 -121640.2 78270.1 -119532.0 
+        78270.1 -119532.0 78270.2 -119532.1 
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+        89315.8 -67305.9 89315.8 -65198.5 
+        89315.8 -65198.5 89315.9 -65198.5 
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+        89342.0 -67329.5 89342.1 -67329.6 
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+        72569.9 -101543.0 72569.8 -101543.0 
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+        112560.0 -76352.4 112560.1 -76352.4 
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+        112560.0 -78892.4 112560.1 -78892.4 
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+        101861.7 0.0 101861.7 -0.1 
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+        0.0 -171683.1 -0.1 -171683.1 
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+        98590.0 -153822.0 97426.1 -152658.1 
+        97426.1 -152658.1 91182.3 -152658.1 
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+        84620.1 -153822.0 84620.1 -153821.9 
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+        97039.6 -157912.4 98590.0 -156362.0 
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+        72940.9 -82564.4 72940.9 -83972.4 
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+        72569.9 -82193.4 72940.9 -82564.4 
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+        72940.9 -83972.4 72940.8 -83972.4 
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+        64219.0 -122072.0 64218.9 -122071.9 
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+        65570.1 -124612.0 65570.0 -124612.0 
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+        64219.0 0.0 64219.0 0.1 
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+        64219.0 -170332.0 64218.9 -170331.9 
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+        65570.1 -172872.0 65570.0 -172872.0 
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+        64219.0 0.0 64219.0 0.1 
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+        64219.0 0.0 64219.0 0.1 
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+        64219.0 0.0 64219.0 0.1 
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+        96473.4 -89052.4 96473.3 -89052.4 
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+        95964.6 -157009.0 95964.6 -157008.9 
+        96274.6 -157009.0 95964.6 -157009.0 
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+        95964.6 -157009.0 95964.5 -157008.9 
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+        79441.8 -157533.7 78270.1 -156362.0 
+        78270.1 -156362.0 78270.2 -156361.9 
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+        66759.0 0.0 66759.0 0.1 
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+        76614.6 -167612.0 76614.5 -167612.1 
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+        0.0 -115803.1 -0.1 -115803.1 
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+        64300.1 -111912.0 64300.2 -111912.0 
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+        83448.5 -154993.6 71821.7 -154993.6 
+        71821.7 -154993.6 70650.1 -153822.0 
+        70650.1 -153822.0 70650.2 -153821.9 
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+        96473.4 -83972.4 96473.5 -83972.4 
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+        113830.0 -137312.0 113830.0 -137311.9 
+        0.0 -136123.1 -0.1 -136123.1 
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+        0.0 -133583.1 -0.1 -133583.1 
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+        65570.1 -119532.0 65570.1 -119532.1 
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+        72569.9 -80043.4 71044.7 -78518.2 
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+        85783.6 0.0 85783.6 0.1 
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+        97426.5 0.0 97426.5 -0.1 
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+        112560.0 -104292.0 112559.9 -104292.0 
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+        80386.8 -78892.4 80386.7 -78892.4 
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+        96473.4 -78892.4 96473.3 -78892.4 
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+      (polyline_path F.Cu 250.0
+        64300.1 -101752.0 64300.2 -101752.0 
+        64300.1 -100482.0 64300.1 -96672.0 
+        64300.1 -99212.0 64300.2 -99212.0 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        64300.1 -104292.0 64300.2 -104292.0 
+        64300.1 -103022.0 64300.1 -99212.0 
+        64300.1 -101752.0 64300.2 -101752.0 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        64300.1 -106832.0 64300.2 -106832.0 
+        64300.1 -105562.0 64300.1 -101752.0 
+        64300.1 -104292.0 64300.2 -104292.0 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        64300.1 -109372.0 64300.2 -109372.0 
+        64300.1 -108102.0 64300.1 -104292.0 
+        64300.1 -106832.0 64300.2 -106832.0 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        72569.9 -97243.4 72569.8 -97243.4 
+        72569.9 -98318.4 72569.9 -101543.0 
+        72569.9 -99393.4 72569.8 -99393.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        72569.9 -92943.4 72569.8 -92943.4 
+        72569.9 -91868.4 72569.9 -95093.4 
+        72569.9 -95093.4 72569.8 -95093.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        72570.0 -90793.4 72569.9 -90793.4 
+        72569.9 -91868.4 72569.9 -95093.4 
+        72569.9 -92943.4 72569.8 -92943.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        104787.0 -95093.4 104786.9 -95093.4 
+        104787.0 -94018.4 104787.0 -97243.4 
+        104787.0 -97243.4 104786.9 -97243.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        104787.1 -92943.4 104787.0 -92943.4 
+        104787.0 -94018.4 104787.0 -97243.4 
+        104787.0 -95093.4 104786.9 -95093.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        80914.6 -167612.0 80914.6 -167611.9 
+        81989.6 -167612.0 78764.6 -167612.0 
+        78764.6 -167612.0 78764.6 -167611.9 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        83064.6 -167612.1 83064.6 -167612.0 
+        81989.6 -167612.0 78764.6 -167612.0 
+        80914.6 -167612.0 80914.6 -167611.9 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        89339.4 -86684.4 89339.3 -86684.4 
+        89339.4 -85609.4 89339.4 -88834.4 
+        89339.4 -88834.4 89339.3 -88834.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        89339.4 -84534.4 89339.3 -84534.4 
+        89339.4 -85609.4 89339.4 -88834.4 
+        89339.4 -86684.4 89339.3 -86684.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        104787.0 -90793.4 104786.9 -90793.4 
+        104787.0 -89718.4 104787.0 -92943.4 
+        104787.0 -92943.4 104786.9 -92943.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        104787.0 -88643.4 104786.9 -88643.4 
+        104787.0 -89718.4 104787.0 -92943.4 
+        104787.0 -90793.4 104786.9 -90793.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        89339.5 -82384.4 89339.4 -82384.4 
+        89339.4 -83459.4 89339.4 -86684.4 
+        89339.4 -84534.4 89339.3 -84534.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        72569.9 -86493.4 72569.8 -86493.4 
+        72569.9 -85418.4 72569.9 -88643.4 
+        72569.9 -88643.4 72569.8 -88643.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        72570.0 -84343.4 72569.9 -84343.4 
+        72569.9 -85418.4 72569.9 -88643.4 
+        72569.9 -86493.4 72569.8 -86493.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        72569.9 -80043.4 72570.0 -80043.4 
+        72569.9 -81118.4 72569.9 -84343.4 
+        72569.9 -82193.4 72569.8 -82193.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        89339.3 -80234.4 89339.4 -80234.4 
+        89339.4 -79159.4 89339.4 -82384.4 
+        89339.4 -82384.4 89339.3 -82384.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        89339.5 -78084.4 89339.4 -78084.4 
+        89339.4 -79159.4 89339.4 -82384.4 
+        89339.3 -80234.4 89339.4 -80234.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        72569.9 -88643.4 72570.0 -88643.4 
+        72569.9 -88643.4 72569.9 -90793.4 
+        72569.9 -90793.4 72569.8 -90793.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        104786.9 -84343.4 104787.0 -84343.4 
+        104787.0 -83268.4 104787.0 -80043.4 
+        104787.0 -82193.4 104787.1 -82193.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        89514.6 -167612.0 89514.6 -167612.1 
+        88439.6 -167612.0 91664.6 -167612.0 
+        91664.6 -167612.0 91664.6 -167612.1 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path F.Cu 250.0
+        89339.4 -78084.4 89339.5 -78084.4 
+        89339.4 -79159.4 89339.4 -75934.4 
+        89339.4 -75934.4 89339.5 -75934.4 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (wire
+      (polyline_path B.Cu 250.0
+        100265.0 -167612.0 100265.0 -167612.1 
+        100265.0 -167612.0 98114.6 -167612.0 
+        98114.6 -167612.0 98114.6 -167611.9 
+      )
+      (net PGND 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 93201.5 -86788.4
+      (net "Net-(R22-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 88596.4 -99629.7
+      (net "SR1_SHLD_T" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 82045.5 -94551.4
+      (net "Net-(R36-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 81093.5 -92480.0
+      (net "Net-(R29-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 93767.1 -141783.5
+      (net "SR3_QH" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 97602.5 -112996.2
+      (net "SR5_QH" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 83843.3 -102938.6
+      (net "SR6_QH" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 101811.6 -135453.6
+      (net "Net-(R6-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 100850.5 -124073.5
+      (net "Net-(R15-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 101326.8 -134275.1
+      (net "Net-(R8-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 87005.8 -158310.3
+      (net "Net-(R9-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 71356.4 -98366.2
+      (net "Net-(R7-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 107456.2 -96273.2
+      (net "Net-(R17-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 95718.1 -126645.8
+      (net "Net-(R20-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 86870.5 -126634.4
+      (net "Net-(R12-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 82281.0 -93265.6
+      (net "Net-(R12-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 100895.7 -162344.9
+      (net "Net-(R23-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 102420.2 -145673.0
+      (net "Net-(R2-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 89163.5 -114379.4
+      (net "SR1_QH" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 80061.3 -113705.5
+      (net "SR1_QH" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 75475.4 -93852.5
+      (net "SR1_CLR" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 93874.1 -111346.7
+      (net "Net-(R16-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 93874.1 -95872.4
+      (net "Net-(R16-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 81029.2 -99878.6
+      (net "Net-(R34-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+    (via "Via[0-1]_600:400_um" 95964.6 -157009.0
+      (net "Net-(R42-Pad2)" 1)
+      (clearance_class "kicad_default")
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort11.rules b/bbb-bort11.rules
new file mode 100644 (file)
index 0000000..1db48ec
--- /dev/null
+++ b/bbb-bort11.rules
@@ -0,0 +1,93 @@
+
+(rules PCB bbb-bort11
+  (snap_angle 
+    fortyfive_degree
+  )
+  (autoroute_settings
+    (fanout off)
+    (autoroute on)
+    (postroute on)
+    (vias on)
+    (via_costs 50)
+    (plane_via_costs 5)
+    (start_ripup_costs 100)
+    (start_pass_no 10391)
+    (layer_rule F.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 2.8)
+    )
+    (layer_rule B.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 1.5)
+    )
+  )
+  (rule
+    (width 250.0)
+    (clear 200.2)
+    (clear 125.0 (type smd_to_turn_gap))
+    (clear 50.0 (type smd_smd))
+  )
+  (padstack "Via[0-1]_600:400_um"
+    (shape
+      (circle F.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle B.Cu 600.0 0.0 0.0)
+    )
+    (attach off)
+  )
+  (via 
+    "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default
+  )
+  (via 
+    "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default"
+  )
+  (via_rule
+    default "Via[0-1]_600:400_um"
+  )
+  (via_rule
+    "kicad_default" "Via[0-1]_600:400_um-kicad_default"
+  )
+  (class default
+    (clearance_class default)
+    (via_rule default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+  (class "kicad_default"
+    "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"
+    "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"
+    "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"
+    "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)"
+    "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"
+    "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"
+    "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"
+    "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN"
+    "VDD_ADC" "GNDA_ADC" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND
+    5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK"
+    "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T"
+    "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(R1-Pad2)"
+    "Net-(R2-Pad2)" "Net-(R3-Pad2)" "Net-(R4-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)" "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)"
+    "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)" "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)"
+    "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)" "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)"
+    "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)"
+    "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)" "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)"
+    "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)" "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)"
+    (clearance_class "kicad_default")
+    (via_rule kicad_default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort11.ses b/bbb-bort11.ses
new file mode 100644 (file)
index 0000000..814bcd8
--- /dev/null
+++ b/bbb-bort11.ses
@@ -0,0 +1,2828 @@
+
+(session "bbb-bort11.ses"
+  (base_design "bbb-bort11.dsn")
+  (placement
+    (resolution um 10)
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black
+      (place P8 1112900 -1169920 front 0)
+      (place P9 630301 -1169920 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"
+      (place U1 985901 -1119120 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"
+      (place U2 782701 -941324 front 180)
+    )
+    (component "SN74HC166N:DIP254P762X508-16"
+      (place U3 782701 -1347720 front 0)
+      (place U4 782701 -1563620 front 0)
+      (place U6 1062100 -1347720 front 0)
+      (place U7 922401 -1563620 front 0)
+    )
+    (component "SN74HC166N:DIP254P762X508-16::1"
+      (place U5 922401 -1345440 front 0)
+      (place U8 1062100 -1563620 front 0)
+    )
+    (component "footprints:640456-8"
+      (place J1 1125600 -1119120 front 90)
+      (place J3 803868 -890524 front 90)
+      (place J5 964734 -890524 front 90)
+    )
+    (component "footprints:640456-8::1"
+      (place J2 1125600 -890524 front 90)
+      (place J4 643001 -890524 front 90)
+      (place J6 643001 -1119120 front 90)
+    )
+    (component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical
+      (place R1 725699 -1036930 front 180)
+      (place R3 725699 -1015430 front 180)
+      (place R5 725699 -993934 front 180)
+      (place R7 893394 -888344 front 180)
+      (place R9 787646 -1676120 front 90)
+      (place R11 725699 -950934 front 180)
+      (place R13 725699 -907934 front 180)
+      (place R15 1047870 -972434 front 180)
+      (place R17 1047870 -929434 front 180)
+      (place R19 830646 -1676120 front 90)
+      (place R20 893394 -866844 front 180)
+      (place R21 1047870 -907934 front 180)
+      (place R23 852146 -1676120 front 90)
+      (place R26 893394 -823844 front 180)
+      (place R29 725699 -843434 front 180)
+      (place R31 916646 -1676120 front 90)
+      (place R33 725699 -821934 front 180)
+      (place R35 893394 -759344 front 180)
+      (place R37 725699 -800434 front 180)
+      (place R39 893420 -673295 front 180)
+      (place R41 938146 -1676120 front 90)
+      (place R43 1047870 -800434 front 180)
+      (place R45 981146 -1676120 front 90)
+      (place R47 893394 -694844 front 180)
+    )
+    (component Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical::1
+      (place R2 1047870 -1036930 front 180)
+      (place R4 766146 -1676120 front 90)
+      (place R6 1047870 -1015430 front 180)
+      (place R8 1047870 -993934 front 180)
+      (place R10 725699 -972434 front 180)
+      (place R12 725699 -929434 front 180)
+      (place R14 725699 -886434 front 180)
+      (place R16 1047870 -950934 front 180)
+      (place R18 809146 -1676120 front 90)
+      (place R22 893394 -845344 front 180)
+      (place R24 1047870 -886434 front 180)
+      (place R25 873646 -1676120 front 90)
+      (place R27 725699 -864934 front 180)
+      (place R28 895146 -1676120 front 90)
+      (place R30 893394 -802344 front 180)
+      (place R32 893394 -780844 front 180)
+      (place R34 1047870 -864934 front 180)
+      (place R36 1047870 -843434 front 180)
+      (place R38 893394 -737844 front 180)
+      (place R40 1047870 -821934 front 180)
+      (place R42 959646 -1676120 front 90)
+      (place R44 893158 -651985 front 180)
+      (place R46 893394 -716344 front 180)
+      (place R48 1002650 -1676120 front 90)
+    )
+  )
+  (was_is
+  )
+  (routes 
+    (resolution um 10)
+    (parser
+      (host_cad "KiCad's Pcbnew")
+      (host_version "(5.0.1)-3")
+    )
+    (library_out 
+      (padstack "Via[0-1]_600:400_um"
+        (shape
+          (circle F.Cu 6000 0 0)
+        )
+        (shape
+          (circle B.Cu 6000 0 0)
+        )
+        (attach off)
+      )
+    )
+    (network_out 
+      (net SR1_CLR
+        (wire
+          (path F.Cu 2500
+            1112900 -1361231
+            1109184 -1361231
+            1101011 -1353058
+            1101011 -826780
+            915576 -641345
+            859172 -641345
+            754754 -745763
+            754754 -938525
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1112900 -1373120
+            1112900 -1361231
+          )
+        )
+        (via "Via[0-1]_600:400_um" 754754 -938525
+        )
+        (wire
+          (path B.Cu 2500
+            782701 -941324
+            757553 -941324
+            754754 -938525
+          )
+        )
+      )
+      (net SR1_SHLD
+        (wire
+          (path B.Cu 2500
+            1112900 -1347720
+            1112900 -1359609
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            858901 -966724
+            891293 -966724
+            905061 -952956
+            930831 -952956
+            965103 -918684
+            1052508 -918684
+            1097278 -963454
+            1097278 -1106352
+            1164512 -1173586
+            1164512 -1363871
+            1143373 -1385010
+            1133157 -1385010
+            1124789 -1376642
+            1124789 -1367782
+            1116616 -1359609
+            1112900 -1359609
+          )
+        )
+      )
+      (net SR1_CLK
+        (wire
+          (path B.Cu 2500
+            858901 -1068324
+            870533 -1079956
+            914523 -1079956
+            944995 -1110428
+            944995 -1121982
+            906191 -1160786
+            906191 -1244314
+            917575 -1255698
+            933196 -1255698
+            954861 -1234033
+            1011795 -1234033
+            1036582 -1258820
+            1065883 -1258820
+            1101011 -1293948
+            1101011 -1296920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1112900 -1296920
+            1101011 -1296920
+          )
+        )
+      )
+      (net SR1_CLKINH
+        (wire
+          (path B.Cu 2500
+            1112900 -1220720
+            1091141 -1198961
+            1091141 -1157053
+            989708 -1055620
+            896997 -1055620
+            858901 -1017524
+          )
+        )
+      )
+      (net SR1_QH_T
+        (wire
+          (path B.Cu 2500
+            1138300 -1183431
+            1134584 -1183431
+            1126411 -1175258
+            1126411 -1149175
+            1010628 -1033392
+            1010628 -949315
+            990912 -929599
+            978899 -929599
+            941778 -966720
+            909701 -966720
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1138300 -1195320
+            1138300 -1183431
+          )
+        )
+      )
+      (net PGND
+        (wire
+          (path F.Cu 2500
+            985900 -1158285
+            985900 -1150080
+            969762 -1133942
+            969762 -1033659
+            985901 -1017520
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1125410 -864934
+            1125600 -865124
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1047870 -864934
+            1125410 -864934
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1125410 -864934
+            1125410 -839914
+            1125600 -839724
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            846201 -1131208
+            846201 -1167640
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            782701 -1042924
+            846201 -1106424
+            846201 -1131208
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            846201 -1131208
+            897613 -1131208
+            909701 -1119120
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            967873 -811185
+            1037121 -811185
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            964734 -814324
+            967873 -811185
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            964734 -788924
+            967873 -792063
+            967873 -811185
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            873646 -1676120
+            852146 -1676120
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            895146 -1676120
+            873646 -1676120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -1068320
+            1125600 -1093720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -1042920
+            1125600 -1068320
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1037121 -811185
+            1047870 -800436
+            1047870 -800434
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1037121 -811185
+            1047870 -821934
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -864934
+            1047870 -886434
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -843434
+            1047870 -864934
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            985900 -1169920
+            985900 -1158285
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            985901 -1017520
+            973672 -1005291
+            973672 -899462
+            964734 -890524
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            893394 -888344
+            893394 -906831
+            858901 -941324
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            893394 -705594
+            810998 -705594
+            803868 -712724
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            893394 -705594
+            893394 -694844
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            893394 -712724
+            893394 -705594
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            803868 -814324
+            803868 -788924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -1036930
+            776707 -1036930
+            782701 -1042924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -1015430
+            725699 -1036930
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706501 -1347720
+            718136 -1336085
+            718136 -1190280
+            709411 -1181555
+            706501 -1181555
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706501 -1385820
+            706501 -1347720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706501 -1169920
+            706501 -1181555
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706501 -1563620
+            718233 -1551888
+            718233 -1532772
+            710981 -1525520
+            702703 -1525520
+            694866 -1517683
+            694866 -1406180
+            703591 -1397455
+            706501 -1397455
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706501 -1670620
+            706501 -1563620
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706501 -1385820
+            706501 -1397455
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            893394 -716344
+            893394 -712724
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            893394 -712724
+            964734 -712724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            893394 -737844
+            893394 -759344
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            706501 -1347720
+            718545 -1335676
+            836437 -1335676
+            846201 -1345440
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            893394 -737844
+            893394 -716344
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            725699 -950934
+            725699 -972434
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -941320
+            1125600 -966720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -890524
+            1125600 -941320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            841396 -1670745
+            841396 -1568425
+            846201 -1563620
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706501 -1670620
+            700290 -1670620
+            667590 -1703320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            766146 -1676120
+            760646 -1670620
+            706501 -1670620
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1703320
+            667590 -1703320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -993934
+            1047870 -1015430
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -972434
+            1047870 -993934
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -1169109
+            1126411 -1169920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -1119120
+            1125600 -1169109
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1124789 -1169920
+            1125600 -1169109
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1112900 -1169920
+            1124789 -1169920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1138300 -1169920
+            1126411 -1169920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -1093720
+            1125600 -1119120
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            893420 -673295
+            893158 -673033
+            893158 -651985
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            893394 -694844
+            893394 -673321
+            893420 -673295
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -993934
+            725699 -1015430
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -788924
+            1125600 -763524
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -814324
+            1125600 -788924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -1015430
+            1047870 -1036930
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            970396 -1670745
+            965021 -1670745
+            959646 -1676120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            981146 -1676120
+            975771 -1670745
+            970396 -1670745
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            970396 -1670745
+            970396 -1579124
+            985900 -1563620
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            938146 -1676120
+            916646 -1676120
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            959646 -1676120
+            938146 -1676120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            803868 -712724
+            803868 -738124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            841396 -1670745
+            836021 -1670745
+            830646 -1676120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            852146 -1676120
+            846771 -1670745
+            841396 -1670745
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            729409 -839724
+            725699 -843434
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            803868 -839724
+            729409 -839724
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            725699 -821934
+            729409 -825644
+            729409 -839724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1703320
+            642190 -1703320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1703320
+            655701 -1728720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1703320
+            642190 -1703320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1728720
+            642190 -1728720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1728720
+            642190 -1728720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            964734 -865124
+            964734 -890524
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            787646 -1676120
+            766146 -1676120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1169920
+            630301 -1158031
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1158031
+            643001 -1145331
+            643001 -1119120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            964734 -865124
+            964734 -839724
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            630301 -1169920
+            655701 -1169920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            725699 -800434
+            714189 -788924
+            643001 -788924
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            706501 -1169920
+            655701 -1169920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            846201 -1385820
+            857836 -1385820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            985900 -1385820
+            974265 -1385820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            974265 -1385820
+            962630 -1374185
+            869471 -1374185
+            857836 -1385820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            846201 -1345440
+            846201 -1385820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            985900 -1385820
+            985900 -1347720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -1017520
+            1125600 -1042920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -992120
+            1125600 -1017520
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -966720
+            1125600 -992120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            803868 -865124
+            803868 -890524
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            803868 -839724
+            803868 -865124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            803868 -814324
+            803868 -839724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            803868 -763524
+            803868 -788924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            803868 -738124
+            803868 -763524
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            964734 -814324
+            964734 -839724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            964734 -763524
+            964734 -788924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            964734 -738124
+            964734 -763524
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            964734 -712724
+            964734 -738124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -865124
+            1125600 -890524
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -738124
+            1125600 -712724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -763524
+            1125600 -738124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1125600 -839724
+            1125600 -814324
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -1119120
+            643001 -1093720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -738124
+            643001 -712724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -763524
+            643001 -738124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -788924
+            643001 -763524
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -814324
+            643001 -788924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -839724
+            643001 -814324
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -865124
+            643001 -839724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -890524
+            643001 -865124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -941320
+            643001 -890524
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -966720
+            643001 -941320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -992120
+            643001 -966720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -1017520
+            643001 -992120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -1042920
+            643001 -1017520
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -1068320
+            643001 -1042920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            643001 -1093720
+            643001 -1068320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -972434
+            725699 -993934
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -929434
+            725699 -950934
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -907934
+            725699 -929434
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -950934
+            1047870 -972434
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -929434
+            1047870 -950934
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            809146 -1676120
+            787646 -1676120
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            830646 -1676120
+            809146 -1676120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            893394 -866844
+            893394 -888344
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            893394 -845344
+            893394 -866844
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -907934
+            1047870 -929434
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -886434
+            1047870 -907934
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            893394 -823844
+            893394 -845344
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -864934
+            725699 -886434
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -843434
+            725699 -864934
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -800434
+            725699 -821934
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            893394 -802344
+            893394 -823844
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            893394 -780844
+            893394 -802344
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            725699 -886434
+            725699 -907934
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1047870 -843434
+            1047870 -821934
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            895146 -1676120
+            916646 -1676120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            893394 -780844
+            893394 -759344
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1002650 -1676120
+            981146 -1676120
+          )
+        )
+      )
+      (net 5v
+        (wire
+          (path F.Cu 2500
+            909701 -941320
+            909701 -952955
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            922401 -1167640
+            926341 -1163700
+            926341 -1093653
+            913708 -1081020
+            905886 -1081020
+            897967 -1073101
+            897967 -1012799
+            905946 -1004820
+            913600 -1004820
+            921336 -997084
+            921336 -961680
+            912611 -952955
+            909701 -952955
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1062100 -1385820
+            1050464 -1397456
+            934037 -1397456
+            922401 -1385820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            922401 -1385820
+            910765 -1397456
+            794337 -1397456
+            782701 -1385820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1062100 -1169920
+            1050363 -1158183
+            931858 -1158183
+            922401 -1167640
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1062100 -1385820
+            1050200 -1373920
+            1050200 -1181820
+            1062100 -1169920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            782701 -1169920
+            782701 -1119124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            782701 -1385820
+            757116 -1360235
+            757116 -1195505
+            782701 -1169920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            782701 -1169920
+            794403 -1181622
+            794403 -1225476
+            787506 -1232373
+            679243 -1232373
+            667590 -1220720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1220720
+            642190 -1220720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1220720
+            655701 -1246120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1220720
+            642190 -1220720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            655701 -1246120
+            642190 -1246120
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            630301 -1246120
+            642190 -1246120
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            655701 -1220720
+            667590 -1220720
+          )
+        )
+      )
+      (net BB3.3
+        (wire
+          (path B.Cu 2500
+            985901 -941320
+            947797 -979424
+            854784 -979424
+            832180 -1002028
+            832180 -1083731
+            855938 -1107489
+            858901 -1107489
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            858901 -1119124
+            858901 -1107489
+          )
+        )
+      )
+      (net SR1_QH
+        (wire
+          (path B.Cu 2500
+            800613 -1137055
+            830428 -1166870
+            830428 -1173436
+            836268 -1179276
+            856153 -1179276
+            891635 -1143794
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            909701 -992120
+            891635 -1010186
+            891635 -1143794
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            782701 -1246120
+            800613 -1228208
+            800613 -1137055
+          )
+        )
+        (via "Via[0-1]_600:400_um" 891635 -1143794
+        )
+        (via "Via[0-1]_600:400_um" 800613 -1137055
+        )
+      )
+      (net SR1_CLR_T
+        (wire
+          (path B.Cu 2500
+            1062100 -1563620
+            1048965 -1576755
+            935536 -1576755
+            922401 -1563620
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1062100 -1347720
+            1073844 -1359464
+            1073844 -1551876
+            1062100 -1563620
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            922401 -1345440
+            910509 -1357332
+            792313 -1357332
+            782701 -1347720
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1062100 -1347720
+            1050427 -1336047
+            978542 -1336047
+            969149 -1345440
+            922401 -1345440
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            782701 -1347720
+            770626 -1335645
+            770626 -1267122
+            778928 -1258820
+            786563 -1258820
+            806866 -1238517
+            806866 -1084900
+            803415 -1081449
+            803415 -987438
+            782701 -966724
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            922401 -1563620
+            910684 -1575337
+            794418 -1575337
+            782701 -1563620
+          )
+        )
+      )
+      (net SR1_SHLD_T
+        (wire
+          (path F.Cu 2500
+            922401 -1193040
+            885338 -1155977
+            885338 -996923
+            885964 -996297
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            858901 -992124
+            863074 -996297
+            885964 -996297
+          )
+        )
+        (via "Via[0-1]_600:400_um" 885964 -996297
+        )
+        (wire
+          (path F.Cu 2500
+            922401 -1411220
+            934076 -1399545
+            934076 -1204715
+            922401 -1193040
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1062100 -1411220
+            1050439 -1422881
+            953814 -1422881
+            942153 -1411220
+            922401 -1411220
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1062100 -1195320
+            1050452 -1183672
+            931769 -1183672
+            922401 -1193040
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            922401 -1411220
+            910729 -1422892
+            794373 -1422892
+            782701 -1411220
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            782701 -1411220
+            794432 -1399489
+            794432 -1381086
+            781511 -1368165
+            779123 -1368165
+            761619 -1350661
+            761619 -1216402
+            782701 -1195320
+          )
+        )
+      )
+      (net SR1_CLKINH_T
+        (wire
+          (path F.Cu 2500
+            846201 -1294640
+            834565 -1283004
+            834565 -1067260
+            858901 -1042924
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            718654 -1500667
+            706501 -1512820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            846201 -1512820
+            834048 -1500667
+            718654 -1500667
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            718654 -1500667
+            718654 -1482693
+            710681 -1474720
+            702707 -1474720
+            694813 -1466826
+            694813 -1308608
+            706501 -1296920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            706501 -1296920
+            718202 -1285219
+            836780 -1285219
+            846201 -1294640
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            985900 -1512820
+            974264 -1501184
+            857837 -1501184
+            846201 -1512820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            985900 -1512820
+            974264 -1501184
+            974264 -1482571
+            982115 -1474720
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+            997540 -1467006
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+            989884 -1423920
+            981986 -1423920
+            973906 -1415840
+            973906 -1308914
+            985900 -1296920
+          )
+        )
+      )
+      (net SR1_CLK_T
+        (wire
+          (path F.Cu 2500
+            846201 -1320040
+            857837 -1308404
+            857837 -1153954
+            847265 -1143382
+            847265 -1105360
+            858901 -1093724
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            985900 -1322320
+            976391 -1331829
+            857990 -1331829
+            846201 -1320040
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            706501 -1322320
+            718550 -1310271
+            836432 -1310271
+            846201 -1320040
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706501 -1322320
+            690105 -1338716
+            690105 -1521824
+            706501 -1538220
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            985900 -1538220
+            974261 -1526581
+            911823 -1526581
+            900184 -1538220
+            846201 -1538220
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            846201 -1538220
+            834485 -1549936
+            718217 -1549936
+            706501 -1538220
+          )
+        )
+      )
+      (net 7SEG_CLK
+        (wire
+          (path F.Cu 2500
+            1112900 -1716831
+            1116595 -1716831
+            1125063 -1708363
+            1125063 -1698450
+            1118043 -1691430
+            1105882 -1691430
+            1105874 -1691438
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+            819896 -1680186
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+            770620 -1466893
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+            799279 -1379288
+            782060 -1362069
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+            766122 -1348001
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+            779489 -1206956
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+            794379 -1200526
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+            793766 -1139645
+            793766 -1134465
+            798912 -1129319
+            798912 -1008335
+            782701 -992124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1112900 -1728720
+            1112900 -1716831
+          )
+        )
+      )
+      (net 7SEG_DIO
+        (wire
+          (path F.Cu 2500
+            782701 -1068324
+            748004 -1103021
+            748004 -1469407
+            779213 -1500616
+            787606 -1500616
+            798396 -1511406
+            798396 -1680269
+            821447 -1703320
+            1112900 -1703320
+          )
+        )
+      )
+      (net SR6_QH_T
+        (wire
+          (path B.Cu 2500
+            985901 -966720
+            1001322 -982141
+            1001322 -1045745
+            1100147 -1144570
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+            1126411 -1191433
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+            1133827 -1207889
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+            1159908 -1225364
+            1159908 -1343338
+            1142015 -1361231
+            1138300 -1361231
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1138300 -1373120
+            1138300 -1361231
+          )
+        )
+      )
+      (net SR5_QH_T
+        (wire
+          (path B.Cu 2500
+            1138300 -1335831
+            1142015 -1335831
+            1155123 -1322723
+            1155123 -1245979
+            1142200 -1233056
+            1133486 -1233056
+            1126411 -1225981
+            1126411 -1217397
+            1117034 -1208020
+            1108763 -1208020
+            1095644 -1194901
+            1095644 -1152663
+            985901 -1042920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1138300 -1347720
+            1138300 -1335831
+          )
+        )
+      )
+      (net SR4_QH_T
+        (wire
+          (path B.Cu 2500
+            1138300 -1310431
+            1142016 -1310431
+            1150189 -1302258
+            1150189 -1265825
+            1143184 -1258820
+            1134176 -1258820
+            1124790 -1249434
+            1124790 -1240425
+            1118074 -1233709
+            1108554 -1233709
+            1084699 -1209854
+            1084699 -1162654
+            1015765 -1093720
+            985901 -1093720
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1138300 -1322320
+            1138300 -1310431
+          )
+        )
+      )
+      (net SR3_QH_T
+        (wire
+          (path B.Cu 2500
+            1138300 -1296920
+            1138300 -1285031
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            909701 -1068320
+            947801 -1106420
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+            1108807 -1258946
+            1117295 -1258946
+            1126411 -1268062
+            1126411 -1276858
+            1134584 -1285031
+            1138300 -1285031
+          )
+        )
+      )
+      (net +3V3
+        (wire
+          (path B.Cu 2500
+            630301 -1195320
+            655701 -1195320
+          )
+        )
+      )
+      (net SR2_QH
+        (wire
+          (path F.Cu 2500
+            922401 -1462020
+            943926 -1440495
+            943926 -1152356
+            932304 -1140734
+            932304 -1065523
+            909701 -1042920
+          )
+        )
+      )
+      (net SR3_QH
+        (wire
+          (path F.Cu 2500
+            909701 -1093720
+            921837 -1105856
+            921837 -1140132
+            910710 -1151259
+            910710 -1172717
+            918333 -1180340
+            926236 -1180340
+            939422 -1193526
+            939422 -1416084
+            937671 -1417835
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1062100 -1462020
+            1049400 -1449320
+            969156 -1449320
+            937671 -1417835
+          )
+        )
+        (via "Via[0-1]_600:400_um" 937671 -1417835
+        )
+      )
+      (net SR4_QH
+        (wire
+          (path B.Cu 2500
+            985901 -1119120
+            1028413 -1119120
+            1073754 -1164461
+            1073754 -1234466
+            1062100 -1246120
+          )
+        )
+      )
+      (net SR5_QH
+        (wire
+          (path F.Cu 2500
+            985901 -1068320
+            974266 -1079955
+            974266 -1128203
+            976025 -1129962
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            922401 -1243840
+            910694 -1232133
+            910694 -1162653
+            943385 -1129962
+            976025 -1129962
+          )
+        )
+        (via "Via[0-1]_600:400_um" 976025 -1129962
+        )
+      )
+      (net SR6_QH
+        (wire
+          (path F.Cu 2500
+            782701 -1462020
+            825557 -1419164
+            825557 -1042262
+            838433 -1029386
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            838433 -1029386
+            838433 -1021260
+            853809 -1005884
+            972137 -1005884
+            985901 -992120
+          )
+        )
+        (via "Via[0-1]_600:400_um" 838433 -1029386
+        )
+      )
+      (net "Net-(R1-Pad2)"
+        (wire
+          (path F.Cu 2500
+            706699 -1036930
+            725393 -1055624
+            786559 -1055624
+            794409 -1063474
+            794409 -1073157
+            786542 -1081024
+            778913 -1081024
+            752507 -1107430
+            752507 -1406426
+            782701 -1436620
+          )
+        )
+      )
+      (net "Net-(R2-Pad2)"
+        (wire
+          (path F.Cu 2500
+            1024202 -1456730
+            1028870 -1452062
+            1028870 -1047183
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            782701 -1487420
+            796237 -1473884
+            1007048 -1473884
+            1024202 -1456730
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1028870 -1036930
+            1028870 -1047183
+          )
+        )
+        (via "Via[0-1]_600:400_um" 1024202 -1456730
+        )
+      )
+      (net "Net-(R3-Pad2)"
+        (wire
+          (path F.Cu 2500
+            706699 -1025683
+            702854 -1025683
+            695975 -1032562
+            695975 -1068956
+            731772 -1104753
+            731772 -1461891
+            782701 -1512820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706699 -1015430
+            706699 -1025683
+          )
+        )
+      )
+      (net "Net-(R4-Pad2)"
+        (wire
+          (path F.Cu 2500
+            766146 -1657120
+            766146 -1554775
+            782701 -1538220
+          )
+        )
+      )
+      (net "Net-(R5-Pad2)"
+        (wire
+          (path F.Cu 2500
+            706699 -1004187
+            703185 -1004187
+            691470 -1015902
+            691470 -1086257
+            727268 -1122055
+            727268 -1466653
+            706501 -1487420
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            706699 -993934
+            706699 -1004187
+          )
+        )
+      )
+      (net "Net-(R6-Pad2)"
+        (wire
+          (path F.Cu 2500
+            1028870 -1015430
+            1028870 -1025683
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1018116 -1354536
+            1004062 -1368590
+            782798 -1368590
+            720265 -1431123
+            720265 -1448256
+            706501 -1462020
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1018116 -1354536
+            1019521 -1353131
+            1019521 -1136404
+            1018617 -1135500
+            1018617 -1032090
+            1025024 -1025683
+            1028870 -1025683
+          )
+        )
+        (via "Via[0-1]_600:400_um" 1018116 -1354536
+        )
+      )
+      (net "Net-(R7-Pad2)"
+        (wire
+          (path F.Cu 2500
+            713564 -983662
+            701949 -983662
+            686966 -998645
+            686966 -1129020
+            722764 -1164818
+            722764 -1420357
+            706501 -1436620
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            874394 -898597
+            874394 -900419
+            821853 -952960
+            779130 -952960
+            748428 -983662
+            713564 -983662
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            874394 -888344
+            874394 -898597
+          )
+        )
+        (via "Via[0-1]_600:400_um" 713564 -983662
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+          (path B.Cu 2500
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+          (path F.Cu 2500
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+          (path F.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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+          (path F.Cu 2500
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+          (path F.Cu 2500
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+          (path F.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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+          (path B.Cu 2500
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diff --git a/bbb-bort12.dsn b/bbb-bort12.dsn
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+      (pin Oval[A]Pad_1727.2x1727.2_um 18 2540 -20320)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 17 0 -20320)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 16 2540 -17780)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 15 0 -17780)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 14 2540 -15240)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 13 0 -15240)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 12 2540 -12700)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 11 0 -12700)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 10 2540 -10160)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 9 0 -10160)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 8 2540 -7620)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 7 0 -7620)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 6 2540 -5080)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 5 0 -5080)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 4 2540 -2540)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 3 0 -2540)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 2 2540 0)\r
+      (pin Rect[A]Pad_1727.2x1727.2_um 1 0 0)\r
+    )\r
+    (image "footprints:640456-8"\r
+      (outline (path signal 152.4  18161 -1905  18088.2 -2128.95  17897.7 -2267.35  17662.3 -2267.35\r
+            17471.8 -2128.95  17399 -1905  17471.8 -1681.05  17662.3 -1542.65\r
+            17897.7 -1542.65  18088.2 -1681.05  18161 -1905))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  19050 3302  -1270 3302))\r
+      (outline (path signal 152.4  19050 -2413  19050 3302))\r
+      (outline (path signal 152.4  -1270 -2413  19050 -2413))\r
+      (outline (path signal 152.4  -1270 3302  -1270 -2413))\r
+      (outline (path signal 152.4  19304 3556  -1524 3556))\r
+      (outline (path signal 152.4  19304 -2667  19304 3556))\r
+      (outline (path signal 152.4  -1524 -2667  19304 -2667))\r
+      (outline (path signal 152.4  -1524 3556  -1524 -2667))\r
+      (outline (path signal 152.4  -1270 3302  -1270 -2413))\r
+      (outline (path signal 152.4  19050 3302  -1270 3302))\r
+      (outline (path signal 152.4  19050 -2413  19050 3302))\r
+      (outline (path signal 152.4  -1270 -2413  19050 -2413))\r
+      (outline (path signal 152.4  -1397 3429  -1397 -2540))\r
+      (outline (path signal 152.4  19177 3429  -1397 3429))\r
+      (outline (path signal 152.4  19177 -2540  19177 3429))\r
+      (outline (path signal 152.4  -1397 -2540  19177 -2540))\r
+      (pin Round[A]Pad_1524_um 8 0 0)\r
+      (pin Round[A]Pad_1524_um 7 2540 0)\r
+      (pin Round[A]Pad_1524_um 6 5080 0)\r
+      (pin Round[A]Pad_1524_um 5 7620 0)\r
+      (pin Round[A]Pad_1524_um 4 10160 0)\r
+      (pin Round[A]Pad_1524_um 3 12700 0)\r
+      (pin Round[A]Pad_1524_um 2 15240 0)\r
+      (pin Round[A]Pad_1524_um 1 17780 0)\r
+    )\r
+    (image "footprints:640456-8::1"\r
+      (outline (path signal 152.4  -1397 -2540  19177 -2540))\r
+      (outline (path signal 152.4  19177 -2540  19177 3429))\r
+      (outline (path signal 152.4  19177 3429  -1397 3429))\r
+      (outline (path signal 152.4  -1397 3429  -1397 -2540))\r
+      (outline (path signal 152.4  -1270 -2413  19050 -2413))\r
+      (outline (path signal 152.4  19050 -2413  19050 3302))\r
+      (outline (path signal 152.4  19050 3302  -1270 3302))\r
+      (outline (path signal 152.4  -1270 3302  -1270 -2413))\r
+      (outline (path signal 152.4  -1524 3556  -1524 -2667))\r
+      (outline (path signal 152.4  -1524 -2667  19304 -2667))\r
+      (outline (path signal 152.4  19304 -2667  19304 3556))\r
+      (outline (path signal 152.4  19304 3556  -1524 3556))\r
+      (outline (path signal 152.4  -1270 3302  -1270 -2413))\r
+      (outline (path signal 152.4  -1270 -2413  19050 -2413))\r
+      (outline (path signal 152.4  19050 -2413  19050 3302))\r
+      (outline (path signal 152.4  19050 3302  -1270 3302))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  18161 -1905  18088.2 -2128.95  17897.7 -2267.35  17662.3 -2267.35\r
+            17471.8 -2128.95  17399 -1905  17471.8 -1681.05  17662.3 -1542.65\r
+            17897.7 -1542.65  18088.2 -1681.05  18161 -1905))\r
+      (pin Round[A]Pad_1524_um 1 17780 0)\r
+      (pin Round[A]Pad_1524_um 2 15240 0)\r
+      (pin Round[A]Pad_1524_um 3 12700 0)\r
+      (pin Round[A]Pad_1524_um 4 10160 0)\r
+      (pin Round[A]Pad_1524_um 5 7620 0)\r
+      (pin Round[A]Pad_1524_um 6 5080 0)\r
+      (pin Round[A]Pad_1524_um 7 2540 0)\r
+      (pin Round[A]Pad_1524_um 8 0 0)\r
+    )\r
+    (image "digikey-footprints:SIP-9_P2.54mm"\r
+      (outline (path signal 50  21820 -1500  -1490 -1500))\r
+      (outline (path signal 50  21820 1500  -1490 1500))\r
+      (outline (path signal 50  21820 1500  21820 -1500))\r
+      (outline (path signal 50  -1490 1500  -1490 -1500))\r
+      (outline (path signal 100  21700 -1400  21200 -1400))\r
+      (outline (path signal 100  21700 -1400  21700 -900))\r
+      (outline (path signal 100  21700 1400  21700 900))\r
+      (outline (path signal 100  21700 1400  21200 1400))\r
+      (outline (path signal 100  -900 1400  -1400 1400))\r
+      (outline (path signal 100  -1400 1400  -1400 -1400))\r
+      (outline (path signal 100  -1400 -1400  -900 -1400))\r
+      (outline (path signal 100  21570 1250  21570 -1250))\r
+      (outline (path signal 100  -1240 1250  -1240 -1250))\r
+      (outline (path signal 100  -1240 -1250  21570 -1250))\r
+      (outline (path signal 100  -1240 1250  21570 1250))\r
+      (pin Rect[A]Pad_1810x1810_um 1 0 0)\r
+      (pin Round[A]Pad_1810_um 2 2540 0)\r
+      (pin Round[A]Pad_1810_um 3 5080 0)\r
+      (pin Round[A]Pad_1810_um 4 7620 0)\r
+      (pin Round[A]Pad_1810_um 5 10160 0)\r
+      (pin Round[A]Pad_1810_um 6 12700 0)\r
+      (pin Round[A]Pad_1810_um 7 15240 0)\r
+      (pin Round[A]Pad_1810_um 8 17780 0)\r
+      (pin Round[A]Pad_1810_um 9 20320 0)\r
+    )\r
+    (image "digikey-footprints:SIP-9_P2.54mm::1"\r
+      (outline (path signal 100  -1240 1250  21570 1250))\r
+      (outline (path signal 100  -1240 -1250  21570 -1250))\r
+      (outline (path signal 100  -1240 1250  -1240 -1250))\r
+      (outline (path signal 100  21570 1250  21570 -1250))\r
+      (outline (path signal 100  -1400 -1400  -900 -1400))\r
+      (outline (path signal 100  -1400 1400  -1400 -1400))\r
+      (outline (path signal 100  -900 1400  -1400 1400))\r
+      (outline (path signal 100  21700 1400  21200 1400))\r
+      (outline (path signal 100  21700 1400  21700 900))\r
+      (outline (path signal 100  21700 -1400  21700 -900))\r
+      (outline (path signal 100  21700 -1400  21200 -1400))\r
+      (outline (path signal 50  -1490 1500  -1490 -1500))\r
+      (outline (path signal 50  21820 1500  21820 -1500))\r
+      (outline (path signal 50  21820 1500  -1490 1500))\r
+      (outline (path signal 50  21820 -1500  -1490 -1500))\r
+      (pin Round[A]Pad_1810_um 9 20320 0)\r
+      (pin Round[A]Pad_1810_um 8 17780 0)\r
+      (pin Round[A]Pad_1810_um 7 15240 0)\r
+      (pin Round[A]Pad_1810_um 6 12700 0)\r
+      (pin Round[A]Pad_1810_um 5 10160 0)\r
+      (pin Round[A]Pad_1810_um 4 7620 0)\r
+      (pin Round[A]Pad_1810_um 3 5080 0)\r
+      (pin Round[A]Pad_1810_um 2 2540 0)\r
+      (pin Rect[A]Pad_1810x1810_um 1 0 0)\r
+    )\r
+    (padstack Round[A]Pad_1524_um\r
+      (shape (circle F.Cu 1524))\r
+      (shape (circle B.Cu 1524))\r
+      (attach off)\r
+    )\r
+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Round[A]Pad_1810_um\r
+      (shape (circle F.Cu 1810))\r
+      (shape (circle B.Cu 1810))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1810x1810_um\r
+      (shape (rect F.Cu -905 -905 905 905))\r
+      (shape (rect B.Cu -905 -905 905 905))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-1]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
+    (net SR1_CLR\r
+      (pins U2-9 P8-17)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins U2-7 P8-15)\r
+    )\r
+    (net SR1_CLK\r
+      (pins U2-3 P8-11)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins U2-5 P8-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins U1-2 P8-4)\r
+    )\r
+    (net PGND\r
+      (pins U8-8 U8-1 U7-1 U7-8 U6-8 U6-1 U5-1 U5-8 U4-8 U4-1 U3-1 U3-8 U2-13 U2-8\r
+        U1-8 U1-13 P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 RN3-1)\r
+    )\r
+    (net 5v\r
+      (pins U8-16 U7-16 U6-16 U5-16 U4-16 U3-16 U2-16 U1-1 P9-8 P9-7 P9-6 P9-5)\r
+    )\r
+    (net BB3.3\r
+      (pins U2-1 U1-16)\r
+    )\r
+    (net SR1_QH\r
+      (pins U3-13 U1-3)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U8-9 U7-9 U6-9 U5-9 U4-9 U3-9 U2-10)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U8-15 U7-15 U6-15 U5-15 U4-15 U3-15 U2-6)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U8-6 U7-6 U6-6 U5-6 U4-6 U3-6 U2-4)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U8-7 U7-7 U6-7 U5-7 U4-7 U3-7 U2-2)\r
+    )\r
+    (net 7SEG_CLK\r
+      (pins U2-11 P8-45)\r
+    )\r
+    (net 7SEG_DIO\r
+      (pins U2-14 P8-43)\r
+    )\r
+    (net SR6_QH_T\r
+      (pins U1-15 P8-18)\r
+    )\r
+    (net SR5_QH_T\r
+      (pins U1-12 P8-16)\r
+    )\r
+    (net SR4_QH_T\r
+      (pins U1-10 P8-14)\r
+    )\r
+    (net SR3_QH_T\r
+      (pins U1-6 P8-12)\r
+    )\r
+    (net +3V3\r
+      (pins P9-4 P9-3)\r
+    )\r
+    (net SR2_QH\r
+      (pins U7-13 U1-5)\r
+    )\r
+    (net SR3_QH\r
+      (pins U8-13 U1-7)\r
+    )\r
+    (net SR4_QH\r
+      (pins U6-13 U1-9)\r
+    )\r
+    (net SR5_QH\r
+      (pins U5-13 U1-11)\r
+    )\r
+    (net SR6_QH\r
+      (pins U4-13 U1-14)\r
+    )\r
+    (class kicad_default "" +3V3 /a1 /a2 /a3 /a4 /a5 /a6 /a7 /a8 /b1 /b2 /b3\r
+      /b4 /b5 /b6 /b7 /b8 /c1 /c2 /c3 /c4 /c5 /c6 /c7 /c8 /d1 /d2 /d3 /d4\r
+      /d5 /d6 /d7 /d8 /e1 /e2 /e3 /e4 /e5 /e6 /e7 /e8 /f1 /f2 /f3 /f4 /f5\r
+      /f6 /f7 /f8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 GNDA_ADC\r
+      "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"\r
+      "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)"\r
+      "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"\r
+      "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)"\r
+      "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"\r
+      "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)"\r
+      "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)"\r
+      "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)"\r
+      "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)"\r
+      "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)"\r
+      "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)"\r
+      "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)"\r
+      "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)"\r
+      "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)"\r
+      "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)"\r
+      "Net-(R1-Pad2)" "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)"\r
+      "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)"\r
+      "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R2-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)"\r
+      "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)"\r
+      "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)"\r
+      "Net-(R3-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)"\r
+      "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)"\r
+      "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R4-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)"\r
+      "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)"\r
+      "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)"\r
+      "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)" "Net-(RN1-Pad1)" "Net-(RN1-Pad2)"\r
+      "Net-(RN1-Pad3)" "Net-(RN1-Pad4)" "Net-(RN1-Pad5)" "Net-(RN1-Pad6)"\r
+      "Net-(RN1-Pad7)" "Net-(RN1-Pad8)" "Net-(RN1-Pad9)" "Net-(RN2-Pad1)"\r
+      "Net-(RN2-Pad2)" "Net-(RN2-Pad3)" "Net-(RN2-Pad4)" "Net-(RN2-Pad5)"\r
+      "Net-(RN2-Pad6)" "Net-(RN2-Pad7)" "Net-(RN2-Pad8)" "Net-(RN2-Pad9)"\r
+      "Net-(RN3-Pad2)" "Net-(RN3-Pad3)" "Net-(RN3-Pad4)" "Net-(RN3-Pad5)"\r
+      "Net-(RN3-Pad6)" "Net-(RN3-Pad7)" "Net-(RN3-Pad8)" "Net-(RN3-Pad9)"\r
+      "Net-(RN4-Pad1)" "Net-(RN4-Pad2)" "Net-(RN4-Pad3)" "Net-(RN4-Pad4)"\r
+      "Net-(RN4-Pad5)" "Net-(RN4-Pad6)" "Net-(RN4-Pad7)" "Net-(RN4-Pad8)"\r
+      "Net-(RN4-Pad9)" "Net-(RN5-Pad1)" "Net-(RN5-Pad2)" "Net-(RN5-Pad3)"\r
+      "Net-(RN5-Pad4)" "Net-(RN5-Pad5)" "Net-(RN5-Pad6)" "Net-(RN5-Pad7)"\r
+      "Net-(RN5-Pad8)" "Net-(RN5-Pad9)" "Net-(RN6-Pad1)" "Net-(RN6-Pad2)"\r
+      "Net-(RN6-Pad3)" "Net-(RN6-Pad4)" "Net-(RN6-Pad5)" "Net-(RN6-Pad6)"\r
+      "Net-(RN6-Pad7)" "Net-(RN6-Pad8)" "Net-(RN6-Pad9)" PGND PWR_BUT SR1_CLK\r
+      SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T\r
+      SR1_SHLD SR1_SHLD_T SR2_QH SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH\r
+      SR4_QH_T SR5_QH SR5_QH_T SR6_QH SR6_QH_T SYS_RESETN VDD_ADC a1r a2r\r
+      a3r a4r a5r a6r a7r a8r b1r b2r b3r b4r b5r b6r b7r b8r c1r c2r c3r\r
+      c4r c5r c6r c7r c8r d1r d2r d3r d4r d5r d6r d7r d8r e1r e2r e3r e4r\r
+      e5r e6r e7r e8r f1r f2r f3r f4r f5r f6r f7r f8r\r
+      (circuit\r
+        (use_via Via[0-1]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort12.rules b/bbb-bort12.rules
new file mode 100644 (file)
index 0000000..aaf7e9d
--- /dev/null
+++ b/bbb-bort12.rules
@@ -0,0 +1,79 @@
+
+(rules PCB bbb-bort12
+  (snap_angle 
+    fortyfive_degree
+  )
+  (autoroute_settings
+    (fanout off)
+    (autoroute on)
+    (postroute on)
+    (vias on)
+    (via_costs 50)
+    (plane_via_costs 5)
+    (start_ripup_costs 100)
+    (start_pass_no 1198)
+    (layer_rule F.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 2.8)
+    )
+    (layer_rule B.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 1.6)
+    )
+  )
+  (rule
+    (width 250.0)
+    (clear 200.2)
+    (clear 125.0 (type smd_to_turn_gap))
+    (clear 50.0 (type smd_smd))
+  )
+  (padstack "Via[0-1]_600:400_um"
+    (shape
+      (circle F.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle B.Cu 600.0 0.0 0.0)
+    )
+    (attach off)
+  )
+  (via 
+    "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default
+  )
+  (via 
+    "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default"
+  )
+  (via_rule
+    default "Via[0-1]_600:400_um"
+  )
+  (via_rule
+    "kicad_default" "Via[0-1]_600:400_um-kicad_default"
+  )
+  (class default
+    (clearance_class default)
+    (via_rule default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+  (class "kicad_default"
+    "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND 5v BB3.3
+    "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK" "7SEG_DIO" "SR6_QH_T"
+    "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" +3V3 "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH"
+    "SR6_QH"
+    (clearance_class "kicad_default")
+    (via_rule kicad_default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort12.ses b/bbb-bort12.ses
new file mode 100644 (file)
index 0000000..a650d72
--- /dev/null
+++ b/bbb-bort12.ses
@@ -0,0 +1,1100 @@
+
+(session "bbb-bort12.ses"
+  (base_design "bbb-bort12.dsn")
+  (placement
+    (resolution um 10)
+    (component "166new:DIP254P762X508-16"
+      (place U8 1659000 -1220720 front 0)
+      (place U6 1659000 -1004820 front 0)
+      (place U4 1379600 -1220720 front 0)
+      (place U2 1379600 -598424 front 180)
+    )
+    (component "166new:DIP254P762X508-16::1"
+      (place U7 1519300 -1220720 front 0)
+      (place U5 1519300 -1002540 front 0)
+      (place U3 1379600 -1004820 front 0)
+      (place U1 1582800 -776220 front 0)
+    )
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black
+      (place P8 1709800 -827020 front 0)
+      (place P9 1227200 -827020 front 0)
+    )
+    (component "footprints:640456-8"
+      (place J1 1722500 -776220 front 90)
+      (place J3 1400770 -547624 front 90)
+      (place J5 1559400 -547624 front 90)
+    )
+    (component "footprints:640456-8::1"
+      (place J2 1722500 -547624 front 90)
+      (place J4 1239900 -547624 front 90)
+      (place J6 1239900 -776220 front 90)
+    )
+    (component "digikey-footprints:SIP-9_P2.54mm"
+      (place RN1 1368900 -1280000 front 0)
+      (place RN4 1635600 -555929 front 90)
+      (place RN5 1368900 -1343500 front 0)
+    )
+    (component "digikey-footprints:SIP-9_P2.54mm::1"
+      (place RN2 1318100 -555929 front 90)
+      (place RN3 1470500 -555929 front 90)
+      (place RN6 1368900 -1407000 front 0)
+    )
+  )
+  (was_is
+  )
+  (routes 
+    (resolution um 10)
+    (parser
+      (host_cad "KiCad's Pcbnew")
+      (host_version "(5.0.1)-3")
+    )
+    (library_out 
+      (padstack "Via[0-1]_600:400_um"
+        (shape
+          (circle F.Cu 6000 0 0)
+        )
+        (shape
+          (circle B.Cu 6000 0 0)
+        )
+        (attach off)
+      )
+    )
+    (network_out 
+      (net SR1_CLR
+        (wire
+          (path B.Cu 2500
+            1379600 -598424
+            1417701 -636525
+            1417701 -766152
+            1472192 -820643
+            1472192 -845108
+            1515324 -888240
+            1536112 -888240
+            1563792 -915920
+            1603653 -915920
+            1654453 -966720
+            1663599 -966720
+            1697911 -1001032
+            1697911 -1010158
+            1706084 -1018331
+            1709800 -1018331
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1709800 -1030220
+            1709800 -1018331
+          )
+        )
+      )
+      (net SR1_SHLD
+        (wire
+          (path F.Cu 2500
+            1709800 -1004820
+            1721689 -1004820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1721689 -1004820
+            1721689 -1001104
+            1729862 -992931
+            1738595 -992931
+            1747161 -984365
+            1747161 -822114
+            1611236 -686189
+            1611236 -660972
+            1586784 -636520
+            1578886 -636520
+            1528760 -586394
+            1493230 -586394
+            1455800 -623824
+          )
+        )
+      )
+      (net SR1_CLK
+        (wire
+          (path B.Cu 2500
+            1709800 -954020
+            1697911 -954020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1697911 -954020
+            1686022 -942131
+            1655467 -942131
+            1603856 -890520
+            1553311 -890520
+            1525631 -862840
+            1515365 -862840
+            1481199 -828674
+            1481199 -750823
+            1455800 -725424
+          )
+        )
+      )
+      (net SR1_CLKINH
+        (wire
+          (path B.Cu 2500
+            1455800 -674624
+            1493896 -712720
+            1527656 -712720
+            1553056 -738120
+            1593678 -738120
+            1693408 -837850
+            1693408 -853255
+            1706084 -865931
+            1709800 -865931
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1709800 -877820
+            1709800 -865931
+          )
+        )
+      )
+      (net SR1_QH_T
+        (wire
+          (path B.Cu 2500
+            1506600 -623820
+            1570100 -687320
+            1612719 -687320
+            1747100 -821701
+            1747100 -832346
+            1738915 -840531
+            1735200 -840531
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1735200 -852420
+            1735200 -840531
+          )
+        )
+      )
+      (net PGND
+        (wire
+          (path B.Cu 2500
+            1252600 -827020
+            1227200 -827020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1303400 -827020
+            1252600 -827020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1582800 -827020
+            1571165 -827020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1506600 -776220
+            1520365 -776220
+            1571165 -827020
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1303400 -827020
+            1303400 -838655
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1303400 -838655
+            1306309 -838655
+            1315443 -847789
+            1315443 -992777
+            1303400 -1004820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1456408 -826412
+            1454735 -824740
+            1453609 -824740
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1443100 -1002540
+            1459238 -986402
+            1459238 -829243
+            1456408 -826412
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1456408 -826412
+            1506600 -776220
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1709800 -827020
+            1697911 -827020
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1594722 -730138
+            1594722 -686542
+            1582800 -674620
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1582800 -815385
+            1570753 -803338
+            1570753 -746412
+            1579045 -738120
+            1586740 -738120
+            1594722 -730138
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1697911 -827020
+            1601029 -730138
+            1594722 -730138
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1582800 -827020
+            1582800 -815385
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1582800 -1042920
+            1571165 -1042920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1559636 -1027984
+            1571165 -1039513
+            1571165 -1042920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1559636 -1027984
+            1582800 -1004820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1468544 -1027984
+            1559636 -1027984
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1454735 -1042920
+            1468544 -1029111
+            1468544 -1027984
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1468544 -1027984
+            1443100 -1002540
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1443100 -824740
+            1453609 -824740
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1455143 -1208677
+            1443100 -1220720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1443100 -1054555
+            1446009 -1054555
+            1455143 -1063689
+            1455143 -1208677
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1455143 -1208677
+            1570757 -1208677
+            1582800 -1220720
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1443100 -813105
+            1443100 -809194
+            1395147 -761241
+            1391236 -761241
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1303400 -827020
+            1315035 -827020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1315035 -827020
+            1315035 -824111
+            1375622 -763524
+            1388953 -763524
+            1391236 -761241
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1379600 -700024
+            1391236 -711660
+            1391236 -761241
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1443100 -824740
+            1443100 -813105
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1252600 -1360420
+            1239089 -1360420
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1252600 -1385820
+            1252600 -1360420
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1227200 -1360420
+            1239089 -1360420
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1252600 -1385820
+            1239089 -1385820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1227200 -1385820
+            1239089 -1385820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1735200 -827020
+            1723311 -827020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1709800 -821075
+            1717366 -821075
+            1723311 -827020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1709800 -827020
+            1709800 -821075
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1443100 -1220720
+            1431056 -1232764
+            1315444 -1232764
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1315444 -1232764
+            1303400 -1220720
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1315444 -1232764
+            1315444 -1289484
+            1256397 -1348531
+            1252600 -1348531
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1252600 -1360420
+            1252600 -1348531
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1443100 -1042920
+            1443100 -1054555
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1455800 -598424
+            1393364 -660860
+            1393364 -686260
+            1379600 -700024
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1470500 -568232
+            1455800 -582932
+            1455800 -598424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1443100 -1042920
+            1454735 -1042920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1303400 -1004820
+            1303400 -1042920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1470500 -555929
+            1470500 -568232
+          )
+        )
+      )
+      (net 5v
+        (wire
+          (path B.Cu 2500
+            1227200 -877820
+            1240711 -877820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1252600 -877820
+            1240711 -877820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1227200 -877820
+            1227200 -891331
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1227200 -903220
+            1227200 -891331
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1519300 -1042920
+            1530936 -1054556
+            1647364 -1054556
+            1659000 -1042920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1519300 -1042920
+            1507664 -1054556
+            1391236 -1054556
+            1379600 -1042920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1252600 -915109
+            1256316 -915109
+            1264489 -923282
+            1264489 -956994
+            1299615 -992120
+            1328800 -992120
+            1379600 -1042920
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1506600 -598420
+            1494965 -598420
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1379600 -776224
+            1367595 -764219
+            1367595 -720665
+            1375536 -712724
+            1383356 -712724
+            1435804 -660276
+            1435804 -652372
+            1451652 -636524
+            1459770 -636524
+            1494965 -601329
+            1494965 -598420
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1379600 -827020
+            1379600 -776224
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1519300 -824740
+            1533216 -838656
+            1647364 -838656
+            1659000 -827020
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1519300 -1042920
+            1502667 -1026287
+            1502667 -841373
+            1519300 -824740
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1252600 -903220
+            1239089 -903220
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1227200 -903220
+            1239089 -903220
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1252600 -903220
+            1252600 -915109
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1252600 -877820
+            1264489 -877820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1264489 -877820
+            1276378 -865931
+            1340689 -865931
+            1379600 -827020
+          )
+        )
+      )
+      (net BB3.3
+        (wire
+          (path B.Cu 2500
+            1455800 -776224
+            1455800 -764589
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1582800 -598420
+            1571164 -610056
+            1503194 -610056
+            1480139 -633111
+            1480139 -641379
+            1459594 -661924
+            1451878 -661924
+            1444165 -669637
+            1444165 -755864
+            1452890 -764589
+            1455800 -764589
+          )
+        )
+      )
+      (net SR1_QH
+        (wire
+          (path B.Cu 2500
+            1436091 -811029
+            1435263 -811029
+            1393364 -852928
+            1393364 -889456
+            1379600 -903220
+          )
+        )
+        (via "Via[0-1]_600:400_um" 1436091 -811029
+        )
+        (wire
+          (path F.Cu 2500
+            1506600 -649220
+            1494964 -660856
+            1494964 -759159
+            1443094 -811029
+            1436091 -811029
+          )
+        )
+      )
+      (net SR1_CLR_T
+        (wire
+          (path B.Cu 2500
+            1659000 -1220720
+            1647293 -1209013
+            1531007 -1209013
+            1519300 -1220720
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1659000 -1004820
+            1671043 -1016863
+            1671043 -1208677
+            1659000 -1220720
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1379600 -1004820
+            1363092 -988312
+            1363092 -640332
+            1379600 -623824
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1659000 -1004820
+            1646951 -992771
+            1529069 -992771
+            1519300 -1002540
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1379600 -1004820
+            1393786 -990634
+            1507394 -990634
+            1519300 -1002540
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1379600 -1220720
+            1391506 -1208814
+            1507394 -1208814
+            1519300 -1220720
+          )
+        )
+      )
+      (net SR1_SHLD_T
+        (wire
+          (path F.Cu 2500
+            1379600 -852420
+            1395739 -836281
+            1395739 -709285
+            1455800 -649224
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1379600 -852420
+            1396204 -869024
+            1396204 -1051716
+            1379600 -1068320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1531343 -1056277
+            1519300 -1068320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1519300 -850140
+            1507171 -862269
+            1507171 -1009772
+            1531343 -1033944
+            1531343 -1056277
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1531343 -1056277
+            1646957 -1056277
+            1659000 -1068320
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1519300 -850140
+            1533486 -864326
+            1647094 -864326
+            1659000 -852420
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1379600 -1068320
+            1391506 -1080226
+            1507394 -1080226
+            1519300 -1068320
+          )
+        )
+      )
+      (net SR1_CLKINH_T
+        (wire
+          (path B.Cu 2500
+            1303400 -1169920
+            1315306 -1158014
+            1431194 -1158014
+            1443100 -1169920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1443100 -951740
+            1454971 -939869
+            1568649 -939869
+            1582800 -954020
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1443100 -951740
+            1425140 -933780
+            1425140 -730684
+            1455800 -700024
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1303400 -954020
+            1291765 -965655
+            1291765 -1158285
+            1303400 -1169920
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1303400 -954020
+            1315063 -942357
+            1433717 -942357
+            1443100 -951740
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1443100 -1169920
+            1455006 -1158014
+            1570894 -1158014
+            1582800 -1169920
+          )
+        )
+      )
+      (net SR1_CLK_T
+        (wire
+          (path B.Cu 2500
+            1443100 -1195320
+            1431427 -1183647
+            1315073 -1183647
+            1303400 -1195320
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1443100 -1195320
+            1455006 -1183414
+            1570894 -1183414
+            1582800 -1195320
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1443100 -977140
+            1454735 -965505
+            1454735 -946889
+            1446886 -939040
+            1439346 -939040
+            1429643 -929337
+            1429643 -776981
+            1455800 -750824
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1443100 -1195320
+            1431058 -1183278
+            1431058 -989182
+            1443100 -977140
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1582800 -979420
+            1568614 -965234
+            1455006 -965234
+            1443100 -977140
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1303400 -979420
+            1315185 -967635
+            1433595 -967635
+            1443100 -977140
+          )
+        )
+      )
+      (net 7SEG_CLK
+        (wire
+          (path B.Cu 2500
+            1709800 -1385820
+            1709800 -1373931
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1709800 -1373931
+            1706084 -1373931
+            1697911 -1365758
+            1697911 -1026961
+            1663070 -992120
+            1655229 -992120
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+            1458103 -813104
+            1399469 -754470
+            1399469 -669093
+            1379600 -649224
+          )
+        )
+      )
+      (net 7SEG_DIO
+        (wire
+          (path F.Cu 2500
+            1709800 -1360420
+            1697911 -1360420
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1697911 -1360420
+            1589695 -1252204
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+            1395123 -1189554
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+            1383520 -839720
+            1391235 -832005
+            1391235 -737059
+            1379600 -725424
+          )
+        )
+      )
+      (net SR6_QH_T
+        (wire
+          (path F.Cu 2500
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+            1738915 -1018331
+            1751687 -1005559
+            1751687 -790029
+            1726771 -765113
+            1721139 -765113
+            1615740 -659714
+            1615740 -656760
+            1582800 -623820
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1735200 -1030220
+            1735200 -1018331
+          )
+        )
+      )
+      (net SR5_QH_T
+        (wire
+          (path B.Cu 2500
+            1582800 -700020
+            1697911 -815131
+            1697911 -837004
+            1699816 -838909
+            1713669 -838909
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+            1747267 -923683
+            1747267 -984579
+            1738915 -992931
+            1735200 -992931
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1735200 -1004820
+            1735200 -992931
+          )
+        )
+      )
+      (net SR4_QH_T
+        (wire
+          (path F.Cu 2500
+            1735200 -979420
+            1735200 -967531
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1735200 -967531
+            1731484 -967531
+            1723311 -959358
+            1723311 -899698
+            1713770 -890157
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+            1674523 -859965
+            1674523 -851331
+            1662912 -839720
+            1655230 -839720
+            1596564 -781054
+            1596564 -764584
+            1582800 -750820
+          )
+        )
+      )
+      (net SR3_QH_T
+        (wire
+          (path B.Cu 2500
+            1735200 -942131
+            1731484 -942131
+            1723311 -933958
+            1723311 -925098
+            1714133 -915920
+            1705021 -915920
+            1688904 -899803
+            1688904 -839807
+            1613276 -764179
+            1545359 -764179
+            1506600 -725420
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1735200 -954020
+            1735200 -942131
+          )
+        )
+      )
+      (net +3V3
+        (wire
+          (path B.Cu 2500
+            1227200 -852420
+            1252600 -852420
+          )
+        )
+      )
+      (net SR2_QH
+        (wire
+          (path F.Cu 2500
+            1519300 -1119120
+            1497886 -1097706
+            1497886 -810382
+            1523054 -785214
+            1523054 -716474
+            1506600 -700020
+          )
+        )
+      )
+      (net SR3_QH
+        (wire
+          (path F.Cu 2500
+            1506600 -750820
+            1518550 -762770
+            1518550 -783349
+            1493382 -808517
+            1493382 -1110393
+            1514015 -1131026
+            1647094 -1131026
+            1659000 -1119120
+          )
+        )
+      )
+      (net SR4_QH
+        (wire
+          (path F.Cu 2500
+            1582800 -776220
+            1645236 -838656
+            1645236 -889456
+            1659000 -903220
+          )
+        )
+      )
+      (net SR5_QH
+        (wire
+          (path F.Cu 2500
+            1582800 -725420
+            1533064 -775156
+            1533064 -887176
+            1519300 -900940
+          )
+        )
+      )
+      (net SR6_QH
+        (wire
+          (path F.Cu 2500
+            1582800 -649220
+            1571160 -637580
+            1501561 -637580
+            1471105 -668036
+            1471105 -675849
+            1459630 -687324
+            1451897 -687324
+            1404382 -734839
+            1404382 -1094338
+            1379600 -1119120
+          )
+        )
+      )
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort13.dsn b/bbb-bort13.dsn
new file mode 100644 (file)
index 0000000..2ffcf5c
--- /dev/null
+++ b/bbb-bort13.dsn
@@ -0,0 +1,920 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort13.dsn"\r
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+      (outline (path signal 152.4  558.8 8178.8  -508 8178.8))\r
+      (outline (path signal 152.4  -508 10718.8  -508 9601.2))\r
+      (outline (path signal 152.4  -508 9601.2  558.8 9601.2))\r
+      (outline (path signal 152.4  558.8 9601.2  558.8 10718.8))\r
+      (outline (path signal 152.4  558.8 10718.8  -508 10718.8))\r
+      (outline (path signal 152.4  -508 13258.8  -508 12141.2))\r
+      (outline (path signal 152.4  -508 12141.2  558.8 12141.2))\r
+      (outline (path signal 152.4  558.8 12141.2  558.8 13258.8))\r
+      (outline (path signal 152.4  558.8 13258.8  -508 13258.8))\r
+      (outline (path signal 152.4  -508 15798.8  -508 14681.2))\r
+      (outline (path signal 152.4  -508 14681.2  558.8 14681.2))\r
+      (outline (path signal 152.4  558.8 14681.2  558.8 15798.8))\r
+      (outline (path signal 152.4  558.8 15798.8  -508 15798.8))\r
+      (outline (path signal 152.4  -508 18338.8  -508 17221.2))\r
+      (outline (path signal 152.4  -508 17221.2  558.8 17221.2))\r
+      (outline (path signal 152.4  558.8 17221.2  558.8 18338.8))\r
+      (outline (path signal 152.4  558.8 18338.8  -508 18338.8))\r
+      (outline (path signal 152.4  -7112 -965.2  -508 -965.2))\r
+      (outline (path signal 152.4  -508 -965.2  -508 18745.2))\r
+      (outline (path signal 152.4  -508 18745.2  -3505.2 18745.2))\r
+      (outline (path signal 152.4  -3505.2 18745.2  -4114.8 18745.2))\r
+      (outline (path signal 152.4  -4114.8 18745.2  -7112 18745.2))\r
+      (outline (path signal 152.4  -7112 18745.2  -7112 -965.2))\r
+      (pin Rect[A]Pad_1676.4x1676.4_um 1 -7620 17780)\r
+      (pin Round[A]Pad_1676.4_um 2 -7620 15240)\r
+      (pin Round[A]Pad_1676.4_um 3 -7620 12700)\r
+      (pin Round[A]Pad_1676.4_um 4 -7620 10160)\r
+      (pin Round[A]Pad_1676.4_um 5 -7620 7620)\r
+      (pin Round[A]Pad_1676.4_um 6 -7620 5080)\r
+      (pin Round[A]Pad_1676.4_um 7 -7620 2540)\r
+      (pin Round[A]Pad_1676.4_um 8 -7620 0)\r
+      (pin Round[A]Pad_1676.4_um 9 0 0)\r
+      (pin Round[A]Pad_1676.4_um 10 0 2540)\r
+      (pin Round[A]Pad_1676.4_um 11 0 5080)\r
+      (pin Round[A]Pad_1676.4_um 12 0 7620)\r
+      (pin Round[A]Pad_1676.4_um 13 0 10160)\r
+      (pin Round[A]Pad_1676.4_um 14 0 12700)\r
+      (pin Round[A]Pad_1676.4_um 15 0 15240)\r
+      (pin Round[A]Pad_1676.4_um 16 0 17780)\r
+    )\r
+    (image Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (outline (path signal 150  -1550 1550  -1550 0))\r
+      (outline (path signal 150  1270 -1270  -1270 -1270))\r
+      (outline (path signal 150  1270 1270  1270 -1270))\r
+      (outline (path signal 150  0 1550  -1550 1550))\r
+      (outline (path signal 150  3810 1270  1270 1270))\r
+      (outline (path signal 150  3810 -57150  -1270 -57150))\r
+      (outline (path signal 150  -1270 -57150  -1270 -1270))\r
+      (outline (path signal 150  3810 -57150  3810 1270))\r
+      (outline (path signal 50  -1750 -57650  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  4300 1750))\r
+      (outline (path signal 50  4300 1750  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  -1750 -57650))\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 46 2540 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 45 0 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 44 2540 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 43 0 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 42 2540 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 41 0 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 40 2540 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 39 0 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 38 2540 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 37 0 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 36 2540 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 35 0 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 34 2540 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 33 0 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 32 2540 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 31 0 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 30 2540 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 29 0 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 28 2540 -33020)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 27 0 -33020)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 26 2540 -30480)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 25 0 -30480)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 24 2540 -27940)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 23 0 -27940)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 22 2540 -25400)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 21 0 -25400)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 20 2540 -22860)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 19 0 -22860)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 18 2540 -20320)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 17 0 -20320)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 16 2540 -17780)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 15 0 -17780)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 14 2540 -15240)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 13 0 -15240)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 12 2540 -12700)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 11 0 -12700)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 10 2540 -10160)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 9 0 -10160)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 8 2540 -7620)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 7 0 -7620)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 6 2540 -5080)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 5 0 -5080)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 4 2540 -2540)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 3 0 -2540)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 2 2540 0)\r
+      (pin Rect[A]Pad_1727.2x1727.2_um 1 0 0)\r
+    )\r
+    (image "footprints:640456-8"\r
+      (outline (path signal 152.4  18161 -1905  18088.2 -2128.95  17897.7 -2267.35  17662.3 -2267.35\r
+            17471.8 -2128.95  17399 -1905  17471.8 -1681.05  17662.3 -1542.65\r
+            17897.7 -1542.65  18088.2 -1681.05  18161 -1905))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  19050 3302  -1270 3302))\r
+      (outline (path signal 152.4  19050 -2413  19050 3302))\r
+      (outline (path signal 152.4  -1270 -2413  19050 -2413))\r
+      (outline (path signal 152.4  -1270 3302  -1270 -2413))\r
+      (outline (path signal 152.4  19304 3556  -1524 3556))\r
+      (outline (path signal 152.4  19304 -2667  19304 3556))\r
+      (outline (path signal 152.4  -1524 -2667  19304 -2667))\r
+      (outline (path signal 152.4  -1524 3556  -1524 -2667))\r
+      (outline (path signal 152.4  -1270 3302  -1270 -2413))\r
+      (outline (path signal 152.4  19050 3302  -1270 3302))\r
+      (outline (path signal 152.4  19050 -2413  19050 3302))\r
+      (outline (path signal 152.4  -1270 -2413  19050 -2413))\r
+      (outline (path signal 152.4  -1397 3429  -1397 -2540))\r
+      (outline (path signal 152.4  19177 3429  -1397 3429))\r
+      (outline (path signal 152.4  19177 -2540  19177 3429))\r
+      (outline (path signal 152.4  -1397 -2540  19177 -2540))\r
+      (pin Round[A]Pad_1524_um 8 0 0)\r
+      (pin Round[A]Pad_1524_um 7 2540 0)\r
+      (pin Round[A]Pad_1524_um 6 5080 0)\r
+      (pin Round[A]Pad_1524_um 5 7620 0)\r
+      (pin Round[A]Pad_1524_um 4 10160 0)\r
+      (pin Round[A]Pad_1524_um 3 12700 0)\r
+      (pin Round[A]Pad_1524_um 2 15240 0)\r
+      (pin Round[A]Pad_1524_um 1 17780 0)\r
+    )\r
+    (image "footprints:640456-8::1"\r
+      (outline (path signal 152.4  -1397 -2540  19177 -2540))\r
+      (outline (path signal 152.4  19177 -2540  19177 3429))\r
+      (outline (path signal 152.4  19177 3429  -1397 3429))\r
+      (outline (path signal 152.4  -1397 3429  -1397 -2540))\r
+      (outline (path signal 152.4  -1270 -2413  19050 -2413))\r
+      (outline (path signal 152.4  19050 -2413  19050 3302))\r
+      (outline (path signal 152.4  19050 3302  -1270 3302))\r
+      (outline (path signal 152.4  -1270 3302  -1270 -2413))\r
+      (outline (path signal 152.4  -1524 3556  -1524 -2667))\r
+      (outline (path signal 152.4  -1524 -2667  19304 -2667))\r
+      (outline (path signal 152.4  19304 -2667  19304 3556))\r
+      (outline (path signal 152.4  19304 3556  -1524 3556))\r
+      (outline (path signal 152.4  -1270 3302  -1270 -2413))\r
+      (outline (path signal 152.4  -1270 -2413  19050 -2413))\r
+      (outline (path signal 152.4  19050 -2413  19050 3302))\r
+      (outline (path signal 152.4  19050 3302  -1270 3302))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  20193 0  20120.2 -223.946  19929.7 -362.353  19694.3 -362.353\r
+            19503.8 -223.946  19431 0  19503.8 223.946  19694.3 362.353\r
+            19929.7 362.353  20120.2 223.946  20193 0))\r
+      (outline (path signal 152.4  18161 -1905  18088.2 -2128.95  17897.7 -2267.35  17662.3 -2267.35\r
+            17471.8 -2128.95  17399 -1905  17471.8 -1681.05  17662.3 -1542.65\r
+            17897.7 -1542.65  18088.2 -1681.05  18161 -1905))\r
+      (pin Round[A]Pad_1524_um 1 17780 0)\r
+      (pin Round[A]Pad_1524_um 2 15240 0)\r
+      (pin Round[A]Pad_1524_um 3 12700 0)\r
+      (pin Round[A]Pad_1524_um 4 10160 0)\r
+      (pin Round[A]Pad_1524_um 5 7620 0)\r
+      (pin Round[A]Pad_1524_um 6 5080 0)\r
+      (pin Round[A]Pad_1524_um 7 2540 0)\r
+      (pin Round[A]Pad_1524_um 8 0 0)\r
+    )\r
+    (image "digikey-footprints:SIP-9_P2.54mm"\r
+      (outline (path signal 50  21820 -1500  -1490 -1500))\r
+      (outline (path signal 50  21820 1500  -1490 1500))\r
+      (outline (path signal 50  21820 1500  21820 -1500))\r
+      (outline (path signal 50  -1490 1500  -1490 -1500))\r
+      (outline (path signal 100  21700 -1400  21200 -1400))\r
+      (outline (path signal 100  21700 -1400  21700 -900))\r
+      (outline (path signal 100  21700 1400  21700 900))\r
+      (outline (path signal 100  21700 1400  21200 1400))\r
+      (outline (path signal 100  -900 1400  -1400 1400))\r
+      (outline (path signal 100  -1400 1400  -1400 -1400))\r
+      (outline (path signal 100  -1400 -1400  -900 -1400))\r
+      (outline (path signal 100  21570 1250  21570 -1250))\r
+      (outline (path signal 100  -1240 1250  -1240 -1250))\r
+      (outline (path signal 100  -1240 -1250  21570 -1250))\r
+      (outline (path signal 100  -1240 1250  21570 1250))\r
+      (pin Rect[A]Pad_1810x1810_um 1 0 0)\r
+      (pin Round[A]Pad_1810_um 2 2540 0)\r
+      (pin Round[A]Pad_1810_um 3 5080 0)\r
+      (pin Round[A]Pad_1810_um 4 7620 0)\r
+      (pin Round[A]Pad_1810_um 5 10160 0)\r
+      (pin Round[A]Pad_1810_um 6 12700 0)\r
+      (pin Round[A]Pad_1810_um 7 15240 0)\r
+      (pin Round[A]Pad_1810_um 8 17780 0)\r
+      (pin Round[A]Pad_1810_um 9 20320 0)\r
+    )\r
+    (image "digikey-footprints:SIP-9_P2.54mm::1"\r
+      (outline (path signal 100  -1240 1250  21570 1250))\r
+      (outline (path signal 100  -1240 -1250  21570 -1250))\r
+      (outline (path signal 100  -1240 1250  -1240 -1250))\r
+      (outline (path signal 100  21570 1250  21570 -1250))\r
+      (outline (path signal 100  -1400 -1400  -900 -1400))\r
+      (outline (path signal 100  -1400 1400  -1400 -1400))\r
+      (outline (path signal 100  -900 1400  -1400 1400))\r
+      (outline (path signal 100  21700 1400  21200 1400))\r
+      (outline (path signal 100  21700 1400  21700 900))\r
+      (outline (path signal 100  21700 -1400  21700 -900))\r
+      (outline (path signal 100  21700 -1400  21200 -1400))\r
+      (outline (path signal 50  -1490 1500  -1490 -1500))\r
+      (outline (path signal 50  21820 1500  21820 -1500))\r
+      (outline (path signal 50  21820 1500  -1490 1500))\r
+      (outline (path signal 50  21820 -1500  -1490 -1500))\r
+      (pin Round[A]Pad_1810_um 9 20320 0)\r
+      (pin Round[A]Pad_1810_um 8 17780 0)\r
+      (pin Round[A]Pad_1810_um 7 15240 0)\r
+      (pin Round[A]Pad_1810_um 6 12700 0)\r
+      (pin Round[A]Pad_1810_um 5 10160 0)\r
+      (pin Round[A]Pad_1810_um 4 7620 0)\r
+      (pin Round[A]Pad_1810_um 3 5080 0)\r
+      (pin Round[A]Pad_1810_um 2 2540 0)\r
+      (pin Rect[A]Pad_1810x1810_um 1 0 0)\r
+    )\r
+    (padstack Round[A]Pad_1524_um\r
+      (shape (circle F.Cu 1524))\r
+      (shape (circle B.Cu 1524))\r
+      (attach off)\r
+    )\r
+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Round[A]Pad_1810_um\r
+      (shape (circle F.Cu 1810))\r
+      (shape (circle B.Cu 1810))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1810x1810_um\r
+      (shape (rect F.Cu -905 -905 905 905))\r
+      (shape (rect B.Cu -905 -905 905 905))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-1]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
+    (net SR1_CLR\r
+      (pins U2-9 P8-17)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins U2-7 P8-15)\r
+    )\r
+    (net SR1_CLK\r
+      (pins U2-3 P8-11)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins U2-5 P8-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins U1-2 P8-4)\r
+    )\r
+    (net PGND\r
+      (pins U8-8 U8-1 U7-1 U7-8 U6-8 U6-1 U5-1 U5-8 U4-8 U4-1 U3-1 U3-8 U2-13 U2-8\r
+        U1-8 U1-13 P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 RN1-1 RN2-1 RN3-1 RN4-1\r
+        RN5-1 RN6-1)\r
+    )\r
+    (net 5v\r
+      (pins U8-16 U7-16 U6-16 U5-16 U4-16 U3-16 U2-16 U1-1 P9-8 P9-7 P9-6 P9-5)\r
+    )\r
+    (net BB3.3\r
+      (pins U2-1 U1-16)\r
+    )\r
+    (net SR1_QH\r
+      (pins U3-13 U1-3)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U8-9 U7-9 U6-9 U5-9 U4-9 U3-9 U2-10)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U8-15 U7-15 U6-15 U5-15 U4-15 U3-15 U2-6)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U8-6 U7-6 U6-6 U5-6 U4-6 U3-6 U2-4)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U8-7 U7-7 U6-7 U5-7 U4-7 U3-7 U2-2)\r
+    )\r
+    (net 7SEG_CLK\r
+      (pins U2-11 P8-45)\r
+    )\r
+    (net 7SEG_DIO\r
+      (pins U2-14 P8-43)\r
+    )\r
+    (net SR6_QH_T\r
+      (pins U1-15 P8-18)\r
+    )\r
+    (net SR5_QH_T\r
+      (pins U1-12 P8-16)\r
+    )\r
+    (net SR4_QH_T\r
+      (pins U1-10 P8-14)\r
+    )\r
+    (net SR3_QH_T\r
+      (pins U1-6 P8-12)\r
+    )\r
+    (net +3V3\r
+      (pins P9-4 P9-3)\r
+    )\r
+    (net SR2_QH\r
+      (pins U7-13 U1-5)\r
+    )\r
+    (net SR3_QH\r
+      (pins U8-13 U1-7)\r
+    )\r
+    (net SR4_QH\r
+      (pins U6-13 U1-9)\r
+    )\r
+    (net SR5_QH\r
+      (pins U5-13 U1-11)\r
+    )\r
+    (net SR6_QH\r
+      (pins U4-13 U1-14)\r
+    )\r
+    (net e8r\r
+      (pins U3-2 J5-1 RN4-9)\r
+    )\r
+    (net e7r\r
+      (pins U3-3 J5-2 RN4-8)\r
+    )\r
+    (net e6r\r
+      (pins U3-4 J5-3 RN4-7)\r
+    )\r
+    (net e5r\r
+      (pins U3-5 J5-4 RN4-6)\r
+    )\r
+    (net e4r\r
+      (pins U3-10 J5-5 RN4-5)\r
+    )\r
+    (net e3r\r
+      (pins U3-11 J5-6 RN4-4)\r
+    )\r
+    (net e2r\r
+      (pins U3-12 J5-7 RN4-3)\r
+    )\r
+    (net e1r\r
+      (pins U3-14 J5-8 RN4-2)\r
+    )\r
+    (net a1r\r
+      (pins U4-14 J1-8 RN1-2)\r
+    )\r
+    (net a2r\r
+      (pins U4-12 J1-7 RN1-3)\r
+    )\r
+    (net a3r\r
+      (pins U4-11 J1-6 RN1-4)\r
+    )\r
+    (net a4r\r
+      (pins U4-10 J1-5 RN1-5)\r
+    )\r
+    (net a5r\r
+      (pins U4-5 J1-4 RN1-6)\r
+    )\r
+    (net a6r\r
+      (pins U4-4 J1-3 RN1-7)\r
+    )\r
+    (net a7r\r
+      (pins U4-3 J1-2 RN1-8)\r
+    )\r
+    (net a8r\r
+      (pins U4-2 J1-1 RN1-9)\r
+    )\r
+    (net b8r\r
+      (pins U5-2 J2-1 RN3-9)\r
+    )\r
+    (net b7r\r
+      (pins U5-3 J2-2 RN3-8)\r
+    )\r
+    (net b6r\r
+      (pins U5-4 J2-3 RN3-7)\r
+    )\r
+    (net b5r\r
+      (pins U5-5 J2-4 RN3-6)\r
+    )\r
+    (net b4r\r
+      (pins U5-10 J2-5 RN3-5)\r
+    )\r
+    (net b3r\r
+      (pins U5-11 J2-6 RN3-4)\r
+    )\r
+    (net b2r\r
+      (pins U5-12 J2-7 RN3-3)\r
+    )\r
+    (net b1r\r
+      (pins U5-14 J2-8 RN3-2)\r
+    )\r
+    (net c1r\r
+      (pins U6-14 J3-8 RN5-2)\r
+    )\r
+    (net c2r\r
+      (pins U6-12 J3-7 RN5-3)\r
+    )\r
+    (net c3r\r
+      (pins U6-11 J3-6 RN5-4)\r
+    )\r
+    (net c4r\r
+      (pins U6-10 J3-5 RN5-5)\r
+    )\r
+    (net c5r\r
+      (pins U6-5 J3-4 RN5-6)\r
+    )\r
+    (net c6r\r
+      (pins U6-4 J3-3 RN5-7)\r
+    )\r
+    (net c7r\r
+      (pins U6-3 J3-2 RN5-8)\r
+    )\r
+    (net c8r\r
+      (pins U6-2 J3-1 RN5-9)\r
+    )\r
+    (net d8r\r
+      (pins U7-2 J4-1 RN2-9)\r
+    )\r
+    (net d7r\r
+      (pins U7-3 J4-2 RN2-8)\r
+    )\r
+    (net d6r\r
+      (pins U7-4 J4-3 RN2-7)\r
+    )\r
+    (net d5r\r
+      (pins U7-5 J4-4 RN2-6)\r
+    )\r
+    (net d4r\r
+      (pins U7-10 J4-5 RN2-5)\r
+    )\r
+    (net d3r\r
+      (pins U7-11 J4-6 RN2-4)\r
+    )\r
+    (net d2r\r
+      (pins U7-12 J4-7 RN2-3)\r
+    )\r
+    (net d1r\r
+      (pins U7-14 J4-8 RN2-2)\r
+    )\r
+    (net f1r\r
+      (pins U8-14 J6-8 RN6-2)\r
+    )\r
+    (net f2r\r
+      (pins U8-12 J6-7 RN6-3)\r
+    )\r
+    (net f3r\r
+      (pins U8-11 J6-6 RN6-4)\r
+    )\r
+    (net f4r\r
+      (pins U8-10 J6-5 RN6-5)\r
+    )\r
+    (net f5r\r
+      (pins U8-5 J6-4 RN6-6)\r
+    )\r
+    (net f6r\r
+      (pins U8-4 J6-3 RN6-7)\r
+    )\r
+    (net f7r\r
+      (pins U8-3 J6-2 RN6-8)\r
+    )\r
+    (net f8r\r
+      (pins U8-2 J6-1 RN6-9)\r
+    )\r
+    (class kicad_default "" +3V3 /a1 /a2 /a3 /a4 /a5 /a6 /a7 /a8 /b1 /b2 /b3\r
+      /b4 /b5 /b6 /b7 /b8 /c1 /c2 /c3 /c4 /c5 /c6 /c7 /c8 /d1 /d2 /d3 /d4\r
+      /d5 /d6 /d7 /d8 /e1 /e2 /e3 /e4 /e5 /e6 /e7 /e8 /f1 /f2 /f3 /f4 /f5\r
+      /f6 /f7 /f8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3 GNDA_ADC\r
+      "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"\r
+      "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)"\r
+      "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"\r
+      "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)"\r
+      "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"\r
+      "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)"\r
+      "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)"\r
+      "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)"\r
+      "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)"\r
+      "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)"\r
+      "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)"\r
+      "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)"\r
+      "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)"\r
+      "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)"\r
+      "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)"\r
+      "Net-(R1-Pad2)" "Net-(R10-Pad2)" "Net-(R11-Pad2)" "Net-(R12-Pad2)" "Net-(R13-Pad2)"\r
+      "Net-(R14-Pad2)" "Net-(R15-Pad2)" "Net-(R16-Pad2)" "Net-(R17-Pad2)"\r
+      "Net-(R18-Pad2)" "Net-(R19-Pad2)" "Net-(R2-Pad2)" "Net-(R20-Pad2)" "Net-(R21-Pad2)"\r
+      "Net-(R22-Pad2)" "Net-(R23-Pad2)" "Net-(R24-Pad2)" "Net-(R25-Pad2)"\r
+      "Net-(R26-Pad2)" "Net-(R27-Pad2)" "Net-(R28-Pad2)" "Net-(R29-Pad2)"\r
+      "Net-(R3-Pad2)" "Net-(R30-Pad2)" "Net-(R31-Pad2)" "Net-(R32-Pad2)" "Net-(R33-Pad2)"\r
+      "Net-(R34-Pad2)" "Net-(R35-Pad2)" "Net-(R36-Pad2)" "Net-(R37-Pad2)"\r
+      "Net-(R38-Pad2)" "Net-(R39-Pad2)" "Net-(R4-Pad2)" "Net-(R40-Pad2)" "Net-(R41-Pad2)"\r
+      "Net-(R42-Pad2)" "Net-(R43-Pad2)" "Net-(R44-Pad2)" "Net-(R45-Pad2)"\r
+      "Net-(R46-Pad2)" "Net-(R47-Pad2)" "Net-(R48-Pad2)" "Net-(R5-Pad2)" "Net-(R6-Pad2)"\r
+      "Net-(R7-Pad2)" "Net-(R8-Pad2)" "Net-(R9-Pad2)" "Net-(RN1-Pad1)" "Net-(RN1-Pad2)"\r
+      "Net-(RN1-Pad3)" "Net-(RN1-Pad4)" "Net-(RN1-Pad5)" "Net-(RN1-Pad6)"\r
+      "Net-(RN1-Pad7)" "Net-(RN1-Pad8)" "Net-(RN1-Pad9)" "Net-(RN2-Pad1)"\r
+      "Net-(RN2-Pad2)" "Net-(RN2-Pad3)" "Net-(RN2-Pad4)" "Net-(RN2-Pad5)"\r
+      "Net-(RN2-Pad6)" "Net-(RN2-Pad7)" "Net-(RN2-Pad8)" "Net-(RN2-Pad9)"\r
+      "Net-(RN3-Pad2)" "Net-(RN3-Pad3)" "Net-(RN3-Pad4)" "Net-(RN3-Pad5)"\r
+      "Net-(RN3-Pad6)" "Net-(RN3-Pad7)" "Net-(RN3-Pad8)" "Net-(RN3-Pad9)"\r
+      "Net-(RN4-Pad1)" "Net-(RN4-Pad2)" "Net-(RN4-Pad3)" "Net-(RN4-Pad4)"\r
+      "Net-(RN4-Pad5)" "Net-(RN4-Pad6)" "Net-(RN4-Pad7)" "Net-(RN4-Pad8)"\r
+      "Net-(RN4-Pad9)" "Net-(RN5-Pad1)" "Net-(RN5-Pad2)" "Net-(RN5-Pad3)"\r
+      "Net-(RN5-Pad4)" "Net-(RN5-Pad5)" "Net-(RN5-Pad6)" "Net-(RN5-Pad7)"\r
+      "Net-(RN5-Pad8)" "Net-(RN5-Pad9)" "Net-(RN6-Pad1)" "Net-(RN6-Pad2)"\r
+      "Net-(RN6-Pad3)" "Net-(RN6-Pad4)" "Net-(RN6-Pad5)" "Net-(RN6-Pad6)"\r
+      "Net-(RN6-Pad7)" "Net-(RN6-Pad8)" "Net-(RN6-Pad9)" PGND PWR_BUT SR1_CLK\r
+      SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T\r
+      SR1_SHLD SR1_SHLD_T SR2_QH SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH\r
+      SR4_QH_T SR5_QH SR5_QH_T SR6_QH SR6_QH_T SYS_RESETN VDD_ADC a1r a2r\r
+      a3r a4r a5r a6r a7r a8r b1r b2r b3r b4r b5r b6r b7r b8r c1r c2r c3r\r
+      c4r c5r c6r c7r c8r d1r d2r d3r d4r d5r d6r d7r d8r e1r e2r e3r e4r\r
+      e5r e6r e7r e8r f1r f2r f3r f4r f5r f6r f7r f8r\r
+      (circuit\r
+        (use_via Via[0-1]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+    (wire (path B.Cu 250  137960 -59842.4  141770 -63652.5  141770 -76615.2  147219 -82064.3\r
+            147219 -84510.8  151532 -88824  153611 -88824  156379 -91592\r
+            160365 -91592  165445 -96672  166360 -96672  169791 -100103\r
+            169791 -101016  170608 -101833  170980 -101833)(net SR1_CLR)(type protect))\r
+    (wire (path B.Cu 250  170980 -103022  170980 -101833)(net SR1_CLR)(type protect))\r
+    (wire (path F.Cu 250  170980 -100482  172169 -100482  172169 -100110  172986 -99293.1\r
+            173860 -99293.1  174716 -98436.5  174716 -82211.4  161124 -68618.9\r
+            161124 -66097.2  158678 -63652  157889 -63652  152876 -58639.4\r
+            149323 -58639.4  145580 -62382.4)(net SR1_SHLD)(type protect))\r
+    (wire (path B.Cu 250  170980 -95402  169791 -95402  168602 -94213.1  165547 -94213.1\r
+            160386 -89052  155331 -89052  152563 -86284  151536 -86284  148120 -82867.4\r
+            148120 -75082.3  145580 -72542.4)(net SR1_CLK)(type protect))\r
+    (wire (path B.Cu 250  145580 -67462.4  149390 -71272  152766 -71272  155306 -73812\r
+            159368 -73812  169341 -83785  169341 -85325.5  170608 -86593.1\r
+            170980 -86593.1)(net SR1_CLKINH)(type protect))\r
+    (wire (path B.Cu 250  170980 -87782  170980 -86593.1)(net SR1_CLKINH)(type protect))\r
+    (wire (path B.Cu 250  150660 -62382  157010 -68732  161272 -68732  174710 -82170.1\r
+            174710 -83234.6  173892 -84053.1  173520 -84053.1)(net SR1_QH_T)(type protect))\r
+    (wire (path B.Cu 250  173520 -85242  173520 -84053.1)(net SR1_QH_T)(type protect))\r
+    (wire (path B.Cu 250  125260 -82702  122720 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  130340 -82702  125260 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  158280 -82702  157116 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  150660 -77622  152036 -77622  157116 -82702)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  130340 -82702  130340 -83865.5  130631 -83865.5  131544 -84778.9\r
+            131544 -99277.7  130340 -100482)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  145641 -82641.2  145474 -82474  145361 -82474)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  144310 -100254  145924 -98640.2  145924 -82924.3  145641 -82641.2\r
+            150660 -77622)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  170980 -82702  169791 -82702)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  159472 -73013.8  159472 -68654.2  158280 -67462)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  158280 -81538.5  157075 -80333.8  157075 -74641.2  157904 -73812\r
+            158674 -73812  159472 -73013.8)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  169791 -82702  160103 -73013.8  159472 -73013.8)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  158280 -82702  158280 -81538.5)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  158280 -104292  157116 -104292)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  155964 -102798  157116 -103951  157116 -104292)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  155964 -102798  158280 -100482)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  146854 -102798  155964 -102798)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  145474 -104292  146854 -102911  146854 -102798  144310 -100254)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  144310 -82474  145361 -82474)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  145514 -120868  144310 -122072)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  144310 -105456  144601 -105456  145514 -106369  145514 -120868\r
+            157076 -120868  158280 -122072)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  144310 -81310.5  144310 -80919.4  139515 -76124.1  139124 -76124.1)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  130340 -82702  131504 -82702  131504 -82411.1  137562 -76352.4\r
+            138895 -76352.4  139124 -76124.1)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  137960 -70002.4  139124 -71166  139124 -76124.1)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  144310 -82474  144310 -81310.5)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  125260 -136042  123909 -136042)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  125260 -138582  125260 -136042)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  122720 -136042  123909 -136042)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  125260 -138582  123909 -138582)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  122720 -138582  123909 -138582)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  173520 -82702  172331 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  170980 -82107.5  171737 -82107.5  172331 -82702)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  170980 -82702  170980 -82107.5)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  144310 -122072  143106 -123276  131544 -123276  130340 -122072)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  131544 -123276  131544 -128948  125640 -134853  125260 -134853)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  125260 -136042  125260 -134853)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  144310 -104292  144310 -105456)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  145580 -59842.4  139336 -66086  139336 -68626  137960 -70002.4)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  147050 -56823.2  145580 -58293.2  145580 -59842.4)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  144310 -104292  145474 -104292)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  130340 -100482  130340 -104292)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  147050 -55592.9  147050 -56823.2)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  122720 -87782  124071 -87782)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  125260 -87782  124071 -87782)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  122720 -87782  122720 -89133.1)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  122720 -90322  122720 -89133.1)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  151930 -104292  153094 -105456  164736 -105456  165900 -104292)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  151930 -104292  150766 -105456  139124 -105456  137960 -104292)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  125260 -91510.9  125632 -91510.9  126449 -92328.2  126449 -95699.4\r
+            129962 -99212  132880 -99212  137960 -104292)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  150660 -59842  149496 -59842)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  137960 -77622.4  136760 -76421.9  136760 -72066.5  137554 -71272.4\r
+            138336 -71272.4  143580 -66027.6  143580 -65237.2  145165 -63652.4\r
+            145977 -63652.4  149496 -60132.9  149496 -59842)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  137960 -82702  137960 -77622.4)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  151930 -82474  153322 -83865.6  164736 -83865.6  165900 -82702)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  151930 -104292  150267 -102629  150267 -84137.3  151930 -82474)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  125260 -90322  123909 -90322)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  122720 -90322  123909 -90322)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  125260 -90322  125260 -91510.9)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  125260 -87782  126449 -87782  127638 -86593.1  134069 -86593.1\r
+            137960 -82702)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  145580 -77622.4  145580 -76458.9)(net BB3.3)(type protect))\r
+    (wire (path B.Cu 250  158280 -59842  157116 -61005.6  150319 -61005.6  148014 -63311.1\r
+            148014 -64137.9  145959 -66192.4  145188 -66192.4  144416 -66963.7\r
+            144416 -75586.4  145289 -76458.9  145580 -76458.9)(net BB3.3)(type protect))\r
+    (wire (path B.Cu 250  143609 -81102.9  143526 -81102.9  139336 -85292.8  139336 -88945.6\r
+            137960 -90322)(net SR1_QH)(type protect))\r
+    (wire (path F.Cu 250  150660 -64922  149496 -66085.6  149496 -75915.9  144309 -81102.9\r
+            143609 -81102.9)(net SR1_QH)(type protect))\r
+    (wire (path B.Cu 250  165900 -122072  164729 -120901  153101 -120901  151930 -122072)(net SR1_CLR_T)(type protect))\r
+    (wire (path B.Cu 250  165900 -100482  167104 -101686  167104 -120868  165900 -122072)(net SR1_CLR_T)(type protect))\r
+    (wire (path F.Cu 250  137960 -100482  136309 -98831.2  136309 -64033.2  137960 -62382.4)(net SR1_CLR_T)(type protect))\r
+    (wire (path F.Cu 250  165900 -100482  164695 -99277.1  152907 -99277.1  151930 -100254)(net SR1_CLR_T)(type protect))\r
+    (wire (path B.Cu 250  137960 -100482  139379 -99063.4  150739 -99063.4  151930 -100254)(net SR1_CLR_T)(type protect))\r
+    (wire (path B.Cu 250  137960 -122072  139151 -120881  150739 -120881  151930 -122072)(net SR1_CLR_T)(type protect))\r
+    (wire (path F.Cu 250  137960 -85242  139574 -83628.1  139574 -70928.5  145580 -64922.4)(net SR1_SHLD_T)(type protect))\r
+    (wire (path F.Cu 250  137960 -85242  139620 -86902.4  139620 -105172  137960 -106832)(net SR1_SHLD_T)(type protect))\r
+    (wire (path F.Cu 250  153134 -105628  151930 -106832)(net SR1_SHLD_T)(type protect))\r
+    (wire (path F.Cu 250  151930 -85014  150717 -86226.9  150717 -100977  153134 -103394\r
+            153134 -105628  164696 -105628  165900 -106832)(net SR1_SHLD_T)(type protect))\r
+    (wire (path B.Cu 250  151930 -85014  153349 -86432.6  164709 -86432.6  165900 -85242)(net SR1_SHLD_T)(type protect))\r
+    (wire (path B.Cu 250  137960 -106832  139151 -108023  150739 -108023  151930 -106832)(net SR1_SHLD_T)(type protect))\r
+    (wire (path B.Cu 250  130340 -116992  131531 -115801  143119 -115801  144310 -116992)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path B.Cu 250  144310 -95174  145497 -93986.9  156865 -93986.9  158280 -95402)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path F.Cu 250  144310 -95174  142514 -93378  142514 -73068.4  145580 -70002.4)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path F.Cu 250  130340 -95402  129176 -96565.5  129176 -115828  130340 -116992)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path B.Cu 250  130340 -95402  131506 -94235.7  143372 -94235.7  144310 -95174)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path B.Cu 250  144310 -116992  145501 -115801  157089 -115801  158280 -116992)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path B.Cu 250  144310 -119532  143143 -118365  131507 -118365  130340 -119532)(net SR1_CLK_T)(type protect))\r
+    (wire (path B.Cu 250  144310 -119532  145501 -118341  157089 -118341  158280 -119532)(net SR1_CLK_T)(type protect))\r
+    (wire (path F.Cu 250  144310 -97714  145474 -96550.5  145474 -94688.9  144689 -93904\r
+            143935 -93904  142964 -92933.7  142964 -77698.1  145580 -75082.4)(net SR1_CLK_T)(type protect))\r
+    (wire (path F.Cu 250  144310 -119532  143106 -118328  143106 -98918.2  144310 -97714)(net SR1_CLK_T)(type protect))\r
+    (wire (path B.Cu 250  158280 -97942  156861 -96523.4  145501 -96523.4  144310 -97714)(net SR1_CLK_T)(type protect))\r
+    (wire (path B.Cu 250  130340 -97942  131518 -96763.5  143360 -96763.5  144310 -97714)(net SR1_CLK_T)(type protect))\r
+    (wire (path B.Cu 250  170980 -138582  170980 -137393  170608 -137393  169791 -136576\r
+            169791 -102696  166307 -99212  165523 -99212  160443 -94132\r
+            157904 -94132  155136 -91364  151532 -91364  145810 -85642.3\r
+            145810 -81310.4  139947 -75447  139947 -66909.3  137960 -64922.4)(net 7SEG_CLK)(type protect))\r
+    (wire (path F.Cu 250  170980 -136042  169791 -136042  158970 -125220  145777 -125220\r
+            139512 -118955  139512 -114343  138351 -113182  137574 -113182\r
+            136773 -112381  136773 -103764  139170 -101367  139170 -92403\r
+            138359 -91592  137578 -91592  136760 -90774.1  136760 -84778.2\r
+            137566 -83972  138352 -83972  139124 -83200.5  139124 -73705.9\r
+            137960 -72542.4)(net 7SEG_DIO)(type protect))\r
+    (wire (path F.Cu 250  173520 -101833  173892 -101833  175169 -100556  175169 -79002.9\r
+            172677 -76511.3  172114 -76511.3  161574 -65971.4  161574 -65676\r
+            158280 -62382)(net SR6_QH_T)(type protect))\r
+    (wire (path F.Cu 250  173520 -103022  173520 -101833)(net SR6_QH_T)(type protect))\r
+    (wire (path B.Cu 250  158280 -70002  169791 -81513.1  169791 -83700.4  169982 -83890.9\r
+            171367 -83890.9  172250 -84774  172250 -90789.6  173029 -91569\r
+            173927 -91569  174727 -92368.3  174727 -98457.9  173892 -99293.1\r
+            173520 -99293.1)(net SR5_QH_T)(type protect))\r
+    (wire (path B.Cu 250  173520 -100482  173520 -99293.1)(net SR5_QH_T)(type protect))\r
+    (wire (path F.Cu 250  173520 -97942  173520 -96753.1  173148 -96753.1  172331 -95935.8\r
+            172331 -89969.8  171377 -89015.7  170472 -89015.7  167452 -85996.5\r
+            167452 -85133.1  166291 -83972  165523 -83972  159656 -78105.4\r
+            159656 -76458.4  158280 -75082)(net SR4_QH_T)(type protect))\r
+    (wire (path B.Cu 250  173520 -94213.1  173148 -94213.1  172331 -93395.8  172331 -92509.8\r
+            171413 -91592  170502 -91592  168890 -89980.3  168890 -83980.7\r
+            161328 -76417.9  154536 -76417.9  150660 -72542)(net SR3_QH_T)(type protect))\r
+    (wire (path B.Cu 250  173520 -95402  173520 -94213.1)(net SR3_QH_T)(type protect))\r
+    (wire (path B.Cu 250  122720 -85242  125260 -85242)(net +3V3)(type protect))\r
+    (wire (path F.Cu 250  151930 -111912  149789 -109771  149789 -81038.2  152305 -78521.4\r
+            152305 -71647.4  150660 -70002)(net SR2_QH)(type protect))\r
+    (wire (path F.Cu 250  150660 -75082  151855 -76277  151855 -78334.9  149338 -80851.7\r
+            149338 -111039  151402 -113103  164709 -113103  165900 -111912)(net SR3_QH)(type protect))\r
+    (wire (path F.Cu 250  158280 -77622  164524 -83865.6  164524 -88945.6  165900 -90322)(net SR4_QH)(type protect))\r
+    (wire (path F.Cu 250  158280 -72542  153306 -77515.6  153306 -88717.6  151930 -90094)(net SR5_QH)(type protect))\r
+    (wire (path F.Cu 250  158280 -64922  157116 -63758  150156 -63758  147110 -66803.6\r
+            147110 -67584.9  145963 -68732.4  145190 -68732.4  140438 -73483.9\r
+            140438 -109434  137960 -111912)(net SR6_QH)(type protect))\r
+    (via "Via[0-1]_600:400_um"  143609 -81102.9 (net SR1_QH)(type protect))\r
+  )\r
+)\r

diff --git a/bbb-bort2.dsn b/bbb-bort2.dsn
new file mode 100644 (file)
index 0000000..9c2c2d5
--- /dev/null
+++ b/bbb-bort2.dsn
@@ -0,0 +1,714 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort2.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
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+        (index 0)\r
+      )\r
+    )\r
+    (layer In1.Cu\r
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+      )\r
+    )\r
+    (layer In2.Cu\r
+      (type signal)\r
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+      )\r
+    )\r
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+            120815 -42697.4  135420 -42697.4  135420 -64287.4)\r
+    )\r
+    (via "Via[0-3]_600:400_um")\r
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+      (width 250)\r
+      (clearance 200.1)\r
+      (clearance 200.1 (type default_smd))\r
+      (clearance 50 (type smd_smd))\r
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+      (pin Round[A]Pad_1676.4_um 16 0 17780)\r
+      (pin Round[A]Pad_1676.4_um 15 0 15240)\r
+      (pin Round[A]Pad_1676.4_um 14 0 12700)\r
+      (pin Round[A]Pad_1676.4_um 13 0 10160)\r
+      (pin Round[A]Pad_1676.4_um 12 0 7620)\r
+      (pin Round[A]Pad_1676.4_um 11 0 5080)\r
+      (pin Round[A]Pad_1676.4_um 10 0 2540)\r
+      (pin Round[A]Pad_1676.4_um 9 0 0)\r
+      (pin Round[A]Pad_1676.4_um 8 -7620 0)\r
+      (pin Round[A]Pad_1676.4_um 7 -7620 2540)\r
+      (pin Round[A]Pad_1676.4_um 6 -7620 5080)\r
+      (pin Round[A]Pad_1676.4_um 5 -7620 7620)\r
+      (pin Round[A]Pad_1676.4_um 4 -7620 10160)\r
+      (pin Round[A]Pad_1676.4_um 3 -7620 12700)\r
+      (pin Round[A]Pad_1676.4_um 2 -7620 15240)\r
+      (pin Rect[A]Pad_1676.4x1676.4_um 1 -7620 17780)\r
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+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle In1.Cu 1676.4))\r
+      (shape (circle In2.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path In1.Cu 1727.2  0 0  0 0))\r
+      (shape (path In2.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
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+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
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+      (shape (rect In2.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-3]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle In1.Cu 600))\r
+      (shape (circle In2.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
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+      (pins P8-3)\r
+    )\r
+    (net "Net-(P8-Pad6)"\r
+      (pins P8-6)\r
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+    (net "Net-(P8-Pad7)"\r
+      (pins P8-7)\r
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+    (net "Net-(P8-Pad8)"\r
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+    (net "Net-(P8-Pad9)"\r
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+    (net "Net-(P8-Pad13)"\r
+      (pins P8-13)\r
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+    (net "Net-(P8-Pad14)"\r
+      (pins P8-14)\r
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+    (net "Net-(P8-Pad16)"\r
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+    (net "Net-(P8-Pad18)"\r
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+    (net "Net-(P8-Pad20)"\r
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+    (net "Net-(P8-Pad21)"\r
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+    (net "Net-(P8-Pad23)"\r
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+    (net "Net-(P8-Pad24)"\r
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+    (net "Net-(P8-Pad25)"\r
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+    (net "Net-(P8-Pad26)"\r
+      (pins P8-26)\r
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+    (net "Net-(P8-Pad27)"\r
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+    (net "Net-(P8-Pad28)"\r
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+    (net "Net-(P8-Pad31)"\r
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+    (net "Net-(P8-Pad32)"\r
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+    (net "Net-(P8-Pad33)"\r
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+    (net "Net-(P8-Pad34)"\r
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+    (net "Net-(P8-Pad37)"\r
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+    (net "Net-(P8-Pad38)"\r
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+    (net "Net-(P8-Pad41)"\r
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+    (net "Net-(P8-Pad43)"\r
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+    (net "Net-(P8-Pad44)"\r
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+    (net "Net-(P8-Pad46)"\r
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+    (net "Net-(P9-Pad11)"\r
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+    )\r
+    (net "Net-(P9-Pad12)"\r
+      (pins P9-12)\r
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+      (pins P9-13)\r
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+    (net "Net-(P9-Pad14)"\r
+      (pins P9-14)\r
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+    (net "Net-(P9-Pad17)"\r
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+    (net "Net-(P9-Pad20)"\r
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+      (pins P9-21)\r
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+    (net "Net-(P9-Pad22)"\r
+      (pins P9-22)\r
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+    (net "Net-(P9-Pad23)"\r
+      (pins P9-23)\r
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+    (net "Net-(P9-Pad24)"\r
+      (pins P9-24)\r
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+    (net "Net-(P9-Pad25)"\r
+      (pins P9-25)\r
+    )\r
+    (net "Net-(P9-Pad26)"\r
+      (pins P9-26)\r
+    )\r
+    (net "Net-(P9-Pad27)"\r
+      (pins P9-27)\r
+    )\r
+    (net "Net-(P9-Pad28)"\r
+      (pins P9-28)\r
+    )\r
+    (net "Net-(P9-Pad29)"\r
+      (pins P9-29)\r
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+    (net "Net-(P9-Pad30)"\r
+      (pins P9-30)\r
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+    (net "Net-(P9-Pad31)"\r
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+      (pins P9-33)\r
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+    (net "Net-(P9-Pad35)"\r
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+      (pins P9-36)\r
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+      (pins P9-38)\r
+    )\r
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+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net GNDD\r
+      (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-13 U1-8 U2-13 U2-8 U3-8\r
+        U3-1)\r
+    )\r
+    (net +3V3\r
+      (pins P9-4 P9-3 U1-16 U2-1)\r
+    )\r
+    (net +5V\r
+      (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net /GPIO1_7_SR_QH\r
+      (pins P8-4 U1-2)\r
+    )\r
+    (net /GPIO1_2_SR_CLKINH\r
+      (pins P8-5 U2-5)\r
+    )\r
+    (net /GPIO1_13_SR_CLK\r
+      (pins P8-11 U2-3)\r
+    )\r
+    (net /GPIO1_15_SR_SHLD\r
+      (pins P8-15 U2-7)\r
+    )\r
+    (net /GPIO0_27_SR_CLR\r
+      (pins P8-17 U2-9)\r
+    )\r
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+      (pins U1-3 U3-13)\r
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+      (pins U1-4)\r
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+      (pins U1-5)\r
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+      (pins U1-6)\r
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+      (pins U1-7)\r
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+      (pins U2-11)\r
+    )\r
+    (net "Net-(U2-Pad10)"\r
+      (pins U2-10 U3-9)\r
+    )\r
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+      (pins U2-6 U3-15)\r
+    )\r
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+      (pins U2-4 U3-6)\r
+    )\r
+    (net "Net-(U2-Pad2)"\r
+      (pins U2-2 U3-7)\r
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+    (net "Net-(U3-Pad2)"\r
+      (pins U3-2)\r
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+    (net "Net-(U3-Pad3)"\r
+      (pins U3-3)\r
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+    (net "Net-(U3-Pad4)"\r
+      (pins U3-4)\r
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+    (net "Net-(U3-Pad5)"\r
+      (pins U3-5)\r
+    )\r
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+    )\r
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+      (pins U3-12)\r
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+      /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH GNDA_ADC GNDD "Net-(P8-Pad10)" "Net-(P8-Pad11)"\r
+      "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad15)"\r
+      "Net-(P8-Pad16)" "Net-(P8-Pad17)" "Net-(P8-Pad18)" "Net-(P8-Pad19)"\r
+      "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)"\r
+      "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)"\r
+      "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)"\r
+      "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)"\r
+      "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)"\r
+      "Net-(P8-Pad4)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)"\r
+      "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad5)" "Net-(P8-Pad6)"\r
+      "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)"\r
+      "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)"\r
+      "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)" "Net-(P9-Pad20)"\r
+      "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)"\r
+      "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)" "Net-(P9-Pad28)"\r
+      "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)"\r
+      "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)" "Net-(P9-Pad38)"\r
+      "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)"\r
+      "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)" "Net-(U1-Pad14)"\r
+      "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)" "Net-(U1-Pad6)"\r
+      "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)" "Net-(U2-Pad12)"\r
+      "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)" "Net-(U2-Pad6)"\r
+      "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)"\r
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diff --git a/bbb-bort3.dsn b/bbb-bort3.dsn
new file mode 100644 (file)
index 0000000..6546db7
--- /dev/null
+++ b/bbb-bort3.dsn
@@ -0,0 +1,791 @@
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+      (outline (path signal 152.4  -889 18745.2  -3505.2 18745.2))\r
+      (outline (path signal 152.4  -6731 -965.2  -889 -965.2))\r
+      (pin Round[A]Pad_1676.4_um 16 0 17780)\r
+      (pin Round[A]Pad_1676.4_um 15 0 15240)\r
+      (pin Round[A]Pad_1676.4_um 14 0 12700)\r
+      (pin Round[A]Pad_1676.4_um 13 0 10160)\r
+      (pin Round[A]Pad_1676.4_um 12 0 7620)\r
+      (pin Round[A]Pad_1676.4_um 11 0 5080)\r
+      (pin Round[A]Pad_1676.4_um 10 0 2540)\r
+      (pin Round[A]Pad_1676.4_um 9 0 0)\r
+      (pin Round[A]Pad_1676.4_um 8 -7620 0)\r
+      (pin Round[A]Pad_1676.4_um 7 -7620 2540)\r
+      (pin Round[A]Pad_1676.4_um 6 -7620 5080)\r
+      (pin Round[A]Pad_1676.4_um 5 -7620 7620)\r
+      (pin Round[A]Pad_1676.4_um 4 -7620 10160)\r
+      (pin Round[A]Pad_1676.4_um 3 -7620 12700)\r
+      (pin Round[A]Pad_1676.4_um 2 -7620 15240)\r
+      (pin Rect[A]Pad_1676.4x1676.4_um 1 -7620 17780)\r
+    )\r
+    (image "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD"\r
+      (outline (path signal 50  -7850 4325  7875 4325))\r
+      (outline (path signal 50  -7850 -4325  -7850 4325))\r
+      (outline (path signal 50  7875 4275  7875 -4325))\r
+      (outline (path signal 50  -7850 -4325  7850 -4325))\r
+      (outline (path signal 100  -7200 -3600  -7700 -3600))\r
+      (outline (path signal 100  -7700 -3600  -7700 -2200))\r
+      (outline (path signal 100  7200 -3600  7700 -3600))\r
+      (outline (path signal 100  7700 -3600  7700 -2500))\r
+      (outline (path signal 100  7200 3600  7700 3600))\r
+      (outline (path signal 100  7700 3600  7700 2400))\r
+      (outline (path signal 100  -7700 2200  -7700 2700))\r
+      (outline (path signal 100  -7700 2700  -7100 3300))\r
+      (outline (path signal 100  -7100 3300  -7100 3500))\r
+      (outline (path signal 100  -7625 -3500  -7600 2600))\r
+      (outline (path signal 100  7600 3500  -6700 3500))\r
+      (outline (path signal 100  -6700 3500  -7600 2600))\r
+      (outline (path signal 100  7620 3500  7620 -3500))\r
+      (outline (path signal 100  -7620 -3500  7620 -3500))\r
+      (pin Rect[T]Pad_1280x3680_um 1 -6350 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 2 -3810 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 3 -1270 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 4 1270 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 5 3810 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 6 6350 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 7 -6350 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 8 -3810 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 9 -1270 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 10 1270 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 11 3810 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 12 6350 -2220)\r
+    )\r
+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle In1.Cu 1676.4))\r
+      (shape (circle In2.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path In1.Cu 1727.2  0 0  0 0))\r
+      (shape (path In2.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[T]Pad_1280x3680_um\r
+      (shape (rect F.Cu -640 -1840 640 1840))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In1.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In2.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect In1.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect In2.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-3]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle In1.Cu 600))\r
+      (shape (circle In2.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
+    (net "Net-(P8-Pad3)"\r
+      (pins P8-3)\r
+    )\r
+    (net "Net-(P8-Pad6)"\r
+      (pins P8-6)\r
+    )\r
+    (net "Net-(P8-Pad7)"\r
+      (pins P8-7)\r
+    )\r
+    (net "Net-(P8-Pad8)"\r
+      (pins P8-8)\r
+    )\r
+    (net "Net-(P8-Pad9)"\r
+      (pins P8-9)\r
+    )\r
+    (net "Net-(P8-Pad10)"\r
+      (pins P8-10)\r
+    )\r
+    (net "Net-(P8-Pad12)"\r
+      (pins P8-12)\r
+    )\r
+    (net "Net-(P8-Pad13)"\r
+      (pins P8-13)\r
+    )\r
+    (net "Net-(P8-Pad14)"\r
+      (pins P8-14)\r
+    )\r
+    (net "Net-(P8-Pad16)"\r
+      (pins P8-16)\r
+    )\r
+    (net "Net-(P8-Pad18)"\r
+      (pins P8-18)\r
+    )\r
+    (net "Net-(P8-Pad19)"\r
+      (pins P8-19)\r
+    )\r
+    (net "Net-(P8-Pad20)"\r
+      (pins P8-20)\r
+    )\r
+    (net "Net-(P8-Pad21)"\r
+      (pins P8-21)\r
+    )\r
+    (net "Net-(P8-Pad22)"\r
+      (pins P8-22)\r
+    )\r
+    (net "Net-(P8-Pad23)"\r
+      (pins P8-23)\r
+    )\r
+    (net "Net-(P8-Pad24)"\r
+      (pins P8-24)\r
+    )\r
+    (net "Net-(P8-Pad25)"\r
+      (pins P8-25)\r
+    )\r
+    (net "Net-(P8-Pad26)"\r
+      (pins P8-26)\r
+    )\r
+    (net "Net-(P8-Pad27)"\r
+      (pins P8-27)\r
+    )\r
+    (net "Net-(P8-Pad28)"\r
+      (pins P8-28)\r
+    )\r
+    (net "Net-(P8-Pad29)"\r
+      (pins P8-29)\r
+    )\r
+    (net "Net-(P8-Pad30)"\r
+      (pins P8-30)\r
+    )\r
+    (net "Net-(P8-Pad31)"\r
+      (pins P8-31)\r
+    )\r
+    (net "Net-(P8-Pad32)"\r
+      (pins P8-32)\r
+    )\r
+    (net "Net-(P8-Pad33)"\r
+      (pins P8-33)\r
+    )\r
+    (net "Net-(P8-Pad34)"\r
+      (pins P8-34)\r
+    )\r
+    (net "Net-(P8-Pad35)"\r
+      (pins P8-35)\r
+    )\r
+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
+    )\r
+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
+    )\r
+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
+    )\r
+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
+    )\r
+    (net "Net-(P8-Pad40)"\r
+      (pins P8-40)\r
+    )\r
+    (net "Net-(P8-Pad41)"\r
+      (pins P8-41)\r
+    )\r
+    (net "Net-(P8-Pad42)"\r
+      (pins P8-42)\r
+    )\r
+    (net "Net-(P8-Pad43)"\r
+      (pins P8-43)\r
+    )\r
+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
+    )\r
+    (net "Net-(P8-Pad45)"\r
+      (pins P8-45)\r
+    )\r
+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
+    )\r
+    (net "Net-(P9-Pad11)"\r
+      (pins P9-11)\r
+    )\r
+    (net "Net-(P9-Pad12)"\r
+      (pins P9-12)\r
+    )\r
+    (net "Net-(P9-Pad13)"\r
+      (pins P9-13)\r
+    )\r
+    (net "Net-(P9-Pad14)"\r
+      (pins P9-14)\r
+    )\r
+    (net "Net-(P9-Pad15)"\r
+      (pins P9-15)\r
+    )\r
+    (net "Net-(P9-Pad16)"\r
+      (pins P9-16)\r
+    )\r
+    (net "Net-(P9-Pad17)"\r
+      (pins P9-17)\r
+    )\r
+    (net "Net-(P9-Pad18)"\r
+      (pins P9-18)\r
+    )\r
+    (net "Net-(P9-Pad19)"\r
+      (pins P9-19)\r
+    )\r
+    (net "Net-(P9-Pad20)"\r
+      (pins P9-20)\r
+    )\r
+    (net "Net-(P9-Pad21)"\r
+      (pins P9-21)\r
+    )\r
+    (net "Net-(P9-Pad22)"\r
+      (pins P9-22)\r
+    )\r
+    (net "Net-(P9-Pad23)"\r
+      (pins P9-23)\r
+    )\r
+    (net "Net-(P9-Pad24)"\r
+      (pins P9-24)\r
+    )\r
+    (net "Net-(P9-Pad25)"\r
+      (pins P9-25)\r
+    )\r
+    (net "Net-(P9-Pad26)"\r
+      (pins P9-26)\r
+    )\r
+    (net "Net-(P9-Pad27)"\r
+      (pins P9-27)\r
+    )\r
+    (net "Net-(P9-Pad28)"\r
+      (pins P9-28)\r
+    )\r
+    (net "Net-(P9-Pad29)"\r
+      (pins P9-29)\r
+    )\r
+    (net "Net-(P9-Pad30)"\r
+      (pins P9-30)\r
+    )\r
+    (net "Net-(P9-Pad31)"\r
+      (pins P9-31)\r
+    )\r
+    (net "Net-(P9-Pad33)"\r
+      (pins P9-33)\r
+    )\r
+    (net "Net-(P9-Pad35)"\r
+      (pins P9-35)\r
+    )\r
+    (net "Net-(P9-Pad36)"\r
+      (pins P9-36)\r
+    )\r
+    (net "Net-(P9-Pad37)"\r
+      (pins P9-37)\r
+    )\r
+    (net "Net-(P9-Pad38)"\r
+      (pins P9-38)\r
+    )\r
+    (net "Net-(P9-Pad39)"\r
+      (pins P9-39)\r
+    )\r
+    (net "Net-(P9-Pad40)"\r
+      (pins P9-40)\r
+    )\r
+    (net "Net-(P9-Pad41)"\r
+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net "Net-(U1-Pad4)"\r
+      (pins U1-4)\r
+    )\r
+    (net "Net-(U1-Pad5)"\r
+      (pins U1-5)\r
+    )\r
+    (net "Net-(U1-Pad6)"\r
+      (pins U1-6)\r
+    )\r
+    (net "Net-(U1-Pad7)"\r
+      (pins U1-7)\r
+    )\r
+    (net "Net-(U1-Pad9)"\r
+      (pins U1-9)\r
+    )\r
+    (net "Net-(U1-Pad10)"\r
+      (pins U1-10)\r
+    )\r
+    (net "Net-(U1-Pad11)"\r
+      (pins U1-11)\r
+    )\r
+    (net "Net-(U1-Pad12)"\r
+      (pins U1-12)\r
+    )\r
+    (net "Net-(U1-Pad14)"\r
+      (pins U1-14)\r
+    )\r
+    (net "Net-(U1-Pad15)"\r
+      (pins U1-15)\r
+    )\r
+    (net "Net-(U2-Pad15)"\r
+      (pins U2-15)\r
+    )\r
+    (net "Net-(U2-Pad14)"\r
+      (pins U2-14)\r
+    )\r
+    (net "Net-(U2-Pad12)"\r
+      (pins U2-12)\r
+    )\r
+    (net "Net-(U2-Pad11)"\r
+      (pins U2-11)\r
+    )\r
+    (net /d1\r
+      (pins J1-1)\r
+    )\r
+    (net /d2\r
+      (pins J1-2)\r
+    )\r
+    (net /d3\r
+      (pins J1-3)\r
+    )\r
+    (net /d4\r
+      (pins J1-4)\r
+    )\r
+    (net /d5\r
+      (pins J1-5)\r
+    )\r
+    (net /d6\r
+      (pins J1-6)\r
+    )\r
+    (net /d7\r
+      (pins J1-7)\r
+    )\r
+    (net /d8\r
+      (pins J1-8)\r
+    )\r
+    (net "Net-(J1-Pad9)"\r
+      (pins J1-9)\r
+    )\r
+    (net "Net-(J1-Pad10)"\r
+      (pins J1-10)\r
+    )\r
+    (net "Net-(J1-Pad11)"\r
+      (pins J1-11)\r
+    )\r
+    (net "Net-(J1-Pad12)"\r
+      (pins J1-12)\r
+    )\r
+    (net SR1_CLR\r
+      (pins P8-17 U2-9)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins P8-15 U2-7)\r
+    )\r
+    (net SR1_CLK\r
+      (pins P8-11 U2-3)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins P8-5 U2-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins P8-4 U1-2)\r
+    )\r
+    (net PGND\r
+      (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-13 U1-8 U2-13 U2-8 U3-8\r
+        U3-1)\r
+    )\r
+    (net 5v\r
+      (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16)\r
+    )\r
+    (net BB3.3\r
+      (pins P9-4 P9-3 U1-16 U2-1)\r
+    )\r
+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U2-10 U3-9)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U2-6 U3-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U2-4 U3-6)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U2-2 U3-7)\r
+    )\r
+    (net /p8\r
+      (pins U3-14)\r
+    )\r
+    (net /p7\r
+      (pins U3-12)\r
+    )\r
+    (net /p6\r
+      (pins U3-11)\r
+    )\r
+    (net /p5\r
+      (pins U3-10)\r
+    )\r
+    (net /p4\r
+      (pins U3-5)\r
+    )\r
+    (net /p3\r
+      (pins U3-4)\r
+    )\r
+    (net /p2\r
+      (pins U3-3)\r
+    )\r
+    (net /p1\r
+      (pins U3-2)\r
+    )\r
+    (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD\r
+      /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1\r
+      /p2 /p3 /p4 /p5 /p6 /p7 /p8 5v BB3.3 GNDA_ADC GNDD "Net-(J1-Pad10)"\r
+      "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)"\r
+      "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)"\r
+      "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)"\r
+      "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)"\r
+      "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)"\r
+      "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)"\r
+      "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)"\r
+      "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)"\r
+      "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)"\r
+      "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)"\r
+      "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)"\r
+      "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)"\r
+      "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)"\r
+      "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)"\r
+      "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)"\r
+      "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)"\r
+      "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)"\r
+      "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)"\r
+      "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)"\r
+      "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)"\r
+      "Net-(U2-Pad12)" "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)"\r
+      "Net-(U2-Pad6)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)"\r
+      "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PGND\r
+      PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T\r
+      SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SYS_RESETN VDD_ADC\r
+      (circuit\r
+        (use_via Via[0-3]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort4.dsn b/bbb-bort4.dsn
new file mode 100644 (file)
index 0000000..30df52e
--- /dev/null
+++ b/bbb-bort4.dsn
@@ -0,0 +1,793 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort4.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
+      (property\r
+        (index 0)\r
+      )\r
+    )\r
+    (layer In1.Cu\r
+      (type signal)\r
+      (property\r
+        (index 1)\r
+      )\r
+    )\r
+    (layer In2.Cu\r
+      (type signal)\r
+      (property\r
+        (index 2)\r
+      )\r
+    )\r
+    (layer B.Cu\r
+      (type signal)\r
+      (property\r
+        (index 3)\r
+      )\r
+    )\r
+    (boundary\r
+      (path pcb 0  149390 -176682  32550.1 -176682  32550.1 -28092.4  149390 -28092.4\r
+            149390 -176682)\r
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+      (outline (path signal 100  -7700 -3600  -7700 -2200))\r
+      (outline (path signal 100  7200 -3600  7700 -3600))\r
+      (outline (path signal 100  7700 -3600  7700 -2500))\r
+      (outline (path signal 100  7200 3600  7700 3600))\r
+      (outline (path signal 100  7700 3600  7700 2400))\r
+      (outline (path signal 100  -7700 2200  -7700 2700))\r
+      (outline (path signal 100  -7700 2700  -7100 3300))\r
+      (outline (path signal 100  -7100 3300  -7100 3500))\r
+      (outline (path signal 100  -7625 -3500  -7600 2600))\r
+      (outline (path signal 100  7600 3500  -6700 3500))\r
+      (outline (path signal 100  -6700 3500  -7600 2600))\r
+      (outline (path signal 100  7620 3500  7620 -3500))\r
+      (outline (path signal 100  -7620 -3500  7620 -3500))\r
+      (pin Rect[T]Pad_1280x3680_um 1 -6350 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 2 -3810 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 3 -1270 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 4 1270 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 5 3810 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 6 6350 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 7 -6350 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 8 -3810 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 9 -1270 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 10 1270 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 11 3810 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 12 6350 -2220)\r
+    )\r
+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle In1.Cu 1676.4))\r
+      (shape (circle In2.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path In1.Cu 1727.2  0 0  0 0))\r
+      (shape (path In2.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[T]Pad_1280x3680_um\r
+      (shape (rect F.Cu -640 -1840 640 1840))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In1.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In2.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect In1.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect In2.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-3]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle In1.Cu 600))\r
+      (shape (circle In2.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
+    (net "Net-(P8-Pad3)"\r
+      (pins P8-3)\r
+    )\r
+    (net "Net-(P8-Pad6)"\r
+      (pins P8-6)\r
+    )\r
+    (net "Net-(P8-Pad7)"\r
+      (pins P8-7)\r
+    )\r
+    (net "Net-(P8-Pad8)"\r
+      (pins P8-8)\r
+    )\r
+    (net "Net-(P8-Pad9)"\r
+      (pins P8-9)\r
+    )\r
+    (net "Net-(P8-Pad10)"\r
+      (pins P8-10)\r
+    )\r
+    (net "Net-(P8-Pad12)"\r
+      (pins P8-12)\r
+    )\r
+    (net "Net-(P8-Pad13)"\r
+      (pins P8-13)\r
+    )\r
+    (net "Net-(P8-Pad14)"\r
+      (pins P8-14)\r
+    )\r
+    (net "Net-(P8-Pad16)"\r
+      (pins P8-16)\r
+    )\r
+    (net "Net-(P8-Pad18)"\r
+      (pins P8-18)\r
+    )\r
+    (net "Net-(P8-Pad19)"\r
+      (pins P8-19)\r
+    )\r
+    (net "Net-(P8-Pad20)"\r
+      (pins P8-20)\r
+    )\r
+    (net "Net-(P8-Pad21)"\r
+      (pins P8-21)\r
+    )\r
+    (net "Net-(P8-Pad22)"\r
+      (pins P8-22)\r
+    )\r
+    (net "Net-(P8-Pad23)"\r
+      (pins P8-23)\r
+    )\r
+    (net "Net-(P8-Pad24)"\r
+      (pins P8-24)\r
+    )\r
+    (net "Net-(P8-Pad25)"\r
+      (pins P8-25)\r
+    )\r
+    (net "Net-(P8-Pad26)"\r
+      (pins P8-26)\r
+    )\r
+    (net "Net-(P8-Pad27)"\r
+      (pins P8-27)\r
+    )\r
+    (net "Net-(P8-Pad28)"\r
+      (pins P8-28)\r
+    )\r
+    (net "Net-(P8-Pad29)"\r
+      (pins P8-29)\r
+    )\r
+    (net "Net-(P8-Pad30)"\r
+      (pins P8-30)\r
+    )\r
+    (net "Net-(P8-Pad31)"\r
+      (pins P8-31)\r
+    )\r
+    (net "Net-(P8-Pad32)"\r
+      (pins P8-32)\r
+    )\r
+    (net "Net-(P8-Pad33)"\r
+      (pins P8-33)\r
+    )\r
+    (net "Net-(P8-Pad34)"\r
+      (pins P8-34)\r
+    )\r
+    (net "Net-(P8-Pad35)"\r
+      (pins P8-35)\r
+    )\r
+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
+    )\r
+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
+    )\r
+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
+    )\r
+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
+    )\r
+    (net "Net-(P8-Pad40)"\r
+      (pins P8-40)\r
+    )\r
+    (net "Net-(P8-Pad41)"\r
+      (pins P8-41)\r
+    )\r
+    (net "Net-(P8-Pad42)"\r
+      (pins P8-42)\r
+    )\r
+    (net "Net-(P8-Pad43)"\r
+      (pins P8-43)\r
+    )\r
+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
+    )\r
+    (net "Net-(P8-Pad45)"\r
+      (pins P8-45)\r
+    )\r
+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
+    )\r
+    (net "Net-(P9-Pad11)"\r
+      (pins P9-11)\r
+    )\r
+    (net "Net-(P9-Pad12)"\r
+      (pins P9-12)\r
+    )\r
+    (net "Net-(P9-Pad13)"\r
+      (pins P9-13)\r
+    )\r
+    (net "Net-(P9-Pad14)"\r
+      (pins P9-14)\r
+    )\r
+    (net "Net-(P9-Pad15)"\r
+      (pins P9-15)\r
+    )\r
+    (net "Net-(P9-Pad16)"\r
+      (pins P9-16)\r
+    )\r
+    (net "Net-(P9-Pad17)"\r
+      (pins P9-17)\r
+    )\r
+    (net "Net-(P9-Pad18)"\r
+      (pins P9-18)\r
+    )\r
+    (net "Net-(P9-Pad19)"\r
+      (pins P9-19)\r
+    )\r
+    (net "Net-(P9-Pad20)"\r
+      (pins P9-20)\r
+    )\r
+    (net "Net-(P9-Pad21)"\r
+      (pins P9-21)\r
+    )\r
+    (net "Net-(P9-Pad22)"\r
+      (pins P9-22)\r
+    )\r
+    (net "Net-(P9-Pad23)"\r
+      (pins P9-23)\r
+    )\r
+    (net "Net-(P9-Pad24)"\r
+      (pins P9-24)\r
+    )\r
+    (net "Net-(P9-Pad25)"\r
+      (pins P9-25)\r
+    )\r
+    (net "Net-(P9-Pad26)"\r
+      (pins P9-26)\r
+    )\r
+    (net "Net-(P9-Pad27)"\r
+      (pins P9-27)\r
+    )\r
+    (net "Net-(P9-Pad28)"\r
+      (pins P9-28)\r
+    )\r
+    (net "Net-(P9-Pad29)"\r
+      (pins P9-29)\r
+    )\r
+    (net "Net-(P9-Pad30)"\r
+      (pins P9-30)\r
+    )\r
+    (net "Net-(P9-Pad31)"\r
+      (pins P9-31)\r
+    )\r
+    (net "Net-(P9-Pad33)"\r
+      (pins P9-33)\r
+    )\r
+    (net "Net-(P9-Pad35)"\r
+      (pins P9-35)\r
+    )\r
+    (net "Net-(P9-Pad36)"\r
+      (pins P9-36)\r
+    )\r
+    (net "Net-(P9-Pad37)"\r
+      (pins P9-37)\r
+    )\r
+    (net "Net-(P9-Pad38)"\r
+      (pins P9-38)\r
+    )\r
+    (net "Net-(P9-Pad39)"\r
+      (pins P9-39)\r
+    )\r
+    (net "Net-(P9-Pad40)"\r
+      (pins P9-40)\r
+    )\r
+    (net "Net-(P9-Pad41)"\r
+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net "Net-(U1-Pad4)"\r
+      (pins U1-4)\r
+    )\r
+    (net "Net-(U1-Pad5)"\r
+      (pins U1-5)\r
+    )\r
+    (net "Net-(U1-Pad6)"\r
+      (pins U1-6)\r
+    )\r
+    (net "Net-(U1-Pad7)"\r
+      (pins U1-7)\r
+    )\r
+    (net "Net-(U1-Pad9)"\r
+      (pins U1-9)\r
+    )\r
+    (net "Net-(U1-Pad10)"\r
+      (pins U1-10)\r
+    )\r
+    (net "Net-(U1-Pad11)"\r
+      (pins U1-11)\r
+    )\r
+    (net "Net-(U1-Pad12)"\r
+      (pins U1-12)\r
+    )\r
+    (net "Net-(U1-Pad14)"\r
+      (pins U1-14)\r
+    )\r
+    (net "Net-(U1-Pad15)"\r
+      (pins U1-15)\r
+    )\r
+    (net "Net-(U2-Pad15)"\r
+      (pins U2-15)\r
+    )\r
+    (net "Net-(U2-Pad14)"\r
+      (pins U2-14)\r
+    )\r
+    (net "Net-(U2-Pad12)"\r
+      (pins U2-12)\r
+    )\r
+    (net "Net-(U2-Pad11)"\r
+      (pins U2-11)\r
+    )\r
+    (net /d1\r
+      (pins J1-1)\r
+    )\r
+    (net /d2\r
+      (pins J1-2)\r
+    )\r
+    (net /d3\r
+      (pins J1-3)\r
+    )\r
+    (net /d4\r
+      (pins J1-4)\r
+    )\r
+    (net /d5\r
+      (pins J1-5)\r
+    )\r
+    (net /d6\r
+      (pins J1-6)\r
+    )\r
+    (net /d7\r
+      (pins J1-7)\r
+    )\r
+    (net /d8\r
+      (pins J1-8)\r
+    )\r
+    (net "Net-(J1-Pad9)"\r
+      (pins J1-9)\r
+    )\r
+    (net "Net-(J1-Pad10)"\r
+      (pins J1-10)\r
+    )\r
+    (net "Net-(J1-Pad11)"\r
+      (pins J1-11)\r
+    )\r
+    (net "Net-(J1-Pad12)"\r
+      (pins J1-12)\r
+    )\r
+    (net SR1_CLR\r
+      (pins P8-17 U2-9)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins P8-15 U2-7)\r
+    )\r
+    (net SR1_CLK\r
+      (pins P8-11 U2-3)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins P8-5 U2-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins P8-4 U1-2)\r
+    )\r
+    (net PGND\r
+      (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-13 U1-8 U2-13 U2-8 U3-8\r
+        U3-1)\r
+    )\r
+    (net 5v\r
+      (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16)\r
+    )\r
+    (net BB3.3\r
+      (pins P9-4 P9-3 U1-16 U2-1)\r
+    )\r
+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U2-10 U3-9)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U2-6 U3-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U2-4 U3-6)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U2-2 U3-7)\r
+    )\r
+    (net /p8\r
+      (pins U3-14)\r
+    )\r
+    (net /p7\r
+      (pins U3-12)\r
+    )\r
+    (net /p6\r
+      (pins U3-11)\r
+    )\r
+    (net /p5\r
+      (pins U3-10)\r
+    )\r
+    (net /p4\r
+      (pins U3-5)\r
+    )\r
+    (net /p3\r
+      (pins U3-4)\r
+    )\r
+    (net /p2\r
+      (pins U3-3)\r
+    )\r
+    (net /p1\r
+      (pins U3-2)\r
+    )\r
+    (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD\r
+      /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1\r
+      /p2 /p3 /p4 /p5 /p6 /p7 /p8 5v BB3.3 GNDA_ADC GNDD "Net-(J1-Pad10)"\r
+      "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)"\r
+      "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)"\r
+      "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)"\r
+      "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)"\r
+      "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)"\r
+      "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)"\r
+      "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)"\r
+      "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)"\r
+      "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)"\r
+      "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)"\r
+      "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)"\r
+      "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)"\r
+      "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)"\r
+      "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)"\r
+      "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)"\r
+      "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)"\r
+      "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)"\r
+      "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)"\r
+      "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)"\r
+      "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)"\r
+      "Net-(U2-Pad12)" "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)"\r
+      "Net-(U2-Pad6)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)"\r
+      "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PGND\r
+      PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T\r
+      SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SYS_RESETN VDD_ADC\r
+      (circuit\r
+        (use_via Via[0-3]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort5.dsn b/bbb-bort5.dsn
new file mode 100644 (file)
index 0000000..fb111f7
--- /dev/null
+++ b/bbb-bort5.dsn
@@ -0,0 +1,793 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort5.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
+      (property\r
+        (index 0)\r
+      )\r
+    )\r
+    (layer In1.Cu\r
+      (type signal)\r
+      (property\r
+        (index 1)\r
+      )\r
+    )\r
+    (layer In2.Cu\r
+      (type signal)\r
+      (property\r
+        (index 2)\r
+      )\r
+    )\r
+    (layer B.Cu\r
+      (type signal)\r
+      (property\r
+        (index 3)\r
+      )\r
+    )\r
+    (boundary\r
+      (path pcb 0  149390 -176682  32550.1 -176682  32550.1 -28092.4  149390 -28092.4\r
+            149390 -176682)\r
+    )\r
+    (keepout "" (polygon signal 0  62395.1 -71907.4  61401.7 -71985.6  60432.8 -72218.2\r
+            59512.3 -72599.5  58662.7 -73120.1  57905 -73767.3  57257.8 -74525\r
+            56737.2 -75374.6  56355.9 -76295.1  56123.3 -77264  56045.1 -78257.4\r
+            56045.1 -145567  56125 -146989  56363.5 -148393  56757.8 -149762\r
+            57302.8 -151078  57991.7 -152324  58815.8 -153486  59764.8 -154548\r
+            60826.8 -155497  61988.3 -156321  63234.8 -157010  64550.6 -157555\r
+            65919.1 -157949  67323.2 -158188  68745.1 -158267  97955.1 -158267\r
+            99377 -158188  100781 -157949  102150 -157555  103465 -157010\r
+            104712 -156321  105873 -155497  106935 -154548  107884 -153486\r
+            108708 -152324  109397 -151078  109942 -149762  110337 -148393\r
+            110575 -146989  110655 -145567  110655 -78892.4  94780.1 -78892.4\r
+            94780.1 -93497.4  77000.1 -93497.4  77000.1 -71907.4  62395.1 -71907.4))\r
+    (via "Via[0-3]_600:400_um")\r
+    (rule\r
+      (width 250)\r
+      (clearance 200.1)\r
+      (clearance 200.1 (type default_smd))\r
+      (clearance 50 (type smd_smd))\r
+    )\r
+  )\r
+  (placement\r
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (place P8 106210 -91592.4 front 0 (PN BeagleBone_Black_Header))\r
+      (place P9 57950.1 -91592.4 front 0 (PN BeagleBone_Black_Header))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"\r
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+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle In1.Cu 1676.4))\r
+      (shape (circle In2.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path In1.Cu 1727.2  0 0  0 0))\r
+      (shape (path In2.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[T]Pad_1280x3680_um\r
+      (shape (rect F.Cu -640 -1840 640 1840))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In1.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In2.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect In1.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect In2.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-3]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle In1.Cu 600))\r
+      (shape (circle In2.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
+    (net "Net-(P8-Pad3)"\r
+      (pins P8-3)\r
+    )\r
+    (net "Net-(P8-Pad6)"\r
+      (pins P8-6)\r
+    )\r
+    (net "Net-(P8-Pad7)"\r
+      (pins P8-7)\r
+    )\r
+    (net "Net-(P8-Pad8)"\r
+      (pins P8-8)\r
+    )\r
+    (net "Net-(P8-Pad9)"\r
+      (pins P8-9)\r
+    )\r
+    (net "Net-(P8-Pad10)"\r
+      (pins P8-10)\r
+    )\r
+    (net "Net-(P8-Pad12)"\r
+      (pins P8-12)\r
+    )\r
+    (net "Net-(P8-Pad13)"\r
+      (pins P8-13)\r
+    )\r
+    (net "Net-(P8-Pad14)"\r
+      (pins P8-14)\r
+    )\r
+    (net "Net-(P8-Pad16)"\r
+      (pins P8-16)\r
+    )\r
+    (net "Net-(P8-Pad18)"\r
+      (pins P8-18)\r
+    )\r
+    (net "Net-(P8-Pad19)"\r
+      (pins P8-19)\r
+    )\r
+    (net "Net-(P8-Pad20)"\r
+      (pins P8-20)\r
+    )\r
+    (net "Net-(P8-Pad21)"\r
+      (pins P8-21)\r
+    )\r
+    (net "Net-(P8-Pad22)"\r
+      (pins P8-22)\r
+    )\r
+    (net "Net-(P8-Pad23)"\r
+      (pins P8-23)\r
+    )\r
+    (net "Net-(P8-Pad24)"\r
+      (pins P8-24)\r
+    )\r
+    (net "Net-(P8-Pad25)"\r
+      (pins P8-25)\r
+    )\r
+    (net "Net-(P8-Pad26)"\r
+      (pins P8-26)\r
+    )\r
+    (net "Net-(P8-Pad27)"\r
+      (pins P8-27)\r
+    )\r
+    (net "Net-(P8-Pad28)"\r
+      (pins P8-28)\r
+    )\r
+    (net "Net-(P8-Pad29)"\r
+      (pins P8-29)\r
+    )\r
+    (net "Net-(P8-Pad30)"\r
+      (pins P8-30)\r
+    )\r
+    (net "Net-(P8-Pad31)"\r
+      (pins P8-31)\r
+    )\r
+    (net "Net-(P8-Pad32)"\r
+      (pins P8-32)\r
+    )\r
+    (net "Net-(P8-Pad33)"\r
+      (pins P8-33)\r
+    )\r
+    (net "Net-(P8-Pad34)"\r
+      (pins P8-34)\r
+    )\r
+    (net "Net-(P8-Pad35)"\r
+      (pins P8-35)\r
+    )\r
+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
+    )\r
+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
+    )\r
+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
+    )\r
+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
+    )\r
+    (net "Net-(P8-Pad40)"\r
+      (pins P8-40)\r
+    )\r
+    (net "Net-(P8-Pad41)"\r
+      (pins P8-41)\r
+    )\r
+    (net "Net-(P8-Pad42)"\r
+      (pins P8-42)\r
+    )\r
+    (net "Net-(P8-Pad43)"\r
+      (pins P8-43)\r
+    )\r
+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
+    )\r
+    (net "Net-(P8-Pad45)"\r
+      (pins P8-45)\r
+    )\r
+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
+    )\r
+    (net "Net-(P9-Pad11)"\r
+      (pins P9-11)\r
+    )\r
+    (net "Net-(P9-Pad12)"\r
+      (pins P9-12)\r
+    )\r
+    (net "Net-(P9-Pad13)"\r
+      (pins P9-13)\r
+    )\r
+    (net "Net-(P9-Pad14)"\r
+      (pins P9-14)\r
+    )\r
+    (net "Net-(P9-Pad15)"\r
+      (pins P9-15)\r
+    )\r
+    (net "Net-(P9-Pad16)"\r
+      (pins P9-16)\r
+    )\r
+    (net "Net-(P9-Pad17)"\r
+      (pins P9-17)\r
+    )\r
+    (net "Net-(P9-Pad18)"\r
+      (pins P9-18)\r
+    )\r
+    (net "Net-(P9-Pad19)"\r
+      (pins P9-19)\r
+    )\r
+    (net "Net-(P9-Pad20)"\r
+      (pins P9-20)\r
+    )\r
+    (net "Net-(P9-Pad21)"\r
+      (pins P9-21)\r
+    )\r
+    (net "Net-(P9-Pad22)"\r
+      (pins P9-22)\r
+    )\r
+    (net "Net-(P9-Pad23)"\r
+      (pins P9-23)\r
+    )\r
+    (net "Net-(P9-Pad24)"\r
+      (pins P9-24)\r
+    )\r
+    (net "Net-(P9-Pad25)"\r
+      (pins P9-25)\r
+    )\r
+    (net "Net-(P9-Pad26)"\r
+      (pins P9-26)\r
+    )\r
+    (net "Net-(P9-Pad27)"\r
+      (pins P9-27)\r
+    )\r
+    (net "Net-(P9-Pad28)"\r
+      (pins P9-28)\r
+    )\r
+    (net "Net-(P9-Pad29)"\r
+      (pins P9-29)\r
+    )\r
+    (net "Net-(P9-Pad30)"\r
+      (pins P9-30)\r
+    )\r
+    (net "Net-(P9-Pad31)"\r
+      (pins P9-31)\r
+    )\r
+    (net "Net-(P9-Pad33)"\r
+      (pins P9-33)\r
+    )\r
+    (net "Net-(P9-Pad35)"\r
+      (pins P9-35)\r
+    )\r
+    (net "Net-(P9-Pad36)"\r
+      (pins P9-36)\r
+    )\r
+    (net "Net-(P9-Pad37)"\r
+      (pins P9-37)\r
+    )\r
+    (net "Net-(P9-Pad38)"\r
+      (pins P9-38)\r
+    )\r
+    (net "Net-(P9-Pad39)"\r
+      (pins P9-39)\r
+    )\r
+    (net "Net-(P9-Pad40)"\r
+      (pins P9-40)\r
+    )\r
+    (net "Net-(P9-Pad41)"\r
+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net "Net-(U1-Pad4)"\r
+      (pins U1-4)\r
+    )\r
+    (net "Net-(U1-Pad5)"\r
+      (pins U1-5)\r
+    )\r
+    (net "Net-(U1-Pad6)"\r
+      (pins U1-6)\r
+    )\r
+    (net "Net-(U1-Pad7)"\r
+      (pins U1-7)\r
+    )\r
+    (net "Net-(U1-Pad9)"\r
+      (pins U1-9)\r
+    )\r
+    (net "Net-(U1-Pad10)"\r
+      (pins U1-10)\r
+    )\r
+    (net "Net-(U1-Pad11)"\r
+      (pins U1-11)\r
+    )\r
+    (net "Net-(U1-Pad12)"\r
+      (pins U1-12)\r
+    )\r
+    (net "Net-(U1-Pad14)"\r
+      (pins U1-14)\r
+    )\r
+    (net "Net-(U1-Pad15)"\r
+      (pins U1-15)\r
+    )\r
+    (net "Net-(U2-Pad15)"\r
+      (pins U2-15)\r
+    )\r
+    (net "Net-(U2-Pad14)"\r
+      (pins U2-14)\r
+    )\r
+    (net "Net-(U2-Pad12)"\r
+      (pins U2-12)\r
+    )\r
+    (net "Net-(U2-Pad11)"\r
+      (pins U2-11)\r
+    )\r
+    (net /d1\r
+      (pins J1-1)\r
+    )\r
+    (net /d2\r
+      (pins J1-2)\r
+    )\r
+    (net /d3\r
+      (pins J1-3)\r
+    )\r
+    (net /d4\r
+      (pins J1-4)\r
+    )\r
+    (net /d5\r
+      (pins J1-5)\r
+    )\r
+    (net /d6\r
+      (pins J1-6)\r
+    )\r
+    (net /d7\r
+      (pins J1-7)\r
+    )\r
+    (net /d8\r
+      (pins J1-8)\r
+    )\r
+    (net "Net-(J1-Pad9)"\r
+      (pins J1-9)\r
+    )\r
+    (net "Net-(J1-Pad10)"\r
+      (pins J1-10)\r
+    )\r
+    (net "Net-(J1-Pad11)"\r
+      (pins J1-11)\r
+    )\r
+    (net "Net-(J1-Pad12)"\r
+      (pins J1-12)\r
+    )\r
+    (net SR1_CLR\r
+      (pins P8-17 U2-9)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins P8-15 U2-7)\r
+    )\r
+    (net SR1_CLK\r
+      (pins P8-11 U2-3)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins P8-5 U2-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins P8-4 U1-2)\r
+    )\r
+    (net PGND\r
+      (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-13 U1-8 U2-13 U2-8 U3-8\r
+        U3-1)\r
+    )\r
+    (net 5v\r
+      (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16)\r
+    )\r
+    (net BB3.3\r
+      (pins P9-4 P9-3 U1-16 U2-1)\r
+    )\r
+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U2-10 U3-9)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U2-6 U3-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U2-4 U3-6)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U2-2 U3-7)\r
+    )\r
+    (net /p8\r
+      (pins U3-14)\r
+    )\r
+    (net /p7\r
+      (pins U3-12)\r
+    )\r
+    (net /p6\r
+      (pins U3-11)\r
+    )\r
+    (net /p5\r
+      (pins U3-10)\r
+    )\r
+    (net /p4\r
+      (pins U3-5)\r
+    )\r
+    (net /p3\r
+      (pins U3-4)\r
+    )\r
+    (net /p2\r
+      (pins U3-3)\r
+    )\r
+    (net /p1\r
+      (pins U3-2)\r
+    )\r
+    (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD\r
+      /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1\r
+      /p2 /p3 /p4 /p5 /p6 /p7 /p8 5v BB3.3 GNDA_ADC GNDD "Net-(J1-Pad10)"\r
+      "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)"\r
+      "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)"\r
+      "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)"\r
+      "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)"\r
+      "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)"\r
+      "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)"\r
+      "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)"\r
+      "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)"\r
+      "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)"\r
+      "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)"\r
+      "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)"\r
+      "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)"\r
+      "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)"\r
+      "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)"\r
+      "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)"\r
+      "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)"\r
+      "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)"\r
+      "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)"\r
+      "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)"\r
+      "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)"\r
+      "Net-(U2-Pad12)" "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)"\r
+      "Net-(U2-Pad6)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)"\r
+      "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PGND\r
+      PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T\r
+      SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SYS_RESETN VDD_ADC\r
+      (circuit\r
+        (use_via Via[0-3]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort6.dsn b/bbb-bort6.dsn
new file mode 100644 (file)
index 0000000..49bd8db
--- /dev/null
+++ b/bbb-bort6.dsn
@@ -0,0 +1,875 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort6.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
+      (property\r
+        (index 0)\r
+      )\r
+    )\r
+    (layer In1.Cu\r
+      (type signal)\r
+      (property\r
+        (index 1)\r
+      )\r
+    )\r
+    (layer In2.Cu\r
+      (type signal)\r
+      (property\r
+        (index 2)\r
+      )\r
+    )\r
+    (layer B.Cu\r
+      (type signal)\r
+      (property\r
+        (index 3)\r
+      )\r
+    )\r
+    (boundary\r
+      (path pcb 0  149390 -176682  32550.1 -176682  32550.1 -28092.4  149390 -28092.4\r
+            149390 -176682)\r
+    )\r
+    (via "Via[0-3]_600:400_um")\r
+    (rule\r
+      (width 250)\r
+      (clearance 200.1)\r
+      (clearance 200.1 (type default_smd))\r
+      (clearance 50 (type smd_smd))\r
+    )\r
+  )\r
+  (placement\r
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (place P8 106210 -91592.4 front 0 (PN BeagleBone_Black_Header))\r
+      (place P9 57950.1 -91592.4 front 0 (PN BeagleBone_Black_Header))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"\r
+      (place U1 96050.1 -54762.4 front 0 (PN 4504))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"\r
+      (place U2 132880 -54762.4 front 0 (PN 4504))\r
+    )\r
+    (component "SN74HC166N:DIP254P762X508-16"\r
+      (place U3 115100 -54762.4 front 0 (PN 74166))\r
+    )\r
+    (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD"\r
+      (place J1 47790.1 -50002.4 front 0 (PN 0015912120))\r
+    )\r
+  )\r
+  (library\r
+    (image Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (outline (path signal 150  -1550 1550  -1550 0))\r
+      (outline (path signal 150  1270 -1270  -1270 -1270))\r
+      (outline (path signal 150  1270 1270  1270 -1270))\r
+      (outline (path signal 150  0 1550  -1550 1550))\r
+      (outline (path signal 150  3810 1270  1270 1270))\r
+      (outline (path signal 150  3810 -57150  -1270 -57150))\r
+      (outline (path signal 150  -1270 -57150  -1270 -1270))\r
+      (outline (path signal 150  3810 -57150  3810 1270))\r
+      (outline (path signal 50  -1750 -57650  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  4300 1750))\r
+      (outline (path signal 50  4300 1750  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  -1750 -57650))\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 46 2540 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 45 0 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 44 2540 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 43 0 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 42 2540 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 41 0 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 40 2540 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 39 0 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 38 2540 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 37 0 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 36 2540 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 35 0 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 34 2540 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 33 0 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 32 2540 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 31 0 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 30 2540 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 29 0 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 28 2540 -33020)\r
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+      (outline (path signal 152.4  -508 17221.2  558.8 17221.2))\r
+      (outline (path signal 152.4  558.8 17221.2  558.8 18338.8))\r
+      (outline (path signal 152.4  558.8 18338.8  -508 18338.8))\r
+      (outline (path signal 152.4  -7112 -965.2  -508 -965.2))\r
+      (outline (path signal 152.4  -508 -965.2  -508 18745.2))\r
+      (outline (path signal 152.4  -508 18745.2  -3505.2 18745.2))\r
+      (outline (path signal 152.4  -3505.2 18745.2  -4114.8 18745.2))\r
+      (outline (path signal 152.4  -4114.8 18745.2  -7112 18745.2))\r
+      (outline (path signal 152.4  -7112 18745.2  -7112 -965.2))\r
+      (pin Rect[A]Pad_1676.4x1676.4_um 1 -7620 17780)\r
+      (pin Round[A]Pad_1676.4_um 2 -7620 15240)\r
+      (pin Round[A]Pad_1676.4_um 3 -7620 12700)\r
+      (pin Round[A]Pad_1676.4_um 4 -7620 10160)\r
+      (pin Round[A]Pad_1676.4_um 5 -7620 7620)\r
+      (pin Round[A]Pad_1676.4_um 6 -7620 5080)\r
+      (pin Round[A]Pad_1676.4_um 7 -7620 2540)\r
+      (pin Round[A]Pad_1676.4_um 8 -7620 0)\r
+      (pin Round[A]Pad_1676.4_um 9 0 0)\r
+      (pin Round[A]Pad_1676.4_um 10 0 2540)\r
+      (pin Round[A]Pad_1676.4_um 11 0 5080)\r
+      (pin Round[A]Pad_1676.4_um 12 0 7620)\r
+      (pin Round[A]Pad_1676.4_um 13 0 10160)\r
+      (pin Round[A]Pad_1676.4_um 14 0 12700)\r
+      (pin Round[A]Pad_1676.4_um 15 0 15240)\r
+      (pin Round[A]Pad_1676.4_um 16 0 17780)\r
+    )\r
+    (image "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD"\r
+      (outline (path signal 50  -7850 4325  7875 4325))\r
+      (outline (path signal 50  -7850 -4325  -7850 4325))\r
+      (outline (path signal 50  7875 4275  7875 -4325))\r
+      (outline (path signal 50  -7850 -4325  7850 -4325))\r
+      (outline (path signal 100  -7200 -3600  -7700 -3600))\r
+      (outline (path signal 100  -7700 -3600  -7700 -2200))\r
+      (outline (path signal 100  7200 -3600  7700 -3600))\r
+      (outline (path signal 100  7700 -3600  7700 -2500))\r
+      (outline (path signal 100  7200 3600  7700 3600))\r
+      (outline (path signal 100  7700 3600  7700 2400))\r
+      (outline (path signal 100  -7700 2200  -7700 2700))\r
+      (outline (path signal 100  -7700 2700  -7100 3300))\r
+      (outline (path signal 100  -7100 3300  -7100 3500))\r
+      (outline (path signal 100  -7625 -3500  -7600 2600))\r
+      (outline (path signal 100  7600 3500  -6700 3500))\r
+      (outline (path signal 100  -6700 3500  -7600 2600))\r
+      (outline (path signal 100  7620 3500  7620 -3500))\r
+      (outline (path signal 100  -7620 -3500  7620 -3500))\r
+      (pin Rect[T]Pad_1280x3680_um 1 -6350 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 2 -3810 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 3 -1270 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 4 1270 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 5 3810 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 6 6350 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 7 -6350 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 8 -3810 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 9 -1270 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 10 1270 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 11 3810 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 12 6350 -2220)\r
+    )\r
+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle In1.Cu 1676.4))\r
+      (shape (circle In2.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path In1.Cu 1727.2  0 0  0 0))\r
+      (shape (path In2.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[T]Pad_1280x3680_um\r
+      (shape (rect F.Cu -640 -1840 640 1840))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In1.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In2.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect In1.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect In2.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-3]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle In1.Cu 600))\r
+      (shape (circle In2.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
+    (net "Net-(P8-Pad3)"\r
+      (pins P8-3)\r
+    )\r
+    (net "Net-(P8-Pad6)"\r
+      (pins P8-6)\r
+    )\r
+    (net "Net-(P8-Pad7)"\r
+      (pins P8-7)\r
+    )\r
+    (net "Net-(P8-Pad8)"\r
+      (pins P8-8)\r
+    )\r
+    (net "Net-(P8-Pad9)"\r
+      (pins P8-9)\r
+    )\r
+    (net "Net-(P8-Pad10)"\r
+      (pins P8-10)\r
+    )\r
+    (net "Net-(P8-Pad12)"\r
+      (pins P8-12)\r
+    )\r
+    (net "Net-(P8-Pad13)"\r
+      (pins P8-13)\r
+    )\r
+    (net "Net-(P8-Pad14)"\r
+      (pins P8-14)\r
+    )\r
+    (net "Net-(P8-Pad16)"\r
+      (pins P8-16)\r
+    )\r
+    (net "Net-(P8-Pad18)"\r
+      (pins P8-18)\r
+    )\r
+    (net "Net-(P8-Pad19)"\r
+      (pins P8-19)\r
+    )\r
+    (net "Net-(P8-Pad20)"\r
+      (pins P8-20)\r
+    )\r
+    (net "Net-(P8-Pad21)"\r
+      (pins P8-21)\r
+    )\r
+    (net "Net-(P8-Pad22)"\r
+      (pins P8-22)\r
+    )\r
+    (net "Net-(P8-Pad23)"\r
+      (pins P8-23)\r
+    )\r
+    (net "Net-(P8-Pad24)"\r
+      (pins P8-24)\r
+    )\r
+    (net "Net-(P8-Pad25)"\r
+      (pins P8-25)\r
+    )\r
+    (net "Net-(P8-Pad26)"\r
+      (pins P8-26)\r
+    )\r
+    (net "Net-(P8-Pad27)"\r
+      (pins P8-27)\r
+    )\r
+    (net "Net-(P8-Pad28)"\r
+      (pins P8-28)\r
+    )\r
+    (net "Net-(P8-Pad29)"\r
+      (pins P8-29)\r
+    )\r
+    (net "Net-(P8-Pad30)"\r
+      (pins P8-30)\r
+    )\r
+    (net "Net-(P8-Pad31)"\r
+      (pins P8-31)\r
+    )\r
+    (net "Net-(P8-Pad32)"\r
+      (pins P8-32)\r
+    )\r
+    (net "Net-(P8-Pad33)"\r
+      (pins P8-33)\r
+    )\r
+    (net "Net-(P8-Pad34)"\r
+      (pins P8-34)\r
+    )\r
+    (net "Net-(P8-Pad35)"\r
+      (pins P8-35)\r
+    )\r
+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
+    )\r
+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
+    )\r
+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
+    )\r
+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
+    )\r
+    (net "Net-(P8-Pad40)"\r
+      (pins P8-40)\r
+    )\r
+    (net "Net-(P8-Pad41)"\r
+      (pins P8-41)\r
+    )\r
+    (net "Net-(P8-Pad42)"\r
+      (pins P8-42)\r
+    )\r
+    (net "Net-(P8-Pad43)"\r
+      (pins P8-43)\r
+    )\r
+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
+    )\r
+    (net "Net-(P8-Pad45)"\r
+      (pins P8-45)\r
+    )\r
+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
+    )\r
+    (net "Net-(P9-Pad11)"\r
+      (pins P9-11)\r
+    )\r
+    (net "Net-(P9-Pad12)"\r
+      (pins P9-12)\r
+    )\r
+    (net "Net-(P9-Pad13)"\r
+      (pins P9-13)\r
+    )\r
+    (net "Net-(P9-Pad14)"\r
+      (pins P9-14)\r
+    )\r
+    (net "Net-(P9-Pad15)"\r
+      (pins P9-15)\r
+    )\r
+    (net "Net-(P9-Pad16)"\r
+      (pins P9-16)\r
+    )\r
+    (net "Net-(P9-Pad17)"\r
+      (pins P9-17)\r
+    )\r
+    (net "Net-(P9-Pad18)"\r
+      (pins P9-18)\r
+    )\r
+    (net "Net-(P9-Pad19)"\r
+      (pins P9-19)\r
+    )\r
+    (net "Net-(P9-Pad20)"\r
+      (pins P9-20)\r
+    )\r
+    (net "Net-(P9-Pad21)"\r
+      (pins P9-21)\r
+    )\r
+    (net "Net-(P9-Pad22)"\r
+      (pins P9-22)\r
+    )\r
+    (net "Net-(P9-Pad23)"\r
+      (pins P9-23)\r
+    )\r
+    (net "Net-(P9-Pad24)"\r
+      (pins P9-24)\r
+    )\r
+    (net "Net-(P9-Pad25)"\r
+      (pins P9-25)\r
+    )\r
+    (net "Net-(P9-Pad26)"\r
+      (pins P9-26)\r
+    )\r
+    (net "Net-(P9-Pad27)"\r
+      (pins P9-27)\r
+    )\r
+    (net "Net-(P9-Pad28)"\r
+      (pins P9-28)\r
+    )\r
+    (net "Net-(P9-Pad29)"\r
+      (pins P9-29)\r
+    )\r
+    (net "Net-(P9-Pad30)"\r
+      (pins P9-30)\r
+    )\r
+    (net "Net-(P9-Pad31)"\r
+      (pins P9-31)\r
+    )\r
+    (net "Net-(P9-Pad33)"\r
+      (pins P9-33)\r
+    )\r
+    (net "Net-(P9-Pad35)"\r
+      (pins P9-35)\r
+    )\r
+    (net "Net-(P9-Pad36)"\r
+      (pins P9-36)\r
+    )\r
+    (net "Net-(P9-Pad37)"\r
+      (pins P9-37)\r
+    )\r
+    (net "Net-(P9-Pad38)"\r
+      (pins P9-38)\r
+    )\r
+    (net "Net-(P9-Pad39)"\r
+      (pins P9-39)\r
+    )\r
+    (net "Net-(P9-Pad40)"\r
+      (pins P9-40)\r
+    )\r
+    (net "Net-(P9-Pad41)"\r
+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net "Net-(U1-Pad4)"\r
+      (pins U1-4)\r
+    )\r
+    (net "Net-(U1-Pad5)"\r
+      (pins U1-5)\r
+    )\r
+    (net "Net-(U1-Pad6)"\r
+      (pins U1-6)\r
+    )\r
+    (net "Net-(U1-Pad7)"\r
+      (pins U1-7)\r
+    )\r
+    (net "Net-(U1-Pad9)"\r
+      (pins U1-9)\r
+    )\r
+    (net "Net-(U1-Pad10)"\r
+      (pins U1-10)\r
+    )\r
+    (net "Net-(U1-Pad11)"\r
+      (pins U1-11)\r
+    )\r
+    (net "Net-(U1-Pad12)"\r
+      (pins U1-12)\r
+    )\r
+    (net "Net-(U1-Pad14)"\r
+      (pins U1-14)\r
+    )\r
+    (net "Net-(U1-Pad15)"\r
+      (pins U1-15)\r
+    )\r
+    (net "Net-(U2-Pad15)"\r
+      (pins U2-15)\r
+    )\r
+    (net "Net-(U2-Pad14)"\r
+      (pins U2-14)\r
+    )\r
+    (net "Net-(U2-Pad12)"\r
+      (pins U2-12)\r
+    )\r
+    (net "Net-(U2-Pad11)"\r
+      (pins U2-11)\r
+    )\r
+    (net /d1\r
+      (pins J1-1)\r
+    )\r
+    (net /d2\r
+      (pins J1-2)\r
+    )\r
+    (net /d3\r
+      (pins J1-3)\r
+    )\r
+    (net /d4\r
+      (pins J1-4)\r
+    )\r
+    (net /d5\r
+      (pins J1-5)\r
+    )\r
+    (net /d6\r
+      (pins J1-6)\r
+    )\r
+    (net /d7\r
+      (pins J1-7)\r
+    )\r
+    (net /d8\r
+      (pins J1-8)\r
+    )\r
+    (net "Net-(J1-Pad9)"\r
+      (pins J1-9)\r
+    )\r
+    (net "Net-(J1-Pad10)"\r
+      (pins J1-10)\r
+    )\r
+    (net "Net-(J1-Pad11)"\r
+      (pins J1-11)\r
+    )\r
+    (net "Net-(J1-Pad12)"\r
+      (pins J1-12)\r
+    )\r
+    (net SR1_CLR\r
+      (pins P8-17 U2-9)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins P8-15 U2-7)\r
+    )\r
+    (net SR1_CLK\r
+      (pins P8-11 U2-3)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins P8-5 U2-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins P8-4 U1-2)\r
+    )\r
+    (net PGND\r
+      (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-8 U1-13 U2-13 U2-8 U3-1\r
+        U3-8)\r
+    )\r
+    (net 5v\r
+      (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16)\r
+    )\r
+    (net BB3.3\r
+      (pins P9-4 P9-3 U1-16 U2-1)\r
+    )\r
+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U2-10 U3-9)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U2-6 U3-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U2-4 U3-6)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U2-2 U3-7)\r
+    )\r
+    (net /p8\r
+      (pins U3-14)\r
+    )\r
+    (net /p7\r
+      (pins U3-12)\r
+    )\r
+    (net /p6\r
+      (pins U3-11)\r
+    )\r
+    (net /p5\r
+      (pins U3-10)\r
+    )\r
+    (net /p4\r
+      (pins U3-5)\r
+    )\r
+    (net /p3\r
+      (pins U3-4)\r
+    )\r
+    (net /p2\r
+      (pins U3-3)\r
+    )\r
+    (net /p1\r
+      (pins U3-2)\r
+    )\r
+    (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD\r
+      /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1\r
+      /p2 /p3 /p4 /p5 /p6 /p7 /p8 5v BB3.3 GNDA_ADC GNDD "Net-(J1-Pad10)"\r
+      "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)"\r
+      "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)"\r
+      "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)"\r
+      "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)"\r
+      "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)"\r
+      "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)"\r
+      "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)"\r
+      "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)"\r
+      "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)"\r
+      "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)"\r
+      "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)"\r
+      "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)"\r
+      "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)"\r
+      "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)"\r
+      "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)"\r
+      "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)"\r
+      "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)"\r
+      "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)"\r
+      "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)"\r
+      "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)"\r
+      "Net-(U2-Pad12)" "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)"\r
+      "Net-(U2-Pad6)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)"\r
+      "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PGND\r
+      PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T\r
+      SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SYS_RESETN VDD_ADC\r
+      (circuit\r
+        (use_via Via[0-3]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort6.rules b/bbb-bort6.rules
new file mode 100644 (file)
index 0000000..4ec221e
--- /dev/null
+++ b/bbb-bort6.rules
@@ -0,0 +1,108 @@
+
+(rules PCB bbb-bort6
+  (snap_angle 
+    fortyfive_degree
+  )
+  (autoroute_settings
+    (fanout off)
+    (autoroute on)
+    (postroute on)
+    (vias on)
+    (via_costs 50)
+    (plane_via_costs 5)
+    (start_ripup_costs 100)
+    (start_pass_no 192)
+    (layer_rule F.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.8)
+      (against_preferred_direction_trace_costs 3.1)
+    )
+    (layer_rule In1.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 1.8)
+    )
+    (layer_rule In2.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 2.3)
+    )
+    (layer_rule B.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.8)
+      (against_preferred_direction_trace_costs 2.6)
+    )
+  )
+  (rule
+    (width 250.0)
+    (clear 200.2)
+    (clear 125.0 (type smd_to_turn_gap))
+    (clear 50.0 (type smd_smd))
+  )
+  (padstack "Via[0-3]_600:400_um"
+    (shape
+      (circle F.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle In1.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle In2.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle B.Cu 600.0 0.0 0.0)
+    )
+    (attach off)
+  )
+  (via 
+    "Via[0-3]_600:400_um" "Via[0-3]_600:400_um" default
+  )
+  (via 
+    "Via[0-3]_600:400_um-kicad_default" "Via[0-3]_600:400_um" "kicad_default"
+  )
+  (via_rule
+    default "Via[0-3]_600:400_um"
+  )
+  (via_rule
+    "kicad_default" "Via[0-3]_600:400_um-kicad_default"
+  )
+  (class default
+    (clearance_class default)
+    (via_rule default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu In1.Cu In2.Cu B.Cu)
+    )
+  )
+  (class "kicad_default"
+    "Net-(P8-Pad3)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)"
+    "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)"
+    "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)"
+    "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)"
+    "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P9-Pad11)"
+    "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)"
+    "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)"
+    "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)"
+    "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN" "VDD_ADC"
+    "GNDA_ADC" "Net-(U1-Pad4)" "Net-(U1-Pad5)" "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U1-Pad10)" "Net-(U1-Pad11)"
+    "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U2-Pad15)" "Net-(U2-Pad14)" "Net-(U2-Pad12)" "Net-(U2-Pad11)" /d1
+    /d2 /d3 /d4 /d5 /d6 /d7 /d8 "Net-(J1-Pad9)"
+    "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T"
+    PGND 5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T"
+    /p8 /p7 /p6 /p5 /p4 /p3 /p2 /p1
+    (clearance_class "kicad_default")
+    (via_rule kicad_default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu In1.Cu In2.Cu B.Cu)
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort6.ses b/bbb-bort6.ses
new file mode 100644 (file)
index 0000000..8cde1d4
--- /dev/null
+++ b/bbb-bort6.ses
@@ -0,0 +1,453 @@
+
+(session "bbb-bort6.ses"
+  (base_design "bbb-bort6.dsn")
+  (placement
+    (resolution um 10)
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black
+      (place P8 1062100 -915924 front 0)
+      (place P9 579501 -915924 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"
+      (place U1 960501 -547624 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"
+      (place U2 1328800 -547624 front 0)
+    )
+    (component "SN74HC166N:DIP254P762X508-16"
+      (place U3 1151000 -547624 front 0)
+    )
+    (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD"
+      (place J1 477901 -500024 front 0)
+    )
+  )
+  (was_is
+  )
+  (routes 
+    (resolution um 10)
+    (parser
+      (host_cad "KiCad's Pcbnew")
+      (host_version "(5.0.1)-3")
+    )
+    (library_out 
+      (padstack "Via[0-3]_600:400_um"
+        (shape
+          (circle F.Cu 6000 0 0)
+        )
+        (shape
+          (circle In1.Cu 6000 0 0)
+        )
+        (shape
+          (circle In2.Cu 6000 0 0)
+        )
+        (shape
+          (circle B.Cu 6000 0 0)
+        )
+        (attach off)
+      )
+    )
+    (network_out 
+      (net SR1_CLR
+        (wire
+          (path In2.Cu 2500
+            1062100 -1119124
+            1062100 -1107235
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1328800 -547624
+            1328800 -844174
+            1091140 -1081834
+            1082357 -1081834
+            1073989 -1090202
+            1073989 -1099062
+            1065816 -1107235
+            1062100 -1107235
+          )
+        )
+      )
+      (net SR1_SHLD
+        (wire
+          (path In2.Cu 2500
+            1062100 -1093724
+            1062100 -1081835
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1252600 -522224
+            1225596 -549228
+            1225596 -845495
+            1091667 -979424
+            1057597 -979424
+            1050211 -986810
+            1050211 -1073662
+            1058384 -1081835
+            1062100 -1081835
+          )
+        )
+      )
+      (net SR1_CLK
+        (wire
+          (path In2.Cu 2500
+            1062100 -1031035
+            1065816 -1031035
+            1073989 -1022862
+            1073989 -1013708
+            1082873 -1004824
+            1092080 -1004824
+            1234602 -862302
+            1234602 -548938
+            1248616 -534924
+            1256514 -534924
+            1264517 -526921
+            1264517 -432541
+            1252600 -420624
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1062100 -1042924
+            1062100 -1031035
+          )
+        )
+      )
+      (net SR1_CLKINH
+        (wire
+          (path In2.Cu 2500
+            1062100 -966724
+            1073989 -966724
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1252600 -471424
+            1103452 -620572
+            1103452 -942188
+            1090805 -954835
+            1082162 -954835
+            1073989 -963008
+            1073989 -966724
+          )
+        )
+      )
+      (net SR1_QH_T
+        (wire
+          (path In2.Cu 2500
+            1087500 -941324
+            1075611 -941324
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            884301 -395224
+            938382 -449305
+            938382 -814273
+            1053544 -929435
+            1067438 -929435
+            1075611 -937608
+            1075611 -941324
+          )
+        )
+      )
+      (net PGND
+        (wire
+          (path In1.Cu 2500
+            604901 -1449324
+            604901 -1462835
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            579501 -1449324
+            604901 -1449324
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            604901 -1474724
+            604901 -1462835
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            579501 -1449324
+            579501 -1462835
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            579501 -1474724
+            579501 -1462835
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            992897 -451727
+            992897 -465721
+            1074800 -547624
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1074800 -369824
+            992897 -451727
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            992897 -451727
+            966204 -451727
+            960501 -446024
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1074800 -547624
+            1062100 -560324
+            1062100 -915924
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            960501 -446024
+            898065 -508460
+            898065 -533860
+            884301 -547624
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            583216 -927813
+            591390 -935987
+            591390 -1429262
+            583217 -1437435
+            579501 -1437435
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            579501 -927813
+            583216 -927813
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            593012 -915924
+            593012 -918017
+            583216 -927813
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            604901 -915924
+            593012 -915924
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1074800 -547624
+            1086436 -559260
+            1240964 -559260
+            1252600 -547624
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            579501 -1449324
+            579501 -1437435
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            579501 -915924
+            579501 -927813
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1062100 -915924
+            1087500 -915924
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            604901 -915924
+            1062100 -915924
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1252600 -547624
+            1315036 -485188
+            1315036 -459788
+            1328800 -446024
+          )
+        )
+      )
+      (net 5v
+        (wire
+          (path In1.Cu 2500
+            884301 -369824
+            895936 -369824
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1151000 -369824
+            1139365 -381459
+            907571 -381459
+            895936 -369824
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            604901 -966724
+            604901 -954835
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            884301 -369824
+            884301 -381459
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            884301 -381459
+            881391 -381459
+            872666 -390184
+            872666 -690785
+            608616 -954835
+            604901 -954835
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            604901 -966724
+            604901 -980235
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            579501 -966724
+            604901 -966724
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            604901 -992124
+            604901 -980235
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            579501 -966724
+            579501 -980235
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            579501 -992124
+            579501 -980235
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1151000 -369824
+            1162636 -381460
+            1317164 -381460
+            1328800 -369824
+          )
+        )
+      )
+      (net BB3.3
+        (wire
+          (path In2.Cu 2500
+            604901 -941324
+            604901 -929435
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            604901 -929435
+            608617 -929435
+            616790 -921262
+            616790 -615909
+            874511 -358188
+            948865 -358188
+            960501 -369824
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            579501 -941324
+            604901 -941324
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1252600 -369824
+            1240965 -369824
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1240965 -369824
+            1229329 -358188
+            972137 -358188
+            960501 -369824
+          )
+        )
+      )
+      (net SR1_QH
+        (wire
+          (path In1.Cu 2500
+            1151000 -446024
+            1138300 -433324
+            897001 -433324
+            884301 -420624
+          )
+        )
+      )
+      (net SR1_CLR_T
+        (wire
+          (path In1.Cu 2500
+            1151000 -547624
+            1163700 -534924
+            1316100 -534924
+            1328800 -522224
+          )
+        )
+      )
+      (net SR1_SHLD_T
+        (wire
+          (path In1.Cu 2500
+            1151000 -395224
+            1252600 -496824
+          )
+        )
+      )
+      (net SR1_CLKINH_T
+        (wire
+          (path B.Cu 2500
+            1074800 -496824
+            1112900 -458724
+            1239900 -458724
+            1252600 -446024
+          )
+        )
+      )
+      (net SR1_CLK_T
+        (wire
+          (path In2.Cu 2500
+            1074800 -522224
+            1112900 -484124
+            1163700 -484124
+            1252600 -395224
+          )
+        )
+      )
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort7.dsn b/bbb-bort7.dsn
new file mode 100644 (file)
index 0000000..f8daffe
--- /dev/null
+++ b/bbb-bort7.dsn
@@ -0,0 +1,855 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort7.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
+      (property\r
+        (index 0)\r
+      )\r
+    )\r
+    (layer B.Cu\r
+      (type signal)\r
+      (property\r
+        (index 1)\r
+      )\r
+    )\r
+    (boundary\r
+      (path pcb 0  149390 -176682  32550.1 -176682  32550.1 -28092.4  149390 -28092.4\r
+            149390 -176682)\r
+    )\r
+    (via "Via[0-1]_600:400_um")\r
+    (rule\r
+      (width 250)\r
+      (clearance 200.1)\r
+      (clearance 200.1 (type default_smd))\r
+      (clearance 50 (type smd_smd))\r
+    )\r
+  )\r
+  (placement\r
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (place P8 106210 -91592.4 front 0 (PN BeagleBone_Black_Header))\r
+      (place P9 57950.1 -91592.4 front 0 (PN BeagleBone_Black_Header))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"\r
+      (place U1 96050.1 -54762.4 front 0 (PN 4504))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"\r
+      (place U2 132880 -54762.4 front 0 (PN 4504))\r
+    )\r
+    (component "SN74HC166N:DIP254P762X508-16"\r
+      (place U3 115100 -54762.4 front 0 (PN 74166))\r
+    )\r
+    (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD"\r
+      (place J1 47790.1 -50002.4 front 0 (PN 0015912120))\r
+    )\r
+  )\r
+  (library\r
+    (image Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (outline (path signal 150  -1550 1550  -1550 0))\r
+      (outline (path signal 150  1270 -1270  -1270 -1270))\r
+      (outline (path signal 150  1270 1270  1270 -1270))\r
+      (outline (path signal 150  0 1550  -1550 1550))\r
+      (outline (path signal 150  3810 1270  1270 1270))\r
+      (outline (path signal 150  3810 -57150  -1270 -57150))\r
+      (outline (path signal 150  -1270 -57150  -1270 -1270))\r
+      (outline (path signal 150  3810 -57150  3810 1270))\r
+      (outline (path signal 50  -1750 -57650  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  4300 1750))\r
+      (outline (path signal 50  4300 1750  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  -1750 -57650))\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 46 2540 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 45 0 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 44 2540 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 43 0 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 42 2540 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 41 0 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 40 2540 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 39 0 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 38 2540 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 37 0 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 36 2540 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 35 0 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 34 2540 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 33 0 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 32 2540 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 31 0 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 30 2540 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 29 0 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 28 2540 -33020)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 27 0 -33020)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 26 2540 -30480)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 25 0 -30480)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 24 2540 -27940)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 23 0 -27940)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 22 2540 -25400)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 21 0 -25400)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 20 2540 -22860)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 19 0 -22860)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 18 2540 -20320)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 17 0 -20320)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 16 2540 -17780)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 15 0 -17780)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 14 2540 -15240)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 13 0 -15240)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 12 2540 -12700)\r
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+      (pin Round[A]Pad_1676.4_um 9 0 0)\r
+      (pin Round[A]Pad_1676.4_um 10 0 2540)\r
+      (pin Round[A]Pad_1676.4_um 11 0 5080)\r
+      (pin Round[A]Pad_1676.4_um 12 0 7620)\r
+      (pin Round[A]Pad_1676.4_um 13 0 10160)\r
+      (pin Round[A]Pad_1676.4_um 14 0 12700)\r
+      (pin Round[A]Pad_1676.4_um 15 0 15240)\r
+      (pin Round[A]Pad_1676.4_um 16 0 17780)\r
+    )\r
+    (image "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD"\r
+      (outline (path signal 50  -7850 4325  7875 4325))\r
+      (outline (path signal 50  -7850 -4325  -7850 4325))\r
+      (outline (path signal 50  7875 4275  7875 -4325))\r
+      (outline (path signal 50  -7850 -4325  7850 -4325))\r
+      (outline (path signal 100  -7200 -3600  -7700 -3600))\r
+      (outline (path signal 100  -7700 -3600  -7700 -2200))\r
+      (outline (path signal 100  7200 -3600  7700 -3600))\r
+      (outline (path signal 100  7700 -3600  7700 -2500))\r
+      (outline (path signal 100  7200 3600  7700 3600))\r
+      (outline (path signal 100  7700 3600  7700 2400))\r
+      (outline (path signal 100  -7700 2200  -7700 2700))\r
+      (outline (path signal 100  -7700 2700  -7100 3300))\r
+      (outline (path signal 100  -7100 3300  -7100 3500))\r
+      (outline (path signal 100  -7625 -3500  -7600 2600))\r
+      (outline (path signal 100  7600 3500  -6700 3500))\r
+      (outline (path signal 100  -6700 3500  -7600 2600))\r
+      (outline (path signal 100  7620 3500  7620 -3500))\r
+      (outline (path signal 100  -7620 -3500  7620 -3500))\r
+      (pin Rect[T]Pad_1280x3680_um 1 -6350 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 2 -3810 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 3 -1270 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 4 1270 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 5 3810 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 6 6350 2220)\r
+      (pin Rect[T]Pad_1280x3680_um 7 -6350 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 8 -3810 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 9 -1270 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 10 1270 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 11 3810 -2220)\r
+      (pin Rect[T]Pad_1280x3680_um 12 6350 -2220)\r
+    )\r
+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[T]Pad_1280x3680_um\r
+      (shape (rect F.Cu -640 -1840 640 1840))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-1]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle B.Cu 600))\r
+      (attach off)\r
+    )\r
+  )\r
+  (network\r
+    (net "Net-(P8-Pad3)"\r
+      (pins P8-3)\r
+    )\r
+    (net "Net-(P8-Pad6)"\r
+      (pins P8-6)\r
+    )\r
+    (net "Net-(P8-Pad7)"\r
+      (pins P8-7)\r
+    )\r
+    (net "Net-(P8-Pad8)"\r
+      (pins P8-8)\r
+    )\r
+    (net "Net-(P8-Pad9)"\r
+      (pins P8-9)\r
+    )\r
+    (net "Net-(P8-Pad10)"\r
+      (pins P8-10)\r
+    )\r
+    (net "Net-(P8-Pad12)"\r
+      (pins P8-12)\r
+    )\r
+    (net "Net-(P8-Pad13)"\r
+      (pins P8-13)\r
+    )\r
+    (net "Net-(P8-Pad14)"\r
+      (pins P8-14)\r
+    )\r
+    (net "Net-(P8-Pad16)"\r
+      (pins P8-16)\r
+    )\r
+    (net "Net-(P8-Pad18)"\r
+      (pins P8-18)\r
+    )\r
+    (net "Net-(P8-Pad19)"\r
+      (pins P8-19)\r
+    )\r
+    (net "Net-(P8-Pad20)"\r
+      (pins P8-20)\r
+    )\r
+    (net "Net-(P8-Pad21)"\r
+      (pins P8-21)\r
+    )\r
+    (net "Net-(P8-Pad22)"\r
+      (pins P8-22)\r
+    )\r
+    (net "Net-(P8-Pad23)"\r
+      (pins P8-23)\r
+    )\r
+    (net "Net-(P8-Pad24)"\r
+      (pins P8-24)\r
+    )\r
+    (net "Net-(P8-Pad25)"\r
+      (pins P8-25)\r
+    )\r
+    (net "Net-(P8-Pad26)"\r
+      (pins P8-26)\r
+    )\r
+    (net "Net-(P8-Pad27)"\r
+      (pins P8-27)\r
+    )\r
+    (net "Net-(P8-Pad28)"\r
+      (pins P8-28)\r
+    )\r
+    (net "Net-(P8-Pad29)"\r
+      (pins P8-29)\r
+    )\r
+    (net "Net-(P8-Pad30)"\r
+      (pins P8-30)\r
+    )\r
+    (net "Net-(P8-Pad31)"\r
+      (pins P8-31)\r
+    )\r
+    (net "Net-(P8-Pad32)"\r
+      (pins P8-32)\r
+    )\r
+    (net "Net-(P8-Pad33)"\r
+      (pins P8-33)\r
+    )\r
+    (net "Net-(P8-Pad34)"\r
+      (pins P8-34)\r
+    )\r
+    (net "Net-(P8-Pad35)"\r
+      (pins P8-35)\r
+    )\r
+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
+    )\r
+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
+    )\r
+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
+    )\r
+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
+    )\r
+    (net "Net-(P8-Pad40)"\r
+      (pins P8-40)\r
+    )\r
+    (net "Net-(P8-Pad41)"\r
+      (pins P8-41)\r
+    )\r
+    (net "Net-(P8-Pad42)"\r
+      (pins P8-42)\r
+    )\r
+    (net "Net-(P8-Pad43)"\r
+      (pins P8-43)\r
+    )\r
+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
+    )\r
+    (net "Net-(P8-Pad45)"\r
+      (pins P8-45)\r
+    )\r
+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
+    )\r
+    (net "Net-(P9-Pad11)"\r
+      (pins P9-11)\r
+    )\r
+    (net "Net-(P9-Pad12)"\r
+      (pins P9-12)\r
+    )\r
+    (net "Net-(P9-Pad13)"\r
+      (pins P9-13)\r
+    )\r
+    (net "Net-(P9-Pad14)"\r
+      (pins P9-14)\r
+    )\r
+    (net "Net-(P9-Pad15)"\r
+      (pins P9-15)\r
+    )\r
+    (net "Net-(P9-Pad16)"\r
+      (pins P9-16)\r
+    )\r
+    (net "Net-(P9-Pad17)"\r
+      (pins P9-17)\r
+    )\r
+    (net "Net-(P9-Pad18)"\r
+      (pins P9-18)\r
+    )\r
+    (net "Net-(P9-Pad19)"\r
+      (pins P9-19)\r
+    )\r
+    (net "Net-(P9-Pad20)"\r
+      (pins P9-20)\r
+    )\r
+    (net "Net-(P9-Pad21)"\r
+      (pins P9-21)\r
+    )\r
+    (net "Net-(P9-Pad22)"\r
+      (pins P9-22)\r
+    )\r
+    (net "Net-(P9-Pad23)"\r
+      (pins P9-23)\r
+    )\r
+    (net "Net-(P9-Pad24)"\r
+      (pins P9-24)\r
+    )\r
+    (net "Net-(P9-Pad25)"\r
+      (pins P9-25)\r
+    )\r
+    (net "Net-(P9-Pad26)"\r
+      (pins P9-26)\r
+    )\r
+    (net "Net-(P9-Pad27)"\r
+      (pins P9-27)\r
+    )\r
+    (net "Net-(P9-Pad28)"\r
+      (pins P9-28)\r
+    )\r
+    (net "Net-(P9-Pad29)"\r
+      (pins P9-29)\r
+    )\r
+    (net "Net-(P9-Pad30)"\r
+      (pins P9-30)\r
+    )\r
+    (net "Net-(P9-Pad31)"\r
+      (pins P9-31)\r
+    )\r
+    (net "Net-(P9-Pad33)"\r
+      (pins P9-33)\r
+    )\r
+    (net "Net-(P9-Pad35)"\r
+      (pins P9-35)\r
+    )\r
+    (net "Net-(P9-Pad36)"\r
+      (pins P9-36)\r
+    )\r
+    (net "Net-(P9-Pad37)"\r
+      (pins P9-37)\r
+    )\r
+    (net "Net-(P9-Pad38)"\r
+      (pins P9-38)\r
+    )\r
+    (net "Net-(P9-Pad39)"\r
+      (pins P9-39)\r
+    )\r
+    (net "Net-(P9-Pad40)"\r
+      (pins P9-40)\r
+    )\r
+    (net "Net-(P9-Pad41)"\r
+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net "Net-(U1-Pad4)"\r
+      (pins U1-4)\r
+    )\r
+    (net "Net-(U1-Pad5)"\r
+      (pins U1-5)\r
+    )\r
+    (net "Net-(U1-Pad6)"\r
+      (pins U1-6)\r
+    )\r
+    (net "Net-(U1-Pad7)"\r
+      (pins U1-7)\r
+    )\r
+    (net "Net-(U1-Pad9)"\r
+      (pins U1-9)\r
+    )\r
+    (net "Net-(U1-Pad10)"\r
+      (pins U1-10)\r
+    )\r
+    (net "Net-(U1-Pad11)"\r
+      (pins U1-11)\r
+    )\r
+    (net "Net-(U1-Pad12)"\r
+      (pins U1-12)\r
+    )\r
+    (net "Net-(U1-Pad14)"\r
+      (pins U1-14)\r
+    )\r
+    (net "Net-(U1-Pad15)"\r
+      (pins U1-15)\r
+    )\r
+    (net "Net-(U2-Pad15)"\r
+      (pins U2-15)\r
+    )\r
+    (net "Net-(U2-Pad14)"\r
+      (pins U2-14)\r
+    )\r
+    (net "Net-(U2-Pad12)"\r
+      (pins U2-12)\r
+    )\r
+    (net "Net-(U2-Pad11)"\r
+      (pins U2-11)\r
+    )\r
+    (net /d1\r
+      (pins J1-1)\r
+    )\r
+    (net /d2\r
+      (pins J1-2)\r
+    )\r
+    (net /d3\r
+      (pins J1-3)\r
+    )\r
+    (net /d4\r
+      (pins J1-4)\r
+    )\r
+    (net /d5\r
+      (pins J1-5)\r
+    )\r
+    (net /d6\r
+      (pins J1-6)\r
+    )\r
+    (net /d7\r
+      (pins J1-7)\r
+    )\r
+    (net /d8\r
+      (pins J1-8)\r
+    )\r
+    (net "Net-(J1-Pad9)"\r
+      (pins J1-9)\r
+    )\r
+    (net "Net-(J1-Pad10)"\r
+      (pins J1-10)\r
+    )\r
+    (net "Net-(J1-Pad11)"\r
+      (pins J1-11)\r
+    )\r
+    (net "Net-(J1-Pad12)"\r
+      (pins J1-12)\r
+    )\r
+    (net SR1_CLR\r
+      (pins P8-17 U2-9)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins P8-15 U2-7)\r
+    )\r
+    (net SR1_CLK\r
+      (pins P8-11 U2-3)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins P8-5 U2-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins P8-4 U1-2)\r
+    )\r
+    (net PGND\r
+      (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-8 U1-13 U2-13 U2-8 U3-1\r
+        U3-8)\r
+    )\r
+    (net 5v\r
+      (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16)\r
+    )\r
+    (net BB3.3\r
+      (pins P9-4 P9-3 U1-16 U2-1)\r
+    )\r
+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U2-10 U3-9)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U2-6 U3-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U2-4 U3-6)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U2-2 U3-7)\r
+    )\r
+    (net /p8\r
+      (pins U3-14)\r
+    )\r
+    (net /p7\r
+      (pins U3-12)\r
+    )\r
+    (net /p6\r
+      (pins U3-11)\r
+    )\r
+    (net /p5\r
+      (pins U3-10)\r
+    )\r
+    (net /p4\r
+      (pins U3-5)\r
+    )\r
+    (net /p3\r
+      (pins U3-4)\r
+    )\r
+    (net /p2\r
+      (pins U3-3)\r
+    )\r
+    (net /p1\r
+      (pins U3-2)\r
+    )\r
+    (class kicad_default "" +3V3 +5V /GPIO0_27_SR_CLR /GPIO1_13_SR_CLK /GPIO1_15_SR_SHLD\r
+      /GPIO1_2_SR_CLKINH /GPIO1_7_SR_QH /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1\r
+      /p2 /p3 /p4 /p5 /p6 /p7 /p8 5v BB3.3 GNDA_ADC GNDD "Net-(J1-Pad10)"\r
+      "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)"\r
+      "Net-(P8-Pad13)" "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)"\r
+      "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)"\r
+      "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)"\r
+      "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)"\r
+      "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)"\r
+      "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)"\r
+      "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)"\r
+      "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)"\r
+      "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P9-Pad11)"\r
+      "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)"\r
+      "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)"\r
+      "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)"\r
+      "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)"\r
+      "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)"\r
+      "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)"\r
+      "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)"\r
+      "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)" "Net-(U1-Pad12)"\r
+      "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad3)" "Net-(U1-Pad4)" "Net-(U1-Pad5)"\r
+      "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad10)" "Net-(U2-Pad11)"\r
+      "Net-(U2-Pad12)" "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U2-Pad2)" "Net-(U2-Pad4)"\r
+      "Net-(U2-Pad6)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)"\r
+      "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" PGND\r
+      PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T SR1_CLK_T SR1_CLR SR1_CLR_T\r
+      SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SYS_RESETN VDD_ADC\r
+      (circuit\r
+        (use_via Via[0-1]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+    (wire (path B.Cu 250  115100 -36982.4  116264 -38146  131716 -38146  132880 -36982.4)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  107480 -49682.4  111290 -45872.4  123990 -45872.4  125260 -44602.4)(net SR1_CLKINH_T)(type protect))\r
+  )\r
+)\r

diff --git a/bbb-bort7.rules b/bbb-bort7.rules
new file mode 100644 (file)
index 0000000..c6d360f
--- /dev/null
+++ b/bbb-bort7.rules
@@ -0,0 +1,90 @@
+
+(rules PCB bbb-bort7
+  (snap_angle 
+    fortyfive_degree
+  )
+  (autoroute_settings
+    (fanout off)
+    (autoroute on)
+    (postroute on)
+    (vias on)
+    (via_costs 50)
+    (plane_via_costs 5)
+    (start_ripup_costs 100)
+    (start_pass_no 164)
+    (layer_rule F.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 2.3)
+    )
+    (layer_rule B.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 1.8)
+    )
+  )
+  (rule
+    (width 250.0)
+    (clear 200.2)
+    (clear 125.0 (type smd_to_turn_gap))
+    (clear 50.0 (type smd_smd))
+  )
+  (padstack "Via[0-1]_600:400_um"
+    (shape
+      (circle F.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle B.Cu 600.0 0.0 0.0)
+    )
+    (attach off)
+  )
+  (via 
+    "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default
+  )
+  (via 
+    "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" "kicad_default"
+  )
+  (via_rule
+    default "Via[0-1]_600:400_um"
+  )
+  (via_rule
+    "kicad_default" "Via[0-1]_600:400_um-kicad_default"
+  )
+  (class default
+    (clearance_class default)
+    (via_rule default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+  (class "kicad_default"
+    "Net-(P8-Pad3)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)"
+    "Net-(P8-Pad14)" "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)" "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)"
+    "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)" "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)"
+    "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)" "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)"
+    "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)" "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P9-Pad11)"
+    "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)" "Net-(P9-Pad19)"
+    "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)" "Net-(P9-Pad27)"
+    "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)" "Net-(P9-Pad37)"
+    "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN" "VDD_ADC"
+    "GNDA_ADC" "Net-(U1-Pad4)" "Net-(U1-Pad5)" "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U1-Pad10)" "Net-(U1-Pad11)"
+    "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U2-Pad15)" "Net-(U2-Pad14)" "Net-(U2-Pad12)" "Net-(U2-Pad11)" /d1
+    /d2 /d3 /d4 /d5 /d6 /d7 /d8 "Net-(J1-Pad9)"
+    "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T"
+    PGND 5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T"
+    /p8 /p7 /p6 /p5 /p4 /p3 /p2 /p1
+    (clearance_class "kicad_default")
+    (via_rule kicad_default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu B.Cu)
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort7.ses b/bbb-bort7.ses
new file mode 100644 (file)
index 0000000..770aec0
--- /dev/null
+++ b/bbb-bort7.ses
@@ -0,0 +1,474 @@
+
+(session "bbb-bort7.ses"
+  (base_design "bbb-bort7.dsn")
+  (placement
+    (resolution um 10)
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black
+      (place P8 1062100 -915924 front 0)
+      (place P9 579501 -915924 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"
+      (place U1 960501 -547624 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"
+      (place U2 1328800 -547624 front 0)
+    )
+    (component "SN74HC166N:DIP254P762X508-16"
+      (place U3 1151000 -547624 front 0)
+    )
+    (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD"
+      (place J1 477901 -500024 front 0)
+    )
+  )
+  (was_is
+  )
+  (routes 
+    (resolution um 10)
+    (parser
+      (host_cad "KiCad's Pcbnew")
+      (host_version "(5.0.1)-3")
+    )
+    (library_out 
+      (padstack "Via[0-1]_600:400_um"
+        (shape
+          (circle F.Cu 6000 0 0)
+        )
+        (shape
+          (circle B.Cu 6000 0 0)
+        )
+        (attach off)
+      )
+    )
+    (network_out 
+      (net SR1_CLR
+        (wire
+          (path F.Cu 2500
+            1062100 -1119124
+            1073989 -1119124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1328800 -547624
+            1328800 -869574
+            1091139 -1107235
+            1082162 -1107235
+            1073989 -1115408
+            1073989 -1119124
+          )
+        )
+      )
+      (net SR1_SHLD
+        (wire
+          (path F.Cu 2500
+            1062100 -1093724
+            1062100 -1081835
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1252600 -522224
+            1108479 -666345
+            1108479 -1038984
+            1091029 -1056434
+            1082357 -1056434
+            1073989 -1064802
+            1073989 -1073662
+            1065816 -1081835
+            1062100 -1081835
+          )
+        )
+      )
+      (net SR1_CLK
+        (wire
+          (path F.Cu 2500
+            1062100 -1042924
+            1062100 -1031035
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1062100 -1031035
+            1065816 -1031035
+            1073989 -1022862
+            1073989 -1014002
+            1083167 -1004824
+            1091898 -1004824
+            1103894 -992828
+            1103894 -654083
+            1248453 -509524
+            1256443 -509524
+            1269293 -496674
+            1269293 -437317
+            1252600 -420624
+          )
+        )
+      )
+      (net SR1_CLKINH
+        (wire
+          (path F.Cu 2500
+            1062100 -966724
+            1073989 -966724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1073989 -966724
+            1073989 -963008
+            1082162 -954835
+            1090895 -954835
+            1099390 -946340
+            1099390 -624634
+            1252600 -471424
+          )
+        )
+      )
+      (net SR1_QH_T
+        (wire
+          (path F.Cu 2500
+            1087500 -941324
+            1087500 -929435
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            884301 -395224
+            938382 -449305
+            938382 -746878
+            1075611 -884107
+            1075611 -921262
+            1083784 -929435
+            1087500 -929435
+          )
+        )
+      )
+      (net PGND
+        (wire
+          (path B.Cu 2500
+            1087500 -559260
+            1240964 -559260
+            1252600 -547624
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1074800 -547624
+            1086436 -559260
+            1087500 -559260
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1087500 -559260
+            1087500 -915924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1074800 -369824
+            1074800 -381459
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1005596 -446024
+            1005596 -478420
+            1074800 -547624
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1074800 -381459
+            1070161 -381459
+            1005596 -446024
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1005596 -446024
+            960501 -446024
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1087500 -915924
+            1073989 -915924
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1062100 -915924
+            1073989 -915924
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            960501 -446024
+            898065 -508460
+            898065 -533860
+            884301 -547624
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            583216 -927813
+            591390 -935987
+            591390 -1429262
+            583217 -1437435
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            579501 -927813
+            583216 -927813
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            593012 -915924
+            593012 -918017
+            583216 -927813
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -915924
+            593012 -915924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            583217 -1437435
+            579501 -1437435
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            583217 -1437435
+            593012 -1447230
+            593012 -1449324
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -1449324
+            593012 -1449324
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            579501 -1474724
+            593012 -1474724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            579501 -1449324
+            579501 -1474724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -1474724
+            593012 -1474724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            579501 -1449324
+            579501 -1437435
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            579501 -915924
+            579501 -927813
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            604901 -915924
+            1062100 -915924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1252600 -547624
+            1315036 -485188
+            1315036 -459788
+            1328800 -446024
+          )
+        )
+      )
+      (net 5v
+        (wire
+          (path F.Cu 2500
+            604901 -966724
+            604901 -954835
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            884301 -369824
+            884301 -381459
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            884301 -381459
+            881391 -381459
+            872666 -390184
+            872666 -690785
+            608616 -954835
+            604901 -954835
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            579501 -966724
+            604901 -966724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -966724
+            604901 -992124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            579501 -966724
+            579501 -992124
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            884301 -369824
+            895936 -369824
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1151000 -369824
+            1161513 -380333
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            1161513 -380333
+            1161513 -380334
+            1160388 -381459
+            907571 -381459
+            895936 -369824
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1161513 -380333
+            1162640 -381460
+            1317160 -381460
+            1328800 -369824
+          )
+          (type protect)
+        )
+      )
+      (net BB3.3
+        (wire
+          (path F.Cu 2500
+            604901 -941324
+            604901 -929435
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -929435
+            608617 -929435
+            616790 -921262
+            616790 -615909
+            874511 -358188
+            948865 -358188
+            960501 -369824
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            579501 -941324
+            604901 -941324
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1252600 -369824
+            1240965 -369824
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1240965 -369824
+            1229329 -358188
+            972137 -358188
+            960501 -369824
+          )
+        )
+      )
+      (net SR1_QH
+        (wire
+          (path B.Cu 2500
+            1151000 -446024
+            1138300 -433324
+            897001 -433324
+            884301 -420624
+          )
+        )
+      )
+      (net SR1_CLR_T
+        (wire
+          (path B.Cu 2500
+            1151000 -547624
+            1163700 -534924
+            1316100 -534924
+            1328800 -522224
+          )
+        )
+      )
+      (net SR1_SHLD_T
+        (wire
+          (path F.Cu 2500
+            1151000 -395224
+            1214500 -458724
+            1256486 -458724
+            1264270 -466508
+            1264270 -485154
+            1252600 -496824
+          )
+        )
+      )
+      (net SR1_CLKINH_T
+        (wire
+          (path B.Cu 2500
+            1074800 -496824
+            1112900 -458724
+            1239900 -458724
+            1252600 -446024
+          )
+          (type protect)
+        )
+      )
+      (net SR1_CLK_T
+        (wire
+          (path B.Cu 2500
+            1074800 -522224
+            1112900 -484124
+            1220869 -484124
+            1246269 -458724
+            1256742 -458724
+            1264560 -450906
+            1264560 -407184
+            1252600 -395224
+          )
+        )
+      )
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort8.dsn b/bbb-bort8.dsn
new file mode 100644 (file)
index 0000000..51b546a
--- /dev/null
+++ b/bbb-bort8.dsn
@@ -0,0 +1,1147 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort8.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
+      (property\r
+        (index 0)\r
+      )\r
+    )\r
+    (layer In1.Cu\r
+      (type signal)\r
+      (property\r
+        (index 1)\r
+      )\r
+    )\r
+    (layer In2.Cu\r
+      (type signal)\r
+      (property\r
+        (index 2)\r
+      )\r
+    )\r
+    (layer B.Cu\r
+      (type signal)\r
+      (property\r
+        (index 3)\r
+      )\r
+    )\r
+    (boundary\r
+      (path pcb 0  149390 -176682  32550.1 -176682  32550.1 -28092.4  149390 -28092.4\r
+            149390 -176682)\r
+    )\r
+    (via "Via[0-3]_600:400_um")\r
+    (rule\r
+      (width 250)\r
+      (clearance 200.1)\r
+      (clearance 200.1 (type default_smd))\r
+      (clearance 50 (type smd_smd))\r
+    )\r
+  )\r
+  (placement\r
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (place P8 106210 -91592.4 front 0 (PN BeagleBone_Black_Header))\r
+      (place P9 57950.1 -91592.4 front 0 (PN BeagleBone_Black_Header))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"\r
+      (place U1 96050.1 -54762.4 front 0 (PN 4504))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"\r
+      (place U2 132880 -54762.4 front 0 (PN 4504))\r
+    )\r
+    (component "SN74HC166N:DIP254P762X508-16"\r
+      (place U3 115100 -54762.4 front 0 (PN 74166))\r
+      (place U4 140272 -141554 front 90 (PN 74166))\r
+      (place U6 140272 -122974 front 90 (PN 74166))\r
+      (place U7 140272 -113684 front 90 (PN 74166))\r
+    )\r
+    (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD"\r
+      (place J1 47790.1 -50002.4 front 0 (PN 0015912120))\r
+    )\r
+    (component "SN74HC166N:DIP254P762X508-16::1"\r
+      (place U5 140272 -132264 front 90 (PN 74166))\r
+      (place U8 140272 -104394 front 90 (PN 74166))\r
+    )\r
+  )\r
+  (library\r
+    (image Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (outline (path signal 150  -1550 1550  -1550 0))\r
+      (outline (path signal 150  1270 -1270  -1270 -1270))\r
+      (outline (path signal 150  1270 1270  1270 -1270))\r
+      (outline (path signal 150  0 1550  -1550 1550))\r
+      (outline (path signal 150  3810 1270  1270 1270))\r
+      (outline (path signal 150  3810 -57150  -1270 -57150))\r
+      (outline (path signal 150  -1270 -57150  -1270 -1270))\r
+      (outline (path signal 150  3810 -57150  3810 1270))\r
+      (outline (path signal 50  -1750 -57650  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  4300 1750))\r
+      (outline (path signal 50  4300 1750  4300 -57650))\r
+      (outline (path signal 50  -1750 1750  -1750 -57650))\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 46 2540 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 45 0 -55880)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 44 2540 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 43 0 -53340)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 42 2540 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 41 0 -50800)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 40 2540 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 39 0 -48260)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 38 2540 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 37 0 -45720)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 36 2540 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 35 0 -43180)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 34 2540 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 33 0 -40640)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 32 2540 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 31 0 -38100)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 30 2540 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 29 0 -35560)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 28 2540 -33020)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 27 0 -33020)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 26 2540 -30480)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 25 0 -30480)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 24 2540 -27940)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 23 0 -27940)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 22 2540 -25400)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 21 0 -25400)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 20 2540 -22860)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 19 0 -22860)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 18 2540 -20320)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 17 0 -20320)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 16 2540 -17780)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 15 0 -17780)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 14 2540 -15240)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 13 0 -15240)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 12 2540 -12700)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 11 0 -12700)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 10 2540 -10160)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 9 0 -10160)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 8 2540 -7620)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 7 0 -7620)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 6 2540 -5080)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 5 0 -5080)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 4 2540 -2540)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 3 0 -2540)\r
+      (pin Oval[A]Pad_1727.2x1727.2_um 2 2540 0)\r
+      (pin Rect[A]Pad_1727.2x1727.2_um 1 0 0)\r
+    )\r
+    (image "DIP254P762X508-16N:DIP254P762X508-16N"\r
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+      (pin Round[A]Pad_1676.4_um 16 0 17780)\r
+      (pin Round[A]Pad_1676.4_um 15 0 15240)\r
+      (pin Round[A]Pad_1676.4_um 14 0 12700)\r
+      (pin Round[A]Pad_1676.4_um 13 0 10160)\r
+      (pin Round[A]Pad_1676.4_um 12 0 7620)\r
+      (pin Round[A]Pad_1676.4_um 11 0 5080)\r
+      (pin Round[A]Pad_1676.4_um 10 0 2540)\r
+      (pin Round[A]Pad_1676.4_um 9 0 0)\r
+      (pin Round[A]Pad_1676.4_um 8 -7620 0)\r
+      (pin Round[A]Pad_1676.4_um 7 -7620 2540)\r
+      (pin Round[A]Pad_1676.4_um 6 -7620 5080)\r
+      (pin Round[A]Pad_1676.4_um 5 -7620 7620)\r
+      (pin Round[A]Pad_1676.4_um 4 -7620 10160)\r
+      (pin Round[A]Pad_1676.4_um 3 -7620 12700)\r
+      (pin Round[A]Pad_1676.4_um 2 -7620 15240)\r
+      (pin Rect[A]Pad_1676.4x1676.4_um 1 -7620 17780)\r
+    )\r
+    (padstack Round[A]Pad_1676.4_um\r
+      (shape (circle F.Cu 1676.4))\r
+      (shape (circle In1.Cu 1676.4))\r
+      (shape (circle In2.Cu 1676.4))\r
+      (shape (circle B.Cu 1676.4))\r
+      (attach off)\r
+    )\r
+    (padstack Oval[A]Pad_1727.2x1727.2_um\r
+      (shape (path F.Cu 1727.2  0 0  0 0))\r
+      (shape (path In1.Cu 1727.2  0 0  0 0))\r
+      (shape (path In2.Cu 1727.2  0 0  0 0))\r
+      (shape (path B.Cu 1727.2  0 0  0 0))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[T]Pad_1280x3680_um\r
+      (shape (rect F.Cu -640 -1840 640 1840))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1676.4x1676.4_um\r
+      (shape (rect F.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In1.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect In2.Cu -838.2 -838.2 838.2 838.2))\r
+      (shape (rect B.Cu -838.2 -838.2 838.2 838.2))\r
+      (attach off)\r
+    )\r
+    (padstack Rect[A]Pad_1727.2x1727.2_um\r
+      (shape (rect F.Cu -863.6 -863.6 863.6 863.6))\r
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+      (shape (rect In2.Cu -863.6 -863.6 863.6 863.6))\r
+      (shape (rect B.Cu -863.6 -863.6 863.6 863.6))\r
+      (attach off)\r
+    )\r
+    (padstack "Via[0-3]_600:400_um"\r
+      (shape (circle F.Cu 600))\r
+      (shape (circle In1.Cu 600))\r
+      (shape (circle In2.Cu 600))\r
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+      (attach off)\r
+    )\r
+  )\r
+  (network\r
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+      (pins P8-3)\r
+    )\r
+    (net "Net-(P8-Pad7)"\r
+      (pins P8-7)\r
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+    (net "Net-(P8-Pad13)"\r
+      (pins P8-13)\r
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+    (net "Net-(P8-Pad19)"\r
+      (pins P8-19)\r
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+      (pins P8-20)\r
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+    (net "Net-(P8-Pad21)"\r
+      (pins P8-21)\r
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+    (net "Net-(P8-Pad22)"\r
+      (pins P8-22)\r
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+      (pins P8-28)\r
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+    (net "Net-(P8-Pad29)"\r
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+    (net "Net-(P8-Pad30)"\r
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+      (pins P8-32)\r
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+    (net "Net-(P8-Pad33)"\r
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+    (net "Net-(P8-Pad35)"\r
+      (pins P8-35)\r
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+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
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+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
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+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
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+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
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+      (pins P8-40)\r
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+      (pins P8-41)\r
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+    (net "Net-(P8-Pad42)"\r
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+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
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+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
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+    (net "Net-(P9-Pad17)"\r
+      (pins P9-17)\r
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+    (net "Net-(P9-Pad24)"\r
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+      (pins P9-41)\r
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+      (pins P9-42)\r
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+    (net SYS_RESETN\r
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+    (net VDD_ADC\r
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+    (net GNDA_ADC\r
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+      (pins P8-5 U2-5)\r
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+        U3-8 U4-1 U4-8 U5-8 U5-1 U6-1 U6-8 U7-1 U7-8 U8-8 U8-1)\r
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+      (pins U1-16 U2-1)\r
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+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
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+    (net SR1_CLR_T\r
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+    (net SR1_SHLD_T\r
+      (pins U2-6 U3-15 U4-15 U5-15 U6-15 U7-15 U8-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
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+    )\r
+    (net SR1_CLK_T\r
+      (pins U2-2 U3-7 U4-7 U5-7 U6-7 U7-7 U8-7)\r
+    )\r
+    (net 7SEG_CLK\r
+      (pins P8-45 U2-11)\r
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+      (pins P8-43 U2-14)\r
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+    (net +3V3\r
+      (pins P9-4 P9-3)\r
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+    (net SR2_QH__T\r
+      (pins U1-4)\r
+    )\r
+    (net SR2_QH\r
+      (pins U1-5 U7-13)\r
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+    (net SR3_QH\r
+      (pins U1-7 U8-13)\r
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+    (net SR4_QH\r
+      (pins U1-9 U6-13)\r
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+    (net SR5_QH\r
+      (pins U1-11 U5-13)\r
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+    (net SR6_QH\r
+      (pins U1-14 U4-13)\r
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+    (net 7SEG_DIO_T\r
+      (pins U2-15)\r
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+    (net 7SEG_CLK_T\r
+      (pins U2-12)\r
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+    (net "Net-(U3-Pad2)"\r
+      (pins U3-2)\r
+    )\r
+    (net "Net-(U3-Pad3)"\r
+      (pins U3-3)\r
+    )\r
+    (net "Net-(U3-Pad4)"\r
+      (pins U3-4)\r
+    )\r
+    (net "Net-(U3-Pad5)"\r
+      (pins U3-5)\r
+    )\r
+    (net "Net-(U3-Pad10)"\r
+      (pins U3-10)\r
+    )\r
+    (net "Net-(U3-Pad11)"\r
+      (pins U3-11)\r
+    )\r
+    (net "Net-(U3-Pad12)"\r
+      (pins U3-12)\r
+    )\r
+    (net "Net-(U3-Pad14)"\r
+      (pins U3-14)\r
+    )\r
+    (net "Net-(U4-Pad2)"\r
+      (pins U4-2)\r
+    )\r
+    (net "Net-(U4-Pad3)"\r
+      (pins U4-3)\r
+    )\r
+    (net "Net-(U4-Pad4)"\r
+      (pins U4-4)\r
+    )\r
+    (net "Net-(U4-Pad5)"\r
+      (pins U4-5)\r
+    )\r
+    (net "Net-(U4-Pad10)"\r
+      (pins U4-10)\r
+    )\r
+    (net "Net-(U4-Pad11)"\r
+      (pins U4-11)\r
+    )\r
+    (net "Net-(U4-Pad12)"\r
+      (pins U4-12)\r
+    )\r
+    (net "Net-(U4-Pad14)"\r
+      (pins U4-14)\r
+    )\r
+    (net "Net-(U5-Pad14)"\r
+      (pins U5-14)\r
+    )\r
+    (net "Net-(U5-Pad12)"\r
+      (pins U5-12)\r
+    )\r
+    (net "Net-(U5-Pad11)"\r
+      (pins U5-11)\r
+    )\r
+    (net "Net-(U5-Pad10)"\r
+      (pins U5-10)\r
+    )\r
+    (net "Net-(U5-Pad5)"\r
+      (pins U5-5)\r
+    )\r
+    (net "Net-(U5-Pad4)"\r
+      (pins U5-4)\r
+    )\r
+    (net "Net-(U5-Pad3)"\r
+      (pins U5-3)\r
+    )\r
+    (net "Net-(U5-Pad2)"\r
+      (pins U5-2)\r
+    )\r
+    (net "Net-(U6-Pad2)"\r
+      (pins U6-2)\r
+    )\r
+    (net "Net-(U6-Pad3)"\r
+      (pins U6-3)\r
+    )\r
+    (net "Net-(U6-Pad4)"\r
+      (pins U6-4)\r
+    )\r
+    (net "Net-(U6-Pad5)"\r
+      (pins U6-5)\r
+    )\r
+    (net "Net-(U6-Pad10)"\r
+      (pins U6-10)\r
+    )\r
+    (net "Net-(U6-Pad11)"\r
+      (pins U6-11)\r
+    )\r
+    (net "Net-(U6-Pad12)"\r
+      (pins U6-12)\r
+    )\r
+    (net "Net-(U6-Pad14)"\r
+      (pins U6-14)\r
+    )\r
+    (net "Net-(U7-Pad2)"\r
+      (pins U7-2)\r
+    )\r
+    (net "Net-(U7-Pad3)"\r
+      (pins U7-3)\r
+    )\r
+    (net "Net-(U7-Pad4)"\r
+      (pins U7-4)\r
+    )\r
+    (net "Net-(U7-Pad5)"\r
+      (pins U7-5)\r
+    )\r
+    (net "Net-(U7-Pad10)"\r
+      (pins U7-10)\r
+    )\r
+    (net "Net-(U7-Pad11)"\r
+      (pins U7-11)\r
+    )\r
+    (net "Net-(U7-Pad12)"\r
+      (pins U7-12)\r
+    )\r
+    (net "Net-(U7-Pad14)"\r
+      (pins U7-14)\r
+    )\r
+    (net "Net-(U8-Pad14)"\r
+      (pins U8-14)\r
+    )\r
+    (net "Net-(U8-Pad12)"\r
+      (pins U8-12)\r
+    )\r
+    (net "Net-(U8-Pad11)"\r
+      (pins U8-11)\r
+    )\r
+    (net "Net-(U8-Pad10)"\r
+      (pins U8-10)\r
+    )\r
+    (net "Net-(U8-Pad5)"\r
+      (pins U8-5)\r
+    )\r
+    (net "Net-(U8-Pad4)"\r
+      (pins U8-4)\r
+    )\r
+    (net "Net-(U8-Pad3)"\r
+      (pins U8-3)\r
+    )\r
+    (net "Net-(U8-Pad2)"\r
+      (pins U8-2)\r
+    )\r
+    (class kicad_default "" +3V3 /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1 /p2 /p3\r
+      /p4 /p5 /p6 /p7 /p8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3\r
+      GNDA_ADC "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)"\r
+      "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)"\r
+      "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"\r
+      "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)"\r
+      "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"\r
+      "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)"\r
+      "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"\r
+      "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)"\r
+      "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)"\r
+      "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)"\r
+      "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)"\r
+      "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"\r
+      "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)"\r
+      "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"\r
+      "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)"\r
+      "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"\r
+      "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)"\r
+      "Net-(P9-Pad41)" "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)"\r
+      "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad4)" "Net-(U1-Pad5)"\r
+      "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad11)" "Net-(U2-Pad12)"\r
+      "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U3-Pad10)" "Net-(U3-Pad11)"\r
+      "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)"\r
+      "Net-(U3-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)"\r
+      "Net-(U4-Pad2)" "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U5-Pad10)"\r
+      "Net-(U5-Pad11)" "Net-(U5-Pad12)" "Net-(U5-Pad14)" "Net-(U5-Pad2)" "Net-(U5-Pad3)"\r
+      "Net-(U5-Pad4)" "Net-(U5-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)"\r
+      "Net-(U6-Pad14)" "Net-(U6-Pad2)" "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)"\r
+      "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)"\r
+      "Net-(U7-Pad2)" "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U8-Pad10)"\r
+      "Net-(U8-Pad11)" "Net-(U8-Pad12)" "Net-(U8-Pad14)" "Net-(U8-Pad2)" "Net-(U8-Pad3)"\r
+      "Net-(U8-Pad4)" "Net-(U8-Pad5)" PGND PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T\r
+      SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SR2_QH\r
+      SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH SR4_QH_T SR5_QH SR5_QH_T SR6_QH\r
+      SR6_QH_T SYS_RESETN VDD_ADC\r
+      (circuit\r
+        (use_via Via[0-3]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+    (wire (path F.Cu 250  106210 -111912  107399 -111912)(net SR1_CLR)(type protect))\r
+    (wire (path F.Cu 250  132880 -54762.4  132880 -86957.4  109114 -110724  108216 -110724\r
+            107399 -111541  107399 -111912)(net SR1_CLR)(type protect))\r
+    (wire (path F.Cu 250  106210 -109372  106210 -108184)(net SR1_SHLD)(type protect))\r
+    (wire (path F.Cu 250  125260 -52222.4  110848 -66634.5  110848 -103898  109103 -105643\r
+            108236 -105643  107399 -106480  107399 -107366  106582 -108184\r
+            106210 -108184)(net SR1_SHLD)(type protect))\r
+    (wire (path F.Cu 250  106210 -104292  106210 -103104  106582 -103104  107399 -102286\r
+            107399 -101400  108317 -100482  109190 -100482  110389 -99282.8\r
+            110389 -65408.3  124845 -50952.4  125644 -50952.4  126929 -49667.4\r
+            126929 -43731.7  125260 -42062.4)(net SR1_CLK)(type protect))\r
+    (wire (path F.Cu 250  106210 -96672.4  107399 -96672.4  107399 -96300.8  108216 -95483.5\r
+            109090 -95483.5  109939 -94634  109939 -62463.4  125260 -47142.4)(net SR1_CLKINH)(type protect))\r
+    (wire (path F.Cu 250  108750 -94132.4  108750 -92943.5)(net SR1_QH_T)(type protect))\r
+    (wire (path F.Cu 250  88430.1 -39522.4  93838.2 -44930.5  93838.2 -74687.8  107561 -88410.7\r
+            107561 -92126.2  108378 -92943.5  108750 -92943.5)(net SR1_QH_T)(type protect))\r
+    (wire (path B.Cu 250  108750 -55926  124096 -55926  125260 -54762.4)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  107480 -54762.4  108644 -55926  108750 -55926  108750 -91592.4)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  107480 -36982.4  107480 -38145.9)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  100560 -44602.4  100560 -47842  107480 -54762.4)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  107480 -38145.9  107016 -38145.9  100560 -44602.4  96050.1 -44602.4)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  108750 -91592.4  107399 -91592.4)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  106210 -91592.4  107399 -91592.4)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  96050.1 -44602.4  89806.5 -50846  89806.5 -53386  88430.1 -54762.4)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  58321.6 -92781.3  59139 -93598.7  59139 -142926  58321.7 -143744)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  57950.1 -92781.3  58321.6 -92781.3)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  59301.2 -91592.4  59301.2 -91801.7  58321.6 -92781.3)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  60490.1 -91592.4  59301.2 -91592.4)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  58321.7 -143744  57950.1 -143744)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  58321.7 -143744  59301.2 -144723  59301.2 -144932)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  60490.1 -144932  59301.2 -144932)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  57950.1 -147472  59301.2 -147472)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  57950.1 -144932  57950.1 -147472)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  60490.1 -147472  59301.2 -147472)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  57950.1 -144932  57950.1 -143744)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  57950.1 -91592.4  57950.1 -92781.3)(net PGND)(type protect))\r
+    (wire (path B.Cu 250  60490.1 -91592.4  106210 -91592.4)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  125260 -54762.4  131504 -48518.8  131504 -45978.8  132880 -44602.4)(net PGND)(type protect))\r
+    (wire (path F.Cu 250  60490.1 -96672.4  60490.1 -95483.5)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  88430.1 -36982.4  88430.1 -38145.9  88139.1 -38145.9  87266.6 -39018.4\r
+            87266.6 -69078.5  60861.6 -95483.5  60490.1 -95483.5)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  57950.1 -96672.4  60490.1 -96672.4)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  60490.1 -96672.4  60490.1 -99212.4)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  57950.1 -96672.4  57950.1 -99212.4)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  88430.1 -36982.4  89593.6 -36982.4)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  115100 -36982.4  116151 -38033.3  116151 -38033.4  116039 -38145.9\r
+            90757.1 -38145.9  89593.6 -36982.4)(net 5v)(type protect))\r
+    (wire (path B.Cu 250  116151 -38033.3  116264 -38146  131716 -38146  132880 -36982.4)(net 5v)(type protect))\r
+    (wire (path F.Cu 250  60490.1 -94132.4  60490.1 -92943.5  60861.7 -92943.5  61679 -92126.2\r
+            61679 -61590.9  87451.1 -35818.8  94886.5 -35818.8  96050.1 -36982.4)(net BB3.3)(type protect))\r
+    (wire (path B.Cu 250  57950.1 -94132.4  60490.1 -94132.4)(net BB3.3)(type protect))\r
+    (wire (path B.Cu 250  125260 -36982.4  124096 -36982.4  122933 -35818.8  97213.7 -35818.8\r
+            96050.1 -36982.4)(net BB3.3)(type protect))\r
+    (wire (path B.Cu 250  115100 -44602.4  113830 -43332.4  89700.1 -43332.4  88430.1 -42062.4)(net SR1_QH)(type protect))\r
+    (wire (path B.Cu 250  115100 -54762.4  116370 -53492.4  131610 -53492.4  132880 -52222.4)(net SR1_CLR_T)(type protect))\r
+    (wire (path F.Cu 250  115100 -39522.4  121450 -45872.4  125649 -45872.4  126427 -46650.8\r
+            126427 -48515.4  125260 -49682.4)(net SR1_SHLD_T)(type protect))\r
+    (wire (path B.Cu 250  107480 -49682.4  111290 -45872.4  123990 -45872.4  125260 -44602.4)(net SR1_CLKINH_T)(type protect))\r
+    (wire (path B.Cu 250  107480 -52222.4  111290 -48412.4  122087 -48412.4  124627 -45872.4\r
+            125674 -45872.4  126456 -45090.6  126456 -40718.4  125260 -39522.4)(net SR1_CLK_T)(type protect))\r
+  )\r
+)\r

diff --git a/bbb-bort8.rules b/bbb-bort8.rules
new file mode 100644 (file)
index 0000000..d449189
--- /dev/null
+++ b/bbb-bort8.rules
@@ -0,0 +1,113 @@
+
+(rules PCB bbb-bort8
+  (snap_angle 
+    fortyfive_degree
+  )
+  (autoroute_settings
+    (fanout off)
+    (autoroute on)
+    (postroute on)
+    (vias on)
+    (via_costs 50)
+    (plane_via_costs 5)
+    (start_ripup_costs 100)
+    (start_pass_no 385)
+    (layer_rule F.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.8)
+      (against_preferred_direction_trace_costs 3.1)
+    )
+    (layer_rule In1.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 1.8)
+    )
+    (layer_rule In2.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 2.3)
+    )
+    (layer_rule B.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.8)
+      (against_preferred_direction_trace_costs 2.6)
+    )
+  )
+  (rule
+    (width 250.0)
+    (clear 200.2)
+    (clear 125.0 (type smd_to_turn_gap))
+    (clear 50.0 (type smd_smd))
+  )
+  (padstack "Via[0-3]_600:400_um"
+    (shape
+      (circle F.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle In1.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle In2.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle B.Cu 600.0 0.0 0.0)
+    )
+    (attach off)
+  )
+  (via 
+    "Via[0-3]_600:400_um" "Via[0-3]_600:400_um" default
+  )
+  (via 
+    "Via[0-3]_600:400_um-kicad_default" "Via[0-3]_600:400_um" "kicad_default"
+  )
+  (via_rule
+    default "Via[0-3]_600:400_um"
+  )
+  (via_rule
+    "kicad_default" "Via[0-3]_600:400_um-kicad_default"
+  )
+  (class default
+    (clearance_class default)
+    (via_rule default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu In1.Cu In2.Cu B.Cu)
+    )
+  )
+  (class "kicad_default"
+    "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"
+    "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"
+    "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"
+    "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)"
+    "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"
+    "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"
+    "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"
+    "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN"
+    "VDD_ADC" "GNDA_ADC" /d1 /d2 /d3 /d4 /d5 /d6
+    /d7 /d8 "Net-(J1-Pad9)" "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "SR1_CLR" "SR1_SHLD"
+    "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND 5v BB3.3 "SR1_QH" "SR1_CLR_T"
+    "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK" "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T"
+    "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T" "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH"
+    "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" "Net-(U3-Pad10)"
+    "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U4-Pad2)" "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U4-Pad10)"
+    "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)" "Net-(U5-Pad14)" "Net-(U5-Pad12)" "Net-(U5-Pad11)" "Net-(U5-Pad10)" "Net-(U5-Pad5)"
+    "Net-(U5-Pad4)" "Net-(U5-Pad3)" "Net-(U5-Pad2)" "Net-(U6-Pad2)" "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)" "Net-(U6-Pad10)"
+    "Net-(U6-Pad11)" "Net-(U6-Pad12)" "Net-(U6-Pad14)" "Net-(U7-Pad2)" "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U7-Pad10)"
+    "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)" "Net-(U8-Pad14)" "Net-(U8-Pad12)" "Net-(U8-Pad11)" "Net-(U8-Pad10)" "Net-(U8-Pad5)"
+    "Net-(U8-Pad4)" "Net-(U8-Pad3)" "Net-(U8-Pad2)"
+    (clearance_class "kicad_default")
+    (via_rule kicad_default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu In1.Cu In2.Cu B.Cu)
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort8.ses b/bbb-bort8.ses
new file mode 100644 (file)
index 0000000..f006d45
--- /dev/null
+++ b/bbb-bort8.ses
@@ -0,0 +1,1048 @@
+
+(session "bbb-bort8.ses"
+  (base_design "bbb-bort8.dsn")
+  (placement
+    (resolution um 10)
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black
+      (place P8 1062100 -915924 front 0)
+      (place P9 579501 -915924 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"
+      (place U1 960501 -547624 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"
+      (place U2 1328800 -547624 front 0)
+    )
+    (component "SN74HC166N:DIP254P762X508-16"
+      (place U3 1151000 -547624 front 0)
+      (place U4 1402720 -1415540 front 90)
+      (place U6 1402720 -1229740 front 90)
+      (place U7 1402720 -1136840 front 90)
+    )
+    (component "digikey-footprints:PinHeader_2x6_P2.54mm_Vertical_SMD"
+      (place J1 477901 -500024 front 0)
+    )
+    (component "SN74HC166N:DIP254P762X508-16::1"
+      (place U5 1402720 -1322640 front 90)
+      (place U8 1402720 -1043940 front 90)
+    )
+  )
+  (was_is
+  )
+  (routes 
+    (resolution um 10)
+    (parser
+      (host_cad "KiCad's Pcbnew")
+      (host_version "(5.0.1)-3")
+    )
+    (library_out 
+      (padstack "Via[0-3]_600:400_um"
+        (shape
+          (circle F.Cu 6000 0 0)
+        )
+        (shape
+          (circle In1.Cu 6000 0 0)
+        )
+        (shape
+          (circle In2.Cu 6000 0 0)
+        )
+        (shape
+          (circle B.Cu 6000 0 0)
+        )
+        (attach off)
+      )
+    )
+    (network_out 
+      (net SR1_CLR
+        (wire
+          (path F.Cu 2500
+            1062104 -1119120
+            1062100 -1119124
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1328800 -547624
+            1328800 -869574
+            1091140 -1107240
+            1082160 -1107240
+            1073990 -1115410
+            1073990 -1119120
+            1062104 -1119120
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            1062104 -1119120
+            1062100 -1119120
+          )
+          (type protect)
+        )
+      )
+      (net SR1_SHLD
+        (wire
+          (path F.Cu 2500
+            1062100 -1093720
+            1062100 -1093724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1252600 -522224
+            1108480 -666345
+            1108480 -1038980
+            1091030 -1056430
+            1082360 -1056430
+            1073990 -1064800
+            1073990 -1073660
+            1065820 -1081840
+            1062100 -1081840
+            1062100 -1093720
+          )
+          (type protect)
+        )
+      )
+      (net SR1_CLK
+        (wire
+          (path F.Cu 2500
+            1062100 -1042920
+            1062100 -1042924
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1062100 -1042920
+            1062100 -1031040
+            1065820 -1031040
+            1073990 -1022860
+            1073990 -1014000
+            1083170 -1004820
+            1091900 -1004820
+            1103890 -992828
+            1103890 -654083
+            1248450 -509524
+            1256440 -509524
+            1269290 -496674
+            1269290 -437317
+            1252600 -420624
+          )
+          (type protect)
+        )
+      )
+      (net SR1_CLKINH
+        (wire
+          (path F.Cu 2500
+            1062100 -966724
+            1073990 -966724
+            1073990 -963008
+            1082160 -954835
+            1090900 -954835
+            1099390 -946340
+            1099390 -624634
+            1252600 -471424
+          )
+          (type protect)
+        )
+      )
+      (net SR1_QH_T
+        (wire
+          (path F.Cu 2500
+            884301 -395224
+            938382 -449305
+            938382 -746878
+            1075610 -884107
+            1075610 -921262
+            1083780 -929435
+            1087500 -929435
+            1087500 -941324
+          )
+          (type protect)
+        )
+      )
+      (net PGND
+        (wire
+          (path In2.Cu 2500
+            1224920 -1305940
+            1236735 -1317755
+            1236735 -1331621
+            1224920 -1343436
+            1224920 -1398840
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1402720 -1398840
+            1391084 -1387204
+            1391084 -1317576
+            1402720 -1305940
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1402720 -1213040
+            1391084 -1224676
+            1391084 -1294304
+            1402720 -1305940
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1402720 -1398840
+            1391084 -1410476
+            1391084 -1480104
+            1402720 -1491740
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1402720 -1120140
+            1391084 -1131776
+            1391084 -1201404
+            1402720 -1213040
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1224920 -1120140
+            1224920 -1108505
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1087500 -915924
+            1113614 -915924
+            1236555 -1038865
+            1236555 -1096870
+            1224920 -1108505
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604897 -1474720
+            604901 -1474724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604897 -1474720
+            579505 -1474720
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -1474720
+            604897 -1474720
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            579505 -1474720
+            579501 -1474724
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            579505 -1474720
+            579501 -1474720
+            579501 -1449324
+          )
+          (type protect)
+        )
+        (wire
+          (path In1.Cu 2500
+            1224920 -1491740
+            1236555 -1491740
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1402720 -1491740
+            1391085 -1503375
+            1245280 -1503375
+            1236555 -1494650
+            1236555 -1491740
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1224920 -1120140
+            1236555 -1131775
+            1236555 -1189770
+            1224920 -1201405
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1224920 -1305940
+            1224920 -1294305
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1224920 -1213040
+            1236555 -1224675
+            1236555 -1282670
+            1224920 -1294305
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1224920 -1491740
+            1224920 -1480105
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1224920 -1398840
+            1236555 -1410475
+            1236555 -1468470
+            1224920 -1480105
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1224920 -1213040
+            1224920 -1201405
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604897 -1449320
+            604901 -1449324
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            604897 -1449320
+            593012 -1449320
+            593012 -1447230
+            583217 -1437440
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -1449320
+            604897 -1449320
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            1087500 -559260
+            1087500 -915924
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            1074800 -547624
+            1086440 -559260
+            1087500 -559260
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            1005600 -446024
+            960501 -446024
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            1074800 -369824
+            1074800 -381459
+            1070160 -381459
+            1005600 -446024
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            579501 -1449324
+            579501 -1437440
+            583217 -1437440
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            1252600 -547624
+            1315040 -485188
+            1315040 -459788
+            1328800 -446024
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            604901 -915924
+            1062100 -915924
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            579501 -915924
+            579501 -927813
+            583216 -927813
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -915924
+            593012 -915924
+            593012 -918017
+            583216 -927813
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            583216 -927813
+            591390 -935987
+            591390 -1429260
+            583217 -1437440
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            960501 -446024
+            898065 -508460
+            898065 -533860
+            884301 -547624
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            1062100 -915924
+            1087500 -915924
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            1005600 -446024
+            1005600 -478420
+            1074800 -547624
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            1087500 -559260
+            1240960 -559260
+            1252600 -547624
+          )
+          (type protect)
+        )
+      )
+      (net 5v
+        (wire
+          (path In1.Cu 2500
+            1224920 -1229740
+            1212589 -1242071
+            1212589 -1315760
+            1219469 -1322640
+            1224920 -1322640
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1219991 -1136840
+            1224920 -1136840
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1224920 -1043940
+            1213284 -1055576
+            1213284 -1130133
+            1219991 -1136840
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1224920 -1229740
+            1219857 -1229740
+            1213284 -1223167
+            1213284 -1143547
+            1219991 -1136840
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1224920 -1322640
+            1213147 -1334413
+            1213147 -1408647
+            1220040 -1415540
+            1224920 -1415540
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            604901 -992124
+            616790 -992124
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            616790 -992124
+            628679 -1004013
+            1184993 -1004013
+            1224920 -1043940
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1151000 -369824
+            1161510 -380333
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            1161510 -380333
+            1162640 -381460
+            1317160 -381460
+            1328800 -369824
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            884301 -369824
+            895936 -369824
+            907571 -381459
+            1160390 -381459
+            1161510 -380334
+            1161510 -380333
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            579501 -966724
+            579501 -992124
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -966724
+            604901 -992124
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            579501 -966724
+            604901 -966724
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            884301 -369824
+            884301 -381459
+            881391 -381459
+            872666 -390184
+            872666 -690785
+            608616 -954835
+            604901 -954835
+            604901 -966724
+          )
+          (type protect)
+        )
+      )
+      (net BB3.3
+        (wire
+          (path F.Cu 2500
+            610554 -927498
+            611590 -928534
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            593011 -941324
+            593011 -935767
+            600244 -928534
+            611590 -928534
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            593011 -941324
+            604901 -941324
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            579501 -941324
+            593011 -941324
+          )
+          (type protect)
+        )
+        (via "Via[0-3]_600:400_um" 611590 -928534
+        )
+        (wire
+          (path F.Cu 2500
+            610554 -927498
+            616790 -921262
+            616790 -615909
+            874511 -358188
+            948865 -358188
+            960501 -369824
+          )
+          (type protect)
+        )
+        (wire
+          (path F.Cu 2500
+            604901 -941324
+            604901 -929435
+            608617 -929435
+            610554 -927498
+          )
+          (type protect)
+        )
+        (wire
+          (path B.Cu 2500
+            1252600 -369824
+            1240960 -369824
+            1229330 -358188
+            972137 -358188
+            960501 -369824
+          )
+          (type protect)
+        )
+      )
+      (net SR1_QH
+        (wire
+          (path B.Cu 2500
+            1151000 -446024
+            1138300 -433324
+            897001 -433324
+            884301 -420624
+          )
+          (type protect)
+        )
+      )
+      (net SR1_CLR_T
+        (wire
+          (path In1.Cu 2500
+            1402720 -1322640
+            1390600 -1334760
+            1390600 -1403420
+            1402720 -1415540
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1402720 -1043940
+            1414356 -1055576
+            1414356 -1125204
+            1402720 -1136840
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1402720 -1136840
+            1414356 -1148476
+            1414356 -1218104
+            1402720 -1229740
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1328800 -522224
+            1402720 -596144
+            1402720 -1043940
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1402720 -1322640
+            1414356 -1311004
+            1414356 -1241376
+            1402720 -1229740
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1151000 -547624
+            1163700 -534924
+            1316100 -534924
+            1328800 -522224
+          )
+          (type protect)
+        )
+      )
+      (net SR1_SHLD_T
+        (wire
+          (path In1.Cu 2500
+            1250320 -1136840
+            1238584 -1148576
+            1238584 -1218004
+            1250320 -1229740
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1250320 -1043940
+            1238184 -1056076
+            1238184 -1124704
+            1250320 -1136840
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1250320 -1322640
+            1238245 -1310565
+            1238245 -1297118
+            1250320 -1285043
+            1250320 -1229740
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1250320 -1415540
+            1238584 -1403804
+            1238584 -1340745
+            1250320 -1329009
+            1250320 -1322640
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1252600 -496824
+            1240857 -508567
+            1240857 -1034477
+            1250320 -1043940
+          )
+        )
+        (wire
+          (path F.Cu 2500
+            1151000 -395224
+            1214500 -458724
+            1256490 -458724
+            1264270 -466508
+            1264270 -485154
+            1252600 -496824
+          )
+          (type protect)
+        )
+      )
+      (net SR1_CLKINH_T
+        (wire
+          (path In2.Cu 2500
+            1252600 -446024
+            1293903 -487327
+            1293903 -978757
+            1338156 -1023010
+            1338156 -1106376
+            1351920 -1120140
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1351920 -1213040
+            1340284 -1201404
+            1340284 -1131776
+            1351920 -1120140
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1351920 -1213040
+            1340284 -1224676
+            1340284 -1294304
+            1351920 -1305940
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1351920 -1398840
+            1339783 -1386703
+            1339783 -1318077
+            1351920 -1305940
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1351920 -1398840
+            1340284 -1410476
+            1340284 -1480104
+            1351920 -1491740
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1074800 -496824
+            1112900 -458724
+            1239900 -458724
+            1252600 -446024
+          )
+          (type protect)
+        )
+      )
+      (net SR1_CLK_T
+        (wire
+          (path In2.Cu 2500
+            1252600 -395224
+            1310819 -453443
+            1310819 -963352
+            1364620 -1017153
+            1364620 -1107440
+            1377320 -1120140
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1377320 -1120140
+            1365449 -1132011
+            1365449 -1201169
+            1377320 -1213040
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1377320 -1213040
+            1365684 -1224676
+            1365684 -1294304
+            1377320 -1305940
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1377320 -1398840
+            1365684 -1387204
+            1365684 -1317576
+            1377320 -1305940
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1377320 -1398840
+            1365684 -1410476
+            1365684 -1480104
+            1377320 -1491740
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1074800 -522224
+            1112900 -484124
+            1220870 -484124
+            1246270 -458724
+            1256740 -458724
+            1264560 -450906
+            1264560 -407184
+            1252600 -395224
+          )
+          (type protect)
+        )
+      )
+      (net 7SEG_CLK
+        (wire
+          (path In2.Cu 2500
+            1062100 -1474724
+            1062100 -1462835
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1328800 -496824
+            1183858 -641766
+            1183858 -687979
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1062100 -1462835
+            1065816 -1462835
+            1073989 -1454662
+            1073989 -1140489
+            1081844 -1132634
+            1090901 -1132634
+            1183858 -1039677
+            1183858 -687979
+          )
+        )
+        (via "Via[0-3]_600:400_um" 1183858 -687979
+        )
+      )
+      (net 7SEG_DIO
+        (wire
+          (path In1.Cu 2500
+            1062100 -1449324
+            1073989 -1449324
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1328800 -420624
+            1363930 -455754
+            1363930 -1275164
+            1339220 -1299874
+            1339220 -1326844
+            1281050 -1385014
+            1155155 -1385014
+            1102734 -1437435
+            1082162 -1437435
+            1073989 -1445608
+            1073989 -1449324
+          )
+        )
+      )
+      (net SR6_QH_T
+        (wire
+          (path In2.Cu 2500
+            1087500 -1119124
+            1087500 -1107235
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            960501 -395224
+            948501 -407224
+            948501 -425335
+            956490 -433324
+            964408 -433324
+            972137 -441053
+            972137 -473497
+            1108553 -609913
+            1108553 -1089897
+            1091215 -1107235
+            1087500 -1107235
+          )
+        )
+      )
+      (net SR5_QH_T
+        (wire
+          (path In2.Cu 2500
+            960501 -471424
+            1104041 -614964
+            1104041 -1069009
+            1091215 -1081835
+            1087500 -1081835
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1087500 -1093724
+            1087500 -1081835
+          )
+        )
+      )
+      (net SR4_QH_T
+        (wire
+          (path In2.Cu 2500
+            960501 -522224
+            1099389 -661112
+            1099389 -1048262
+            1091216 -1056435
+            1087500 -1056435
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1087500 -1068324
+            1087500 -1056435
+          )
+        )
+      )
+      (net SR3_QH_T
+        (wire
+          (path In2.Cu 2500
+            884301 -496824
+            1075611 -688134
+            1075611 -1022449
+            1084197 -1031035
+            1087500 -1031035
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1087500 -1042924
+            1087500 -1031035
+          )
+        )
+      )
+      (net +3V3
+        (wire
+          (path In1.Cu 2500
+            579501 -941324
+            604901 -941324
+          )
+        )
+      )
+      (net SR2_QH
+        (wire
+          (path In1.Cu 2500
+            1301120 -1136840
+            1288420 -1124140
+            1288420 -1016055
+            872257 -599892
+            872257 -483468
+            884301 -471424
+          )
+        )
+      )
+      (net SR3_QH
+        (wire
+          (path In1.Cu 2500
+            884301 -522224
+            1301120 -939043
+            1301120 -1043940
+          )
+        )
+      )
+      (net SR4_QH
+        (wire
+          (path In1.Cu 2500
+            1301120 -1229740
+            1313167 -1217693
+            1313167 -900290
+            960501 -547624
+          )
+        )
+      )
+      (net SR5_QH
+        (wire
+          (path In1.Cu 2500
+            1301120 -1322640
+            1313820 -1309940
+            1313820 -1259080
+            1338657 -1234243
+            1338657 -874980
+            960501 -496824
+          )
+        )
+      )
+      (net SR6_QH
+        (wire
+          (path In2.Cu 2500
+            1301120 -1415540
+            1288420 -1402840
+            1288420 -1369095
+            1263020 -1343695
+            1263020 -1301540
+            1197098 -1235618
+            1197098 -691485
+            991162 -485549
+            991162 -451285
+            960501 -420624
+          )
+        )
+      )
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort9.dsn b/bbb-bort9.dsn
new file mode 100644 (file)
index 0000000..853ff7e
--- /dev/null
+++ b/bbb-bort9.dsn
@@ -0,0 +1,1012 @@
+(pcb "C:\Users\kremlin\kicad\projects\bbb-bort\bbb-bort9.dsn"\r
+  (parser\r
+    (string_quote ")\r
+    (space_in_quoted_tokens on)\r
+    (host_cad "KiCad's Pcbnew")\r
+    (host_version "(5.0.1)-3")\r
+  )\r
+  (resolution um 10)\r
+  (unit um)\r
+  (structure\r
+    (layer F.Cu\r
+      (type signal)\r
+      (property\r
+        (index 0)\r
+      )\r
+    )\r
+    (layer In1.Cu\r
+      (type signal)\r
+      (property\r
+        (index 1)\r
+      )\r
+    )\r
+    (layer In2.Cu\r
+      (type signal)\r
+      (property\r
+        (index 2)\r
+      )\r
+    )\r
+    (layer B.Cu\r
+      (type signal)\r
+      (property\r
+        (index 3)\r
+      )\r
+    )\r
+    (boundary\r
+      (path pcb 0  122720 -181762  54140.1 -181762  54140.1 -49682.4  122720 -49682.4\r
+            122720 -181762)\r
+    )\r
+    (via "Via[0-3]_600:400_um")\r
+    (rule\r
+      (width 250)\r
+      (clearance 200.1)\r
+      (clearance 200.1 (type default_smd))\r
+      (clearance 50 (type smd_smd))\r
+    )\r
+  )\r
+  (placement\r
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (place P8 111290 -116992 front 0 (PN BeagleBone_Black_Header))\r
+      (place P9 63030.1 -116992 front 0 (PN BeagleBone_Black_Header))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"\r
+      (place U1 71920.1 -105562 front 0 (PN 4504))\r
+    )\r
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"\r
+      (place U2 108750 -105562 front 0 (PN 4504))\r
+    )\r
+    (component "SN74HC166N:DIP254P762X508-16"\r
+      (place U3 90335.1 -105562 front 0 (PN 74166))\r
+      (place U4 68110.1 -77622.4 front 0 (PN 74166))\r
+      (place U6 92875.1 -77622.4 front 0 (PN 74166))\r
+      (place U7 105258 -77622.4 front 0 (PN 74166))\r
+    )\r
+    (component "SN74HC166N:DIP254P762X508-16::1"\r
+      (place U5 80492.6 -77622.4 front 0 (PN 74166))\r
+      (place U8 117640 -77622.4 front 0 (PN 74166))\r
+    )\r
+  )\r
+  (library\r
+    (image Socket_BeagleBone_Black:Socket_BeagleBone_Black\r
+      (outline (path signal 150  -1550 1550  -1550 0))\r
+      (outline (path signal 150  1270 -1270  -1270 -1270))\r
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+      (pin Rect[A]Pad_1727.2x1727.2_um 1 0 0)\r
+    )\r
+    (image "DIP254P762X508-16N:DIP254P762X508-16N"\r
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+      (pins P8-19)\r
+    )\r
+    (net "Net-(P8-Pad20)"\r
+      (pins P8-20)\r
+    )\r
+    (net "Net-(P8-Pad21)"\r
+      (pins P8-21)\r
+    )\r
+    (net "Net-(P8-Pad22)"\r
+      (pins P8-22)\r
+    )\r
+    (net "Net-(P8-Pad23)"\r
+      (pins P8-23)\r
+    )\r
+    (net "Net-(P8-Pad24)"\r
+      (pins P8-24)\r
+    )\r
+    (net "Net-(P8-Pad25)"\r
+      (pins P8-25)\r
+    )\r
+    (net "Net-(P8-Pad26)"\r
+      (pins P8-26)\r
+    )\r
+    (net "Net-(P8-Pad27)"\r
+      (pins P8-27)\r
+    )\r
+    (net "Net-(P8-Pad28)"\r
+      (pins P8-28)\r
+    )\r
+    (net "Net-(P8-Pad29)"\r
+      (pins P8-29)\r
+    )\r
+    (net "Net-(P8-Pad30)"\r
+      (pins P8-30)\r
+    )\r
+    (net "Net-(P8-Pad31)"\r
+      (pins P8-31)\r
+    )\r
+    (net "Net-(P8-Pad32)"\r
+      (pins P8-32)\r
+    )\r
+    (net "Net-(P8-Pad33)"\r
+      (pins P8-33)\r
+    )\r
+    (net "Net-(P8-Pad34)"\r
+      (pins P8-34)\r
+    )\r
+    (net "Net-(P8-Pad35)"\r
+      (pins P8-35)\r
+    )\r
+    (net "Net-(P8-Pad36)"\r
+      (pins P8-36)\r
+    )\r
+    (net "Net-(P8-Pad37)"\r
+      (pins P8-37)\r
+    )\r
+    (net "Net-(P8-Pad38)"\r
+      (pins P8-38)\r
+    )\r
+    (net "Net-(P8-Pad39)"\r
+      (pins P8-39)\r
+    )\r
+    (net "Net-(P8-Pad40)"\r
+      (pins P8-40)\r
+    )\r
+    (net "Net-(P8-Pad41)"\r
+      (pins P8-41)\r
+    )\r
+    (net "Net-(P8-Pad42)"\r
+      (pins P8-42)\r
+    )\r
+    (net "Net-(P8-Pad44)"\r
+      (pins P8-44)\r
+    )\r
+    (net "Net-(P8-Pad46)"\r
+      (pins P8-46)\r
+    )\r
+    (net "Net-(P9-Pad11)"\r
+      (pins P9-11)\r
+    )\r
+    (net "Net-(P9-Pad12)"\r
+      (pins P9-12)\r
+    )\r
+    (net "Net-(P9-Pad13)"\r
+      (pins P9-13)\r
+    )\r
+    (net "Net-(P9-Pad14)"\r
+      (pins P9-14)\r
+    )\r
+    (net "Net-(P9-Pad15)"\r
+      (pins P9-15)\r
+    )\r
+    (net "Net-(P9-Pad16)"\r
+      (pins P9-16)\r
+    )\r
+    (net "Net-(P9-Pad17)"\r
+      (pins P9-17)\r
+    )\r
+    (net "Net-(P9-Pad18)"\r
+      (pins P9-18)\r
+    )\r
+    (net "Net-(P9-Pad19)"\r
+      (pins P9-19)\r
+    )\r
+    (net "Net-(P9-Pad20)"\r
+      (pins P9-20)\r
+    )\r
+    (net "Net-(P9-Pad21)"\r
+      (pins P9-21)\r
+    )\r
+    (net "Net-(P9-Pad22)"\r
+      (pins P9-22)\r
+    )\r
+    (net "Net-(P9-Pad23)"\r
+      (pins P9-23)\r
+    )\r
+    (net "Net-(P9-Pad24)"\r
+      (pins P9-24)\r
+    )\r
+    (net "Net-(P9-Pad25)"\r
+      (pins P9-25)\r
+    )\r
+    (net "Net-(P9-Pad26)"\r
+      (pins P9-26)\r
+    )\r
+    (net "Net-(P9-Pad27)"\r
+      (pins P9-27)\r
+    )\r
+    (net "Net-(P9-Pad28)"\r
+      (pins P9-28)\r
+    )\r
+    (net "Net-(P9-Pad29)"\r
+      (pins P9-29)\r
+    )\r
+    (net "Net-(P9-Pad30)"\r
+      (pins P9-30)\r
+    )\r
+    (net "Net-(P9-Pad31)"\r
+      (pins P9-31)\r
+    )\r
+    (net "Net-(P9-Pad33)"\r
+      (pins P9-33)\r
+    )\r
+    (net "Net-(P9-Pad35)"\r
+      (pins P9-35)\r
+    )\r
+    (net "Net-(P9-Pad36)"\r
+      (pins P9-36)\r
+    )\r
+    (net "Net-(P9-Pad37)"\r
+      (pins P9-37)\r
+    )\r
+    (net "Net-(P9-Pad38)"\r
+      (pins P9-38)\r
+    )\r
+    (net "Net-(P9-Pad39)"\r
+      (pins P9-39)\r
+    )\r
+    (net "Net-(P9-Pad40)"\r
+      (pins P9-40)\r
+    )\r
+    (net "Net-(P9-Pad41)"\r
+      (pins P9-41)\r
+    )\r
+    (net "Net-(P9-Pad42)"\r
+      (pins P9-42)\r
+    )\r
+    (net PWR_BUT\r
+      (pins P9-9)\r
+    )\r
+    (net SYS_RESETN\r
+      (pins P9-10)\r
+    )\r
+    (net VDD_ADC\r
+      (pins P9-32)\r
+    )\r
+    (net GNDA_ADC\r
+      (pins P9-34)\r
+    )\r
+    (net SR1_CLR\r
+      (pins P8-17 U2-9)\r
+    )\r
+    (net SR1_SHLD\r
+      (pins P8-15 U2-7)\r
+    )\r
+    (net SR1_CLK\r
+      (pins P8-11 U2-3)\r
+    )\r
+    (net SR1_CLKINH\r
+      (pins P8-5 U2-5)\r
+    )\r
+    (net SR1_QH_T\r
+      (pins P8-4 U1-2)\r
+    )\r
+    (net PGND\r
+      (pins P8-2 P8-1 P9-46 P9-45 P9-44 P9-43 P9-2 P9-1 U1-8 U1-13 U2-13 U2-8 U3-1\r
+        U3-8 U4-1 U4-8 U5-8 U5-1 U6-1 U6-8 U7-1 U7-8 U8-8 U8-1)\r
+    )\r
+    (net 5v\r
+      (pins P9-8 P9-7 P9-6 P9-5 U1-1 U2-16 U3-16 U4-16 U5-16 U6-16 U7-16 U8-16)\r
+    )\r
+    (net BB3.3\r
+      (pins U1-16 U2-1)\r
+    )\r
+    (net SR1_QH\r
+      (pins U1-3 U3-13)\r
+    )\r
+    (net SR1_CLR_T\r
+      (pins U2-10 U3-9 U4-9 U5-9 U6-9 U7-9 U8-9)\r
+    )\r
+    (net SR1_SHLD_T\r
+      (pins U2-6 U3-15 U4-15 U5-15 U6-15 U7-15 U8-15)\r
+    )\r
+    (net SR1_CLKINH_T\r
+      (pins U2-4 U3-6 U4-6 U5-6 U6-6 U7-6 U8-6)\r
+    )\r
+    (net SR1_CLK_T\r
+      (pins U2-2 U3-7 U4-7 U5-7 U6-7 U7-7 U8-7)\r
+    )\r
+    (net 7SEG_CLK\r
+      (pins P8-45 U2-11)\r
+    )\r
+    (net 7SEG_DIO\r
+      (pins P8-43 U2-14)\r
+    )\r
+    (net SR6_QH_T\r
+      (pins P8-18 U1-15)\r
+    )\r
+    (net SR5_QH_T\r
+      (pins P8-16 U1-12)\r
+    )\r
+    (net SR4_QH_T\r
+      (pins P8-14 U1-10)\r
+    )\r
+    (net SR3_QH_T\r
+      (pins P8-12 U1-6)\r
+    )\r
+    (net SR2_QH_T\r
+      (pins P8-6)\r
+    )\r
+    (net +3V3\r
+      (pins P9-4 P9-3)\r
+    )\r
+    (net SR2_QH__T\r
+      (pins U1-4)\r
+    )\r
+    (net SR2_QH\r
+      (pins U1-5 U7-13)\r
+    )\r
+    (net SR3_QH\r
+      (pins U1-7 U8-13)\r
+    )\r
+    (net SR4_QH\r
+      (pins U1-9 U6-13)\r
+    )\r
+    (net SR5_QH\r
+      (pins U1-11 U5-13)\r
+    )\r
+    (net SR6_QH\r
+      (pins U1-14 U4-13)\r
+    )\r
+    (net 7SEG_DIO_T\r
+      (pins U2-15)\r
+    )\r
+    (net 7SEG_CLK_T\r
+      (pins U2-12)\r
+    )\r
+    (net "Net-(U3-Pad2)"\r
+      (pins U3-2)\r
+    )\r
+    (net "Net-(U3-Pad3)"\r
+      (pins U3-3)\r
+    )\r
+    (net "Net-(U3-Pad4)"\r
+      (pins U3-4)\r
+    )\r
+    (net "Net-(U3-Pad5)"\r
+      (pins U3-5)\r
+    )\r
+    (net "Net-(U3-Pad10)"\r
+      (pins U3-10)\r
+    )\r
+    (net "Net-(U3-Pad11)"\r
+      (pins U3-11)\r
+    )\r
+    (net "Net-(U3-Pad12)"\r
+      (pins U3-12)\r
+    )\r
+    (net "Net-(U3-Pad14)"\r
+      (pins U3-14)\r
+    )\r
+    (net "Net-(U4-Pad2)"\r
+      (pins U4-2)\r
+    )\r
+    (net "Net-(U4-Pad3)"\r
+      (pins U4-3)\r
+    )\r
+    (net "Net-(U4-Pad4)"\r
+      (pins U4-4)\r
+    )\r
+    (net "Net-(U4-Pad5)"\r
+      (pins U4-5)\r
+    )\r
+    (net "Net-(U4-Pad10)"\r
+      (pins U4-10)\r
+    )\r
+    (net "Net-(U4-Pad11)"\r
+      (pins U4-11)\r
+    )\r
+    (net "Net-(U4-Pad12)"\r
+      (pins U4-12)\r
+    )\r
+    (net "Net-(U4-Pad14)"\r
+      (pins U4-14)\r
+    )\r
+    (net "Net-(U5-Pad14)"\r
+      (pins U5-14)\r
+    )\r
+    (net "Net-(U5-Pad12)"\r
+      (pins U5-12)\r
+    )\r
+    (net "Net-(U5-Pad11)"\r
+      (pins U5-11)\r
+    )\r
+    (net "Net-(U5-Pad10)"\r
+      (pins U5-10)\r
+    )\r
+    (net "Net-(U5-Pad5)"\r
+      (pins U5-5)\r
+    )\r
+    (net "Net-(U5-Pad4)"\r
+      (pins U5-4)\r
+    )\r
+    (net "Net-(U5-Pad3)"\r
+      (pins U5-3)\r
+    )\r
+    (net "Net-(U5-Pad2)"\r
+      (pins U5-2)\r
+    )\r
+    (net "Net-(U6-Pad2)"\r
+      (pins U6-2)\r
+    )\r
+    (net "Net-(U6-Pad3)"\r
+      (pins U6-3)\r
+    )\r
+    (net "Net-(U6-Pad4)"\r
+      (pins U6-4)\r
+    )\r
+    (net "Net-(U6-Pad5)"\r
+      (pins U6-5)\r
+    )\r
+    (net "Net-(U6-Pad10)"\r
+      (pins U6-10)\r
+    )\r
+    (net "Net-(U6-Pad11)"\r
+      (pins U6-11)\r
+    )\r
+    (net "Net-(U6-Pad12)"\r
+      (pins U6-12)\r
+    )\r
+    (net "Net-(U6-Pad14)"\r
+      (pins U6-14)\r
+    )\r
+    (net "Net-(U7-Pad2)"\r
+      (pins U7-2)\r
+    )\r
+    (net "Net-(U7-Pad3)"\r
+      (pins U7-3)\r
+    )\r
+    (net "Net-(U7-Pad4)"\r
+      (pins U7-4)\r
+    )\r
+    (net "Net-(U7-Pad5)"\r
+      (pins U7-5)\r
+    )\r
+    (net "Net-(U7-Pad10)"\r
+      (pins U7-10)\r
+    )\r
+    (net "Net-(U7-Pad11)"\r
+      (pins U7-11)\r
+    )\r
+    (net "Net-(U7-Pad12)"\r
+      (pins U7-12)\r
+    )\r
+    (net "Net-(U7-Pad14)"\r
+      (pins U7-14)\r
+    )\r
+    (net "Net-(U8-Pad14)"\r
+      (pins U8-14)\r
+    )\r
+    (net "Net-(U8-Pad12)"\r
+      (pins U8-12)\r
+    )\r
+    (net "Net-(U8-Pad11)"\r
+      (pins U8-11)\r
+    )\r
+    (net "Net-(U8-Pad10)"\r
+      (pins U8-10)\r
+    )\r
+    (net "Net-(U8-Pad5)"\r
+      (pins U8-5)\r
+    )\r
+    (net "Net-(U8-Pad4)"\r
+      (pins U8-4)\r
+    )\r
+    (net "Net-(U8-Pad3)"\r
+      (pins U8-3)\r
+    )\r
+    (net "Net-(U8-Pad2)"\r
+      (pins U8-2)\r
+    )\r
+    (class kicad_default "" +3V3 /d1 /d2 /d3 /d4 /d5 /d6 /d7 /d8 /p1 /p2 /p3\r
+      /p4 /p5 /p6 /p7 /p8 5v 7SEG_CLK 7SEG_CLK_T 7SEG_DIO 7SEG_DIO_T BB3.3\r
+      GNDA_ADC "Net-(J1-Pad10)" "Net-(J1-Pad11)" "Net-(J1-Pad12)" "Net-(J1-Pad9)"\r
+      "Net-(P8-Pad10)" "Net-(P8-Pad12)" "Net-(P8-Pad13)" "Net-(P8-Pad14)"\r
+      "Net-(P8-Pad16)" "Net-(P8-Pad18)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"\r
+      "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)"\r
+      "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"\r
+      "Net-(P8-Pad29)" "Net-(P8-Pad3)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)"\r
+      "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"\r
+      "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)"\r
+      "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad43)" "Net-(P8-Pad44)"\r
+      "Net-(P8-Pad45)" "Net-(P8-Pad46)" "Net-(P8-Pad6)" "Net-(P8-Pad7)" "Net-(P8-Pad8)"\r
+      "Net-(P8-Pad9)" "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)"\r
+      "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"\r
+      "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)"\r
+      "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"\r
+      "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)"\r
+      "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"\r
+      "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)"\r
+      "Net-(P9-Pad41)" "Net-(P9-Pad42)" "Net-(U1-Pad10)" "Net-(U1-Pad11)"\r
+      "Net-(U1-Pad12)" "Net-(U1-Pad14)" "Net-(U1-Pad15)" "Net-(U1-Pad4)" "Net-(U1-Pad5)"\r
+      "Net-(U1-Pad6)" "Net-(U1-Pad7)" "Net-(U1-Pad9)" "Net-(U2-Pad11)" "Net-(U2-Pad12)"\r
+      "Net-(U2-Pad14)" "Net-(U2-Pad15)" "Net-(U3-Pad10)" "Net-(U3-Pad11)"\r
+      "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U3-Pad2)" "Net-(U3-Pad3)" "Net-(U3-Pad4)"\r
+      "Net-(U3-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)"\r
+      "Net-(U4-Pad2)" "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U5-Pad10)"\r
+      "Net-(U5-Pad11)" "Net-(U5-Pad12)" "Net-(U5-Pad14)" "Net-(U5-Pad2)" "Net-(U5-Pad3)"\r
+      "Net-(U5-Pad4)" "Net-(U5-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)"\r
+      "Net-(U6-Pad14)" "Net-(U6-Pad2)" "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)"\r
+      "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)"\r
+      "Net-(U7-Pad2)" "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U8-Pad10)"\r
+      "Net-(U8-Pad11)" "Net-(U8-Pad12)" "Net-(U8-Pad14)" "Net-(U8-Pad2)" "Net-(U8-Pad3)"\r
+      "Net-(U8-Pad4)" "Net-(U8-Pad5)" PGND PWR_BUT SR1_CLK SR1_CLKINH SR1_CLKINH_T\r
+      SR1_CLK_T SR1_CLR SR1_CLR_T SR1_QH SR1_QH_T SR1_SHLD SR1_SHLD_T SR2_QH\r
+      SR2_QH_T SR2_QH__T SR3_QH SR3_QH_T SR4_QH SR4_QH_T SR5_QH SR5_QH_T SR6_QH\r
+      SR6_QH_T SYS_RESETN VDD_ADC\r
+      (circuit\r
+        (use_via Via[0-3]_600:400_um)\r
+      )\r
+      (rule\r
+        (width 250)\r
+        (clearance 200.1)\r
+      )\r
+    )\r
+  )\r
+  (wiring\r
+  )\r
+)\r

diff --git a/bbb-bort9.rules b/bbb-bort9.rules
new file mode 100644 (file)
index 0000000..133e1a5
--- /dev/null
+++ b/bbb-bort9.rules
@@ -0,0 +1,111 @@
+
+(rules PCB bbb-bort9
+  (snap_angle 
+    fortyfive_degree
+  )
+  (autoroute_settings
+    (fanout off)
+    (autoroute on)
+    (postroute on)
+    (vias on)
+    (via_costs 50)
+    (plane_via_costs 5)
+    (start_ripup_costs 100)
+    (start_pass_no 831)
+    (layer_rule F.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.8)
+      (against_preferred_direction_trace_costs 3.7)
+    )
+    (layer_rule In1.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 1.5)
+    )
+    (layer_rule In2.Cu
+      (active on)
+      (preferred_direction vertical)
+      (preferred_direction_trace_costs 1.0)
+      (against_preferred_direction_trace_costs 2.9)
+    )
+    (layer_rule B.Cu
+      (active on)
+      (preferred_direction horizontal)
+      (preferred_direction_trace_costs 1.8)
+      (against_preferred_direction_trace_costs 2.3)
+    )
+  )
+  (rule
+    (width 250.0)
+    (clear 200.2)
+    (clear 125.0 (type smd_to_turn_gap))
+    (clear 50.0 (type smd_smd))
+  )
+  (padstack "Via[0-3]_600:400_um"
+    (shape
+      (circle F.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle In1.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle In2.Cu 600.0 0.0 0.0)
+    )
+    (shape
+      (circle B.Cu 600.0 0.0 0.0)
+    )
+    (attach off)
+  )
+  (via 
+    "Via[0-3]_600:400_um" "Via[0-3]_600:400_um" default
+  )
+  (via 
+    "Via[0-3]_600:400_um-kicad_default" "Via[0-3]_600:400_um" "kicad_default"
+  )
+  (via_rule
+    default "Via[0-3]_600:400_um"
+  )
+  (via_rule
+    "kicad_default" "Via[0-3]_600:400_um-kicad_default"
+  )
+  (class default
+    (clearance_class default)
+    (via_rule default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu In1.Cu In2.Cu B.Cu)
+    )
+  )
+  (class "kicad_default"
+    "Net-(P8-Pad3)" "Net-(P8-Pad7)" "Net-(P8-Pad8)" "Net-(P8-Pad9)" "Net-(P8-Pad10)" "Net-(P8-Pad13)" "Net-(P8-Pad19)" "Net-(P8-Pad20)"
+    "Net-(P8-Pad21)" "Net-(P8-Pad22)" "Net-(P8-Pad23)" "Net-(P8-Pad24)" "Net-(P8-Pad25)" "Net-(P8-Pad26)" "Net-(P8-Pad27)" "Net-(P8-Pad28)"
+    "Net-(P8-Pad29)" "Net-(P8-Pad30)" "Net-(P8-Pad31)" "Net-(P8-Pad32)" "Net-(P8-Pad33)" "Net-(P8-Pad34)" "Net-(P8-Pad35)" "Net-(P8-Pad36)"
+    "Net-(P8-Pad37)" "Net-(P8-Pad38)" "Net-(P8-Pad39)" "Net-(P8-Pad40)" "Net-(P8-Pad41)" "Net-(P8-Pad42)" "Net-(P8-Pad44)" "Net-(P8-Pad46)"
+    "Net-(P9-Pad11)" "Net-(P9-Pad12)" "Net-(P9-Pad13)" "Net-(P9-Pad14)" "Net-(P9-Pad15)" "Net-(P9-Pad16)" "Net-(P9-Pad17)" "Net-(P9-Pad18)"
+    "Net-(P9-Pad19)" "Net-(P9-Pad20)" "Net-(P9-Pad21)" "Net-(P9-Pad22)" "Net-(P9-Pad23)" "Net-(P9-Pad24)" "Net-(P9-Pad25)" "Net-(P9-Pad26)"
+    "Net-(P9-Pad27)" "Net-(P9-Pad28)" "Net-(P9-Pad29)" "Net-(P9-Pad30)" "Net-(P9-Pad31)" "Net-(P9-Pad33)" "Net-(P9-Pad35)" "Net-(P9-Pad36)"
+    "Net-(P9-Pad37)" "Net-(P9-Pad38)" "Net-(P9-Pad39)" "Net-(P9-Pad40)" "Net-(P9-Pad41)" "Net-(P9-Pad42)" "PWR_BUT" "SYS_RESETN"
+    "VDD_ADC" "GNDA_ADC" "SR1_CLR" "SR1_SHLD" "SR1_CLK" "SR1_CLKINH" "SR1_QH_T" PGND
+    5v BB3.3 "SR1_QH" "SR1_CLR_T" "SR1_SHLD_T" "SR1_CLKINH_T" "SR1_CLK_T" "7SEG_CLK"
+    "7SEG_DIO" "SR6_QH_T" "SR5_QH_T" "SR4_QH_T" "SR3_QH_T" "SR2_QH_T" +3V3 "SR2_QH__T"
+    "SR2_QH" "SR3_QH" "SR4_QH" "SR5_QH" "SR6_QH" "7SEG_DIO_T" "7SEG_CLK_T" "Net-(U3-Pad2)"
+    "Net-(U3-Pad3)" "Net-(U3-Pad4)" "Net-(U3-Pad5)" "Net-(U3-Pad10)" "Net-(U3-Pad11)" "Net-(U3-Pad12)" "Net-(U3-Pad14)" "Net-(U4-Pad2)"
+    "Net-(U4-Pad3)" "Net-(U4-Pad4)" "Net-(U4-Pad5)" "Net-(U4-Pad10)" "Net-(U4-Pad11)" "Net-(U4-Pad12)" "Net-(U4-Pad14)" "Net-(U5-Pad14)"
+    "Net-(U5-Pad12)" "Net-(U5-Pad11)" "Net-(U5-Pad10)" "Net-(U5-Pad5)" "Net-(U5-Pad4)" "Net-(U5-Pad3)" "Net-(U5-Pad2)" "Net-(U6-Pad2)"
+    "Net-(U6-Pad3)" "Net-(U6-Pad4)" "Net-(U6-Pad5)" "Net-(U6-Pad10)" "Net-(U6-Pad11)" "Net-(U6-Pad12)" "Net-(U6-Pad14)" "Net-(U7-Pad2)"
+    "Net-(U7-Pad3)" "Net-(U7-Pad4)" "Net-(U7-Pad5)" "Net-(U7-Pad10)" "Net-(U7-Pad11)" "Net-(U7-Pad12)" "Net-(U7-Pad14)" "Net-(U8-Pad14)"
+    "Net-(U8-Pad12)" "Net-(U8-Pad11)" "Net-(U8-Pad10)" "Net-(U8-Pad5)" "Net-(U8-Pad4)" "Net-(U8-Pad3)" "Net-(U8-Pad2)"
+    (clearance_class "kicad_default")
+    (via_rule kicad_default)
+    (rule
+      (width 250.0)
+    )
+    (circuit 
+      (use_layer F.Cu In1.Cu In2.Cu B.Cu)
+    )
+  )
+)
\ No newline at end of file

diff --git a/bbb-bort9.ses b/bbb-bort9.ses
new file mode 100644 (file)
index 0000000..559c3f2
--- /dev/null
+++ b/bbb-bort9.ses
@@ -0,0 +1,1005 @@
+
+(session "bbb-bort9.ses"
+  (base_design "bbb-bort9.dsn")
+  (placement
+    (resolution um 10)
+    (component Socket_BeagleBone_Black:Socket_BeagleBone_Black
+      (place P8 1112900 -1169920 front 0)
+      (place P9 630301 -1169920 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N"
+      (place U1 719201 -1055620 front 0)
+    )
+    (component "DIP254P762X508-16N:DIP254P762X508-16N::1"
+      (place U2 1087500 -1055620 front 0)
+    )
+    (component "SN74HC166N:DIP254P762X508-16"
+      (place U3 903351 -1055620 front 0)
+      (place U4 681101 -776224 front 0)
+      (place U6 928751 -776224 front 0)
+      (place U7 1052580 -776224 front 0)
+    )
+    (component "SN74HC166N:DIP254P762X508-16::1"
+      (place U5 804926 -776224 front 0)
+      (place U8 1176400 -776224 front 0)
+    )
+  )
+  (was_is
+  )
+  (routes 
+    (resolution um 10)
+    (parser
+      (host_cad "KiCad's Pcbnew")
+      (host_version "(5.0.1)-3")
+    )
+    (library_out 
+      (padstack "Via[0-3]_600:400_um"
+        (shape
+          (circle F.Cu 6000 0 0)
+        )
+        (shape
+          (circle In1.Cu 6000 0 0)
+        )
+        (shape
+          (circle In2.Cu 6000 0 0)
+        )
+        (shape
+          (circle B.Cu 6000 0 0)
+        )
+        (attach off)
+      )
+    )
+    (network_out 
+      (net SR1_CLR
+        (wire
+          (path In2.Cu 2500
+            1112900 -1373120
+            1112900 -1361231
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1087500 -1055620
+            1124789 -1092909
+            1124789 -1353058
+            1116616 -1361231
+            1112900 -1361231
+          )
+        )
+      )
+      (net SR1_SHLD
+        (wire
+          (path In2.Cu 2500
+            1112900 -1347720
+            1112900 -1335831
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1011300 -1030220
+            1022935 -1041855
+            1022935 -1249581
+            1109185 -1335831
+            1112900 -1335831
+          )
+        )
+      )
+      (net SR1_CLK
+        (wire
+          (path In2.Cu 2500
+            1011300 -928620
+            999555 -940365
+            999555 -984452
+            1006159 -991056
+            1014140 -991056
+            1027439 -1004355
+            1027439 -1203285
+            1109185 -1285031
+            1112900 -1285031
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1112900 -1296920
+            1112900 -1285031
+          )
+        )
+      )
+      (net SR1_CLKINH
+        (wire
+          (path In2.Cu 2500
+            1112900 -1220720
+            1112900 -1208831
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1011300 -979420
+            1048416 -1016536
+            1048416 -1148062
+            1109185 -1208831
+            1112900 -1208831
+          )
+        )
+      )
+      (net SR1_QH_T
+        (wire
+          (path In1.Cu 2500
+            1138300 -1195320
+            1126411 -1195320
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            743438 -956581
+            804377 -1017520
+            831496 -1017520
+            997407 -1183431
+            1118238 -1183431
+            1126411 -1191604
+            1126411 -1195320
+          )
+        )
+        (via "Via[0-3]_600:400_um" 743438 -956581
+        )
+        (wire
+          (path In2.Cu 2500
+            643001 -903220
+            680037 -940256
+            727113 -940256
+            743438 -956581
+          )
+        )
+      )
+      (net PGND
+        (wire
+          (path B.Cu 2500
+            852551 -776224
+            864187 -787860
+            964744 -787860
+            976380 -776224
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            604901 -776224
+            616807 -764318
+            716820 -764318
+            728726 -776224
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            852551 -598424
+            840916 -598424
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            840916 -598424
+            829281 -610059
+            728726 -610059
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            728726 -598424
+            728726 -610059
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            728726 -610059
+            725817 -610059
+            716682 -619194
+            716682 -764180
+            728726 -776224
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            707088 -1067256
+            655701 -1067256
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            827151 -1055620
+            815515 -1067256
+            707088 -1067256
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            719201 -954020
+            707088 -966133
+            707088 -1067256
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            655701 -1067256
+            654637 -1067256
+            643001 -1055620
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            655701 -1158031
+            655701 -1067256
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            655701 -1703320
+            655701 -1716831
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            630301 -1703320
+            655701 -1703320
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            655701 -1728720
+            655701 -1716831
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            630301 -1703320
+            630301 -1716831
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            630301 -1728720
+            630301 -1716831
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            976380 -598424
+            988015 -598424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1100200 -598424
+            1088565 -598424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1088565 -598424
+            1076930 -610059
+            999650 -610059
+            988015 -598424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1088402 -788022
+            988178 -788022
+            976380 -776224
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1100200 -776224
+            1088402 -788022
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1088402 -788022
+            1099170 -798790
+            1099170 -942350
+            1087500 -954020
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            719201 -954020
+            795401 -877820
+            827151 -877820
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            852551 -598424
+            864186 -598424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            976380 -598424
+            964745 -598424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            964745 -598424
+            953110 -610059
+            875821 -610059
+            864186 -598424
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            655701 -1169920
+            655701 -1158031
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1061662 -1065003
+            1020683 -1065003
+            1011300 -1055620
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1138300 -1169920
+            1126411 -1169920
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1112900 -1163975
+            1120466 -1163975
+            1126411 -1169920
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1112900 -1163975
+            1112900 -1158031
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1112900 -1169920
+            1112900 -1163975
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            630301 -1169920
+            630301 -1181809
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            655701 -1703320
+            655701 -1691431
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            655701 -1691431
+            651985 -1691431
+            642190 -1681636
+            642190 -1189982
+            634017 -1181809
+            630301 -1181809
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1087500 -954020
+            1099566 -966086
+            1099566 -1035315
+            1093025 -1041856
+            1084809 -1041856
+            1061662 -1065003
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1061662 -1065003
+            1061662 -1106793
+            1112900 -1158031
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            630301 -1169920
+            655701 -1169920
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1100200 -598424
+            1100200 -610059
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1100200 -776224
+            1088565 -764589
+            1088565 -618784
+            1097290 -610059
+            1100200 -610059
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            604901 -598424
+            616536 -598424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            728726 -598424
+            717091 -598424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            717091 -598424
+            705456 -610059
+            628171 -610059
+            616536 -598424
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            852551 -776224
+            827151 -801624
+            827151 -877820
+          )
+        )
+      )
+      (net 5v
+        (wire
+          (path In2.Cu 2500
+            681101 -598424
+            643001 -636524
+            643001 -877820
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            655701 -1220720
+            655701 -1234231
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            630301 -1220720
+            655701 -1220720
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            655701 -1246120
+            655701 -1234231
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            630301 -1220720
+            630301 -1234231
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            630301 -1246120
+            630301 -1234231
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1052580 -610330
+            1055756 -610330
+            1065280 -619854
+            1065280 -855600
+            1087500 -877820
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1052580 -598424
+            1052580 -610330
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1052580 -610330
+            940657 -610330
+            928751 -598424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            928751 -598424
+            917115 -586788
+            816562 -586788
+            804926 -598424
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            643001 -877820
+            643001 -889455
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            643001 -889455
+            640092 -889455
+            618167 -911380
+            618167 -1200392
+            626606 -1208831
+            630301 -1208831
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            630301 -1220720
+            630301 -1208831
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1087500 -877820
+            1075864 -889456
+            921356 -889456
+            909720 -877820
+            903351 -877820
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1176400 -598424
+            1164764 -586788
+            1064216 -586788
+            1052580 -598424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            804926 -598424
+            793290 -586788
+            692737 -586788
+            681101 -598424
+          )
+        )
+      )
+      (net BB3.3
+        (wire
+          (path B.Cu 2500
+            1011300 -877820
+            999665 -877820
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            999665 -877820
+            988029 -889456
+            730837 -889456
+            719201 -877820
+          )
+        )
+      )
+      (net SR1_QH
+        (wire
+          (path F.Cu 2500
+            903351 -954020
+            891716 -942385
+            656765 -942385
+            656765 -942384
+            643001 -928620
+          )
+        )
+      )
+      (net SR1_CLR_T
+        (wire
+          (path In1.Cu 2500
+            804926 -776224
+            793096 -788054
+            692931 -788054
+            681101 -776224
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            928751 -776224
+            917115 -764588
+            816562 -764588
+            804926 -776224
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1052580 -776224
+            1052580 -995300
+            1087500 -1030220
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1087500 -1030220
+            1074800 -1042920
+            916051 -1042920
+            903351 -1055620
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            1052580 -776224
+            1040807 -764451
+            940524 -764451
+            928751 -776224
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1176400 -776224
+            1164317 -764141
+            1094540 -764141
+            1082457 -776224
+            1052580 -776224
+          )
+        )
+      )
+      (net SR1_SHLD_T
+        (wire
+          (path In1.Cu 2500
+            1176400 -623824
+            1164764 -635460
+            1064216 -635460
+            1052580 -623824
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            940658 -635731
+            940658 -865913
+            903351 -903220
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            928751 -623824
+            940658 -635731
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1052580 -623824
+            1040673 -635731
+            940658 -635731
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            804926 -623824
+            816562 -635460
+            917115 -635460
+            928751 -623824
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            804926 -623824
+            793020 -635730
+            693007 -635730
+            681101 -623824
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            903351 -903220
+            1004951 -1004820
+            1011300 -1004820
+          )
+        )
+      )
+      (net SR1_CLKINH_T
+        (wire
+          (path In2.Cu 2500
+            976380 -725424
+            1023343 -772387
+            1023343 -941977
+            1011300 -954020
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            827151 -1004820
+            865251 -966720
+            998600 -966720
+            1011300 -954020
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            728726 -725424
+            740632 -737330
+            840645 -737330
+            852551 -725424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            728726 -725424
+            717054 -737096
+            616573 -737096
+            604901 -725424
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            976380 -725424
+            964474 -737330
+            864457 -737330
+            852551 -725424
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1100200 -725424
+            1088294 -737330
+            988286 -737330
+            976380 -725424
+          )
+        )
+      )
+      (net SR1_CLK_T
+        (wire
+          (path In1.Cu 2500
+            852551 -750824
+            823957 -750824
+            812051 -762730
+            740632 -762730
+            728726 -750824
+          )
+        )
+        (wire
+          (path B.Cu 2500
+            976380 -750824
+            947782 -750824
+            935876 -762730
+            864457 -762730
+            852551 -750824
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            976380 -750824
+            997536 -771980
+            997536 -889456
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            997536 -889456
+            921336 -965656
+            891715 -965656
+            827151 -1030220
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            997536 -889456
+            1011300 -903220
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            728726 -750824
+            717054 -762496
+            616573 -762496
+            604901 -750824
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1100200 -750824
+            1088294 -762730
+            988286 -762730
+            976380 -750824
+          )
+        )
+      )
+      (net 7SEG_CLK
+        (wire
+          (path In2.Cu 2500
+            1112900 -1728720
+            1112900 -1716831
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1112900 -1716831
+            1116616 -1716831
+            1124789 -1708658
+            1124789 -1699963
+            1134132 -1690620
+            1143165 -1690620
+            1154799 -1678986
+            1154799 -1072119
+            1087500 -1004820
+          )
+        )
+      )
+      (net 7SEG_DIO
+        (wire
+          (path In2.Cu 2500
+            1112900 -1703320
+            1112900 -1691431
+          )
+        )
+        (wire
+          (path In2.Cu 2500
+            1112900 -1691431
+            1116616 -1691431
+            1124789 -1683258
+            1124789 -1394737
+            1132896 -1386630
+            1142277 -1386630
+            1150234 -1378673
+            1150234 -1076270
+            1091484 -1017520
+            1083586 -1017520
+            1075583 -1009517
+            1075583 -940537
+            1087500 -928620
+          )
+        )
+      )
+      (net SR6_QH_T
+        (wire
+          (path In1.Cu 2500
+            719201 -903220
+            712832 -903220
+            649332 -966720
+            639225 -966720
+            626524 -979421
+            626524 -1055599
+            932156 -1361231
+            1118238 -1361231
+            1126411 -1369404
+            1126411 -1373120
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            1138300 -1373120
+            1126411 -1373120
+          )
+        )
+      )
+      (net SR5_QH_T
+        (wire
+          (path In1.Cu 2500
+            1138300 -1347720
+            1155209 -1330811
+            1155209 -1296442
+            1142987 -1284220
+            1024001 -1284220
+            719201 -979420
+          )
+        )
+      )
+      (net SR4_QH_T
+        (wire
+          (path In1.Cu 2500
+            1138300 -1322320
+            1126411 -1322320
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            719201 -1030220
+            999412 -1310431
+            1118238 -1310431
+            1126411 -1318604
+            1126411 -1322320
+          )
+        )
+      )
+      (net SR3_QH_T
+        (wire
+          (path In1.Cu 2500
+            1138300 -1296920
+            1138300 -1308809
+          )
+        )
+        (wire
+          (path In1.Cu 2500
+            643001 -1004820
+            631297 -1016524
+            631297 -1035054
+            639163 -1042920
+            675811 -1042920
+            967360 -1334469
+            1143134 -1334469
+            1150223 -1327380
+            1150223 -1317037
+            1141995 -1308809
+            1138300 -1308809
+          )
+        )
+      )
+      (net +3V3
+        (wire
+          (path In1.Cu 2500
+            630301 -1195320
+            655701 -1195320
+          )
+        )
+      )
+      (net SR2_QH
+        (wire
+          (path In1.Cu 2500
+            1052580 -674624
+            1039880 -687324
+            972593 -687324
+            949869 -710048
+            949869 -771870
+            864278 -857461
+            797657 -857461
+            739198 -915920
+            706501 -915920
+            643001 -979420
+          )
+        )
+      )
+      (net SR3_QH
+        (wire
+          (path In1.Cu 2500
+            1176400 -674624
+            1138300 -712724
+            972453 -712724
+            960669 -724508
+            960669 -767439
+            838652 -889456
+            801720 -889456
+            724456 -966720
+            706501 -966720
+            643001 -1030220
+          )
+        )
+      )
+      (net SR4_QH
+        (wire
+          (path In2.Cu 2500
+            928751 -674624
+            873607 -729768
+            873607 -746948
+            857031 -763524
+            848441 -763524
+            788479 -823486
+            788479 -986342
+            719201 -1055620
+          )
+        )
+      )
+      (net SR5_QH
+        (wire
+          (path In2.Cu 2500
+            804926 -674624
+            783975 -695575
+            783975 -940046
+            719201 -1004820
+          )
+        )
+      )
+      (net SR6_QH
+        (wire
+          (path In2.Cu 2500
+            681101 -674624
+            705437 -698960
+            705437 -914856
+            719201 -928620
+          )
+        )
+      )
+    )
+  )
+)
\ No newline at end of file

diff --git a/bom/ibom.html b/bom/ibom.html
new file mode 100644 (file)
index 0000000..ddf289b
--- /dev/null
+++ b/bom/ibom.html
@@ -0,0 +1,2385 @@
+<!DOCTYPE html>\r
+<html lang="en">\r
+\r
+<head>\r
+  <meta charset="UTF-8">\r
+  <meta name="viewport" content="width=device-width, initial-scale=1.0">\r
+  <title>Interactive BOM for KiCAD</title>\r
+  <style type="text/css">\r
+:root {\r
+  --pcb-edge-color: black;\r
+  --pad-color: #878787;\r
+  --pad-color-highlight: #D04040;\r
+  --pin1-outline-color: #ffb629;\r
+  --pin1-outline-color-highlight: #b4ff03;\r
+}\r
+\r
+html, body {\r
+  margin: 0px;\r
+  height: 100%;\r
+  font-family: Verdana, sans-serif;\r
+}\r
+\r
+.dark {\r
+  --pcb-edge-color: #eee;\r
+  --pad-color: #808080;\r
+  --pin1-outline-color: #ffa800;\r
+  --pin1-outline-color-highlight: #ccff00;\r
+  background-color: #252c30;\r
+  color: #eee;\r
+}\r
+\r
+button {\r
+  background-color: #eee;\r
+  border: 1px solid #888;\r
+  color: black;\r
+  height: 44px;\r
+  width: 44px;\r
+  text-align: center;\r
+  text-decoration: none;\r
+  display: inline-block;\r
+  font-size: 14px;\r
+  font-weight: bolder;\r
+}\r
+\r
+.dark button {\r
+  /* This will be inverted */\r
+  background-color: #c3b7b5;\r
+}\r
+\r
+button.depressed {\r
+  background-color: #0a0;\r
+  color: white;\r
+}\r
+\r
+.dark button.depressed {\r
+  /* This will be inverted */\r
+  background-color: #b3b;\r
+}\r
+\r
+button:focus {\r
+  outline: 0;\r
+}\r
+\r
+button#tb-btn {\r
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' viewBox='0 0 8.47 8.47'%3E%3Crect transform='translate(0 -288.53)' ry='1.17' y='288.8' x='.27' height='7.94' width='7.94' fill='%23f9f9f9'/%3E%3Cg transform='translate(0 -288.53)'%3E%3Crect width='7.94' height='7.94' x='.27' y='288.8' ry='1.17' fill='none' stroke='%23000' stroke-width='.4' stroke-linejoin='round'/%3E%3Cpath d='M1.32 290.12h5.82M1.32 291.45h5.82' fill='none' stroke='%23000' stroke-width='.4'/%3E%3Cpath d='M4.37 292.5v4.23M.26 292.63H8.2' fill='none' stroke='%23000' stroke-width='.3'/%3E%3Ctext font-weight='700' font-size='3.17' font-family='sans-serif'%3E%3Ctspan x='1.35' y='295.73'%3EF%3C/tspan%3E%3Ctspan x='5.03' y='295.68'%3EB%3C/tspan%3E%3C/text%3E%3C/g%3E%3C/svg%3E%0A");\r
+  background-size: 32px 32px;\r
+  background-position: 5px 5px;\r
+  background-repeat: no-repeat;\r
+}\r
+\r
+button#lr-btn {\r
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' viewBox='0 0 8.47 8.47'%3E%3Crect transform='translate(0 -288.53)' ry='1.17' y='288.8' x='.27' height='7.94' width='7.94' fill='%23f9f9f9'/%3E%3Cg transform='translate(0 -288.53)'%3E%3Crect width='7.94' height='7.94' x='.27' y='288.8' ry='1.17' fill='none' stroke='%23000' stroke-width='.4' stroke-linejoin='round'/%3E%3Cpath d='M1.06 290.12H3.7m-2.64 1.33H3.7m-2.64 1.32H3.7m-2.64 1.3H3.7m-2.64 1.33H3.7' fill='none' stroke='%23000' stroke-width='.4'/%3E%3Cpath d='M4.37 288.8v7.94m0-4.11h3.96' fill='none' stroke='%23000' stroke-width='.3'/%3E%3Ctext font-weight='700' font-size='3.17' font-family='sans-serif'%3E%3Ctspan x='5.11' y='291.96'%3EF%3C/tspan%3E%3Ctspan x='5.03' y='295.68'%3EB%3C/tspan%3E%3C/text%3E%3C/g%3E%3C/svg%3E%0A");\r
+  background-size: 32px 32px;\r
+  background-position: 5px 5px;\r
+  background-repeat: no-repeat;\r
+}\r
+\r
+button#bom-btn {\r
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' viewBox='0 0 8.47 8.47'%3E%3Crect transform='translate(0 -288.53)' ry='1.17' y='288.8' x='.27' height='7.94' width='7.94' fill='%23f9f9f9'/%3E%3Cg transform='translate(0 -288.53)' fill='none' stroke='%23000' stroke-width='.4'%3E%3Crect width='7.94' height='7.94' x='.27' y='288.8' ry='1.17' stroke-linejoin='round'/%3E%3Cpath d='M1.59 290.12h5.29M1.59 291.45h5.33M1.59 292.75h5.33M1.59 294.09h5.33M1.59 295.41h5.33'/%3E%3C/g%3E%3C/svg%3E");\r
+  background-size: 32px 32px;\r
+  background-position: 5px 5px;\r
+  background-repeat: no-repeat;\r
+}\r
+\r
+button#copy {\r
+  background-image: url("data:image/svg+xml,%3Csvg height='48' viewBox='0 0 48 48' width='48' xmlns='http://www.w3.org/2000/svg'%3E%3Cpath d='M0 0h48v48h-48z' fill='none'/%3E%3Cpath d='M32 2h-24c-2.21 0-4 1.79-4 4v28h4v-28h24v-4zm6 8h-22c-2.21 0-4 1.79-4 4v28c0 2.21 1.79 4 4 4h22c2.21 0 4-1.79 4-4v-28c0-2.21-1.79-4-4-4zm0 32h-22v-28h22v28z'/%3E%3C/svg%3E");\r
+  background-position: 6px 6px;\r
+  background-repeat: no-repeat;\r
+  background-size: 26px 26px;\r
+  border-radius: 6px;\r
+  height: 40px;\r
+  width: 40px;\r
+  margin: 10px 5px;\r
+}\r
+\r
+button#copy:active {\r
+    box-shadow: inset 0px 0px 5px #6c6c6c;\r
+}\r
+\r
+textarea.clipboard-temp {\r
+  position: fixed;\r
+  top: 0;\r
+  left: 0;\r
+  width: 2em;\r
+  height: 2em;\r
+  padding: 0;\r
+  border: None;\r
+  outline: None;\r
+  box-shadow: None;\r
+  background: transparent;\r
+}\r
+\r
+.left-most-button {\r
+  border-right: 0;\r
+  border-top-left-radius: 6px;\r
+  border-bottom-left-radius: 6px;\r
+}\r
+\r
+.middle-button {\r
+  border-right: 0;\r
+}\r
+\r
+.right-most-button {\r
+  border-top-right-radius: 6px;\r
+  border-bottom-right-radius: 6px;\r
+}\r
+\r
+.button-container {\r
+  font-size: 0;\r
+}\r
+\r
+.dark .button-container {\r
+  filter: invert(1);\r
+}\r
+\r
+@media print {\r
+  .hideonprint {\r
+    display: none;\r
+  }\r
+}\r
+\r
+canvas {\r
+  cursor: crosshair;\r
+}\r
+\r
+canvas:active {\r
+  cursor: grabbing;\r
+}\r
+\r
+.fileinfo {\r
+  width: 100%;\r
+  max-width: 1000px;\r
+  border: none;\r
+  padding: 5px;\r
+}\r
+\r
+.fileinfo .title {\r
+  font-size: 20pt;\r
+  font-weight: bold;\r
+}\r
+\r
+.fileinfo td {\r
+  overflow: hidden;\r
+  white-space: nowrap;\r
+  max-width: 1px;\r
+  width: 50%;\r
+  text-overflow: ellipsis;\r
+}\r
+\r
+.bom {\r
+  border-collapse: collapse;\r
+  font-family: Consolas, "DejaVu Sans Mono", Monaco, monospace;\r
+  font-size: 10pt;\r
+  table-layout: fixed;\r
+  width: 100%;\r
+  margin-top: 1px;\r
+}\r
+\r
+.bom th, .bom td {\r
+  border: 1px solid black;\r
+  padding: 5px;\r
+  word-wrap: break-word;\r
+  text-align: center;\r
+  position: relative;\r
+}\r
+\r
+.dark .bom th, .dark .bom td {\r
+  border: 1px solid #777;\r
+}\r
+\r
+.bom th {\r
+  background-color: #CCCCCC;\r
+  background-clip: padding-box;\r
+}\r
+\r
+.dark .bom th {\r
+  background-color: #3b4749;\r
+}\r
+\r
+.bom tr.highlighted:nth-child(n) {\r
+  background-color: #cfc;\r
+}\r
+\r
+.dark .bom tr.highlighted:nth-child(n) {\r
+  background-color: #226022;\r
+}\r
+\r
+.bom tr:nth-child(even) {\r
+  background-color: #f2f2f2;\r
+}\r
+\r
+.dark .bom tr:nth-child(even) {\r
+  background-color: #313b40;\r
+}\r
+\r
+.bom tr {\r
+  transition: background-color 0.2s;\r
+}\r
+\r
+.bom .numCol {\r
+  width: 25px;\r
+}\r
+\r
+.bom .Description {\r
+  width: 10%;\r
+}\r
+\r
+.bom .Part {\r
+  width: 10%;\r
+}\r
+\r
+.bom .Value {\r
+  width: 15%;\r
+}\r
+\r
+.bom .Quantity {\r
+  width: 65px;\r
+}\r
+\r
+.bom th .sortmark {\r
+  position: absolute;\r
+  right: 1px;\r
+  top: 1px;\r
+  margin-top: -5px;\r
+  border-width: 5px;\r
+  border-style: solid;\r
+  border-color: transparent transparent #221 transparent;\r
+  transform-origin: 50% 85%;\r
+  transition: opacity 0.2s, transform 0.4s;\r
+}\r
+\r
+.dark .bom th .sortmark {\r
+  filter: invert(1);\r
+}\r
+\r
+.bom th .sortmark.none {\r
+  opacity: 0;\r
+}\r
+\r
+.bom th .sortmark.desc {\r
+  transform: rotate(180deg);\r
+}\r
+\r
+.bom th:hover .sortmark.none {\r
+  opacity: 0.5;\r
+}\r
+\r
+.bom .bom-checkbox {\r
+  width: 30px;\r
+  position: relative;\r
+  user-select: none;\r
+  -moz-user-select: none;\r
+}\r
+\r
+.bom .bom-checkbox:before {\r
+  content: "";\r
+  position: absolute;\r
+  border-width: 15px;\r
+  border-style: solid;\r
+  border-color: #51829f transparent transparent transparent;\r
+  visibility: hidden;\r
+  top: -15px;\r
+}\r
+\r
+.bom .bom-checkbox:after {\r
+  content: "Double click to set/unset all";\r
+  position: absolute;\r
+  color: white;\r
+  top: -35px;\r
+  left: -26px;\r
+  background: #51829f;\r
+  padding: 5px 15px;\r
+  border-radius: 8px;\r
+  white-space: nowrap;\r
+  visibility: hidden;\r
+}\r
+\r
+.bom .bom-checkbox:hover:before, .bom .bom-checkbox:hover:after {\r
+  visibility: visible;\r
+  transition: visibility 0.2s linear 1s;\r
+}\r
+\r
+.split {\r
+  -webkit-box-sizing: border-box;\r
+  -moz-box-sizing: border-box;\r
+  box-sizing: border-box;\r
+  overflow-y: auto;\r
+  overflow-x: hidden;\r
+  background-color: inherit;\r
+}\r
+\r
+.split.split-horizontal, .gutter.gutter-horizontal {\r
+  height: 100%;\r
+  float: left;\r
+}\r
+\r
+.gutter {\r
+  background-color: #ddd;\r
+  background-repeat: no-repeat;\r
+  background-position: 50%;\r
+  transition: background-color 0.3s;\r
+}\r
+\r
+.dark .gutter {\r
+  background-color: #777;\r
+}\r
+\r
+.gutter.gutter-horizontal {\r
+  background-image: url('data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAAUAAAAeCAYAAADkftS9AAAAIklEQVQoU2M4c+bMfxAGAgYYmwGrIIiDjrELjpo5aiZeMwF+yNnOs5KSvgAAAABJRU5ErkJggg==');\r
+  cursor: ew-resize;\r
+  width: 5px;\r
+}\r
+\r
+.gutter.gutter-vertical {\r
+  background-image: url('data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAB4AAAAFAQMAAABo7865AAAABlBMVEVHcEzMzMzyAv2sAAAAAXRSTlMAQObYZgAAABBJREFUeF5jOAMEEAIEEFwAn3kMwcB6I2AAAAAASUVORK5CYII=');\r
+  cursor: ns-resize;\r
+  height: 5px;\r
+}\r
+\r
+.searchbox {\r
+  float: left;\r
+  height: 40px;\r
+  margin: 10px 5px;\r
+  padding: 12px 32px;\r
+  font-family: Consolas, "DejaVu Sans Mono", Monaco, monospace;\r
+  font-size: 18px;\r
+  box-sizing: border-box;\r
+  border: 1px solid #888;\r
+  border-radius: 6px;\r
+  outline: none;\r
+  background-color: #eee;\r
+  transition: background-color 0.2s, border 0.2s;\r
+  background-image: url('data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAABAAAAAQCAYAAAAf8/9hAAABNklEQVQ4T8XSMUvDQBQH8P/LElFa/AIZHcTBQSz0I/gFstTBRR2KUC4ldDxw7h0Bl3RRUATxi4iiODgoiLNrbQYp5J6cpJJqomkX33Z37/14d/dIa33MzDuYI4johOI4XhyNRteO46zNYjDzAxE1yBZprVeZ+QbAUhXEGJMA2Ox2u4+fQIa0mPmsCgCgJYQ4t7lfgF0opQYAdv9ABkKI/UnOFCClXKjX61cA1osQY8x9kiRNKeV7IWA3oyhaSdP0FkAtjxhj3hzH2RBCPOf3pzqYHCilfAAX+URm9oMguPzeWSGQvUcMYC8rOBJCHBRdqxTo9/vbRHRqi8bj8XKv1xvODbiuW2u32/bvf0SlDv4XYOY7z/Mavu+nM1+BmQ+NMc0wDF/LprP0DbTWW0T00ul0nn4b7Q87+X4Qmfiq2wAAAABJRU5ErkJggg==');\r
+  background-position: 10px 10px;\r
+  background-repeat: no-repeat;\r
+}\r
+\r
+.dark .searchbox {\r
+  background-color: #111;\r
+  color: #eee;\r
+}\r
+\r
+.searchbox::placeholder {\r
+  color: #ccc;\r
+}\r
+\r
+.dark .searchbox::placeholder {\r
+  color: #666;\r
+}\r
+\r
+.filter {\r
+  width: calc(60% - 64px);\r
+}\r
+\r
+.reflookup {\r
+  width: calc(40% - 10px);\r
+}\r
+\r
+input[type=text]:focus {\r
+  background-color: white;\r
+  border: 1px solid #333;\r
+}\r
+\r
+.dark input[type=text]:focus {\r
+  background-color: #333;\r
+  border: 1px solid #ccc;\r
+}\r
+\r
+mark.highlight {\r
+  background-color: #5050ff;\r
+  color: #fff;\r
+  padding: 2px;\r
+  border-radius: 6px;\r
+}\r
+\r
+.dark mark.highlight {\r
+  background-color: #76a6da;\r
+  color: #111;\r
+}\r
+\r
+.menubtn {\r
+  background-color: white;\r
+  font-size: 16px;\r
+  border: none;\r
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='36' height='36' viewBox='0 0 20 20'%3E%3Cpath fill='none' d='M0 0h20v20H0V0z'/%3E%3Cpath d='M15.95 10.78c.03-.25.05-.51.05-.78s-.02-.53-.06-.78l1.69-1.32c.15-.12.19-.34.1-.51l-1.6-2.77c-.1-.18-.31-.24-.49-.18l-1.99.8c-.42-.32-.86-.58-1.35-.78L12 2.34c-.03-.2-.2-.34-.4-.34H8.4c-.2 0-.36.14-.39.34l-.3 2.12c-.49.2-.94.47-1.35.78l-1.99-.8c-.18-.07-.39 0-.49.18l-1.6 2.77c-.1.18-.06.39.1.51l1.69 1.32c-.04.25-.07.52-.07.78s.02.53.06.78L2.37 12.1c-.15.12-.19.34-.1.51l1.6 2.77c.1.18.31.24.49.18l1.99-.8c.42.32.86.58 1.35.78l.3 2.12c.04.2.2.34.4.34h3.2c.2 0 .37-.14.39-.34l.3-2.12c.49-.2.94-.47 1.35-.78l1.99.8c.18.07.39 0 .49-.18l1.6-2.77c.1-.18.06-.39-.1-.51l-1.67-1.32zM10 13c-1.65 0-3-1.35-3-3s1.35-3 3-3 3 1.35 3 3-1.35 3-3 3z'/%3E%3C/svg%3E%0A");\r
+  background-position: center;\r
+  background-repeat: no-repeat;\r
+}\r
+\r
+.dark .menubtn {\r
+  filter: invert(1);\r
+}\r
+\r
+.menu {\r
+  position: relative;\r
+  display: inline-block;\r
+}\r
+\r
+.menu-content {\r
+  display: none;\r
+  position: absolute;\r
+  background-color: white;\r
+  right: 0;\r
+  min-width: 300px;\r
+  box-shadow: 0px 8px 16px 0px rgba(0, 0, 0, 0.2);\r
+  z-index: 100;\r
+  padding: 8px;\r
+}\r
+\r
+.dark .menu-content {\r
+  background-color: #111;\r
+}\r
+\r
+.menu:hover .menu-content {\r
+  display: block;\r
+}\r
+\r
+.menu:hover .menubtn {\r
+  background-color: #eee;\r
+}\r
+\r
+.dark .menu:hover .menubtn {}\r
+\r
+.menu-label {\r
+  display: inline-block;\r
+  padding: 8px;\r
+  border: 1px solid #ccc;\r
+  border-top: 0;\r
+  width: calc(100% - 18px);\r
+}\r
+\r
+.menu-label-top {\r
+  border-top: 1px solid #ccc;\r
+}\r
+\r
+.menu-textbox {\r
+  float: left;\r
+  height: 24px;\r
+  margin: 10px 5px;\r
+  padding: 5px 5px;\r
+  font-family: Consolas, "DejaVu Sans Mono", Monaco, monospace;\r
+  font-size: 14px;\r
+  box-sizing: border-box;\r
+  border: 1px solid #888;\r
+  border-radius: 4px;\r
+  outline: none;\r
+  background-color: #eee;\r
+  transition: background-color 0.2s, border 0.2s;\r
+  width: calc(100% - 10px);\r
+}\r
+\r
+.dark .menu-textbox {\r
+  background-color: #222;\r
+  color: #eee;\r
+}\r
+\r
+#topmostdiv {\r
+  transition: background-color 0.3s;\r
+}\r
+\r
+#top {\r
+  height: 78px;\r
+  border-bottom: 2px solid black;\r
+}\r
+\r
+.dark #top {\r
+  border-bottom: 2px solid #ccc;\r
+}\r
+\r
+#dbg {\r
+  display: block;\r
+}\r
+\r
+::-webkit-scrollbar {\r
+  width: 8px;\r
+}\r
+\r
+::-webkit-scrollbar-track {\r
+  background: #aaa;\r
+}\r
+\r
+::-webkit-scrollbar-thumb {\r
+  background: #666;\r
+  border-radius: 3px;\r
+}\r
+\r
+::-webkit-scrollbar-thumb:hover {\r
+  background: #555;\r
+}\r
+\r
+.slider {\r
+  -webkit-appearance: none;\r
+  width: 100%;\r
+  margin: 3px 0;\r
+  padding: 0;\r
+  outline: none;\r
+  opacity: 0.7;\r
+  -webkit-transition: .2s;\r
+  transition: opacity .2s;\r
+  border-radius: 3px;\r
+}\r
+\r
+.slider:hover {\r
+  opacity: 1;\r
+}\r
+\r
+.slider:focus {\r
+  outline: none;\r
+}\r
+\r
+.slider::-webkit-slider-runnable-track {\r
+  -webkit-appearance: none;\r
+  width: 100%;\r
+  height: 8px;\r
+  background: #d3d3d3;\r
+  border-radius: 3px;\r
+  border: none;\r
+}\r
+\r
+.slider::-webkit-slider-thumb {\r
+  -webkit-appearance: none;\r
+  width: 15px;\r
+  height: 15px;\r
+  border-radius: 50%;\r
+  background: #0a0;\r
+  cursor: pointer;\r
+  margin-top: -4px;\r
+}\r
+\r
+.dark .slider::-webkit-slider-thumb {\r
+  background: #3d3;\r
+}\r
+\r
+.slider::-moz-range-thumb {\r
+  width: 15px;\r
+  height: 15px;\r
+  border-radius: 50%;\r
+  background: #0a0;\r
+  cursor: pointer;\r
+}\r
+\r
+.slider::-moz-range-track {\r
+  height: 8px;\r
+  background: #d3d3d3;\r
+  border-radius: 3px;\r
+}\r
+\r
+.dark .slider::-moz-range-thumb {\r
+  background: #3d3;\r
+}\r
+\r
+.slider::-ms-track {\r
+  width: 100%;\r
+  height: 8px;\r
+  border-width: 3px 0;\r
+  background: transparent;\r
+  border-color: transparent;\r
+  color: transparent;\r
+  transition: opacity .2s;\r
+}\r
+\r
+.slider::-ms-fill-lower {\r
+  background: #d3d3d3;\r
+  border: none;\r
+  border-radius: 3px;\r
+}\r
+\r
+.slider::-ms-fill-upper {\r
+  background: #d3d3d3;\r
+  border: none;\r
+  border-radius: 3px;\r
+}\r
+\r
+.slider::-ms-thumb {\r
+  width: 15px;\r
+  height: 15px;\r
+  border-radius: 50%;\r
+  background: #0a0;\r
+  cursor: pointer;\r
+  margin: 0;\r
+}\r
+\r
+.shameless-plug {\r
+  font-size: 0.8em;\r
+  text-align: center;\r
+  display: block;\r
+}\r
+\r
+.shameless-plug a {\r
+  color: #0278a4;\r
+}\r
+\r
+.dark .shameless-plug a {\r
+  color: #00b9fd;\r
+}\r
+\r
+  </style>\r
+  <script type="text/javascript" >\r
+///////////////////////////////////////////////\r
+/*\r
+  Split.js - v1.3.5\r
+  MIT License\r
+  https://github.com/nathancahill/Split.js\r
+*/\r
+!function(e,t){"object"==typeof exports&&"undefined"!=typeof module?module.exports=t():"function"==typeof define&&define.amd?define(t):e.Split=t()}(this,function(){"use strict";var e=window,t=e.document,n="addEventListener",i="removeEventListener",r="getBoundingClientRect",s=function(){return!1},o=e.attachEvent&&!e[n],a=["","-webkit-","-moz-","-o-"].filter(function(e){var n=t.createElement("div");return n.style.cssText="width:"+e+"calc(9px)",!!n.style.length}).shift()+"calc",l=function(e){return"string"==typeof e||e instanceof String?t.querySelector(e):e};return function(u,c){function z(e,t,n){var i=A(y,t,n);Object.keys(i).forEach(function(t){return e.style[t]=i[t]})}function h(e,t){var n=B(y,t);Object.keys(n).forEach(function(t){return e.style[t]=n[t]})}function f(e){var t=E[this.a],n=E[this.b],i=t.size+n.size;t.size=e/this.size*i,n.size=i-e/this.size*i,z(t.element,t.size,this.aGutterSize),z(n.element,n.size,this.bGutterSize)}function m(e){var t;this.dragging&&((t="touches"in e?e.touches[0][b]-this.start:e[b]-this.start)<=E[this.a].minSize+M+this.aGutterSize?t=E[this.a].minSize+this.aGutterSize:t>=this.size-(E[this.b].minSize+M+this.bGutterSize)&&(t=this.size-(E[this.b].minSize+this.bGutterSize)),f.call(this,t),c.onDrag&&c.onDrag())}function g(){var e=E[this.a].element,t=E[this.b].element;this.size=e[r]()[y]+t[r]()[y]+this.aGutterSize+this.bGutterSize,this.start=e[r]()[G]}function d(){var t=this,n=E[t.a].element,r=E[t.b].element;t.dragging&&c.onDragEnd&&c.onDragEnd(),t.dragging=!1,e[i]("mouseup",t.stop),e[i]("touchend",t.stop),e[i]("touchcancel",t.stop),t.parent[i]("mousemove",t.move),t.parent[i]("touchmove",t.move),delete t.stop,delete t.move,n[i]("selectstart",s),n[i]("dragstart",s),r[i]("selectstart",s),r[i]("dragstart",s),n.style.userSelect="",n.style.webkitUserSelect="",n.style.MozUserSelect="",n.style.pointerEvents="",r.style.userSelect="",r.style.webkitUserSelect="",r.style.MozUserSelect="",r.style.pointerEvents="",t.gutter.style.cursor="",t.parent.style.cursor=""}function S(t){var i=this,r=E[i.a].element,o=E[i.b].element;!i.dragging&&c.onDragStart&&c.onDragStart(),t.preventDefault(),i.dragging=!0,i.move=m.bind(i),i.stop=d.bind(i),e[n]("mouseup",i.stop),e[n]("touchend",i.stop),e[n]("touchcancel",i.stop),i.parent[n]("mousemove",i.move),i.parent[n]("touchmove",i.move),r[n]("selectstart",s),r[n]("dragstart",s),o[n]("selectstart",s),o[n]("dragstart",s),r.style.userSelect="none",r.style.webkitUserSelect="none",r.style.MozUserSelect="none",r.style.pointerEvents="none",o.style.userSelect="none",o.style.webkitUserSelect="none",o.style.MozUserSelect="none",o.style.pointerEvents="none",i.gutter.style.cursor=j,i.parent.style.cursor=j,g.call(i)}function v(e){e.forEach(function(t,n){if(n>0){var i=F[n-1],r=E[i.a],s=E[i.b];r.size=e[n-1],s.size=t,z(r.element,r.size,i.aGutterSize),z(s.element,s.size,i.bGutterSize)}})}function p(){F.forEach(function(e){e.parent.removeChild(e.gutter),E[e.a].element.style[y]="",E[e.b].element.style[y]=""})}void 0===c&&(c={});var y,b,G,E,w=l(u[0]).parentNode,D=e.getComputedStyle(w).flexDirection,U=c.sizes||u.map(function(){return 100/u.length}),k=void 0!==c.minSize?c.minSize:100,x=Array.isArray(k)?k:u.map(function(){return k}),L=void 0!==c.gutterSize?c.gutterSize:10,M=void 0!==c.snapOffset?c.snapOffset:30,O=c.direction||"horizontal",j=c.cursor||("horizontal"===O?"ew-resize":"ns-resize"),C=c.gutter||function(e,n){var i=t.createElement("div");return i.className="gutter gutter-"+n,i},A=c.elementStyle||function(e,t,n){var i={};return"string"==typeof t||t instanceof String?i[e]=t:i[e]=o?t+"%":a+"("+t+"% - "+n+"px)",i},B=c.gutterStyle||function(e,t){return n={},n[e]=t+"px",n;var n};"horizontal"===O?(y="width","clientWidth",b="clientX",G="left","paddingLeft"):"vertical"===O&&(y="height","clientHeight",b="clientY",G="top","paddingTop");var F=[];return E=u.map(function(e,t){var i,s={element:l(e),size:U[t],minSize:x[t]};if(t>0&&(i={a:t-1,b:t,dragging:!1,isFirst:1===t,isLast:t===u.length-1,direction:O,parent:w},i.aGutterSize=L,i.bGutterSize=L,i.isFirst&&(i.aGutterSize=L/2),i.isLast&&(i.bGutterSize=L/2),"row-reverse"===D||"column-reverse"===D)){var a=i.a;i.a=i.b,i.b=a}if(!o&&t>0){var c=C(t,O);h(c,L),c[n]("mousedown",S.bind(i)),c[n]("touchstart",S.bind(i)),w.insertBefore(c,s.element),i.gutter=c}0===t||t===u.length-1?z(s.element,s.size,L/2):z(s.element,s.size,L);var f=s.element[r]()[y];return f<s.minSize&&(s.minSize=f),t>0&&F.push(i),s}),o?{setSizes:v,destroy:p}:{setSizes:v,getSizes:function(){return E.map(function(e){return e.size})},collapse:function(e){if(e===F.length){var t=F[e-1];g.call(t),o||f.call(t,t.size-t.bGutterSize)}else{var n=F[e];g.call(n),o||f.call(n,n.aGutterSize)}},destroy:p}}});\r
+\r
+///////////////////////////////////////////////\r
+\r
+///////////////////////////////////////////////\r
+var config = {"redraw_on_drag": true, "highlight_pin1": false, "extra_fields": [], "dark_mode": false, "bom_view": "left-right", "board_rotation": 0, "checkboxes": "Sourced,Placed", "show_silkscreen": true, "layer_view": "FB"}\r
+///////////////////////////////////////////////\r
+\r
+///////////////////////////////////////////////\r
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"height": 1.0}, {"start": [138.03, 142.1], "end": [138.53, 142.1], "type": "segment", "width": 0.09999999999999999}, {"start": [138.03, 139.29999999999998], "end": [138.03, 142.1], "type": "segment", "width": 0.09999999999999999}, {"start": [138.53, 139.29999999999998], "end": [138.03, 139.29999999999998], "type": "segment", "width": 0.09999999999999999}, {"start": [161.13, 139.29999999999998], "end": [160.63, 139.29999999999998], "type": "segment", "width": 0.09999999999999999}, {"start": [161.13, 139.29999999999998], "end": [161.13, 139.79999999999998], "type": "segment", "width": 0.09999999999999999}, {"start": [161.13, 142.1], "end": [161.13, 141.6], "type": "segment", "width": 0.09999999999999999}, {"start": [161.13, 142.1], "end": [160.63, 142.1], "type": "segment", "width": 0.09999999999999999}, {"width": 1.0, "angle": 0.0, "attr": [], "horiz_justify": 0, "text": "RN6", "thickness": 0.15, "pos": [149.73, 144.85], "height": 1.0}, {"start": [138.03, 148.45], "end": [138.53, 148.45], "type": "segment", "width": 0.09999999999999999}, {"start": [138.03, 145.65], "end": [138.03, 148.45], "type": "segment", "width": 0.09999999999999999}, {"start": [138.53, 145.65], "end": [138.03, 145.65], "type": "segment", "width": 0.09999999999999999}, {"start": [161.13, 145.65], "end": [160.63, 145.65], "type": "segment", "width": 0.09999999999999999}, {"start": [161.13, 145.65], "end": [161.13, 146.15], "type": "segment", "width": 0.09999999999999999}, {"start": [161.13, 148.45], "end": [161.13, 147.95], "type": "segment", "width": 0.09999999999999999}, {"start": [161.13, 148.45], "end": [160.63, 148.45], "type": "segment", "width": 0.09999999999999999}, {"width": 1.0, "angle": 90.0, "attr": [], "horiz_justify": 0, "text": "RN4", "thickness": 0.15, "pos": [163.9, 51.6429], "height": 1.0}, {"start": [167.5, 63.3429], "end": [167.5, 62.8429], "type": "segment", "width": 0.09999999999999999}, {"start": [164.7, 63.3429], "end": [167.5, 63.3429], "type": "segment", "width": 0.09999999999999999}, {"start": [164.7, 62.8429], "end": [164.7, 63.3429], "type": "segment", "width": 0.09999999999999999}, {"start": [164.7, 40.2429], "end": [164.7, 40.7429], "type": "segment", "width": 0.09999999999999999}, {"start": [164.7, 40.2429], "end": [165.2, 40.2429], "type": "segment", "width": 0.09999999999999999}, {"start": [167.5, 40.2429], "end": [167.0, 40.2429], "type": "segment", "width": 0.09999999999999999}, {"start": [167.5, 40.2429], "end": [167.5, 40.7429], "type": "segment", "width": 0.09999999999999999}, {"width": 1.0, "angle": 0.0, "attr": [], "horiz_justify": 0, "text": "P8", "thickness": 0.15, "pos": [173.51999999999998, 83.952], "height": 1.0}, {"start": [171.97, 87.502], "end": [171.97, 89.05199999999999], "type": "segment", "width": 0.15}, {"start": [174.79, 90.322], "end": [172.25, 90.322], "type": "segment", "width": 0.15}, {"start": [174.79, 87.782], "end": [174.79, 90.322], "type": "segment", "width": 0.15}, {"start": [173.51999999999998, 87.502], "end": [171.97, 87.502], "type": "segment", "width": 0.15}, {"start": [177.32999999999998, 87.782], "end": [174.79, 87.782], "type": "segment", "width": 0.15}, {"start": [177.32999999999998, 146.202], "end": [172.25, 146.202], "type": "segment", "width": 0.15}, {"start": [172.25, 146.202], "end": [172.25, 90.322], "type": "segment", "width": 0.15}, {"start": [177.32999999999998, 146.202], "end": [177.32999999999998, 87.782], "type": "segment", "width": 0.15}, {"width": 1.0, "angle": 0.0, "attr": [], "horiz_justify": 0, "text": "P9", "thickness": 0.15, "pos": [125.25999999999999, 83.952], "height": 1.0}, {"start": [123.71, 87.502], "end": [123.71, 89.05199999999999], "type": "segment", "width": 0.15}, {"start": [126.53, 90.322], "end": [123.99, 90.322], "type": "segment", "width": 0.15}, {"start": [126.53, 87.782], "end": [126.53, 90.322], "type": "segment", "width": 0.15}, {"start": [125.25999999999999, 87.502], "end": [123.71, 87.502], "type": "segment", "width": 0.15}, {"start": [129.07, 87.782], "end": [126.53, 87.782], "type": "segment", "width": 0.15}, {"start": [129.07, 146.202], "end": [123.99, 146.202], "type": "segment", "width": 0.15}, {"start": [123.99, 146.202], "end": [123.99, 90.322], "type": "segment", "width": 0.15}, {"start": [129.07, 146.202], "end": [129.07, 87.782], "type": "segment", "width": 0.15}, {"width": 1.0, "angle": 0.0, "attr": [], "horiz_justify": 0, "text": "H2", "thickness": 0.15, "pos": [110.22, 147.66], "height": 1.0}, {"width": 1.0, "angle": 0.0, "attr": [], "horiz_justify": 0, "text": "H4", "thickness": 0.15, "pos": [183.88, 147.66], "height": 1.0}]}, "edges_bbox": {"minx": 106.408729, "miny": 28.938729, "maxx": 187.691271, "maxy": 154.671271}, "metadata": {"date": "2018-12-28 11:01:41", "company": "", "revision": "", "title": "bbb-bort"}}\r
+///////////////////////////////////////////////\r
+\r
+///////////////////////////////////////////////\r
+/* Utility functions */\r
+\r
+var storagePrefix = 'KiCad_HTML_BOM__' + pcbdata.metadata.title + '__' +\r
+  pcbdata.metadata.revision + '__';\r
+var storage;\r
+\r
+function initStorage(key) {\r
+  try {\r
+    window.localStorage.getItem("blank");\r
+    storage = window.localStorage;\r
+  } catch (e) {\r
+    // localStorage not available\r
+  }\r
+  if (!storage) {\r
+    try {\r
+      window.sessionStorage.getItem("blank");\r
+      storage = window.sessionStorage;\r
+    } catch (e) {\r
+      // sessionStorage also not available\r
+    }\r
+  }\r
+}\r
+\r
+function readStorage(key) {\r
+  if (storage) {\r
+    return storage.getItem(storagePrefix + '#' + key);\r
+  } else {\r
+    return null;\r
+  }\r
+}\r
+\r
+function writeStorage(key, value) {\r
+  if (storage) {\r
+    storage.setItem(storagePrefix + '#' + key, value);\r
+  }\r
+}\r
+\r
+function fancyDblClickHandler(el, onsingle, ondouble) {\r
+  return function() {\r
+    if (el.getAttribute("data-dblclick") == null) {\r
+      el.setAttribute("data-dblclick", 1);\r
+      setTimeout(function() {\r
+        if (el.getAttribute("data-dblclick") == 1) {\r
+          onsingle();\r
+        }\r
+        el.removeAttribute("data-dblclick");\r
+      }, 200);\r
+    } else {\r
+      el.removeAttribute("data-dblclick");\r
+      ondouble();\r
+    }\r
+  }\r
+}\r
+\r
+function smoothScrollToRow(rowid) {\r
+  document.getElementById(rowid).scrollIntoView({\r
+    behavior: "smooth",\r
+    block: "center",\r
+    inline: "nearest"\r
+  });\r
+}\r
+\r
+function focusInputField(input) {\r
+  input.scrollIntoView(false);\r
+  input.focus();\r
+  input.select();\r
+}\r
+\r
+function copyToClipboard() {\r
+  var text = '';\r
+  for (var node of bomhead.childNodes[0].childNodes) {\r
+    if (node.firstChild) {\r
+      text = text + node.firstChild.nodeValue;\r
+    }\r
+    if (node != bomhead.childNodes[0].lastChild) {\r
+      text += '\t';\r
+    }\r
+  }\r
+  text += '\n';\r
+  for (var row of bombody.childNodes) {\r
+    for (var cell of row.childNodes) {\r
+      for (var node of cell.childNodes) {\r
+        if (node.nodeName == "INPUT") {\r
+          if (node.checked) {\r
+            text = text + '✓';\r
+          }\r
+        } else if (node.nodeName == "MARK") {\r
+          text = text + node.firstChild.nodeValue;\r
+        } else {\r
+          text = text + node.nodeValue;\r
+        }\r
+      }\r
+      if (cell != row.lastChild) {\r
+        text += '\t';\r
+      }\r
+    }\r
+    text += '\n';\r
+  }\r
+  var textArea = document.createElement("textarea");\r
+  textArea.classList.add('clipboard-temp');\r
+  textArea.value = text;\r
+\r
+  document.body.appendChild(textArea);\r
+  textArea.focus();\r
+  textArea.select();\r
+\r
+  try {\r
+    if (document.execCommand('copy')) {\r
+      console.log('Bom copied to clipboard.');\r
+    }\r
+  } catch (err) {\r
+    console.log('Can not copy to clipboard.');\r
+  }\r
+\r
+  document.body.removeChild(textArea);\r
+}\r
+\r
+function removeGutterNode(node) {\r
+  for (var i = 0; i < node.childNodes.length; i++) {\r
+    if (node.childNodes[i].classList &&\r
+      node.childNodes[i].classList.contains("gutter")) {\r
+      node.removeChild(node.childNodes[i]);\r
+      break;\r
+    }\r
+  }\r
+}\r
+\r
+function cleanGutters() {\r
+  removeGutterNode(document.getElementById("bot"));\r
+  removeGutterNode(document.getElementById("canvasdiv"));\r
+}\r
+\r
+var units = {\r
+  prefixes: {\r
+    giga: ["G", "g", "giga", "Giga", "GIGA"],\r
+    mega: ["M", "mega", "Mega", "MEGA"],\r
+    kilo: ["K", "k", "kilo", "Kilo", "KILO"],\r
+    milli: ["m", "milli", "Milli", "MILLI"],\r
+    micro: ["U", "u", "micro", "Micro", "MICRO", "μ", "µ"], // different utf8 μ\r
+    nano: ["N", "n", "nano", "Nano", "NANO"],\r
+    pico: ["P", "p", "pico", "Pico", "PICO"],\r
+  },\r
+  unitsShort: ["R", "r", "Ω", "F", "f", "H", "h"],\r
+  unitsLong: [\r
+    "OHM", "Ohm", "ohm", "ohms",\r
+    "FARAD", "Farad", "farad",\r
+    "HENRY", "Henry", "henry"\r
+  ],\r
+  getMultiplier: function(s) {\r
+    if (this.prefixes.giga.includes(s)) return 1e9;\r
+    if (this.prefixes.mega.includes(s)) return 1e6;\r
+    if (this.prefixes.kilo.includes(s)) return 1e3;\r
+    if (this.prefixes.milli.includes(s)) return 1e-3;\r
+    if (this.prefixes.micro.includes(s)) return 1e-6;\r
+    if (this.prefixes.nano.includes(s)) return 1e-9;\r
+    if (this.prefixes.pico.includes(s)) return 1e-12;\r
+    return 1;\r
+  },\r
+  valueRegex: null,\r
+}\r
+\r
+function initUtils() {\r
+  var allPrefixes = units.prefixes.giga\r
+                    .concat(units.prefixes.mega)\r
+                    .concat(units.prefixes.kilo)\r
+                    .concat(units.prefixes.milli)\r
+                    .concat(units.prefixes.micro)\r
+                    .concat(units.prefixes.nano)\r
+                    .concat(units.prefixes.pico);\r
+  var allUnits = units.unitsShort.concat(units.unitsLong);\r
+  units.valueRegex = new RegExp("^([0-9\.]+)" +\r
+                         "\\s*(" + allPrefixes.join("|") + ")?" +\r
+                         "(" + allUnits.join("|") + ")?" +\r
+                         "(\\b.*)?$", "");\r
+  units.valueAltRegex = new RegExp("^([0-9]*)" +\r
+                         "(" + units.unitsShort.join("|") + ")?" +\r
+                         "([GgMmKkUuNnPp])?" +\r
+                         "([0-9]*)" +\r
+                         "(\\b.*)?$", "");\r
+  for (var bomtable of Object.values(pcbdata.bom)) {\r
+    for (var row of bomtable) {\r
+      row.push(parseValue(row[1], row[3][0][0]));\r
+    }\r
+  }\r
+}\r
+\r
+function parseValue(val, ref) {\r
+  var inferUnit = (unit, ref) => {\r
+    if (unit) {\r
+      unit = unit.toLowerCase();\r
+      if (unit == 'Ω' || unit == "ohm" || unit == "ohms") {\r
+        unit = 'r';\r
+      }\r
+      unit = unit[0];\r
+    } else {\r
+      ref = /^([a-z]+)\d+$/i.exec(ref);\r
+      if (ref) {\r
+        ref = ref[1].toLowerCase();\r
+        if (ref == "c") unit = 'f';\r
+        else if (ref == "l") unit = 'h';\r
+        else if (ref == "r" || ref == "rv") unit = 'r';\r
+        else unit = null;\r
+      }\r
+    }\r
+    return unit;\r
+  };\r
+  val = val.replace(/,/g, "");\r
+  var match = units.valueRegex.exec(val);\r
+  var unit;\r
+  if (match) {\r
+    val = parseFloat(match[1]);\r
+    if (match[2]) {\r
+      val = val * units.getMultiplier(match[2]);\r
+    }\r
+    unit = inferUnit(match[3], ref);\r
+    if (!unit) return null;\r
+    else return {\r
+      val: val,\r
+      unit: unit,\r
+      extra: match[4],\r
+    }\r
+  }\r
+  match = units.valueAltRegex.exec(val);\r
+  if (match && (match[1] || match[4])) {\r
+    val = parseFloat(match[1] + "." + match[4]);\r
+    if (match[3]) {\r
+      val = val * units.getMultiplier(match[3]);\r
+    }\r
+    unit = inferUnit(match[2], ref);\r
+    if (!unit) return null;\r
+    else return {\r
+      val: val,\r
+      unit: unit,\r
+      extra: match[5],\r
+    }\r
+  }\r
+  return null;\r
+}\r
+\r
+function valueCompare(a, b, stra, strb) {\r
+  if (a === null && b === null) {\r
+    // Failed to parse both values, compare them as strings.\r
+    if (stra != strb) return stra > strb ? 1 : -1;\r
+    else return 0;\r
+  } else if (a === null) {\r
+    return 1;\r
+  } else if (b === null) {\r
+    return -1;\r
+  } else {\r
+    if (a.unit != b.unit) return a.unit > b.unit ? 1 : -1;\r
+    else if (a.val != b.val) return a.val > b.val ? 1 : -1;\r
+    else if (a.extra != b.extra) return a.extra > b.extra ? 1 : -1;\r
+    else return 0;\r
+  }\r
+}\r
+\r
+///////////////////////////////////////////////\r
+\r
+///////////////////////////////////////////////\r
+/* PCB rendering code */\r
+\r
+var redrawOnDrag = true;\r
+var boardRotation = 0;\r
+\r
+function deg2rad(deg) {\r
+  return deg * Math.PI / 180;\r
+}\r
+\r
+function calcFontPoint(linepoint, text, offsetx, offsety, tilt) {\r
+  var point = [\r
+    linepoint[0] * text.width + offsetx,\r
+    linepoint[1] * text.height + offsety\r
+  ];\r
+  // Adding half a line height here is technically a bug\r
+  // but pcbnew currently does the same, text is slightly shifted.\r
+  point[0] -= (point[1] + text.height * 0.5) * tilt;\r
+  return point;\r
+}\r
+\r
+function drawtext(ctx, text, color, flip) {\r
+  ctx.save();\r
+  ctx.translate(...text.pos);\r
+  var angle = -text.angle;\r
+  if (text.attr.includes("mirrored")) {\r
+    ctx.scale(-1, 1);\r
+    angle = -angle;\r
+  }\r
+  var tilt = 0;\r
+  if (text.attr.includes("italic")) {\r
+    tilt = 0.125;\r
+  }\r
+  var interline = (text.height * 1.5 + text.thickness) / 2;\r
+  var txt = text.text.split("\n");\r
+  // KiCad ignores last empty line.\r
+  if (txt[txt.length-1] == '') txt.pop();\r
+  ctx.rotate(deg2rad(angle));\r
+  ctx.fillStyle = color;\r
+  ctx.strokeStyle = color;\r
+  ctx.lineCap = "round";\r
+  ctx.lineWidth = text.thickness;\r
+  for (var i in txt) {\r
+    var offsety = (-(txt.length - 1) + i * 2) * interline + text.height / 2;\r
+    var lineWidth = 0;\r
+    for (var c of txt[i]) {\r
+      lineWidth += pcbdata.font_data[c].w * text.width;\r
+    }\r
+    var offsetx = 0;\r
+    switch (text.horiz_justify) {\r
+      case -1:\r
+        // Justify left, do nothing\r
+        break;\r
+      case 0:\r
+        // Justify center\r
+        offsetx -= lineWidth / 2;\r
+        break;\r
+      case 1:\r
+        // Justify right\r
+        offsetx -= lineWidth;\r
+        break;\r
+    }\r
+    for (var c of txt[i]) {\r
+      for (var line of pcbdata.font_data[c].l) {\r
+        // Drawing each segment separately instead of\r
+        // polyline because round line caps don't work in joints\r
+        for (var i = 0; i < line.length - 1; i++) {\r
+          ctx.beginPath();\r
+          ctx.moveTo(...calcFontPoint(line[i], text, offsetx, offsety, tilt));\r
+          ctx.lineTo(...calcFontPoint(line[i + 1], text, offsetx, offsety, tilt));\r
+          ctx.stroke();\r
+        }\r
+      }\r
+      offsetx += pcbdata.font_data[c].w * text.width;\r
+    }\r
+  }\r
+  ctx.restore();\r
+}\r
+\r
+function drawedge(ctx, scalefactor, edge, color) {\r
+  ctx.strokeStyle = color;\r
+  ctx.lineWidth = Math.max(1 / scalefactor, edge.width);\r
+  ctx.lineCap = "round";\r
+  if (edge.type == "segment") {\r
+    ctx.beginPath();\r
+    ctx.moveTo(...edge.start);\r
+    ctx.lineTo(...edge.end);\r
+    ctx.stroke();\r
+  }\r
+  if (edge.type == "arc") {\r
+    ctx.beginPath();\r
+    ctx.arc(\r
+      ...edge.start,\r
+      edge.radius,\r
+      deg2rad(edge.startangle),\r
+      deg2rad(edge.endangle));\r
+    ctx.stroke();\r
+  }\r
+  if (edge.type == "circle") {\r
+    ctx.beginPath();\r
+    ctx.arc(\r
+      ...edge.start,\r
+      edge.radius,\r
+      0, 2 * Math.PI);\r
+    ctx.closePath();\r
+    ctx.stroke();\r
+  }\r
+}\r
+\r
+function drawRoundRect(ctx, color, size, radius, ctxmethod) {\r
+  ctx.beginPath();\r
+  ctx.strokeStyle = color;\r
+  var x = size[0] * -0.5;\r
+  var y = size[1] * -0.5;\r
+  var width = size[0];\r
+  var height = size[1];\r
+  ctx.moveTo(x, 0);\r
+  ctx.arcTo(x, y + height, x + width, y + height, radius);\r
+  ctx.arcTo(x + width, y + height, x + width, y, radius);\r
+  ctx.arcTo(x + width, y, x, y, radius);\r
+  ctx.arcTo(x, y, x, y + height, radius);\r
+  ctx.closePath();\r
+  ctxmethod();\r
+}\r
+\r
+function drawOblong(ctx, color, size, ctxmethod) {\r
+  drawRoundRect(ctx, color, size, Math.min(size[0], size[1]) / 2, ctxmethod);\r
+}\r
+\r
+function drawPolygons(ctx, color, polygons, ctxmethod) {\r
+  ctx.fillStyle = color;\r
+  for (var polygon of polygons) {\r
+    ctx.beginPath();\r
+    for (var vertex of polygon) {\r
+      ctx.lineTo(...vertex)\r
+    }\r
+    ctx.closePath();\r
+    ctxmethod();\r
+  }\r
+}\r
+\r
+function drawPolygonShape(ctx, shape, color) {\r
+  ctx.save();\r
+  ctx.translate(...shape.pos);\r
+  ctx.rotate(deg2rad(-shape.angle));\r
+  drawPolygons(ctx, color, shape.polygons, ctx.fill.bind(ctx));\r
+  ctx.restore();\r
+}\r
+\r
+function drawDrawing(ctx, layer, scalefactor, drawing, color) {\r
+  if (["segment", "arc", "circle"].includes(drawing.type)) {\r
+    drawedge(ctx, scalefactor, drawing, color);\r
+  } else if (drawing.type == "polygon") {\r
+    drawPolygonShape(ctx, drawing, color);\r
+  } else {\r
+    drawtext(ctx, drawing, color, layer == "B");\r
+  }\r
+}\r
+\r
+function drawCircle(ctx, radius, ctxmethod) {\r
+  ctx.beginPath();\r
+  ctx.arc(0, 0, radius, 0, 2 * Math.PI);\r
+  ctx.closePath();\r
+  ctxmethod();\r
+}\r
+\r
+function drawPad(ctx, pad, color, outline) {\r
+  ctx.save();\r
+  ctx.translate(...pad.pos);\r
+  ctx.rotate(deg2rad(pad.angle));\r
+  if (pad.offset) {\r
+    ctx.translate(...pad.offset);\r
+  }\r
+  ctx.fillStyle = color;\r
+  ctx.strokeStyle = color;\r
+  var ctxmethod = outline ? ctx.stroke.bind(ctx) : ctx.fill.bind(ctx);\r
+  if (pad.shape == "rect") {\r
+    var rect = [...pad.size.map(c => -c * 0.5), ...pad.size];\r
+    if (outline) {\r
+      ctx.strokeRect(...rect);\r
+    } else {\r
+      ctx.fillRect(...rect);\r
+    }\r
+  } else if (pad.shape == "oval") {\r
+    drawOblong(ctx, color, pad.size, ctxmethod);\r
+  } else if (pad.shape == "circle") {\r
+    drawCircle(ctx, pad.size[0] / 2, ctxmethod);\r
+  } else if (pad.shape == "roundrect") {\r
+    drawRoundRect(ctx, color, pad.size, pad.radius, ctxmethod);\r
+  } else if (pad.shape == "custom") {\r
+    drawPolygons(ctx, color, pad.polygons, ctxmethod);\r
+  }\r
+  if (pad.type == "th" && !outline) {\r
+    ctx.fillStyle = "#CCCCCC";\r
+    if (pad.drillshape == "oblong") {\r
+      drawOblong(ctx, "#CCCCCC", pad.drillsize, ctxmethod);\r
+    } else {\r
+      drawCircle(ctx, pad.drillsize[0] / 2, ctxmethod);\r
+    }\r
+  }\r
+  ctx.restore();\r
+}\r
+\r
+function drawModule(ctx, layer, scalefactor, module, padcolor, outlinecolor, highlight) {\r
+  if (highlight) {\r
+    // draw bounding box\r
+    if (module.layer == layer) {\r
+      ctx.save();\r
+      ctx.globalAlpha = 0.2;\r
+      ctx.translate(...module.bbox.pos);\r
+      ctx.fillStyle = padcolor;\r
+      ctx.fillRect(\r
+        0, 0,\r
+        ...module.bbox.size);\r
+      ctx.globalAlpha = 1;\r
+      ctx.strokeStyle = padcolor;\r
+      ctx.strokeRect(\r
+        0, 0,\r
+        ...module.bbox.size);\r
+      ctx.restore();\r
+    }\r
+  }\r
+  // draw drawings\r
+  for (var drawing of module.drawings) {\r
+    if (drawing.layer == layer) {\r
+      drawDrawing(ctx, layer, scalefactor, drawing.drawing, padcolor);\r
+    }\r
+  }\r
+  // draw pads\r
+  for (var pad of module.pads) {\r
+    if (pad.layers.includes(layer)) {\r
+      drawPad(ctx, pad, padcolor, false);\r
+      if (pad.pin1 && highlightpin1) {\r
+        drawPad(ctx, pad, outlinecolor, true);\r
+      }\r
+    }\r
+  }\r
+}\r
+\r
+function drawEdges(canvas, scalefactor) {\r
+  var ctx = canvas.getContext("2d");\r
+  var edgecolor = getComputedStyle(topmostdiv).getPropertyValue('--pcb-edge-color');\r
+  for (var edge of pcbdata.edges) {\r
+    drawedge(ctx, scalefactor, edge, edgecolor);\r
+  }\r
+}\r
+\r
+function drawModules(canvas, layer, scalefactor, highlightedModules) {\r
+  var ctx = canvas.getContext("2d");\r
+  ctx.lineWidth = 3 / scalefactor;\r
+  var style = getComputedStyle(topmostdiv);\r
+  var padcolor = style.getPropertyValue('--pad-color');\r
+  var outlinecolor = style.getPropertyValue('--pin1-outline-color');\r
+  if (highlightedModules.length > 0) {\r
+    padcolor = style.getPropertyValue('--pad-color-highlight');\r
+    outlinecolor = style.getPropertyValue('--pin1-outline-color-highlight');\r
+  }\r
+  for (var i = 0; i < pcbdata.modules.length; i++) {\r
+    var mod = pcbdata.modules[i];\r
+    var highlight = highlightedModules.includes(i);\r
+    if (highlightedModules.length == 0 || highlight) {\r
+      drawModule(ctx, layer, scalefactor, mod, padcolor, outlinecolor, highlight);\r
+    }\r
+  }\r
+}\r
+\r
+function drawSilkscreen(canvas, layer, scalefactor) {\r
+  var ctx = canvas.getContext("2d");\r
+  for (var d of pcbdata.silkscreen[layer]) {\r
+    if (["segment", "arc", "circle"].includes(d.type)) {\r
+      drawedge(ctx, scalefactor, d, "#aa4");\r
+    } else if (d.type == "polygon") {\r
+      drawPolygonShape(ctx, d, "#4aa");\r
+    } else {\r
+      drawtext(ctx, d, "#4aa", layer == "B");\r
+    }\r
+  }\r
+}\r
+\r
+function clearCanvas(canvas) {\r
+  var ctx = canvas.getContext("2d");\r
+  ctx.save();\r
+  ctx.setTransform(1, 0, 0, 1, 0, 0);\r
+  ctx.clearRect(0, 0, canvas.width, canvas.height);\r
+  ctx.restore();\r
+}\r
+\r
+function drawHighlightsOnLayer(canvasdict) {\r
+  clearCanvas(canvasdict.highlight);\r
+  drawModules(canvasdict.highlight, canvasdict.layer,\r
+    canvasdict.transform.s, highlightedModules);\r
+}\r
+\r
+function drawHighlights() {\r
+  drawHighlightsOnLayer(allcanvas.front);\r
+  drawHighlightsOnLayer(allcanvas.back);\r
+}\r
+\r
+function drawBackground(canvasdict) {\r
+  clearCanvas(canvasdict.bg);\r
+  clearCanvas(canvasdict.silk);\r
+  drawEdges(canvasdict.bg, canvasdict.transform.s);\r
+  drawModules(canvasdict.bg, canvasdict.layer, canvasdict.transform.s, []);\r
+  drawSilkscreen(canvasdict.silk, canvasdict.layer, canvasdict.transform.s);\r
+}\r
+\r
+function prepareCanvas(canvas, flip, transform) {\r
+  var ctx = canvas.getContext("2d");\r
+  ctx.setTransform(1, 0, 0, 1, 0, 0);\r
+  var fontsize = 1.55;\r
+  ctx.scale(transform.zoom, transform.zoom);\r
+  ctx.translate(transform.panx, transform.pany);\r
+  if (flip) {\r
+    ctx.scale(-1, 1);\r
+  }\r
+  ctx.translate(transform.x, transform.y);\r
+  ctx.rotate(deg2rad(boardRotation));\r
+  ctx.scale(transform.s, transform.s);\r
+}\r
+\r
+function prepareLayer(canvasdict) {\r
+  var flip = (canvasdict.layer == "B");\r
+  for (var c of ["bg", "silk", "highlight"]) {\r
+    prepareCanvas(canvasdict[c], flip, canvasdict.transform);\r
+  }\r
+}\r
+\r
+function rotateVector(v, angle) {\r
+  angle = deg2rad(angle);\r
+  return [\r
+    v[0] * Math.cos(angle) - v[1] * Math.sin(angle),\r
+    v[0] * Math.sin(angle) + v[1] * Math.cos(angle)\r
+  ];\r
+}\r
+\r
+function applyRotation(bbox) {\r
+  var corners = [\r
+    [bbox.minx, bbox.miny],\r
+    [bbox.minx, bbox.maxy],\r
+    [bbox.maxx, bbox.miny],\r
+    [bbox.maxx, bbox.maxy],\r
+  ];\r
+  corners = corners.map((v) => rotateVector(v, boardRotation));\r
+  return {\r
+    minx: corners.reduce((a, v) => Math.min(a, v[0]), Infinity),\r
+    miny: corners.reduce((a, v) => Math.min(a, v[1]), Infinity),\r
+    maxx: corners.reduce((a, v) => Math.max(a, v[0]), -Infinity),\r
+    maxy: corners.reduce((a, v) => Math.max(a, v[1]), -Infinity),\r
+  }\r
+}\r
+\r
+function recalcLayerScale(canvasdict) {\r
+  var canvasdivid = {\r
+    "F": "frontcanvas",\r
+    "B": "backcanvas"\r
+  } [canvasdict.layer];\r
+  var width = document.getElementById(canvasdivid).clientWidth * 2;\r
+  var height = document.getElementById(canvasdivid).clientHeight * 2;\r
+  var bbox = applyRotation(pcbdata.edges_bbox);\r
+  var scalefactor = 0.98 * Math.min(\r
+    width / (bbox.maxx - bbox.minx),\r
+    height / (bbox.maxy - bbox.miny)\r
+  );\r
+  if (scalefactor < 0.1) {\r
+    scalefactor = 1;\r
+  }\r
+  canvasdict.transform.s = scalefactor;\r
+  var flip = (canvasdict.layer == "B");\r
+  if (flip) {\r
+    canvasdict.transform.x = -((bbox.maxx + bbox.minx) * scalefactor + width) * 0.5;\r
+  } else {\r
+    canvasdict.transform.x = -((bbox.maxx + bbox.minx) * scalefactor - width) * 0.5;\r
+  }\r
+  canvasdict.transform.y = -((bbox.maxy + bbox.miny) * scalefactor - height) * 0.5;\r
+  for (var c of ["bg", "silk", "highlight"]) {\r
+    canvas = canvasdict[c];\r
+    canvas.width = width;\r
+    canvas.height = height;\r
+    canvas.style.width = (width / 2) + "px";\r
+    canvas.style.height = (height / 2) + "px";\r
+  }\r
+  console.log("Scale factor " + canvasdivid + ": ", canvasdict.transform);\r
+}\r
+\r
+function redrawCanvas(layerdict) {\r
+  prepareLayer(layerdict);\r
+  drawBackground(layerdict);\r
+  drawHighlightsOnLayer(layerdict);\r
+}\r
+\r
+function resizeCanvas(layerdict) {\r
+  recalcLayerScale(layerdict);\r
+  redrawCanvas(layerdict);\r
+}\r
+\r
+function resizeAll() {\r
+  resizeCanvas(allcanvas.front);\r
+  resizeCanvas(allcanvas.back);\r
+}\r
+\r
+function bboxScan(layer, x, y) {\r
+  var result = [];\r
+  for (var i = 0; i < pcbdata.modules.length; i++) {\r
+    var module = pcbdata.modules[i];\r
+    if (module.layer == layer) {\r
+      var b = module.bbox;\r
+      if (b.pos[0] <= x && b.pos[0] + b.size[0] >= x &&\r
+        b.pos[1] <= y && b.pos[1] + b.size[1] >= y) {\r
+        result.push(i);\r
+      }\r
+    }\r
+  }\r
+  return result;\r
+}\r
+\r
+function handleMouseDown(e, layerdict) {\r
+  if (e.which != 1) {\r
+    return;\r
+  }\r
+  e.preventDefault();\r
+  e.stopPropagation();\r
+  layerdict.transform.mousestartx = e.offsetX;\r
+  layerdict.transform.mousestarty = e.offsetY;\r
+  layerdict.transform.mousedownx = e.offsetX;\r
+  layerdict.transform.mousedowny = e.offsetY;\r
+  layerdict.transform.mousedown = true;\r
+}\r
+\r
+function handleMouseClick(e, layerdict) {\r
+  var x = e.offsetX;\r
+  var y = e.offsetY;\r
+  var t = layerdict.transform;\r
+  if (layerdict.layer == "B") {\r
+    x = (2 * x / t.zoom - t.panx + t.x) / -t.s;\r
+  } else {\r
+    x = (2 * x / t.zoom - t.panx - t.x) / t.s;\r
+  }\r
+  y = (2 * y / t.zoom - t.y - t.pany) / t.s;\r
+  var v = rotateVector([x, y], -boardRotation);\r
+  var modules = bboxScan(layerdict.layer, v[0], v[1]);\r
+  if (modules.length > 0) {\r
+    modulesClicked(modules);\r
+    drawHighlights();\r
+  }\r
+}\r
+\r
+function handleMouseUp(e, layerdict) {\r
+  e.preventDefault();\r
+  e.stopPropagation();\r
+  if (e.which == 1 &&\r
+    layerdict.transform.mousedown &&\r
+    layerdict.transform.mousedownx == e.offsetX &&\r
+    layerdict.transform.mousedowny == e.offsetY) {\r
+    // This is just a click\r
+    handleMouseClick(e, layerdict);\r
+    layerdict.transform.mousedown = false;\r
+    return;\r
+  }\r
+  if (e.which == 3) {\r
+    // Reset pan and zoom on right click.\r
+    layerdict.transform.panx = 0;\r
+    layerdict.transform.pany = 0;\r
+    layerdict.transform.zoom = 1;\r
+    redrawCanvas(layerdict);\r
+  } else if (!redrawOnDrag) {\r
+    redrawCanvas(layerdict);\r
+  }\r
+  layerdict.transform.mousedown = false;\r
+}\r
+\r
+function handleMouseMove(e, layerdict) {\r
+  if (!layerdict.transform.mousedown) {\r
+    return;\r
+  }\r
+  e.preventDefault();\r
+  e.stopPropagation();\r
+  var dx = e.offsetX - layerdict.transform.mousestartx;\r
+  var dy = e.offsetY - layerdict.transform.mousestarty;\r
+  layerdict.transform.panx += 2 * dx / layerdict.transform.zoom;\r
+  layerdict.transform.pany += 2 * dy / layerdict.transform.zoom;\r
+  layerdict.transform.mousestartx = e.offsetX;\r
+  layerdict.transform.mousestarty = e.offsetY;\r
+  if (redrawOnDrag) {\r
+    redrawCanvas(layerdict);\r
+  }\r
+}\r
+\r
+function handleMouseWheel(e, layerdict) {\r
+  e.preventDefault();\r
+  e.stopPropagation();\r
+  var t = layerdict.transform;\r
+  var wheeldelta = e.deltaY;\r
+  if (e.deltaMode == 1) {\r
+    // FF only, scroll by lines\r
+    wheeldelta *= 30;\r
+  } else if (e.deltaMode == 2) {\r
+    wheeldelta *= 300;\r
+  }\r
+  var m = Math.pow(1.1, -wheeldelta / 40);\r
+  // Limit amount of zoom per tick.\r
+  if (m > 2) {\r
+    m = 2;\r
+  } else if (m < 0.5) {\r
+    m = 0.5;\r
+  }\r
+  t.zoom *= m;\r
+  var zoomd = (1 - m) / t.zoom;\r
+  t.panx += 2 * e.offsetX * zoomd;\r
+  t.pany += 2 * e.offsetY * zoomd;\r
+  redrawCanvas(layerdict);\r
+  console.log(layerdict.transform.zoom);\r
+}\r
+\r
+function addMouseHandlers(div, layerdict) {\r
+  div.onmousedown = function(e) {\r
+    handleMouseDown(e, layerdict);\r
+  };\r
+  div.onmousemove = function(e) {\r
+    handleMouseMove(e, layerdict);\r
+  };\r
+  div.onmouseup = function(e) {\r
+    handleMouseUp(e, layerdict);\r
+  };\r
+  div.onmouseout = function(e) {\r
+    handleMouseUp(e, layerdict);\r
+  }\r
+  div.onwheel = function(e) {\r
+    handleMouseWheel(e, layerdict);\r
+  }\r
+  for (var element of [div, layerdict.bg, layerdict.silk, layerdict.highlight]) {\r
+    element.addEventListener("contextmenu", function(e) {\r
+      e.preventDefault();\r
+    }, false);\r
+  }\r
+}\r
+\r
+function setRedrawOnDrag(value) {\r
+  redrawOnDrag = value;\r
+  writeStorage("redrawOnDrag", value);\r
+}\r
+\r
+function setBoardRotation(value) {\r
+  boardRotation = value * 5;\r
+  writeStorage("boardRotation", boardRotation);\r
+  document.getElementById("rotationDegree").textContent = boardRotation;\r
+  resizeAll();\r
+}\r
+\r
+function initRender() {\r
+  allcanvas = {\r
+    front: {\r
+      transform: {\r
+        x: 0,\r
+        y: 0,\r
+        s: 1,\r
+        panx: 0,\r
+        pany: 0,\r
+        zoom: 1,\r
+        mousestartx: 0,\r
+        mousestarty: 0,\r
+        mousedown: false,\r
+      },\r
+      bg: document.getElementById("F_bg"),\r
+      silk: document.getElementById("F_slk"),\r
+      highlight: document.getElementById("F_hl"),\r
+      layer: "F",\r
+    },\r
+    back: {\r
+      transform: {\r
+        x: 0,\r
+        y: 0,\r
+        s: 1,\r
+        panx: 0,\r
+        pany: 0,\r
+        zoom: 1,\r
+        mousestartx: 0,\r
+        mousestarty: 0,\r
+        mousedown: false,\r
+      },\r
+      bg: document.getElementById("B_bg"),\r
+      silk: document.getElementById("B_slk"),\r
+      highlight: document.getElementById("B_hl"),\r
+      layer: "B",\r
+    }\r
+  };\r
+  addMouseHandlers(document.getElementById("frontcanvas"), allcanvas.front);\r
+  addMouseHandlers(document.getElementById("backcanvas"), allcanvas.back);\r
+}\r
+\r
+///////////////////////////////////////////////\r
+\r
+///////////////////////////////////////////////\r
+/* DOM manipulation and misc code */\r
+\r
+var bomsplit;\r
+var canvassplit;\r
+var canvaslayout = "default";\r
+var bomlayout = "default";\r
+var bomSortFunction = null;\r
+var currentSortColumn = null;\r
+var currentSortOrder = null;\r
+var currentHighlightedRowId;\r
+var highlightHandlers = [];\r
+var highlightedModules = [];\r
+var checkboxes = [];\r
+var bomCheckboxes = "";\r
+var highlightpin1 = false;\r
+var lastClicked;\r
+\r
+function dbg(html) {\r
+  dbgdiv.innerHTML = html;\r
+}\r
+\r
+function setDarkMode(value) {\r
+  if (value) {\r
+    topmostdiv.classList.add("dark");\r
+  } else {\r
+    topmostdiv.classList.remove("dark");\r
+  }\r
+  writeStorage("darkmode", value);\r
+  redrawCanvas(allcanvas.front);\r
+  redrawCanvas(allcanvas.back);\r
+}\r
+\r
+function setHighlightPin1(value) {\r
+  writeStorage("highlightpin1", value);\r
+  highlightpin1 = value;\r
+  redrawCanvas(allcanvas.front);\r
+  redrawCanvas(allcanvas.back);\r
+}\r
+\r
+function getStoredCheckboxRefs(checkbox) {\r
+  function convert(ref) {\r
+    var intref = parseInt(ref);\r
+    if (isNaN(intref)) {\r
+      for (var i = 0; i < pcbdata.modules.length; i++) {\r
+        if (pcbdata.modules[i].ref == ref) {\r
+          return i;\r
+        }\r
+      }\r
+      return -1;\r
+    } else {\r
+      return intref;\r
+    }\r
+  }\r
+  var existingRefs = readStorage("checkbox_" + checkbox);\r
+  if (!existingRefs) {\r
+    return new Set();\r
+  } else {\r
+    return new Set(existingRefs.split(",").map(r => convert(r)));\r
+  }\r
+}\r
+\r
+function getCheckboxState(checkbox, references) {\r
+  var storedRefsSet = getStoredCheckboxRefs(checkbox);\r
+  var currentRefsSet = new Set(references.map(r => r[1]));\r
+  // Get difference of current - stored\r
+  var difference = new Set(currentRefsSet);\r
+  for (ref of storedRefsSet) {\r
+    difference.delete(ref);\r
+  }\r
+  if (difference.size == 0) {\r
+    // All the current refs are stored\r
+    return "checked";\r
+  } else if (difference.size == currentRefsSet.size) {\r
+    // None of the current refs are stored\r
+    return "unchecked";\r
+  } else {\r
+    // Some of the refs are stored\r
+    return "indeterminate";\r
+  }\r
+}\r
+\r
+function setBomCheckboxState(checkbox, element, references) {\r
+  var state = getCheckboxState(checkbox, references);\r
+  element.checked = (state == "checked");\r
+  element.indeterminate = (state == "indeterminate");\r
+}\r
+\r
+function createCheckboxChangeHandler(checkbox, references) {\r
+  return function() {\r
+    refsSet = getStoredCheckboxRefs(checkbox);\r
+    if (this.checked) {\r
+      // checkbox ticked\r
+      for (var ref of references) {\r
+        refsSet.add(ref[1]);\r
+      }\r
+    } else {\r
+      // checkbox unticked\r
+      for (var ref of references) {\r
+        refsSet.delete(ref[1]);\r
+      }\r
+    }\r
+    writeStorage("checkbox_" + checkbox, [...refsSet].join(","));\r
+  }\r
+}\r
+\r
+function createRowHighlightHandler(rowid, refs) {\r
+  return function() {\r
+    if (currentHighlightedRowId) {\r
+      if (currentHighlightedRowId == rowid) {\r
+        return;\r
+      }\r
+      document.getElementById(currentHighlightedRowId).classList.remove("highlighted");\r
+    }\r
+    document.getElementById(rowid).classList.add("highlighted");\r
+    currentHighlightedRowId = rowid;\r
+    highlightedModules = refs.map(r => r[1]);\r
+    drawHighlights();\r
+  }\r
+}\r
+\r
+function entryMatches(entry) {\r
+  // check refs\r
+  for (var ref of entry[3]) {\r
+    if (ref[0].toLowerCase().indexOf(filter) >= 0) {\r
+      return true;\r
+    }\r
+  }\r
+  // check value\r
+  if (entry[1].toLowerCase().indexOf(filter) >= 0) {\r
+    return true;\r
+  }\r
+  // check footprint\r
+  if (entry[2].toLowerCase().indexOf(filter) >= 0) {\r
+    return true;\r
+  }\r
+  return false;\r
+}\r
+\r
+function findRefInEntry(entry) {\r
+  return entry[3].filter(r => r[0].toLowerCase() == reflookup);\r
+}\r
+\r
+function highlightFilter(s) {\r
+  if (!filter) {\r
+    return s;\r
+  }\r
+  var parts = s.toLowerCase().split(filter);\r
+  if (parts.length == 1) {\r
+    return s;\r
+  }\r
+  var r = "";\r
+  var pos = 0;\r
+  for (var i in parts) {\r
+    if (i > 0) {\r
+      r += '<mark class="highlight">' +\r
+        s.substring(pos, pos + filter.length) +\r
+        '</mark>';\r
+      pos += filter.length;\r
+    }\r
+    r += s.substring(pos, pos + parts[i].length);\r
+    pos += parts[i].length;\r
+  }\r
+  return r;\r
+}\r
+\r
+function checkboxSetUnsetAllHandler(checkboxname) {\r
+  return function() {\r
+    var checkboxnum = 0;\r
+    while (checkboxnum < checkboxes.length &&\r
+      checkboxes[checkboxnum].toLowerCase() != checkboxname.toLowerCase()) {\r
+      checkboxnum++;\r
+    }\r
+    if (checkboxnum >= checkboxes.length) {\r
+      return;\r
+    }\r
+    var allset = true;\r
+    var checkbox;\r
+    var row;\r
+    for (row of bombody.childNodes) {\r
+      checkbox = row.childNodes[checkboxnum + 1].childNodes[0];\r
+      if (!checkbox.checked || checkbox.indeterminate) {\r
+        allset = false;\r
+        break;\r
+      }\r
+    }\r
+    for (row of bombody.childNodes) {\r
+      checkbox = row.childNodes[checkboxnum + 1].childNodes[0];\r
+      checkbox.checked = !allset;\r
+      checkbox.indeterminate = false;\r
+      checkbox.onchange();\r
+    }\r
+  }\r
+}\r
+\r
+function createColumnHeader(name, cls, comparator) {\r
+  var th = document.createElement("TH");\r
+  th.innerHTML = name;\r
+  th.classList.add(cls);\r
+  th.style.cursor = "pointer";\r
+  var span = document.createElement("SPAN");\r
+  span.classList.add("sortmark");\r
+  span.classList.add("none");\r
+  th.appendChild(span);\r
+  th.onclick = function() {\r
+    if (currentSortColumn && this !== currentSortColumn) {\r
+      // Currently sorted by another column\r
+      currentSortColumn.childNodes[1].classList.remove(currentSortOrder);\r
+      currentSortColumn.childNodes[1].classList.add("none");\r
+      currentSortColumn = null;\r
+      currentSortOrder = null;\r
+    }\r
+    if (currentSortColumn && this === currentSortColumn) {\r
+      // Already sorted by this column\r
+      if (currentSortOrder == "asc") {\r
+        // Sort by this column, descending order\r
+        bomSortFunction = function(a, b) {\r
+          return -comparator(a, b);\r
+        }\r
+        currentSortColumn.childNodes[1].classList.remove("asc");\r
+        currentSortColumn.childNodes[1].classList.add("desc");\r
+        currentSortOrder = "desc";\r
+      } else {\r
+        // Unsort\r
+        bomSortFunction = null;\r
+        currentSortColumn.childNodes[1].classList.remove("desc");\r
+        currentSortColumn.childNodes[1].classList.add("none");\r
+        currentSortColumn = null;\r
+        currentSortOrder = null;\r
+      }\r
+    } else {\r
+      // Sort by this column, ascending order\r
+      bomSortFunction = comparator;\r
+      currentSortColumn = this;\r
+      currentSortColumn.childNodes[1].classList.remove("none");\r
+      currentSortColumn.childNodes[1].classList.add("asc");\r
+      currentSortOrder = "asc";\r
+    }\r
+    populateBomBody();\r
+  }\r
+  return th;\r
+}\r
+\r
+function populateBomHeader() {\r
+  while (bomhead.firstChild) {\r
+    bomhead.removeChild(bomhead.firstChild);\r
+  }\r
+  var tr = document.createElement("TR");\r
+  var th = document.createElement("TH");\r
+  th.classList.add("numCol");\r
+  tr.appendChild(th);\r
+  checkboxes = bomCheckboxes.split(",").filter((e) => e);\r
+  var checkboxCompareClosure = function(checkbox) {\r
+    return (a, b) => {\r
+      var stateA = getCheckboxState(checkbox, a[3]);\r
+      var stateB = getCheckboxState(checkbox, b[3]);\r
+      if (stateA > stateB) return -1;\r
+      if (stateA < stateB) return 1;\r
+      return 0;\r
+    }\r
+  }\r
+  for (var checkbox of checkboxes) {\r
+    th = createColumnHeader(\r
+      checkbox, "bom-checkbox", checkboxCompareClosure(checkbox));\r
+    th.onclick = fancyDblClickHandler(\r
+      th, th.onclick.bind(th), checkboxSetUnsetAllHandler(checkbox));\r
+    tr.appendChild(th);\r
+  }\r
+  tr.appendChild(createColumnHeader("References", "References", (a, b) => {\r
+    var i = 0;\r
+    while (i < a[3].length && i < b[3].length) {\r
+      if (a[3][i] != b[3][i]) return a[3][i] > b[3][i] ? 1 : -1;\r
+      i++;\r
+    }\r
+    return a[3].length - b[3].length;\r
+  }));\r
+  // Extra fields\r
+  if (config.extra_fields.length > 0) {\r
+    var extraFieldCompareClosure = function(fieldIndex) {\r
+      return (a, b) => {\r
+        var fa = a[4][fieldIndex];\r
+        var fb = b[4][fieldIndex];\r
+        if (fa != fb) return fa > fb ? 1 : -1;\r
+        else return 0;\r
+      }\r
+    }\r
+    for (var i in config.extra_fields) {\r
+      tr.appendChild(createColumnHeader(\r
+        config.extra_fields[i], "extra", extraFieldCompareClosure(i)));\r
+    }\r
+  }\r
+  tr.appendChild(createColumnHeader("Value", "Value", (a, b) => {\r
+    return valueCompare(a[5], b[5], a[1], b[1]);\r
+  }));\r
+  tr.appendChild(createColumnHeader("Footprint", "Footprint", (a, b) => {\r
+    if (a[2] != b[2]) return a[2] > b[2] ? 1 : -1;\r
+    else return 0;\r
+  }));\r
+  tr.appendChild(createColumnHeader("Quantity", "Quantity", (a, b) => {\r
+    return a[3].length - b[3].length;\r
+  }));\r
+  bomhead.appendChild(tr);\r
+}\r
+\r
+function populateBomBody() {\r
+  while (bom.firstChild) {\r
+    bom.removeChild(bom.firstChild);\r
+  }\r
+  highlightHandlers = [];\r
+  currentHighlightedRowId = null;\r
+  var first = true;\r
+  switch (canvaslayout) {\r
+    case 'F':\r
+      bomtable = pcbdata.bom.F;\r
+      break;\r
+    case 'FB':\r
+      bomtable = pcbdata.bom.both;\r
+      break;\r
+    case 'B':\r
+      bomtable = pcbdata.bom.B;\r
+      break;\r
+  }\r
+  if (bomSortFunction) {\r
+    bomtable = bomtable.slice().sort(bomSortFunction);\r
+  }\r
+  for (var i in bomtable) {\r
+    var bomentry = bomtable[i];\r
+    if (filter && !entryMatches(bomentry)) {\r
+      continue;\r
+    }\r
+    var references = bomentry[3];\r
+    if (reflookup) {\r
+      references = findRefInEntry(bomentry);\r
+      if (references.length == 0) {\r
+        continue;\r
+      }\r
+    }\r
+    var tr = document.createElement("TR");\r
+    var td = document.createElement("TD");\r
+    var rownum = +i + 1;\r
+    tr.id = "bomrow" + rownum;\r
+    td.textContent = rownum;\r
+    tr.appendChild(td);\r
+    // Checkboxes\r
+    for (var checkbox of checkboxes) {\r
+      if (checkbox) {\r
+        td = document.createElement("TD");\r
+        var input = document.createElement("input");\r
+        input.type = "checkbox";\r
+        input.onchange = createCheckboxChangeHandler(checkbox, references);\r
+        setBomCheckboxState(checkbox, input, references);\r
+        td.appendChild(input);\r
+        tr.appendChild(td);\r
+      }\r
+    }\r
+    // References\r
+    td = document.createElement("TD");\r
+    td.innerHTML = highlightFilter(references.map(r => r[0]).join(", "));\r
+    tr.appendChild(td);\r
+    // Extra fields\r
+    for (var i in config.extra_fields) {\r
+      td = document.createElement("TD");\r
+      td.innerHTML = highlightFilter(bomentry[4][i]);\r
+      tr.appendChild(td);\r
+    }\r
+    // Value\r
+    td = document.createElement("TD");\r
+    td.innerHTML = highlightFilter(bomentry[1]);\r
+    tr.appendChild(td);\r
+    // Footprint\r
+    td = document.createElement("TD");\r
+    td.innerHTML = highlightFilter(bomentry[2]);\r
+    tr.appendChild(td);\r
+    // Quantity\r
+    td = document.createElement("TD");\r
+    td.textContent = bomentry[3].length;\r
+    tr.appendChild(td);\r
+    bom.appendChild(tr);\r
+    var handler = createRowHighlightHandler(tr.id, references);\r
+    tr.onmousemove = handler;\r
+    highlightHandlers.push({\r
+      id: tr.id,\r
+      handler: handler,\r
+      refs: references\r
+    });\r
+    if ((filter || reflookup) && first) {\r
+      handler();\r
+      first = false;\r
+    }\r
+  }\r
+}\r
+\r
+function highlightPreviousRow() {\r
+  if (!currentHighlightedRowId) {\r
+    highlightHandlers[highlightHandlers.length - 1].handler();\r
+  } else {\r
+    if (highlightHandlers.length > 1 &&\r
+      highlightHandlers[0].id == currentHighlightedRowId) {\r
+      highlightHandlers[highlightHandlers.length - 1].handler();\r
+    } else {\r
+      for (var i = 0; i < highlightHandlers.length - 1; i++) {\r
+        if (highlightHandlers[i + 1].id == currentHighlightedRowId) {\r
+          highlightHandlers[i].handler();\r
+          break;\r
+        }\r
+      }\r
+    }\r
+  }\r
+  smoothScrollToRow(currentHighlightedRowId);\r
+}\r
+\r
+function highlightNextRow() {\r
+  if (!currentHighlightedRowId) {\r
+    highlightHandlers[0].handler();\r
+  } else {\r
+    if (highlightHandlers.length > 1 &&\r
+      highlightHandlers[highlightHandlers.length - 1].id == currentHighlightedRowId) {\r
+      highlightHandlers[0].handler();\r
+    } else {\r
+      for (var i = 1; i < highlightHandlers.length; i++) {\r
+        if (highlightHandlers[i - 1].id == currentHighlightedRowId) {\r
+          highlightHandlers[i].handler();\r
+          break;\r
+        }\r
+      }\r
+    }\r
+  }\r
+  smoothScrollToRow(currentHighlightedRowId);\r
+}\r
+\r
+function populateBomTable() {\r
+  populateBomHeader();\r
+  populateBomBody();\r
+}\r
+\r
+function modulesClicked(moduleIndexes) {\r
+  var lastClickedIndex = moduleIndexes.indexOf(lastClicked);\r
+  var index = moduleIndexes[(lastClickedIndex + 1) % moduleIndexes.length];\r
+  for (var handler of highlightHandlers) {\r
+    if (handler.refs.map(r => r[1]).indexOf(index) >= 0) {\r
+      lastClicked = index;\r
+      handler.handler();\r
+      smoothScrollToRow(currentHighlightedRowId);\r
+      break;\r
+    }\r
+  }\r
+}\r
+\r
+function updateFilter(input) {\r
+  filter = input.toLowerCase();\r
+  populateBomTable();\r
+}\r
+\r
+function updateRefLookup(input) {\r
+  reflookup = input.toLowerCase();\r
+  populateBomTable();\r
+}\r
+\r
+function silkscreenVisible(visible) {\r
+  if (visible) {\r
+    allcanvas.front.silk.style.display = "";\r
+    allcanvas.back.silk.style.display = "";\r
+    writeStorage("silkscreenVisible", true);\r
+  } else {\r
+    allcanvas.front.silk.style.display = "none";\r
+    allcanvas.back.silk.style.display = "none";\r
+    writeStorage("silkscreenVisible", false);\r
+  }\r
+}\r
+\r
+function changeCanvasLayout(layout) {\r
+  document.getElementById("fl-btn").classList.remove("depressed");\r
+  document.getElementById("fb-btn").classList.remove("depressed");\r
+  document.getElementById("bl-btn").classList.remove("depressed");\r
+  switch (layout) {\r
+    case 'F':\r
+      document.getElementById("fl-btn").classList.add("depressed");\r
+      if (bomlayout != "bom-only") {\r
+        canvassplit.collapse(1);\r
+      }\r
+      break;\r
+    case 'B':\r
+      document.getElementById("bl-btn").classList.add("depressed");\r
+      if (bomlayout != "bom-only") {\r
+        canvassplit.collapse(0);\r
+      }\r
+      break;\r
+    default:\r
+      document.getElementById("fb-btn").classList.add("depressed");\r
+      if (bomlayout != "bom-only") {\r
+        canvassplit.setSizes([50, 50]);\r
+      }\r
+  }\r
+  canvaslayout = layout;\r
+  writeStorage("canvaslayout", layout);\r
+  resizeAll();\r
+  populateBomTable();\r
+}\r
+\r
+function populateMetadata() {\r
+  document.getElementById("title").innerHTML = pcbdata.metadata.title;\r
+  document.getElementById("revision").innerHTML = "Rev: " + pcbdata.metadata.revision;\r
+  document.getElementById("company").innerHTML = pcbdata.metadata.company;\r
+  document.getElementById("filedate").innerHTML = pcbdata.metadata.date;\r
+  if (pcbdata.metadata.title != "") {\r
+    document.title = pcbdata.metadata.title + " BOM";\r
+  }\r
+}\r
+\r
+function changeBomLayout(layout) {\r
+  document.getElementById("bom-btn").classList.remove("depressed");\r
+  document.getElementById("lr-btn").classList.remove("depressed");\r
+  document.getElementById("tb-btn").classList.remove("depressed");\r
+  switch (layout) {\r
+    case 'bom-only':\r
+      document.getElementById("bom-btn").classList.add("depressed");\r
+      if (bomsplit) {\r
+        bomsplit.destroy();\r
+        bomsplit = null;\r
+        canvassplit.destroy();\r
+        canvassplit = null;\r
+      }\r
+      document.getElementById("frontcanvas").style.display = "none";\r
+      document.getElementById("backcanvas").style.display = "none";\r
+      document.getElementById("bot").style.height = "";\r
+      break;\r
+    case 'top-bottom':\r
+      document.getElementById("tb-btn").classList.add("depressed");\r
+      document.getElementById("frontcanvas").style.display = "";\r
+      document.getElementById("backcanvas").style.display = "";\r
+      document.getElementById("bot").style.height = "calc(100% - 80px)";\r
+      document.getElementById("bomdiv").classList.remove("split-horizontal");\r
+      document.getElementById("canvasdiv").classList.remove("split-horizontal");\r
+      document.getElementById("frontcanvas").classList.add("split-horizontal");\r
+      document.getElementById("backcanvas").classList.add("split-horizontal");\r
+      if (bomsplit) {\r
+        bomsplit.destroy();\r
+        bomsplit = null;\r
+        canvassplit.destroy();\r
+        canvassplit = null;\r
+      }\r
+      bomsplit = Split(['#bomdiv', '#canvasdiv'], {\r
+        sizes: [50, 50],\r
+        onDragEnd: resizeAll,\r
+        direction: "vertical",\r
+        gutterSize: 5\r
+      });\r
+      canvassplit = Split(['#frontcanvas', '#backcanvas'], {\r
+        sizes: [50, 50],\r
+        gutterSize: 5,\r
+        onDragEnd: resizeAll\r
+      });\r
+      break;\r
+    case 'left-right':\r
+      document.getElementById("lr-btn").classList.add("depressed");\r
+      document.getElementById("frontcanvas").style.display = "";\r
+      document.getElementById("backcanvas").style.display = "";\r
+      document.getElementById("bot").style.height = "calc(100% - 80px)";\r
+      document.getElementById("bomdiv").classList.add("split-horizontal");\r
+      document.getElementById("canvasdiv").classList.add("split-horizontal");\r
+      document.getElementById("frontcanvas").classList.remove("split-horizontal");\r
+      document.getElementById("backcanvas").classList.remove("split-horizontal");\r
+      if (bomsplit) {\r
+        bomsplit.destroy();\r
+        bomsplit = null;\r
+        canvassplit.destroy();\r
+        canvassplit = null;\r
+      }\r
+      bomsplit = Split(['#bomdiv', '#canvasdiv'], {\r
+        sizes: [50, 50],\r
+        onDragEnd: resizeAll,\r
+        gutterSize: 5\r
+      });\r
+      canvassplit = Split(['#frontcanvas', '#backcanvas'], {\r
+        sizes: [50, 50],\r
+        gutterSize: 5,\r
+        direction: "vertical",\r
+        onDragEnd: resizeAll\r
+      });\r
+  }\r
+  bomlayout = layout;\r
+  writeStorage("bomlayout", layout);\r
+  changeCanvasLayout(canvaslayout);\r
+}\r
+\r
+function focusFilterField() {\r
+  focusInputField(document.getElementById("filter"));\r
+}\r
+\r
+function focusRefLookupField() {\r
+  focusInputField(document.getElementById("reflookup"));\r
+}\r
+\r
+function toggleBomCheckbox(bomrowid, checkboxnum) {\r
+  if (!bomrowid || checkboxnum > checkboxes.length) {\r
+    return;\r
+  }\r
+  var bomrow = document.getElementById(bomrowid);\r
+  var checkbox = bomrow.childNodes[checkboxnum].childNodes[0];\r
+  checkbox.checked = !checkbox.checked;\r
+  checkbox.indeterminate = false;\r
+  checkbox.onchange();\r
+}\r
+\r
+function checkBomCheckbox(bomrowid, checkboxname) {\r
+  var checkboxnum = 0;\r
+  while (checkboxnum < checkboxes.length &&\r
+    checkboxes[checkboxnum].toLowerCase() != checkboxname.toLowerCase()) {\r
+    checkboxnum++;\r
+  }\r
+  if (!bomrowid || checkboxnum >= checkboxes.length) {\r
+    return;\r
+  }\r
+  var bomrow = document.getElementById(bomrowid);\r
+  var checkbox = bomrow.childNodes[checkboxnum + 1].childNodes[0];\r
+  checkbox.checked = true;\r
+  checkbox.indeterminate = false;\r
+  checkbox.onchange();\r
+}\r
+\r
+function setBomCheckboxes(value) {\r
+  bomCheckboxes = value;\r
+  writeStorage("bomCheckboxes", value);\r
+  populateBomTable();\r
+}\r
+\r
+document.onkeydown = function(e) {\r
+  switch (e.key) {\r
+    case "n":\r
+      if (document.activeElement.type == "text") {\r
+        return;\r
+      }\r
+      if (currentHighlightedRowId !== null) {\r
+        checkBomCheckbox(currentHighlightedRowId, "placed");\r
+        highlightNextRow();\r
+        e.preventDefault();\r
+      }\r
+      break;\r
+    case "ArrowUp":\r
+      highlightPreviousRow();\r
+      e.preventDefault();\r
+      break;\r
+    case "ArrowDown":\r
+      highlightNextRow();\r
+      e.preventDefault();\r
+      break;\r
+    default:\r
+      break;\r
+  }\r
+  if (e.altKey) {\r
+    switch (e.key) {\r
+      case "f":\r
+        focusFilterField();\r
+        e.preventDefault();\r
+        break;\r
+      case "r":\r
+        focusRefLookupField();\r
+        e.preventDefault();\r
+        break;\r
+      case "z":\r
+        changeBomLayout("bom-only");\r
+        e.preventDefault();\r
+        break;\r
+      case "x":\r
+        changeBomLayout("left-right");\r
+        e.preventDefault();\r
+        break;\r
+      case "c":\r
+        changeBomLayout("top-bottom");\r
+        e.preventDefault();\r
+        break;\r
+      case "v":\r
+        changeCanvasLayout("F");\r
+        e.preventDefault();\r
+        break;\r
+      case "b":\r
+        changeCanvasLayout("FB");\r
+        e.preventDefault();\r
+        break;\r
+      case "n":\r
+        changeCanvasLayout("B");\r
+        e.preventDefault();\r
+        break;\r
+      default:\r
+        break;\r
+    }\r
+    if (e.key >= '1' && e.key <= '9') {\r
+      toggleBomCheckbox(currentHighlightedRowId, parseInt(e.key));\r
+    }\r
+  }\r
+}\r
+\r
+function initDefaults() {\r
+  bomlayout = readStorage("bomlayout");\r
+  if (bomlayout === null) {\r
+    bomlayout = config.bom_view;\r
+  }\r
+  if (!['bom-only', 'left-right', 'top-bottom'].includes(bomlayout)) {\r
+    bomlayout = config.bom_view;\r
+  }\r
+  canvaslayout = readStorage("canvaslayout");\r
+  if (canvaslayout === null) {\r
+    canvaslayout = config.layer_view;\r
+  }\r
+  bomCheckboxes = readStorage("bomCheckboxes");\r
+  if (bomCheckboxes === null) {\r
+    bomCheckboxes = config.checkboxes;\r
+  }\r
+  document.getElementById("bomCheckboxes").value = bomCheckboxes;\r
+\r
+  var b = readStorage("silkscreenVisible");\r
+  if (b === null) {\r
+    b = config.show_silkscreen;\r
+  }\r
+  document.getElementById("silkscreenCheckbox").checked = b;\r
+  silkscreenVisible(b);\r
+\r
+  b = readStorage("redrawOnDrag");\r
+  if (b === null) {\r
+    b = config.redraw_on_drag;\r
+  }\r
+  document.getElementById("dragCheckbox").checked = b;\r
+  setRedrawOnDrag(b);\r
+\r
+  b = readStorage("darkmode");\r
+  if (b === null) {\r
+    b = config.dark_mode;\r
+  }\r
+  document.getElementById("darkmodeCheckbox").checked = b;\r
+  setDarkMode(b);\r
+\r
+  b = readStorage("highlightpin1");\r
+  if (b === null) {\r
+    b = config.highlight_pin1;\r
+  }\r
+  document.getElementById("highlightpin1Checkbox").checked = b;\r
+  setHighlightPin1(b);\r
+\r
+  boardRotation = readStorage("boardRotation");\r
+  if (boardRotation === null) {\r
+    boardRotation = config.board_rotation * 5;\r
+  } else {\r
+    boardRotation = parseInt(boardRotation);\r
+  }\r
+  document.getElementById("boardRotation").value = boardRotation / 5;\r
+  document.getElementById("rotationDegree").textContent = boardRotation;\r
+}\r
+\r
+window.onload = function(e) {\r
+  initUtils();\r
+  initRender();\r
+  initStorage();\r
+  initDefaults();\r
+  cleanGutters();\r
+  populateMetadata();\r
+  dbgdiv = document.getElementById("dbg");\r
+  bom = document.getElementById("bombody");\r
+  bomhead = document.getElementById("bomhead");\r
+  filter = "";\r
+  reflookup = "";\r
+  // Triggers render\r
+  changeBomLayout(bomlayout);\r
+}\r
+\r
+window.onresize = resizeAll;\r
+window.matchMedia("print").addListener(resizeAll);\r
+\r
+///////////////////////////////////////////////\r
+\r
+  </script>\r
+</head>\r
+\r
+<body>\r
+<div id="topmostdiv" style="width: 100%; height: 100%">\r
+  <div id="top">\r
+    <div style="float: right;">\r
+      <div class="hideonprint menu" style="float: right; margin: 10px; top: 8px;">\r
+        <button class="menubtn"></button>\r
+        <div class="menu-content">\r
+          <label class="menu-label menu-label-top">\r
+            <input id="darkmodeCheckbox" type="checkbox" onchange="setDarkMode(this.checked)">\r
+            Dark mode\r
+          </label>\r
+          <label class="menu-label">\r
+            <input id="silkscreenCheckbox" type="checkbox" checked onchange="silkscreenVisible(this.checked)">\r
+            Show silkscreen\r
+          </label>\r
+          <label class="menu-label">\r
+            <input id="highlightpin1Checkbox" type="checkbox" onchange="setHighlightPin1(this.checked)">\r
+            Highlight first pin\r
+          </label>\r
+          <label class="menu-label">\r
+            <input id="dragCheckbox" type="checkbox" checked onchange="setRedrawOnDrag(this.checked)">\r
+            Continuous redraw on drag\r
+          </label>\r
+          <label class="menu-label">\r
+            <span>Board rotation</span>\r
+            <span style="float: right"><span id="rotationDegree">0</span>&#176;</span>\r
+            <input id="boardRotation" type="range" min="-36" max="36" value="0" class="slider" oninput="setBoardRotation(this.value)">\r
+          </label>\r
+          <label class="menu-label">\r
+            <div style="margin-left: 5px">Bom checkboxes</div>\r
+            <input id="bomCheckboxes" class="menu-textbox" type=text\r
+                   oninput="setBomCheckboxes(this.value)">\r
+          </label>\r
+          <label class="menu-label">\r
+            <span class="shameless-plug">\r
+              <span>Created using</span>\r
+              <a target="blank" href="https://github.com/openscopeproject/InteractiveHtmlBom">InteractiveHtmlBom</a>\r
+            </span>\r
+          </label>\r
+        </div>\r
+      </div>\r
+      <div class="button-container hideonprint"\r
+           style="float: right; margin: 10px; position: relative; top: 8px">\r
+        <button id="fl-btn" class="left-most-button" onclick="changeCanvasLayout('F')"\r
+                title="Front only">F\r
+        </button>\r
+        <button id="fb-btn" class="middle-button" onclick="changeCanvasLayout('FB')"\r
+                title="Front and Back">FB\r
+        </button>\r
+        <button id="bl-btn" class="right-most-button" onclick="changeCanvasLayout('B')"\r
+                title="Back only">B\r
+        </button>\r
+      </div>\r
+      <div class="button-container hideonprint"\r
+           style="float: right; margin: 10px; position: relative; top: 8px">\r
+        <button id="bom-btn" class="left-most-button" onclick="changeBomLayout('bom-only')"\r
+                title="BOM only"></button>\r
+        <button id="lr-btn" class="middle-button" onclick="changeBomLayout('left-right')"\r
+                title="BOM left, drawings right"></button>\r
+        <button id="tb-btn" class="right-most-button" onclick="changeBomLayout('top-bottom')"\r
+                title="BOM top, drawings bot"></button>\r
+      </div>\r
+    </div>\r
+    <div id="fileinfodiv" style="overflow: auto;">\r
+      <table class="fileinfo">\r
+        <tbody>\r
+          <tr>\r
+            <td id="title" class="title" style="width: 70%">\r
+              Title\r
+            </td>\r
+            <td id="revision" class="title" style="width: 30%">\r
+              Revision\r
+            </td>\r
+          </tr>\r
+          <tr>\r
+            <td id="company">\r
+              Kicad version\r
+            </td>\r
+            <td id="filedate">\r
+              Date\r
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diff --git a/c-1-640456-8-aa-3d.stp b/c-1-640456-8-aa-3d.stp
new file mode 100644 (file)
index 0000000..f264e8a
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diff --git a/fp-lib-table b/fp-lib-table
new file mode 100644 (file)
index 0000000..407140e
--- /dev/null
+++ b/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name Socket_BeagleBone_Black)(type KiCad)(uri "$(KIPRJMOD)/Socket_BeagleBone_Black.pretty")(options "")(descr ""))
+)

diff --git a/hole/z_MountPTH_3mm.kicad_mod b/hole/z_MountPTH_3mm.kicad_mod
new file mode 100644 (file)
index 0000000..6054302
--- /dev/null
+++ b/hole/z_MountPTH_3mm.kicad_mod
@@ -0,0 +1,15 @@
+(module z_MountPTH_3mm (layer F.Cu) (tedit 56B1F1EF)\r
+  (fp_text reference REF** (at 0 0.125) (layer F.Fab)\r
+    (effects (font (size 0.1 0.1) (thickness 0.01)))\r
+  )\r
+  (fp_text value VAL** (at 0 -0.125) (layer F.Fab)\r
+    (effects (font (size 0.1 0.1) (thickness 0.01)))\r
+  )\r
+  (fp_text user %R (at 0 0 180) (layer Eco1.User)\r
+    (effects (font (size 0.3 0.3) (thickness 0.03)))\r
+  )\r
+  (fp_circle (center 0 0) (end 3.5 0) (layer F.CrtYd) (width 0.05))\r
+  (fp_line (start 0 -3.1) (end 0 3.1) (layer Cmts.User) (width 0.05))\r
+  (fp_line (start -3.1 0) (end 3.1 0) (layer Cmts.User) (width 0.05))\r
+  (pad 1 thru_hole circle (at 0 0) (size 6.5 6.5) (drill 3.2) (layers *.Cu *.Mask))\r
+)\r

diff --git a/pwr_BeagleBone.bck b/pwr_BeagleBone.bck
new file mode 100644 (file)
index 0000000..5f3ed79
--- /dev/null
+++ b/pwr_BeagleBone.bck
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library

diff --git a/pwr_BeagleBone.dcm b/pwr_BeagleBone.dcm
new file mode 100644 (file)
index 0000000..5f3ed79
--- /dev/null
+++ b/pwr_BeagleBone.dcm
@@ -0,0 +1,3 @@
+EESchema-DOCLIB  Version 2.0
+#
+#End Doc Library

diff --git a/pwr_BeagleBone.lib b/pwr_BeagleBone.lib
new file mode 100644 (file)
index 0000000..02c6a69
--- /dev/null
+++ b/pwr_BeagleBone.lib
@@ -0,0 +1,47 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# GNDA_ADC
+#
+DEF GNDA_ADC #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GNDA_ADC" 0 -150 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GNDA_ADC 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# SYS_5V
+#
+DEF SYS_5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "SYS_5V" 0 140 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X SYS_5V 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# VDD_ADC
+#
+DEF VDD_ADC #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "VDD_ADC" 0 140 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X VDD_ADC 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library

diff --git a/report.txt b/report.txt
new file mode 100644 (file)
index 0000000..d2b7de9
--- /dev/null
+++ b/report.txt
@@ -0,0 +1,224 @@
+Info: Checking netlist symbol footprint “R15:/5C284777:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R28:/5C2628DB:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R27:/5C2628A2:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R26:/5C262872:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R25:/5C26261E:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R24:/5C27E247:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R23:/5C27E240:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R22:/5C27E239:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R21:/5C27E232:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R20:/5C27E22B:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R19:/5C27E224:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R18:/5C27E21D:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R17:/5C27E216:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R16:/5C28477E:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R29:/5C262908:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R14:/5C284770:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R13:/5C284769:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R12:/5C284762:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R11:/5C28475B:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R10:/5C284754:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R9:/5C28474D:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R8:/5C28D8CB:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R7:/5C28D8C4:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R6:/5C28D8BD:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R5:/5C28D8B6:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R4:/5C28D8AF:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R3:/5C28D8A8:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R2:/5C28D8A1:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R43:/5C27A045:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “U8:/5C343F96:SN74HC166N:DIP254P762X508-16”.
+
+Info: Checking netlist symbol footprint “U7:/5C339CD5:SN74HC166N:DIP254P762X508-16”.
+
+Info: Checking netlist symbol footprint “U6:/5C345D5D:SN74HC166N:DIP254P762X508-16”.
+
+Info: Checking netlist symbol footprint “U5:/5C346672:SN74HC166N:DIP254P762X508-16”.
+
+Info: Checking netlist symbol footprint “U4:/5C347042:SN74HC166N:DIP254P762X508-16”.
+
+Info: Checking netlist symbol footprint “U3:/5C2DCFC3:SN74HC166N:DIP254P762X508-16”.
+
+Info: Checking netlist symbol footprint “U2:/5C2E1BA8:DIP254P762X508-16N:DIP254P762X508-16N”.
+
+Info: Checking netlist symbol footprint “U1:/5C2E1ABC:DIP254P762X508-16N:DIP254P762X508-16N”.
+
+Info: Checking netlist symbol footprint “R48:/5C27A068:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R47:/5C27A061:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R46:/5C27A05A:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R45:/5C27A053:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R44:/5C27A04C:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R1:/5C28D89A:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R42:/5C27A03E:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R41:/5C27A037:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R40:/5C2772A7:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R39:/5C2772A0:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R38:/5C277299:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R37:/5C277292:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R36:/5C27728B:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R35:/5C277284:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R34:/5C27727D:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R33:/5C277276:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R32:/5C26299B:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R31:/5C262968:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “R30:/5C262937:Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”.
+
+Info: Checking netlist symbol footprint “P9:/55DF7DBA:Socket_BeagleBone_Black:Socket_BeagleBone_Black”.
+
+Info: Checking netlist symbol footprint “P8:/55DF7DE1:Socket_BeagleBone_Black:Socket_BeagleBone_Black”.
+
+Info: Checking netlist symbol footprint “J6:/5C29AF80:footprints:640456-8”.
+
+Info: Checking netlist symbol footprint “J5:/5C29AE73:footprints:640456-8”.
+
+Info: Checking netlist symbol footprint “J4:/5C29AD70:footprints:640456-8”.
+
+Info: Checking netlist symbol footprint “J3:/5C29ACD3:footprints:640456-8”.
+
+Info: Checking netlist symbol footprint “J2:/5C29AA60:footprints:640456-8”.
+
+Info: Checking netlist symbol footprint “J1:/5C29A912:footprints:640456-8”.
+
+Warning: Footprint of symbol “R1” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R39” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R2” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R3” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R4” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R5” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R6” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R7” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R8” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R26” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R25” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R21” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R16” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R15” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R14” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R13” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R12” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R11” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R10” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R9” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R24” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R23” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R22” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R27” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R40” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R19” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R18” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R17” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R48” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R47” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R46” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R45” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R44” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R43” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R42” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R41” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R28” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R20” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R38” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R37” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R36” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R35” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R34” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R33” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R32” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R31” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R30” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+
+Warning: Footprint of symbol “R29” changed: board footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical”, netlist footprint “Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal”
+

diff --git a/sym-lib-table b/sym-lib-table
new file mode 100644 (file)
index 0000000..ebfcea5
--- /dev/null
+++ b/sym-lib-table
@@ -0,0 +1,3 @@
+(sym_lib_table\r
+  (lib (name pwr_BeagleBone)(type Legacy)(uri ${KIPRJMOD}/pwr_BeagleBone.lib)(options "")(descr ""))\r
+)\r