6c407e90 |
1 | /dts-v1/; |
2 | |
3 | / { |
4 | compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; |
5 | interrupt-parent = <0x1>; |
6 | #address-cells = <0x1>; |
7 | #size-cells = <0x1>; |
8 | model = "TI AM335x BeagleBone Black"; |
9 | |
10 | aliases { |
11 | i2c0 = "/ocp/i2c@44e0b000"; |
12 | i2c1 = "/ocp/i2c@4802a000"; |
13 | i2c2 = "/ocp/i2c@4819c000"; |
14 | serial0 = "/ocp/serial@44e09000"; |
15 | serial1 = "/ocp/serial@48022000"; |
16 | serial2 = "/ocp/serial@48024000"; |
17 | serial3 = "/ocp/serial@481a6000"; |
18 | serial4 = "/ocp/serial@481a8000"; |
19 | serial5 = "/ocp/serial@481aa000"; |
20 | d_can0 = "/ocp/can@481cc000"; |
21 | d_can1 = "/ocp/can@481d0000"; |
22 | usb0 = "/ocp/usb@47400000/usb@47401000"; |
23 | usb1 = "/ocp/usb@47400000/usb@47401800"; |
24 | phy0 = "/ocp/usb@47400000/usb-phy@47401300"; |
25 | phy1 = "/ocp/usb@47400000/usb-phy@47401b00"; |
26 | ethernet0 = "/ocp/ethernet@4a100000/slave@4a100200"; |
27 | ethernet1 = "/ocp/ethernet@4a100000/slave@4a100300"; |
28 | }; |
29 | |
30 | cpus { |
31 | #address-cells = <0x1>; |
32 | #size-cells = <0x0>; |
33 | |
34 | cpu@0 { |
35 | compatible = "arm,cortex-a8"; |
36 | device_type = "cpu"; |
37 | reg = <0x0>; |
38 | operating-points = <0xafc80 0x139b88 0x927c0 0x12b128 0x7a120 0x112a88 0x43238 0x112a88>; |
39 | voltage-tolerance = <0x2>; |
40 | clocks = <0x2>; |
41 | clock-names = "cpu"; |
42 | clock-latency = <0x493e0>; |
43 | cpu0-supply = <0x3>; |
44 | }; |
45 | }; |
46 | |
47 | pmu { |
48 | compatible = "arm,cortex-a8-pmu"; |
49 | interrupts = <0x3>; |
50 | }; |
51 | |
52 | soc { |
53 | compatible = "ti,omap-infra"; |
54 | |
55 | mpu { |
56 | compatible = "ti,omap3-mpu"; |
57 | ti,hwmods = "mpu"; |
58 | }; |
59 | }; |
60 | |
61 | ocp { |
62 | compatible = "simple-bus"; |
63 | #address-cells = <0x1>; |
64 | #size-cells = <0x1>; |
65 | ranges; |
66 | ti,hwmods = "l3_main"; |
67 | |
68 | l4_wkup@44c00000 { |
69 | compatible = "ti,am3-l4-wkup", "simple-bus"; |
70 | #address-cells = <0x1>; |
71 | #size-cells = <0x1>; |
72 | ranges = <0x0 0x44c00000 0x280000>; |
73 | |
74 | wkup_m3@100000 { |
75 | compatible = "ti,am3352-wkup-m3"; |
76 | reg = <0x100000 0x4000 0x180000 0x2000>; |
77 | reg-names = "umem", "dmem"; |
78 | ti,hwmods = "wkup_m3"; |
79 | ti,pm-firmware = "am335x-pm-firmware.elf"; |
80 | linux,phandle = <0x26>; |
81 | phandle = <0x26>; |
82 | }; |
83 | |
84 | prcm@200000 { |
85 | compatible = "ti,am3-prcm"; |
86 | reg = <0x200000 0x4000>; |
87 | |
88 | clocks { |
89 | #address-cells = <0x1>; |
90 | #size-cells = <0x0>; |
91 | |
92 | clk_32768_ck { |
93 | #clock-cells = <0x0>; |
94 | compatible = "fixed-clock"; |
95 | clock-frequency = <0x8000>; |
96 | linux,phandle = <0x14>; |
97 | phandle = <0x14>; |
98 | }; |
99 | |
100 | clk_rc32k_ck { |
101 | #clock-cells = <0x0>; |
102 | compatible = "fixed-clock"; |
103 | clock-frequency = <0x7d00>; |
104 | linux,phandle = <0x13>; |
105 | phandle = <0x13>; |
106 | }; |
107 | |
108 | virt_19200000_ck { |
109 | #clock-cells = <0x0>; |
110 | compatible = "fixed-clock"; |
111 | clock-frequency = <0x124f800>; |
112 | linux,phandle = <0x21>; |
113 | phandle = <0x21>; |
114 | }; |
115 | |
116 | virt_24000000_ck { |
117 | #clock-cells = <0x0>; |
118 | compatible = "fixed-clock"; |
119 | clock-frequency = <0x16e3600>; |
120 | linux,phandle = <0x22>; |
121 | phandle = <0x22>; |
122 | }; |
123 | |
124 | virt_25000000_ck { |
125 | #clock-cells = <0x0>; |
126 | compatible = "fixed-clock"; |
127 | clock-frequency = <0x17d7840>; |
128 | linux,phandle = <0x23>; |
129 | phandle = <0x23>; |
130 | }; |
131 | |
132 | virt_26000000_ck { |
133 | #clock-cells = <0x0>; |
134 | compatible = "fixed-clock"; |
135 | clock-frequency = <0x18cba80>; |
136 | linux,phandle = <0x24>; |
137 | phandle = <0x24>; |
138 | }; |
139 | |
140 | tclkin_ck { |
141 | #clock-cells = <0x0>; |
142 | compatible = "fixed-clock"; |
143 | clock-frequency = <0xb71b00>; |
144 | linux,phandle = <0x12>; |
145 | phandle = <0x12>; |
146 | }; |
147 | |
148 | dpll_core_ck@490 { |
149 | #clock-cells = <0x0>; |
150 | compatible = "ti,am3-dpll-core-clock"; |
151 | clocks = <0x4 0x4>; |
152 | reg = <0x490 0x45c 0x468>; |
153 | linux,phandle = <0x5>; |
154 | phandle = <0x5>; |
155 | }; |
156 | |
157 | dpll_core_x2_ck { |
158 | #clock-cells = <0x0>; |
159 | compatible = "ti,am3-dpll-x2-clock"; |
160 | clocks = <0x5>; |
161 | linux,phandle = <0x6>; |
162 | phandle = <0x6>; |
163 | }; |
164 | |
165 | dpll_core_m4_ck@480 { |
166 | #clock-cells = <0x0>; |
167 | compatible = "ti,divider-clock"; |
168 | clocks = <0x6>; |
169 | ti,max-div = <0x1f>; |
170 | reg = <0x480>; |
171 | ti,index-starts-at-one; |
172 | linux,phandle = <0xe>; |
173 | phandle = <0xe>; |
174 | }; |
175 | |
176 | dpll_core_m5_ck@484 { |
177 | #clock-cells = <0x0>; |
178 | compatible = "ti,divider-clock"; |
179 | clocks = <0x6>; |
180 | ti,max-div = <0x1f>; |
181 | reg = <0x484>; |
182 | ti,index-starts-at-one; |
183 | linux,phandle = <0x16>; |
184 | phandle = <0x16>; |
185 | }; |
186 | |
187 | dpll_core_m6_ck@4d8 { |
188 | #clock-cells = <0x0>; |
189 | compatible = "ti,divider-clock"; |
190 | clocks = <0x6>; |
191 | ti,max-div = <0x1f>; |
192 | reg = <0x4d8>; |
193 | ti,index-starts-at-one; |
194 | }; |
195 | |
196 | dpll_mpu_ck@488 { |
197 | #clock-cells = <0x0>; |
198 | compatible = "ti,am3-dpll-clock"; |
199 | clocks = <0x4 0x4>; |
200 | reg = <0x488 0x420 0x42c>; |
201 | linux,phandle = <0x2>; |
202 | phandle = <0x2>; |
203 | }; |
204 | |
205 | dpll_mpu_m2_ck@4a8 { |
206 | #clock-cells = <0x0>; |
207 | compatible = "ti,divider-clock"; |
208 | clocks = <0x2>; |
209 | ti,max-div = <0x1f>; |
210 | reg = <0x4a8>; |
211 | ti,index-starts-at-one; |
212 | }; |
213 | |
214 | dpll_ddr_ck@494 { |
215 | #clock-cells = <0x0>; |
216 | compatible = "ti,am3-dpll-no-gate-clock"; |
217 | clocks = <0x4 0x4>; |
218 | reg = <0x494 0x434 0x440>; |
219 | linux,phandle = <0x7>; |
220 | phandle = <0x7>; |
221 | }; |
222 | |
223 | dpll_ddr_m2_ck@4a0 { |
224 | #clock-cells = <0x0>; |
225 | compatible = "ti,divider-clock"; |
226 | clocks = <0x7>; |
227 | ti,max-div = <0x1f>; |
228 | reg = <0x4a0>; |
229 | ti,index-starts-at-one; |
230 | linux,phandle = <0x8>; |
231 | phandle = <0x8>; |
232 | }; |
233 | |
234 | dpll_ddr_m2_div2_ck { |
235 | #clock-cells = <0x0>; |
236 | compatible = "fixed-factor-clock"; |
237 | clocks = <0x8>; |
238 | clock-mult = <0x1>; |
239 | clock-div = <0x2>; |
240 | }; |
241 | |
242 | dpll_disp_ck@498 { |
243 | #clock-cells = <0x0>; |
244 | compatible = "ti,am3-dpll-no-gate-clock"; |
245 | clocks = <0x4 0x4>; |
246 | reg = <0x498 0x448 0x454>; |
247 | linux,phandle = <0x9>; |
248 | phandle = <0x9>; |
249 | }; |
250 | |
251 | dpll_disp_m2_ck@4a4 { |
252 | #clock-cells = <0x0>; |
253 | compatible = "ti,divider-clock"; |
254 | clocks = <0x9>; |
255 | ti,max-div = <0x1f>; |
256 | reg = <0x4a4>; |
257 | ti,index-starts-at-one; |
258 | ti,set-rate-parent; |
259 | linux,phandle = <0x10>; |
260 | phandle = <0x10>; |
261 | }; |
262 | |
263 | dpll_per_ck@48c { |
264 | #clock-cells = <0x0>; |
265 | compatible = "ti,am3-dpll-no-gate-j-type-clock"; |
266 | clocks = <0x4 0x4>; |
267 | reg = <0x48c 0x470 0x49c>; |
268 | linux,phandle = <0xa>; |
269 | phandle = <0xa>; |
270 | }; |
271 | |
272 | dpll_per_m2_ck@4ac { |
273 | #clock-cells = <0x0>; |
274 | compatible = "ti,divider-clock"; |
275 | clocks = <0xa>; |
276 | ti,max-div = <0x1f>; |
277 | reg = <0x4ac>; |
278 | ti,index-starts-at-one; |
279 | linux,phandle = <0xb>; |
280 | phandle = <0xb>; |
281 | }; |
282 | |
283 | dpll_per_m2_div4_wkupdm_ck { |
284 | #clock-cells = <0x0>; |
285 | compatible = "fixed-factor-clock"; |
286 | clocks = <0xb>; |
287 | clock-mult = <0x1>; |
288 | clock-div = <0x4>; |
289 | }; |
290 | |
291 | dpll_per_m2_div4_ck { |
292 | #clock-cells = <0x0>; |
293 | compatible = "fixed-factor-clock"; |
294 | clocks = <0xb>; |
295 | clock-mult = <0x1>; |
296 | clock-div = <0x4>; |
297 | }; |
298 | |
299 | cefuse_fck@a20 { |
300 | #clock-cells = <0x0>; |
301 | compatible = "ti,gate-clock"; |
302 | clocks = <0x4>; |
303 | ti,bit-shift = <0x1>; |
304 | reg = <0xa20>; |
305 | }; |
306 | |
307 | clk_24mhz { |
308 | #clock-cells = <0x0>; |
309 | compatible = "fixed-factor-clock"; |
310 | clocks = <0xb>; |
311 | clock-mult = <0x1>; |
312 | clock-div = <0x8>; |
313 | linux,phandle = <0xc>; |
314 | phandle = <0xc>; |
315 | }; |
316 | |
317 | clkdiv32k_ck { |
318 | #clock-cells = <0x0>; |
319 | compatible = "fixed-factor-clock"; |
320 | clocks = <0xc>; |
321 | clock-mult = <0x1>; |
322 | clock-div = <0x2dc>; |
323 | linux,phandle = <0xd>; |
324 | phandle = <0xd>; |
325 | }; |
326 | |
327 | clkdiv32k_ick@14c { |
328 | #clock-cells = <0x0>; |
329 | compatible = "ti,gate-clock"; |
330 | clocks = <0xd>; |
331 | ti,bit-shift = <0x1>; |
332 | reg = <0x14c>; |
333 | linux,phandle = <0x11>; |
334 | phandle = <0x11>; |
335 | }; |
336 | |
337 | l3_gclk { |
338 | #clock-cells = <0x0>; |
339 | compatible = "fixed-factor-clock"; |
340 | clocks = <0xe>; |
341 | clock-mult = <0x1>; |
342 | clock-div = <0x1>; |
343 | linux,phandle = <0xf>; |
344 | phandle = <0xf>; |
345 | }; |
346 | |
347 | pruss_ocp_gclk@530 { |
348 | #clock-cells = <0x0>; |
349 | compatible = "ti,mux-clock"; |
350 | clocks = <0xf 0x10>; |
351 | reg = <0x530>; |
352 | }; |
353 | |
354 | mmu_fck@914 { |
355 | #clock-cells = <0x0>; |
356 | compatible = "ti,gate-clock"; |
357 | clocks = <0xe>; |
358 | ti,bit-shift = <0x1>; |
359 | reg = <0x914>; |
360 | }; |
361 | |
362 | timer1_fck@528 { |
363 | #clock-cells = <0x0>; |
364 | compatible = "ti,mux-clock"; |
365 | clocks = <0x4 0x11 0x12 0x13 0x14>; |
366 | reg = <0x528>; |
367 | }; |
368 | |
369 | timer2_fck@508 { |
370 | #clock-cells = <0x0>; |
371 | compatible = "ti,mux-clock"; |
372 | clocks = <0x12 0x4 0x11>; |
373 | reg = <0x508>; |
374 | }; |
375 | |
376 | timer3_fck@50c { |
377 | #clock-cells = <0x0>; |
378 | compatible = "ti,mux-clock"; |
379 | clocks = <0x12 0x4 0x11>; |
380 | reg = <0x50c>; |
381 | }; |
382 | |
383 | timer4_fck@510 { |
384 | #clock-cells = <0x0>; |
385 | compatible = "ti,mux-clock"; |
386 | clocks = <0x12 0x4 0x11>; |
387 | reg = <0x510>; |
388 | }; |
389 | |
390 | timer5_fck@518 { |
391 | #clock-cells = <0x0>; |
392 | compatible = "ti,mux-clock"; |
393 | clocks = <0x12 0x4 0x11>; |
394 | reg = <0x518>; |
395 | }; |
396 | |
397 | timer6_fck@51c { |
398 | #clock-cells = <0x0>; |
399 | compatible = "ti,mux-clock"; |
400 | clocks = <0x12 0x4 0x11>; |
401 | reg = <0x51c>; |
402 | }; |
403 | |
404 | timer7_fck@504 { |
405 | #clock-cells = <0x0>; |
406 | compatible = "ti,mux-clock"; |
407 | clocks = <0x12 0x4 0x11>; |
408 | reg = <0x504>; |
409 | }; |
410 | |
411 | usbotg_fck@47c { |
412 | #clock-cells = <0x0>; |
413 | compatible = "ti,gate-clock"; |
414 | clocks = <0xa>; |
415 | ti,bit-shift = <0x8>; |
416 | reg = <0x47c>; |
417 | }; |
418 | |
419 | dpll_core_m4_div2_ck { |
420 | #clock-cells = <0x0>; |
421 | compatible = "fixed-factor-clock"; |
422 | clocks = <0xe>; |
423 | clock-mult = <0x1>; |
424 | clock-div = <0x2>; |
425 | linux,phandle = <0x15>; |
426 | phandle = <0x15>; |
427 | }; |
428 | |
429 | ieee5000_fck@e4 { |
430 | #clock-cells = <0x0>; |
431 | compatible = "ti,gate-clock"; |
432 | clocks = <0x15>; |
433 | ti,bit-shift = <0x1>; |
434 | reg = <0xe4>; |
435 | }; |
436 | |
437 | wdt1_fck@538 { |
438 | #clock-cells = <0x0>; |
439 | compatible = "ti,mux-clock"; |
440 | clocks = <0x13 0x11>; |
441 | reg = <0x538>; |
442 | }; |
443 | |
444 | l4_rtc_gclk { |
445 | #clock-cells = <0x0>; |
446 | compatible = "fixed-factor-clock"; |
447 | clocks = <0xe>; |
448 | clock-mult = <0x1>; |
449 | clock-div = <0x2>; |
450 | }; |
451 | |
452 | l4hs_gclk { |
453 | #clock-cells = <0x0>; |
454 | compatible = "fixed-factor-clock"; |
455 | clocks = <0xe>; |
456 | clock-mult = <0x1>; |
457 | clock-div = <0x1>; |
458 | }; |
459 | |
460 | l3s_gclk { |
461 | #clock-cells = <0x0>; |
462 | compatible = "fixed-factor-clock"; |
463 | clocks = <0x15>; |
464 | clock-mult = <0x1>; |
465 | clock-div = <0x1>; |
466 | }; |
467 | |
468 | l4fw_gclk { |
469 | #clock-cells = <0x0>; |
470 | compatible = "fixed-factor-clock"; |
471 | clocks = <0x15>; |
472 | clock-mult = <0x1>; |
473 | clock-div = <0x1>; |
474 | }; |
475 | |
476 | l4ls_gclk { |
477 | #clock-cells = <0x0>; |
478 | compatible = "fixed-factor-clock"; |
479 | clocks = <0x15>; |
480 | clock-mult = <0x1>; |
481 | clock-div = <0x1>; |
482 | linux,phandle = <0x25>; |
483 | phandle = <0x25>; |
484 | }; |
485 | |
486 | sysclk_div_ck { |
487 | #clock-cells = <0x0>; |
488 | compatible = "fixed-factor-clock"; |
489 | clocks = <0xe>; |
490 | clock-mult = <0x1>; |
491 | clock-div = <0x1>; |
492 | }; |
493 | |
494 | cpsw_125mhz_gclk { |
495 | #clock-cells = <0x0>; |
496 | compatible = "fixed-factor-clock"; |
497 | clocks = <0x16>; |
498 | clock-mult = <0x1>; |
499 | clock-div = <0x2>; |
500 | linux,phandle = <0x42>; |
501 | phandle = <0x42>; |
502 | }; |
503 | |
504 | cpsw_cpts_rft_clk@520 { |
505 | #clock-cells = <0x0>; |
506 | compatible = "ti,mux-clock"; |
507 | clocks = <0x16 0xe>; |
508 | reg = <0x520>; |
509 | linux,phandle = <0x43>; |
510 | phandle = <0x43>; |
511 | }; |
512 | |
513 | gpio0_dbclk_mux_ck@53c { |
514 | #clock-cells = <0x0>; |
515 | compatible = "ti,mux-clock"; |
516 | clocks = <0x13 0x14 0x11>; |
517 | reg = <0x53c>; |
518 | linux,phandle = <0x17>; |
519 | phandle = <0x17>; |
520 | }; |
521 | |
522 | gpio0_dbclk@408 { |
523 | #clock-cells = <0x0>; |
524 | compatible = "ti,gate-clock"; |
525 | clocks = <0x17>; |
526 | ti,bit-shift = <0x12>; |
527 | reg = <0x408>; |
528 | }; |
529 | |
530 | gpio1_dbclk@ac { |
531 | #clock-cells = <0x0>; |
532 | compatible = "ti,gate-clock"; |
533 | clocks = <0x11>; |
534 | ti,bit-shift = <0x12>; |
535 | reg = <0xac>; |
536 | }; |
537 | |
538 | gpio2_dbclk@b0 { |
539 | #clock-cells = <0x0>; |
540 | compatible = "ti,gate-clock"; |
541 | clocks = <0x11>; |
542 | ti,bit-shift = <0x12>; |
543 | reg = <0xb0>; |
544 | }; |
545 | |
546 | gpio3_dbclk@b4 { |
547 | #clock-cells = <0x0>; |
548 | compatible = "ti,gate-clock"; |
549 | clocks = <0x11>; |
550 | ti,bit-shift = <0x12>; |
551 | reg = <0xb4>; |
552 | }; |
553 | |
554 | lcd_gclk@534 { |
555 | #clock-cells = <0x0>; |
556 | compatible = "ti,mux-clock"; |
557 | clocks = <0x10 0x16 0xb>; |
558 | reg = <0x534>; |
559 | ti,set-rate-parent; |
560 | linux,phandle = <0x19>; |
561 | phandle = <0x19>; |
562 | }; |
563 | |
564 | mmc_clk { |
565 | #clock-cells = <0x0>; |
566 | compatible = "fixed-factor-clock"; |
567 | clocks = <0xb>; |
568 | clock-mult = <0x1>; |
569 | clock-div = <0x2>; |
570 | }; |
571 | |
572 | gfx_fclk_clksel_ck@52c { |
573 | #clock-cells = <0x0>; |
574 | compatible = "ti,mux-clock"; |
575 | clocks = <0xe 0xb>; |
576 | ti,bit-shift = <0x1>; |
577 | reg = <0x52c>; |
578 | linux,phandle = <0x18>; |
579 | phandle = <0x18>; |
580 | }; |
581 | |
582 | gfx_fck_div_ck@52c { |
583 | #clock-cells = <0x0>; |
584 | compatible = "ti,divider-clock"; |
585 | clocks = <0x18>; |
586 | reg = <0x52c>; |
587 | ti,max-div = <0x2>; |
588 | }; |
589 | |
590 | sysclkout_pre_ck@700 { |
591 | #clock-cells = <0x0>; |
592 | compatible = "ti,mux-clock"; |
593 | clocks = <0x14 0xf 0x8 0xb 0x19>; |
594 | reg = <0x700>; |
595 | linux,phandle = <0x1a>; |
596 | phandle = <0x1a>; |
597 | }; |
598 | |
599 | clkout2_div_ck@700 { |
600 | #clock-cells = <0x0>; |
601 | compatible = "ti,divider-clock"; |
602 | clocks = <0x1a>; |
603 | ti,bit-shift = <0x3>; |
604 | ti,max-div = <0x8>; |
605 | reg = <0x700>; |
606 | linux,phandle = <0x1f>; |
607 | phandle = <0x1f>; |
608 | }; |
609 | |
610 | dbg_sysclk_ck@414 { |
611 | #clock-cells = <0x0>; |
612 | compatible = "ti,gate-clock"; |
613 | clocks = <0x4>; |
614 | ti,bit-shift = <0x13>; |
615 | reg = <0x414>; |
616 | linux,phandle = <0x1b>; |
617 | phandle = <0x1b>; |
618 | }; |
619 | |
620 | dbg_clka_ck@414 { |
621 | #clock-cells = <0x0>; |
622 | compatible = "ti,gate-clock"; |
623 | clocks = <0xe>; |
624 | ti,bit-shift = <0x1e>; |
625 | reg = <0x414>; |
626 | linux,phandle = <0x1c>; |
627 | phandle = <0x1c>; |
628 | }; |
629 | |
630 | stm_pmd_clock_mux_ck@414 { |
631 | #clock-cells = <0x0>; |
632 | compatible = "ti,mux-clock"; |
633 | clocks = <0x1b 0x1c>; |
634 | ti,bit-shift = <0x16>; |
635 | reg = <0x414>; |
636 | linux,phandle = <0x1d>; |
637 | phandle = <0x1d>; |
638 | }; |
639 | |
640 | trace_pmd_clk_mux_ck@414 { |
641 | #clock-cells = <0x0>; |
642 | compatible = "ti,mux-clock"; |
643 | clocks = <0x1b 0x1c>; |
644 | ti,bit-shift = <0x14>; |
645 | reg = <0x414>; |
646 | linux,phandle = <0x1e>; |
647 | phandle = <0x1e>; |
648 | }; |
649 | |
650 | stm_clk_div_ck@414 { |
651 | #clock-cells = <0x0>; |
652 | compatible = "ti,divider-clock"; |
653 | clocks = <0x1d>; |
654 | ti,bit-shift = <0x1b>; |
655 | ti,max-div = <0x40>; |
656 | reg = <0x414>; |
657 | ti,index-power-of-two; |
658 | }; |
659 | |
660 | trace_clk_div_ck@414 { |
661 | #clock-cells = <0x0>; |
662 | compatible = "ti,divider-clock"; |
663 | clocks = <0x1e>; |
664 | ti,bit-shift = <0x18>; |
665 | ti,max-div = <0x40>; |
666 | reg = <0x414>; |
667 | ti,index-power-of-two; |
668 | }; |
669 | |
670 | clkout2_ck@700 { |
671 | #clock-cells = <0x0>; |
672 | compatible = "ti,gate-clock"; |
673 | clocks = <0x1f>; |
674 | ti,bit-shift = <0x7>; |
675 | reg = <0x700>; |
676 | }; |
677 | }; |
678 | |
679 | clockdomains { |
680 | |
681 | clk_24mhz_clkdm { |
682 | compatible = "ti,clockdomain"; |
683 | clocks = <0x11>; |
684 | }; |
685 | }; |
686 | }; |
687 | |
688 | scm@210000 { |
689 | compatible = "ti,am3-scm", "simple-bus"; |
690 | reg = <0x210000 0x2000>; |
691 | #address-cells = <0x1>; |
692 | #size-cells = <0x1>; |
693 | ranges = <0x0 0x210000 0x2000>; |
694 | |
695 | pinmux@800 { |
696 | compatible = "pinctrl-single"; |
697 | reg = <0x800 0x238>; |
698 | #address-cells = <0x1>; |
699 | #size-cells = <0x0>; |
700 | pinctrl-single,register-width = <0x20>; |
701 | pinctrl-single,function-mask = <0x7f>; |
702 | pinctrl-names = "default"; |
703 | pinctrl-0 = <0x20>; |
704 | |
705 | user_leds_s0 { |
706 | pinctrl-single,pins = <0x54 0x7 0x58 0x17 0x5c 0x7 0x60 0x17>; |
707 | linux,phandle = <0x4b>; |
708 | phandle = <0x4b>; |
709 | }; |
710 | |
711 | pinmux_i2c0_pins { |
712 | pinctrl-single,pins = <0x188 0x30 0x18c 0x30>; |
713 | linux,phandle = <0x2e>; |
714 | phandle = <0x2e>; |
715 | }; |
716 | |
717 | pinmux_i2c2_pins { |
718 | pinctrl-single,pins = <0x178 0x33 0x17c 0x33>; |
719 | linux,phandle = <0x32>; |
720 | phandle = <0x32>; |
721 | }; |
722 | |
723 | pinmux_uart0_pins { |
724 | pinctrl-single,pins = <0x170 0x30 0x174 0x0>; |
725 | linux,phandle = <0x2d>; |
726 | phandle = <0x2d>; |
727 | }; |
728 | |
729 | pinmux_clkout2_pin { |
730 | pinctrl-single,pins = <0x1b4 0x3>; |
731 | linux,phandle = <0x20>; |
732 | phandle = <0x20>; |
733 | }; |
734 | |
735 | cpsw_default { |
736 | pinctrl-single,pins = <0x110 0x30 0x114 0x0 0x118 0x30 0x11c 0x0 0x120 0x0 0x124 0x0 0x128 0x0 0x12c 0x30 0x130 0x30 0x134 0x30 0x138 0x30 0x13c 0x30 0x140 0x30>; |
737 | linux,phandle = <0x44>; |
738 | phandle = <0x44>; |
739 | }; |
740 | |
741 | cpsw_sleep { |
742 | pinctrl-single,pins = <0x110 0x27 0x114 0x27 0x118 0x27 0x11c 0x27 0x120 0x27 0x124 0x27 0x128 0x27 0x12c 0x27 0x130 0x27 0x134 0x27 0x138 0x27 0x13c 0x27 0x140 0x27>; |
743 | linux,phandle = <0x45>; |
744 | phandle = <0x45>; |
745 | }; |
746 | |
747 | davinci_mdio_default { |
748 | pinctrl-single,pins = <0x148 0x30 0x14c 0x10>; |
749 | linux,phandle = <0x46>; |
750 | phandle = <0x46>; |
751 | }; |
752 | |
753 | davinci_mdio_sleep { |
754 | pinctrl-single,pins = <0x148 0x27 0x14c 0x27>; |
755 | linux,phandle = <0x47>; |
756 | phandle = <0x47>; |
757 | }; |
758 | |
759 | pinmux_mmc1_pins { |
760 | pinctrl-single,pins = <0x160 0x2f>; |
761 | linux,phandle = <0x34>; |
762 | phandle = <0x34>; |
763 | }; |
764 | |
765 | pinmux_emmc_pins { |
766 | pinctrl-single,pins = <0x80 0x32 0x84 0x32 0x0 0x31 0x4 0x31 0x8 0x31 0xc 0x31 0x10 0x31 0x14 0x31 0x18 0x31 0x1c 0x31>; |
767 | linux,phandle = <0x37>; |
768 | phandle = <0x37>; |
769 | }; |
770 | |
771 | nxp_hdmi_bonelt_pins { |
772 | pinctrl-single,pins = <0x1b0 0x3 0xa0 0x8 0xa4 0x8 0xa8 0x8 0xac 0x8 0xb0 0x8 0xb4 0x8 0xb8 0x8 0xbc 0x8 0xc0 0x8 0xc4 0x8 0xc8 0x8 0xcc 0x8 0xd0 0x8 0xd4 0x8 0xd8 0x8 0xdc 0x8 0xe0 0x0 0xe4 0x0 0xe8 0x0 0xec 0x0>; |
773 | linux,phandle = <0x2f>; |
774 | phandle = <0x2f>; |
775 | }; |
776 | |
777 | nxp_hdmi_bonelt_off_pins { |
778 | pinctrl-single,pins = <0x1b0 0x3>; |
779 | linux,phandle = <0x30>; |
780 | phandle = <0x30>; |
781 | }; |
782 | |
783 | mcasp0_pins { |
784 | pinctrl-single,pins = <0x1ac 0x30 0x19c 0x2 0x194 0x10 0x190 0x0 0x6c 0x7>; |
785 | linux,phandle = <0x4a>; |
786 | phandle = <0x4a>; |
787 | }; |
788 | }; |
789 | |
790 | scm_conf@0 { |
791 | compatible = "syscon"; |
792 | reg = <0x0 0x800>; |
793 | #address-cells = <0x1>; |
794 | #size-cells = <0x1>; |
795 | linux,phandle = <0x39>; |
796 | phandle = <0x39>; |
797 | |
798 | clocks { |
799 | #address-cells = <0x1>; |
800 | #size-cells = <0x0>; |
801 | |
802 | sys_clkin_ck@40 { |
803 | #clock-cells = <0x0>; |
804 | compatible = "ti,mux-clock"; |
805 | clocks = <0x21 0x22 0x23 0x24>; |
806 | ti,bit-shift = <0x16>; |
807 | reg = <0x40>; |
808 | linux,phandle = <0x4>; |
809 | phandle = <0x4>; |
810 | }; |
811 | |
812 | adc_tsc_fck { |
813 | #clock-cells = <0x0>; |
814 | compatible = "fixed-factor-clock"; |
815 | clocks = <0x4>; |
816 | clock-mult = <0x1>; |
817 | clock-div = <0x1>; |
818 | }; |
819 | |
820 | dcan0_fck { |
821 | #clock-cells = <0x0>; |
822 | compatible = "fixed-factor-clock"; |
823 | clocks = <0x4>; |
824 | clock-mult = <0x1>; |
825 | clock-div = <0x1>; |
826 | linux,phandle = <0x38>; |
827 | phandle = <0x38>; |
828 | }; |
829 | |
830 | dcan1_fck { |
831 | #clock-cells = <0x0>; |
832 | compatible = "fixed-factor-clock"; |
833 | clocks = <0x4>; |
834 | clock-mult = <0x1>; |
835 | clock-div = <0x1>; |
836 | linux,phandle = <0x3a>; |
837 | phandle = <0x3a>; |
838 | }; |
839 | |
840 | mcasp0_fck { |
841 | #clock-cells = <0x0>; |
842 | compatible = "fixed-factor-clock"; |
843 | clocks = <0x4>; |
844 | clock-mult = <0x1>; |
845 | clock-div = <0x1>; |
846 | }; |
847 | |
848 | mcasp1_fck { |
849 | #clock-cells = <0x0>; |
850 | compatible = "fixed-factor-clock"; |
851 | clocks = <0x4>; |
852 | clock-mult = <0x1>; |
853 | clock-div = <0x1>; |
854 | }; |
855 | |
856 | smartreflex0_fck { |
857 | #clock-cells = <0x0>; |
858 | compatible = "fixed-factor-clock"; |
859 | clocks = <0x4>; |
860 | clock-mult = <0x1>; |
861 | clock-div = <0x1>; |
862 | }; |
863 | |
864 | smartreflex1_fck { |
865 | #clock-cells = <0x0>; |
866 | compatible = "fixed-factor-clock"; |
867 | clocks = <0x4>; |
868 | clock-mult = <0x1>; |
869 | clock-div = <0x1>; |
870 | }; |
871 | |
872 | sha0_fck { |
873 | #clock-cells = <0x0>; |
874 | compatible = "fixed-factor-clock"; |
875 | clocks = <0x4>; |
876 | clock-mult = <0x1>; |
877 | clock-div = <0x1>; |
878 | }; |
879 | |
880 | aes0_fck { |
881 | #clock-cells = <0x0>; |
882 | compatible = "fixed-factor-clock"; |
883 | clocks = <0x4>; |
884 | clock-mult = <0x1>; |
885 | clock-div = <0x1>; |
886 | }; |
887 | |
888 | rng_fck { |
889 | #clock-cells = <0x0>; |
890 | compatible = "fixed-factor-clock"; |
891 | clocks = <0x4>; |
892 | clock-mult = <0x1>; |
893 | clock-div = <0x1>; |
894 | }; |
895 | |
896 | ehrpwm0_tbclk@44e10664 { |
897 | #clock-cells = <0x0>; |
898 | compatible = "ti,gate-clock"; |
899 | clocks = <0x25>; |
900 | ti,bit-shift = <0x0>; |
901 | reg = <0x664>; |
902 | linux,phandle = <0x3f>; |
903 | phandle = <0x3f>; |
904 | }; |
905 | |
906 | ehrpwm1_tbclk@44e10664 { |
907 | #clock-cells = <0x0>; |
908 | compatible = "ti,gate-clock"; |
909 | clocks = <0x25>; |
910 | ti,bit-shift = <0x1>; |
911 | reg = <0x664>; |
912 | linux,phandle = <0x40>; |
913 | phandle = <0x40>; |
914 | }; |
915 | |
916 | ehrpwm2_tbclk@44e10664 { |
917 | #clock-cells = <0x0>; |
918 | compatible = "ti,gate-clock"; |
919 | clocks = <0x25>; |
920 | ti,bit-shift = <0x2>; |
921 | reg = <0x664>; |
922 | linux,phandle = <0x41>; |
923 | phandle = <0x41>; |
924 | }; |
925 | }; |
926 | }; |
927 | |
928 | wkup_m3_ipc@1324 { |
929 | compatible = "ti,am3352-wkup-m3-ipc"; |
930 | reg = <0x1324 0x24>; |
931 | interrupts = <0x4e>; |
932 | ti,rproc = <0x26>; |
933 | mboxes = <0x27 0x28>; |
934 | }; |
935 | |
936 | dma-router@f90 { |
937 | compatible = "ti,am335x-edma-crossbar"; |
938 | reg = <0xf90 0x40>; |
939 | #dma-cells = <0x3>; |
940 | dma-requests = <0x20>; |
941 | dma-masters = <0x29>; |
942 | linux,phandle = <0x33>; |
943 | phandle = <0x33>; |
944 | }; |
945 | |
946 | clockdomains { |
947 | }; |
948 | }; |
949 | }; |
950 | |
951 | interrupt-controller@48200000 { |
952 | compatible = "ti,am33xx-intc"; |
953 | interrupt-controller; |
954 | #interrupt-cells = <0x1>; |
955 | reg = <0x48200000 0x1000>; |
956 | linux,phandle = <0x1>; |
957 | phandle = <0x1>; |
958 | }; |
959 | |
960 | edma@49000000 { |
961 | compatible = "ti,edma3-tpcc"; |
962 | ti,hwmods = "tpcc"; |
963 | reg = <0x49000000 0x10000>; |
964 | reg-names = "edma3_cc"; |
965 | interrupts = <0xc 0xd 0xe>; |
966 | interrupt-names = "edma3_ccint", "edma3_mperr", "edma3_ccerrint"; |
967 | dma-requests = <0x40>; |
968 | #dma-cells = <0x2>; |
969 | ti,tptcs = <0x2a 0x7 0x2b 0x5 0x2c 0x0>; |
970 | ti,edma-memcpy-channels = <0x14 0x15>; |
971 | linux,phandle = <0x29>; |
972 | phandle = <0x29>; |
973 | }; |
974 | |
975 | tptc@49800000 { |
976 | compatible = "ti,edma3-tptc"; |
977 | ti,hwmods = "tptc0"; |
978 | reg = <0x49800000 0x100000>; |
979 | interrupts = <0x70>; |
980 | interrupt-names = "edma3_tcerrint"; |
981 | linux,phandle = <0x2a>; |
982 | phandle = <0x2a>; |
983 | }; |
984 | |
985 | tptc@49900000 { |
986 | compatible = "ti,edma3-tptc"; |
987 | ti,hwmods = "tptc1"; |
988 | reg = <0x49900000 0x100000>; |
989 | interrupts = <0x71>; |
990 | interrupt-names = "edma3_tcerrint"; |
991 | linux,phandle = <0x2b>; |
992 | phandle = <0x2b>; |
993 | }; |
994 | |
995 | tptc@49a00000 { |
996 | compatible = "ti,edma3-tptc"; |
997 | ti,hwmods = "tptc2"; |
998 | reg = <0x49a00000 0x100000>; |
999 | interrupts = <0x72>; |
1000 | interrupt-names = "edma3_tcerrint"; |
1001 | linux,phandle = <0x2c>; |
1002 | phandle = <0x2c>; |
1003 | }; |
1004 | |
1005 | gpio@44e07000 { |
1006 | compatible = "ti,omap4-gpio"; |
1007 | ti,hwmods = "gpio1"; |
1008 | gpio-controller; |
1009 | #gpio-cells = <0x2>; |
1010 | interrupt-controller; |
1011 | #interrupt-cells = <0x2>; |
1012 | reg = <0x44e07000 0x1000>; |
1013 | interrupts = <0x60>; |
1014 | linux,phandle = <0x35>; |
1015 | phandle = <0x35>; |
1016 | }; |
1017 | |
1018 | gpio@4804c000 { |
1019 | compatible = "ti,omap4-gpio"; |
1020 | ti,hwmods = "gpio2"; |
1021 | gpio-controller; |
1022 | #gpio-cells = <0x2>; |
1023 | interrupt-controller; |
1024 | #interrupt-cells = <0x2>; |
1025 | reg = <0x4804c000 0x1000>; |
1026 | interrupts = <0x62>; |
1027 | linux,phandle = <0x4c>; |
1028 | phandle = <0x4c>; |
1029 | }; |
1030 | |
1031 | gpio@481ac000 { |
1032 | compatible = "ti,omap4-gpio"; |
1033 | ti,hwmods = "gpio3"; |
1034 | gpio-controller; |
1035 | #gpio-cells = <0x2>; |
1036 | interrupt-controller; |
1037 | #interrupt-cells = <0x2>; |
1038 | reg = <0x481ac000 0x1000>; |
1039 | interrupts = <0x20>; |
1040 | }; |
1041 | |
1042 | gpio@481ae000 { |
1043 | compatible = "ti,omap4-gpio"; |
1044 | ti,hwmods = "gpio4"; |
1045 | gpio-controller; |
1046 | #gpio-cells = <0x2>; |
1047 | interrupt-controller; |
1048 | #interrupt-cells = <0x2>; |
1049 | reg = <0x481ae000 0x1000>; |
1050 | interrupts = <0x3e>; |
1051 | }; |
1052 | |
1053 | serial@44e09000 { |
1054 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
1055 | ti,hwmods = "uart1"; |
1056 | clock-frequency = <0x2dc6c00>; |
1057 | reg = <0x44e09000 0x2000>; |
1058 | interrupts = <0x48>; |
1059 | status = "okay"; |
1060 | dmas = <0x29 0x1a 0x0 0x29 0x1b 0x0>; |
1061 | dma-names = "tx", "rx"; |
1062 | pinctrl-names = "default"; |
1063 | pinctrl-0 = <0x2d>; |
1064 | }; |
1065 | |
1066 | serial@48022000 { |
1067 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
1068 | ti,hwmods = "uart2"; |
1069 | clock-frequency = <0x2dc6c00>; |
1070 | reg = <0x48022000 0x2000>; |
1071 | interrupts = <0x49>; |
1072 | status = "disabled"; |
1073 | dmas = <0x29 0x1c 0x0 0x29 0x1d 0x0>; |
1074 | dma-names = "tx", "rx"; |
1075 | }; |
1076 | |
1077 | serial@48024000 { |
1078 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
1079 | ti,hwmods = "uart3"; |
1080 | clock-frequency = <0x2dc6c00>; |
1081 | reg = <0x48024000 0x2000>; |
1082 | interrupts = <0x4a>; |
1083 | status = "disabled"; |
1084 | dmas = <0x29 0x1e 0x0 0x29 0x1f 0x0>; |
1085 | dma-names = "tx", "rx"; |
1086 | }; |
1087 | |
1088 | serial@481a6000 { |
1089 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
1090 | ti,hwmods = "uart4"; |
1091 | clock-frequency = <0x2dc6c00>; |
1092 | reg = <0x481a6000 0x2000>; |
1093 | interrupts = <0x2c>; |
1094 | status = "disabled"; |
1095 | }; |
1096 | |
1097 | serial@481a8000 { |
1098 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
1099 | ti,hwmods = "uart5"; |
1100 | clock-frequency = <0x2dc6c00>; |
1101 | reg = <0x481a8000 0x2000>; |
1102 | interrupts = <0x2d>; |
1103 | status = "disabled"; |
1104 | }; |
1105 | |
1106 | serial@481aa000 { |
1107 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
1108 | ti,hwmods = "uart6"; |
1109 | clock-frequency = <0x2dc6c00>; |
1110 | reg = <0x481aa000 0x2000>; |
1111 | interrupts = <0x2e>; |
1112 | status = "disabled"; |
1113 | }; |
1114 | |
1115 | i2c@44e0b000 { |
1116 | compatible = "ti,omap4-i2c"; |
1117 | #address-cells = <0x1>; |
1118 | #size-cells = <0x0>; |
1119 | ti,hwmods = "i2c1"; |
1120 | reg = <0x44e0b000 0x1000>; |
1121 | interrupts = <0x46>; |
1122 | status = "okay"; |
1123 | pinctrl-names = "default"; |
1124 | pinctrl-0 = <0x2e>; |
1125 | clock-frequency = <0x61a80>; |
1126 | |
1127 | tps@24 { |
1128 | reg = <0x24>; |
1129 | compatible = "ti,tps65217"; |
1130 | ti,pmic-shutdown-controller; |
1131 | |
1132 | regulators { |
1133 | #address-cells = <0x1>; |
1134 | #size-cells = <0x0>; |
1135 | |
1136 | regulator@0 { |
1137 | reg = <0x0>; |
1138 | regulator-compatible = "dcdc1"; |
1139 | regulator-name = "vdds_dpr"; |
1140 | regulator-always-on; |
1141 | }; |
1142 | |
1143 | regulator@1 { |
1144 | reg = <0x1>; |
1145 | regulator-compatible = "dcdc2"; |
1146 | regulator-name = "vdd_mpu"; |
1147 | regulator-min-microvolt = <0xe1d48>; |
1148 | regulator-max-microvolt = <0x149f4c>; |
1149 | regulator-boot-on; |
1150 | regulator-always-on; |
1151 | linux,phandle = <0x3>; |
1152 | phandle = <0x3>; |
1153 | }; |
1154 | |
1155 | regulator@2 { |
1156 | reg = <0x2>; |
1157 | regulator-compatible = "dcdc3"; |
1158 | regulator-name = "vdd_core"; |
1159 | regulator-min-microvolt = <0xe1d48>; |
1160 | regulator-max-microvolt = <0x118c30>; |
1161 | regulator-boot-on; |
1162 | regulator-always-on; |
1163 | }; |
1164 | |
1165 | regulator@3 { |
1166 | reg = <0x3>; |
1167 | regulator-compatible = "ldo1"; |
1168 | regulator-name = "vio,vrtc,vdds"; |
1169 | regulator-always-on; |
1170 | }; |
1171 | |
1172 | regulator@4 { |
1173 | reg = <0x4>; |
1174 | regulator-compatible = "ldo2"; |
1175 | regulator-name = "vdd_3v3aux"; |
1176 | regulator-always-on; |
1177 | }; |
1178 | |
1179 | regulator@5 { |
1180 | reg = <0x5>; |
1181 | regulator-compatible = "ldo3"; |
1182 | regulator-name = "vdd_1v8"; |
1183 | regulator-always-on; |
1184 | regulator-min-microvolt = <0x1b7740>; |
1185 | regulator-max-microvolt = <0x1b7740>; |
1186 | }; |
1187 | |
1188 | regulator@6 { |
1189 | reg = <0x6>; |
1190 | regulator-compatible = "ldo4"; |
1191 | regulator-name = "vdd_3v3a"; |
1192 | regulator-always-on; |
1193 | }; |
1194 | }; |
1195 | }; |
1196 | |
1197 | baseboard_eeprom@50 { |
1198 | compatible = "at,24c256"; |
1199 | reg = <0x50>; |
1200 | #address-cells = <0x1>; |
1201 | #size-cells = <0x1>; |
1202 | |
1203 | baseboard_data@0 { |
1204 | reg = <0x0 0x100>; |
1205 | }; |
1206 | }; |
1207 | |
1208 | tda19988 { |
1209 | compatible = "nxp,tda998x"; |
1210 | reg = <0x70>; |
1211 | pinctrl-names = "default", "off"; |
1212 | pinctrl-0 = <0x2f>; |
1213 | pinctrl-1 = <0x30>; |
1214 | #sound-dai-cells = <0x0>; |
1215 | audio-ports = <0x2 0x3>; |
1216 | linux,phandle = <0x51>; |
1217 | phandle = <0x51>; |
1218 | |
1219 | ports { |
1220 | |
1221 | port@0 { |
1222 | |
1223 | endpoint@0 { |
1224 | remote-endpoint = <0x31>; |
1225 | linux,phandle = <0x49>; |
1226 | phandle = <0x49>; |
1227 | }; |
1228 | }; |
1229 | }; |
1230 | }; |
1231 | }; |
1232 | |
1233 | i2c@4802a000 { |
1234 | compatible = "ti,omap4-i2c"; |
1235 | #address-cells = <0x1>; |
1236 | #size-cells = <0x0>; |
1237 | ti,hwmods = "i2c2"; |
1238 | reg = <0x4802a000 0x1000>; |
1239 | interrupts = <0x47>; |
1240 | status = "disabled"; |
1241 | }; |
1242 | |
1243 | i2c@4819c000 { |
1244 | compatible = "ti,omap4-i2c"; |
1245 | #address-cells = <0x1>; |
1246 | #size-cells = <0x0>; |
1247 | ti,hwmods = "i2c3"; |
1248 | reg = <0x4819c000 0x1000>; |
1249 | interrupts = <0x1e>; |
1250 | status = "okay"; |
1251 | pinctrl-names = "default"; |
1252 | pinctrl-0 = <0x32>; |
1253 | clock-frequency = <0x186a0>; |
1254 | |
1255 | cape_eeprom0@54 { |
1256 | compatible = "at,24c256"; |
1257 | reg = <0x54>; |
1258 | #address-cells = <0x1>; |
1259 | #size-cells = <0x1>; |
1260 | |
1261 | cape_data@0 { |
1262 | reg = <0x0 0x100>; |
1263 | }; |
1264 | }; |
1265 | |
1266 | cape_eeprom1@55 { |
1267 | compatible = "at,24c256"; |
1268 | reg = <0x55>; |
1269 | #address-cells = <0x1>; |
1270 | #size-cells = <0x1>; |
1271 | |
1272 | cape_data@0 { |
1273 | reg = <0x0 0x100>; |
1274 | }; |
1275 | }; |
1276 | |
1277 | cape_eeprom2@56 { |
1278 | compatible = "at,24c256"; |
1279 | reg = <0x56>; |
1280 | #address-cells = <0x1>; |
1281 | #size-cells = <0x1>; |
1282 | |
1283 | cape_data@0 { |
1284 | reg = <0x0 0x100>; |
1285 | }; |
1286 | }; |
1287 | |
1288 | cape_eeprom3@57 { |
1289 | compatible = "at,24c256"; |
1290 | reg = <0x57>; |
1291 | #address-cells = <0x1>; |
1292 | #size-cells = <0x1>; |
1293 | |
1294 | cape_data@0 { |
1295 | reg = <0x0 0x100>; |
1296 | }; |
1297 | }; |
1298 | }; |
1299 | |
1300 | mmc@48060000 { |
1301 | compatible = "ti,omap4-hsmmc"; |
1302 | ti,hwmods = "mmc1"; |
1303 | ti,dual-volt; |
1304 | ti,needs-special-reset; |
1305 | ti,needs-special-hs-handling; |
1306 | dmas = <0x33 0x18 0x0 0x0 0x33 0x19 0x0 0x0>; |
1307 | dma-names = "tx", "rx"; |
1308 | interrupts = <0x40>; |
1309 | interrupt-parent = <0x1>; |
1310 | reg = <0x48060000 0x1000>; |
1311 | status = "okay"; |
1312 | bus-width = <0x4>; |
1313 | pinctrl-names = "default"; |
1314 | pinctrl-0 = <0x34>; |
1315 | cd-gpios = <0x35 0x6 0x1>; |
1316 | vmmc-supply = <0x36>; |
1317 | }; |
1318 | |
1319 | mmc@481d8000 { |
1320 | compatible = "ti,omap4-hsmmc"; |
1321 | ti,hwmods = "mmc2"; |
1322 | ti,needs-special-reset; |
1323 | dmas = <0x29 0x2 0x0 0x29 0x3 0x0>; |
1324 | dma-names = "tx", "rx"; |
1325 | interrupts = <0x1c>; |
1326 | interrupt-parent = <0x1>; |
1327 | reg = <0x481d8000 0x1000>; |
1328 | status = "okay"; |
1329 | vmmc-supply = <0x36>; |
1330 | pinctrl-names = "default"; |
1331 | pinctrl-0 = <0x37>; |
1332 | bus-width = <0x8>; |
1333 | }; |
1334 | |
1335 | mmc@47810000 { |
1336 | compatible = "ti,omap4-hsmmc"; |
1337 | ti,hwmods = "mmc3"; |
1338 | ti,needs-special-reset; |
1339 | interrupts = <0x1d>; |
1340 | interrupt-parent = <0x1>; |
1341 | reg = <0x47810000 0x1000>; |
1342 | status = "disabled"; |
1343 | }; |
1344 | |
1345 | spinlock@480ca000 { |
1346 | compatible = "ti,omap4-hwspinlock"; |
1347 | reg = <0x480ca000 0x1000>; |
1348 | ti,hwmods = "spinlock"; |
1349 | #hwlock-cells = <0x1>; |
1350 | }; |
1351 | |
1352 | wdt@44e35000 { |
1353 | compatible = "ti,omap3-wdt"; |
1354 | ti,hwmods = "wd_timer2"; |
1355 | reg = <0x44e35000 0x1000>; |
1356 | interrupts = <0x5b>; |
1357 | }; |
1358 | |
1359 | can@481cc000 { |
1360 | compatible = "ti,am3352-d_can"; |
1361 | ti,hwmods = "d_can0"; |
1362 | reg = <0x481cc000 0x2000>; |
1363 | clocks = <0x38>; |
1364 | clock-names = "fck"; |
1365 | syscon-raminit = <0x39 0x644 0x0>; |
1366 | interrupts = <0x34>; |
1367 | status = "disabled"; |
1368 | }; |
1369 | |
1370 | can@481d0000 { |
1371 | compatible = "ti,am3352-d_can"; |
1372 | ti,hwmods = "d_can1"; |
1373 | reg = <0x481d0000 0x2000>; |
1374 | clocks = <0x3a>; |
1375 | clock-names = "fck"; |
1376 | syscon-raminit = <0x39 0x644 0x1>; |
1377 | interrupts = <0x37>; |
1378 | status = "disabled"; |
1379 | }; |
1380 | |
1381 | mailbox@480C8000 { |
1382 | compatible = "ti,omap4-mailbox"; |
1383 | reg = <0x480c8000 0x200>; |
1384 | interrupts = <0x4d>; |
1385 | ti,hwmods = "mailbox"; |
1386 | #mbox-cells = <0x1>; |
1387 | ti,mbox-num-users = <0x4>; |
1388 | ti,mbox-num-fifos = <0x8>; |
1389 | linux,phandle = <0x27>; |
1390 | phandle = <0x27>; |
1391 | |
1392 | wkup_m3 { |
1393 | ti,mbox-send-noirq; |
1394 | ti,mbox-tx = <0x0 0x0 0x0>; |
1395 | ti,mbox-rx = <0x0 0x0 0x3>; |
1396 | linux,phandle = <0x28>; |
1397 | phandle = <0x28>; |
1398 | }; |
1399 | }; |
1400 | |
1401 | timer@44e31000 { |
1402 | compatible = "ti,am335x-timer-1ms"; |
1403 | reg = <0x44e31000 0x400>; |
1404 | interrupts = <0x43>; |
1405 | ti,hwmods = "timer1"; |
1406 | ti,timer-alwon; |
1407 | }; |
1408 | |
1409 | timer@48040000 { |
1410 | compatible = "ti,am335x-timer"; |
1411 | reg = <0x48040000 0x400>; |
1412 | interrupts = <0x44>; |
1413 | ti,hwmods = "timer2"; |
1414 | }; |
1415 | |
1416 | timer@48042000 { |
1417 | compatible = "ti,am335x-timer"; |
1418 | reg = <0x48042000 0x400>; |
1419 | interrupts = <0x45>; |
1420 | ti,hwmods = "timer3"; |
1421 | }; |
1422 | |
1423 | timer@48044000 { |
1424 | compatible = "ti,am335x-timer"; |
1425 | reg = <0x48044000 0x400>; |
1426 | interrupts = <0x5c>; |
1427 | ti,hwmods = "timer4"; |
1428 | ti,timer-pwm; |
1429 | }; |
1430 | |
1431 | timer@48046000 { |
1432 | compatible = "ti,am335x-timer"; |
1433 | reg = <0x48046000 0x400>; |
1434 | interrupts = <0x5d>; |
1435 | ti,hwmods = "timer5"; |
1436 | ti,timer-pwm; |
1437 | }; |
1438 | |
1439 | timer@48048000 { |
1440 | compatible = "ti,am335x-timer"; |
1441 | reg = <0x48048000 0x400>; |
1442 | interrupts = <0x5e>; |
1443 | ti,hwmods = "timer6"; |
1444 | ti,timer-pwm; |
1445 | }; |
1446 | |
1447 | timer@4804a000 { |
1448 | compatible = "ti,am335x-timer"; |
1449 | reg = <0x4804a000 0x400>; |
1450 | interrupts = <0x5f>; |
1451 | ti,hwmods = "timer7"; |
1452 | ti,timer-pwm; |
1453 | }; |
1454 | |
1455 | rtc@44e3e000 { |
1456 | compatible = "ti,am3352-rtc", "ti,da830-rtc"; |
1457 | reg = <0x44e3e000 0x1000>; |
1458 | interrupts = <0x4b 0x4c>; |
1459 | ti,hwmods = "rtc"; |
1460 | system-power-controller; |
1461 | }; |
1462 | |
1463 | spi@48030000 { |
1464 | compatible = "ti,omap4-mcspi"; |
1465 | #address-cells = <0x1>; |
1466 | #size-cells = <0x0>; |
1467 | reg = <0x48030000 0x400>; |
1468 | interrupts = <0x41>; |
1469 | ti,spi-num-cs = <0x2>; |
1470 | ti,hwmods = "spi0"; |
1471 | dmas = <0x29 0x10 0x0 0x29 0x11 0x0 0x29 0x12 0x0 0x29 0x13 0x0>; |
1472 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
1473 | status = "disabled"; |
1474 | }; |
1475 | |
1476 | spi@481a0000 { |
1477 | compatible = "ti,omap4-mcspi"; |
1478 | #address-cells = <0x1>; |
1479 | #size-cells = <0x0>; |
1480 | reg = <0x481a0000 0x400>; |
1481 | interrupts = <0x7d>; |
1482 | ti,spi-num-cs = <0x2>; |
1483 | ti,hwmods = "spi1"; |
1484 | dmas = <0x29 0x2a 0x0 0x29 0x2b 0x0 0x29 0x2c 0x0 0x29 0x2d 0x0>; |
1485 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
1486 | status = "disabled"; |
1487 | }; |
1488 | |
1489 | usb@47400000 { |
1490 | compatible = "ti,am33xx-usb"; |
1491 | reg = <0x47400000 0x1000>; |
1492 | ranges; |
1493 | #address-cells = <0x1>; |
1494 | #size-cells = <0x1>; |
1495 | ti,hwmods = "usb_otg_hs"; |
1496 | status = "okay"; |
1497 | |
1498 | control@44e10620 { |
1499 | compatible = "ti,am335x-usb-ctrl-module"; |
1500 | reg = <0x44e10620 0x10 0x44e10648 0x4>; |
1501 | reg-names = "phy_ctrl", "wakeup"; |
1502 | status = "okay"; |
1503 | linux,phandle = <0x3b>; |
1504 | phandle = <0x3b>; |
1505 | }; |
1506 | |
1507 | usb-phy@47401300 { |
1508 | compatible = "ti,am335x-usb-phy"; |
1509 | reg = <0x47401300 0x100>; |
1510 | reg-names = "phy"; |
1511 | status = "okay"; |
1512 | ti,ctrl_mod = <0x3b>; |
1513 | linux,phandle = <0x3c>; |
1514 | phandle = <0x3c>; |
1515 | }; |
1516 | |
1517 | usb@47401000 { |
1518 | compatible = "ti,musb-am33xx"; |
1519 | status = "okay"; |
1520 | reg = <0x47401400 0x400 0x47401000 0x200>; |
1521 | reg-names = "mc", "control"; |
1522 | interrupts = <0x12>; |
1523 | interrupt-names = "mc"; |
1524 | dr_mode = "peripheral"; |
1525 | mentor,multipoint = <0x1>; |
1526 | mentor,num-eps = <0x10>; |
1527 | mentor,ram-bits = <0xc>; |
1528 | mentor,power = <0x1f4>; |
1529 | phys = <0x3c>; |
1530 | dmas = <0x3d 0x0 0x0 0x3d 0x1 0x0 0x3d 0x2 0x0 0x3d 0x3 0x0 0x3d 0x4 0x0 0x3d 0x5 0x0 0x3d 0x6 0x0 0x3d 0x7 0x0 0x3d 0x8 0x0 0x3d 0x9 0x0 0x3d 0xa 0x0 0x3d 0xb 0x0 0x3d 0xc 0x0 0x3d 0xd 0x0 0x3d 0xe 0x0 0x3d 0x0 0x1 0x3d 0x1 0x1 0x3d 0x2 0x1 0x3d 0x3 0x1 0x3d 0x4 0x1 0x3d 0x5 0x1 0x3d 0x6 0x1 0x3d 0x7 0x1 0x3d 0x8 0x1 0x3d 0x9 0x1 0x3d 0xa 0x1 0x3d 0xb 0x1 0x3d 0xc 0x1 0x3d 0xd 0x1 0x3d 0xe 0x1>; |
1531 | dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15"; |
1532 | }; |
1533 | |
1534 | usb-phy@47401b00 { |
1535 | compatible = "ti,am335x-usb-phy"; |
1536 | reg = <0x47401b00 0x100>; |
1537 | reg-names = "phy"; |
1538 | status = "okay"; |
1539 | ti,ctrl_mod = <0x3b>; |
1540 | linux,phandle = <0x3e>; |
1541 | phandle = <0x3e>; |
1542 | }; |
1543 | |
1544 | usb@47401800 { |
1545 | compatible = "ti,musb-am33xx"; |
1546 | status = "okay"; |
1547 | reg = <0x47401c00 0x400 0x47401800 0x200>; |
1548 | reg-names = "mc", "control"; |
1549 | interrupts = <0x13>; |
1550 | interrupt-names = "mc"; |
1551 | dr_mode = "host"; |
1552 | mentor,multipoint = <0x1>; |
1553 | mentor,num-eps = <0x10>; |
1554 | mentor,ram-bits = <0xc>; |
1555 | mentor,power = <0x1f4>; |
1556 | phys = <0x3e>; |
1557 | dmas = <0x3d 0xf 0x0 0x3d 0x10 0x0 0x3d 0x11 0x0 0x3d 0x12 0x0 0x3d 0x13 0x0 0x3d 0x14 0x0 0x3d 0x15 0x0 0x3d 0x16 0x0 0x3d 0x17 0x0 0x3d 0x18 0x0 0x3d 0x19 0x0 0x3d 0x1a 0x0 0x3d 0x1b 0x0 0x3d 0x1c 0x0 0x3d 0x1d 0x0 0x3d 0xf 0x1 0x3d 0x10 0x1 0x3d 0x11 0x1 0x3d 0x12 0x1 0x3d 0x13 0x1 0x3d 0x14 0x1 0x3d 0x15 0x1 0x3d 0x16 0x1 0x3d 0x17 0x1 0x3d 0x18 0x1 0x3d 0x19 0x1 0x3d 0x1a 0x1 0x3d 0x1b 0x1 0x3d 0x1c 0x1 0x3d 0x1d 0x1>; |
1558 | dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15"; |
1559 | }; |
1560 | |
1561 | dma-controller@47402000 { |
1562 | compatible = "ti,am3359-cppi41"; |
1563 | reg = <0x47400000 0x1000 0x47402000 0x1000 0x47403000 0x1000 0x47404000 0x4000>; |
1564 | reg-names = "glue", "controller", "scheduler", "queuemgr"; |
1565 | interrupts = <0x11>; |
1566 | interrupt-names = "glue"; |
1567 | #dma-cells = <0x2>; |
1568 | #dma-channels = <0x1e>; |
1569 | #dma-requests = <0x100>; |
1570 | status = "okay"; |
1571 | linux,phandle = <0x3d>; |
1572 | phandle = <0x3d>; |
1573 | }; |
1574 | }; |
1575 | |
1576 | epwmss@48300000 { |
1577 | compatible = "ti,am33xx-pwmss"; |
1578 | reg = <0x48300000 0x10>; |
1579 | ti,hwmods = "epwmss0"; |
1580 | #address-cells = <0x1>; |
1581 | #size-cells = <0x1>; |
1582 | status = "disabled"; |
1583 | ranges = <0x48300100 0x48300100 0x80 0x48300180 0x48300180 0x80 0x48300200 0x48300200 0x80>; |
1584 | |
1585 | ecap@48300100 { |
1586 | compatible = "ti,am3352-ecap", "ti,am33xx-ecap"; |
1587 | #pwm-cells = <0x3>; |
1588 | reg = <0x48300100 0x80>; |
1589 | clocks = <0x25>; |
1590 | clock-names = "fck"; |
1591 | interrupts = <0x1f>; |
1592 | interrupt-names = "ecap0"; |
1593 | status = "disabled"; |
1594 | }; |
1595 | |
1596 | pwm@48300200 { |
1597 | compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; |
1598 | #pwm-cells = <0x3>; |
1599 | reg = <0x48300200 0x80>; |
1600 | clocks = <0x3f 0x25>; |
1601 | clock-names = "tbclk", "fck"; |
1602 | status = "disabled"; |
1603 | }; |
1604 | }; |
1605 | |
1606 | epwmss@48302000 { |
1607 | compatible = "ti,am33xx-pwmss"; |
1608 | reg = <0x48302000 0x10>; |
1609 | ti,hwmods = "epwmss1"; |
1610 | #address-cells = <0x1>; |
1611 | #size-cells = <0x1>; |
1612 | status = "disabled"; |
1613 | ranges = <0x48302100 0x48302100 0x80 0x48302180 0x48302180 0x80 0x48302200 0x48302200 0x80>; |
1614 | |
1615 | ecap@48302100 { |
1616 | compatible = "ti,am3352-ecap", "ti,am33xx-ecap"; |
1617 | #pwm-cells = <0x3>; |
1618 | reg = <0x48302100 0x80>; |
1619 | clocks = <0x25>; |
1620 | clock-names = "fck"; |
1621 | interrupts = <0x2f>; |
1622 | interrupt-names = "ecap1"; |
1623 | status = "disabled"; |
1624 | }; |
1625 | |
1626 | pwm@48302200 { |
1627 | compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; |
1628 | #pwm-cells = <0x3>; |
1629 | reg = <0x48302200 0x80>; |
1630 | clocks = <0x40 0x25>; |
1631 | clock-names = "tbclk", "fck"; |
1632 | status = "disabled"; |
1633 | }; |
1634 | }; |
1635 | |
1636 | epwmss@48304000 { |
1637 | compatible = "ti,am33xx-pwmss"; |
1638 | reg = <0x48304000 0x10>; |
1639 | ti,hwmods = "epwmss2"; |
1640 | #address-cells = <0x1>; |
1641 | #size-cells = <0x1>; |
1642 | status = "disabled"; |
1643 | ranges = <0x48304100 0x48304100 0x80 0x48304180 0x48304180 0x80 0x48304200 0x48304200 0x80>; |
1644 | |
1645 | ecap@48304100 { |
1646 | compatible = "ti,am3352-ecap", "ti,am33xx-ecap"; |
1647 | #pwm-cells = <0x3>; |
1648 | reg = <0x48304100 0x80>; |
1649 | clocks = <0x25>; |
1650 | clock-names = "fck"; |
1651 | interrupts = <0x3d>; |
1652 | interrupt-names = "ecap2"; |
1653 | status = "disabled"; |
1654 | }; |
1655 | |
1656 | pwm@48304200 { |
1657 | compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; |
1658 | #pwm-cells = <0x3>; |
1659 | reg = <0x48304200 0x80>; |
1660 | clocks = <0x41 0x25>; |
1661 | clock-names = "tbclk", "fck"; |
1662 | status = "disabled"; |
1663 | }; |
1664 | }; |
1665 | |
1666 | ethernet@4a100000 { |
1667 | compatible = "ti,am335x-cpsw", "ti,cpsw"; |
1668 | ti,hwmods = "cpgmac0"; |
1669 | clocks = <0x42 0x43>; |
1670 | clock-names = "fck", "cpts"; |
1671 | cpdma_channels = <0x8>; |
1672 | ale_entries = <0x400>; |
1673 | bd_ram_size = <0x2000>; |
1674 | no_bd_ram = <0x0>; |
1675 | mac_control = <0x20>; |
1676 | slaves = <0x1>; |
1677 | active_slave = <0x0>; |
1678 | cpts_clock_mult = <0x80000000>; |
1679 | cpts_clock_shift = <0x1d>; |
1680 | reg = <0x4a100000 0x800 0x4a101200 0x100>; |
1681 | #address-cells = <0x1>; |
1682 | #size-cells = <0x1>; |
1683 | interrupt-parent = <0x1>; |
1684 | interrupts = <0x28 0x29 0x2a 0x2b>; |
1685 | ranges; |
1686 | syscon = <0x39>; |
1687 | status = "okay"; |
1688 | pinctrl-names = "default", "sleep"; |
1689 | pinctrl-0 = <0x44>; |
1690 | pinctrl-1 = <0x45>; |
1691 | |
1692 | mdio@4a101000 { |
1693 | compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; |
1694 | #address-cells = <0x1>; |
1695 | #size-cells = <0x0>; |
1696 | ti,hwmods = "davinci_mdio"; |
1697 | bus_freq = <0xf4240>; |
1698 | reg = <0x4a101000 0x100>; |
1699 | status = "okay"; |
1700 | pinctrl-names = "default", "sleep"; |
1701 | pinctrl-0 = <0x46>; |
1702 | pinctrl-1 = <0x47>; |
1703 | linux,phandle = <0x48>; |
1704 | phandle = <0x48>; |
1705 | }; |
1706 | |
1707 | slave@4a100200 { |
1708 | mac-address = [00 00 00 00 00 00]; |
1709 | phy_id = <0x48 0x0>; |
1710 | phy-mode = "mii"; |
1711 | }; |
1712 | |
1713 | slave@4a100300 { |
1714 | mac-address = [00 00 00 00 00 00]; |
1715 | }; |
1716 | |
1717 | cpsw-phy-sel@44e10650 { |
1718 | compatible = "ti,am3352-cpsw-phy-sel"; |
1719 | reg = <0x44e10650 0x4>; |
1720 | reg-names = "gmii-sel"; |
1721 | }; |
1722 | }; |
1723 | |
1724 | ocmcram@40300000 { |
1725 | compatible = "mmio-sram"; |
1726 | reg = <0x40300000 0x10000>; |
1727 | }; |
1728 | |
1729 | elm@48080000 { |
1730 | compatible = "ti,am3352-elm"; |
1731 | reg = <0x48080000 0x2000>; |
1732 | interrupts = <0x4>; |
1733 | ti,hwmods = "elm"; |
1734 | status = "disabled"; |
1735 | }; |
1736 | |
1737 | lcdc@4830e000 { |
1738 | compatible = "ti,am33xx-tilcdc"; |
1739 | reg = <0x4830e000 0x1000>; |
1740 | interrupt-parent = <0x1>; |
1741 | interrupts = <0x24>; |
1742 | ti,hwmods = "lcdc"; |
1743 | status = "okay"; |
1744 | |
1745 | port { |
1746 | |
1747 | endpoint@0 { |
1748 | remote-endpoint = <0x49>; |
1749 | linux,phandle = <0x31>; |
1750 | phandle = <0x31>; |
1751 | }; |
1752 | }; |
1753 | }; |
1754 | |
1755 | tscadc@44e0d000 { |
1756 | compatible = "ti,am3359-tscadc"; |
1757 | reg = <0x44e0d000 0x1000>; |
1758 | interrupt-parent = <0x1>; |
1759 | interrupts = <0x10>; |
1760 | ti,hwmods = "adc_tsc"; |
1761 | status = "disabled"; |
1762 | |
1763 | tsc { |
1764 | compatible = "ti,am3359-tsc"; |
1765 | }; |
1766 | |
1767 | adc { |
1768 | #io-channel-cells = <0x1>; |
1769 | compatible = "ti,am3359-adc"; |
1770 | }; |
1771 | }; |
1772 | |
1773 | gpmc@50000000 { |
1774 | compatible = "ti,am3352-gpmc"; |
1775 | ti,hwmods = "gpmc"; |
1776 | ti,no-idle-on-init; |
1777 | reg = <0x50000000 0x2000>; |
1778 | interrupts = <0x64>; |
1779 | dmas = <0x29 0x34 0x0>; |
1780 | dma-names = "rxtx"; |
1781 | gpmc,num-cs = <0x7>; |
1782 | gpmc,num-waitpins = <0x2>; |
1783 | #address-cells = <0x2>; |
1784 | #size-cells = <0x1>; |
1785 | interrupt-controller; |
1786 | #interrupt-cells = <0x2>; |
1787 | gpio-controller; |
1788 | #gpio-cells = <0x2>; |
1789 | status = "disabled"; |
1790 | }; |
1791 | |
1792 | sham@53100000 { |
1793 | compatible = "ti,omap4-sham"; |
1794 | ti,hwmods = "sham"; |
1795 | reg = <0x53100000 0x200>; |
1796 | interrupts = <0x6d>; |
1797 | dmas = <0x29 0x24 0x0>; |
1798 | dma-names = "rx"; |
1799 | status = "okay"; |
1800 | }; |
1801 | |
1802 | aes@53500000 { |
1803 | compatible = "ti,omap4-aes"; |
1804 | ti,hwmods = "aes"; |
1805 | reg = <0x53500000 0xa0>; |
1806 | interrupts = <0x67>; |
1807 | dmas = <0x29 0x6 0x0 0x29 0x5 0x0>; |
1808 | dma-names = "tx", "rx"; |
1809 | status = "okay"; |
1810 | }; |
1811 | |
1812 | mcasp@48038000 { |
1813 | compatible = "ti,am33xx-mcasp-audio"; |
1814 | ti,hwmods = "mcasp0"; |
1815 | reg = <0x48038000 0x2000 0x46000000 0x400000>; |
1816 | reg-names = "mpu", "dat"; |
1817 | interrupts = <0x50 0x51>; |
1818 | interrupt-names = "tx", "rx"; |
1819 | status = "okay"; |
1820 | dmas = <0x29 0x8 0x2 0x29 0x9 0x2>; |
1821 | dma-names = "tx", "rx"; |
1822 | #sound-dai-cells = <0x0>; |
1823 | pinctrl-names = "default"; |
1824 | pinctrl-0 = <0x4a>; |
1825 | op-mode = <0x0>; |
1826 | tdm-slots = <0x2>; |
1827 | serial-dir = <0x0 0x0 0x1 0x0>; |
1828 | tx-num-evt = <0x20>; |
1829 | rx-num-evt = <0x20>; |
1830 | linux,phandle = <0x4f>; |
1831 | phandle = <0x4f>; |
1832 | }; |
1833 | |
1834 | mcasp@4803C000 { |
1835 | compatible = "ti,am33xx-mcasp-audio"; |
1836 | ti,hwmods = "mcasp1"; |
1837 | reg = <0x4803c000 0x2000 0x46400000 0x400000>; |
1838 | reg-names = "mpu", "dat"; |
1839 | interrupts = <0x52 0x53>; |
1840 | interrupt-names = "tx", "rx"; |
1841 | status = "disabled"; |
1842 | dmas = <0x29 0xa 0x2 0x29 0xb 0x2>; |
1843 | dma-names = "tx", "rx"; |
1844 | }; |
1845 | |
1846 | rng@48310000 { |
1847 | compatible = "ti,omap4-rng"; |
1848 | ti,hwmods = "rng"; |
1849 | reg = <0x48310000 0x2000>; |
1850 | interrupts = <0x6f>; |
1851 | }; |
1852 | }; |
1853 | |
1854 | memory@80000000 { |
1855 | device_type = "memory"; |
1856 | reg = <0x80000000 0x10000000>; |
1857 | }; |
1858 | |
1859 | chosen { |
1860 | stdout-path = "/ocp/serial@44e09000"; |
1861 | }; |
1862 | |
1863 | leds { |
1864 | pinctrl-names = "default"; |
1865 | pinctrl-0 = <0x4b>; |
1866 | compatible = "gpio-leds"; |
1867 | |
1868 | led2 { |
1869 | label = "beaglebone:green:heartbeat"; |
1870 | gpios = <0x4c 0x15 0x0>; |
1871 | linux,default-trigger = "heartbeat"; |
1872 | default-state = "off"; |
1873 | }; |
1874 | |
1875 | led3 { |
1876 | label = "beaglebone:green:mmc0"; |
1877 | gpios = <0x4c 0x16 0x0>; |
1878 | linux,default-trigger = "mmc0"; |
1879 | default-state = "off"; |
1880 | }; |
1881 | |
1882 | led4 { |
1883 | label = "beaglebone:green:usr2"; |
1884 | gpios = <0x4c 0x17 0x0>; |
1885 | linux,default-trigger = "cpu0"; |
1886 | default-state = "off"; |
1887 | }; |
1888 | |
1889 | led5 { |
1890 | label = "beaglebone:green:usr3"; |
1891 | gpios = <0x4c 0x18 0x0>; |
1892 | linux,default-trigger = "mmc1"; |
1893 | default-state = "off"; |
1894 | }; |
1895 | }; |
1896 | |
1897 | fixedregulator0 { |
1898 | compatible = "regulator-fixed"; |
1899 | regulator-name = "vmmcsd_fixed"; |
1900 | regulator-min-microvolt = <0x325aa0>; |
1901 | regulator-max-microvolt = <0x325aa0>; |
1902 | linux,phandle = <0x36>; |
1903 | phandle = <0x36>; |
1904 | }; |
1905 | |
1906 | clk_mcasp0_fixed { |
1907 | #clock-cells = <0x0>; |
1908 | compatible = "fixed-clock"; |
1909 | clock-frequency = <0x1770000>; |
1910 | linux,phandle = <0x4d>; |
1911 | phandle = <0x4d>; |
1912 | }; |
1913 | |
1914 | clk_mcasp0 { |
1915 | #clock-cells = <0x0>; |
1916 | compatible = "gpio-gate-clock"; |
1917 | clocks = <0x4d>; |
1918 | enable-gpios = <0x4c 0x1b 0x0>; |
1919 | linux,phandle = <0x50>; |
1920 | phandle = <0x50>; |
1921 | }; |
1922 | |
1923 | sound { |
1924 | compatible = "simple-audio-card"; |
1925 | simple-audio-card,name = "TI BeagleBone Black"; |
1926 | simple-audio-card,format = "i2s"; |
1927 | simple-audio-card,bitclock-master = <0x4e>; |
1928 | simple-audio-card,frame-master = <0x4e>; |
1929 | |
1930 | simple-audio-card,cpu { |
1931 | sound-dai = <0x4f>; |
1932 | clocks = <0x50>; |
1933 | linux,phandle = <0x4e>; |
1934 | phandle = <0x4e>; |
1935 | }; |
1936 | |
1937 | simple-audio-card,codec { |
1938 | sound-dai = <0x51>; |
1939 | }; |
1940 | }; |
1941 | }; |