find PHY through fdt phandle, flesh out bus handles

diff --git a/src/sys/arch/armv7/omap/ammusb.c b/src/sys/arch/armv7/omap/ammusb.c
index 3ce16cdeeb1306571f5e594fd27ca24399258b09..eedb9791ac36475c536d2f24a3f69ca729024806 100644 (file)
--- a/src/sys/arch/armv7/omap/ammusb.c
+++ b/src/sys/arch/armv7/omap/ammusb.c
@@ -50,20 +50,34 @@ int ammusb_debug = 20;
 #define DPRINTF(n,s)           do {}
 #endif
 
-#define HREAD4(sc, reg)                                                        \
-       (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
-#define HWRITE4(sc, reg, val)                                          \
-       bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
-#define HSET4(sc, reg, bits)                                           \
-       HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
-#define HCLR4(sc, reg, bits)                                           \
-       HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
+#define HREAD4(sc, handle, reg)                                                        \
+       (bus_space_read_4((sc)->sc_iot, (handle), (reg)))
+#define HWRITE4(sc, handle, reg, val)                                          \
+       bus_space_write_4((sc)->sc_iot, (handle), (reg), (val))
+#define HSET4(sc, handle, reg, bits)                                           \
+       HWRITE4((sc), (handle), (reg), HREAD4((sc), (reg)) | (bits))
+#define HCLR4(sc, handle, reg, bits)                                           \
+       HWRITE4((sc), (handle), (reg), HREAD4((sc), (reg)) & ~(bits))
+
+enum OTG_STATE {
+       OTG_HOST,
+       OTG_CLIENT,
+};
 
 struct ammusb_softc {
        struct device           sc_dev;
        bus_space_tag_t         sc_iot;
-       bus_space_handle_t      sc_ioh;
        void                    *sc_ih;
+
+       bus_space_handle_t      sc_ioh_ctl;
+       bus_size_t              sc_ios_ctl;
+       bus_space_handle_t      sc_ioh_core;
+       bus_size_t              sc_ios_core;
+       bus_space_handle_t      sc_ioh_phy;
+       bus_size_t              sc_ios_phy;
+
+       char                    sc_phys[32];
+       enum OTG_STATE          sc_otg_state;
 };
 
 /*  core decl */
@@ -99,17 +113,33 @@ ammusb_attach(struct device *parent, struct device *self, void *args)
        struct ammusb_softc     *sc = (struct ammusb_softc *) self;
        struct fdt_attach_args *faa = args;
 
-       uint32_t rev;
+       uint32_t rev, phy_reg[2];
+       int phy_node;
+
+       phy_node = -1;
 
        sc->sc_iot = faa->fa_iot;
+
+       /* find our corresponding PHY regs */
+       if ((phy_node = OF_getnodebyphandle(0x3c)) == -1) {
+           printf(": couldn't find PHY\n");
+           return;
+       }
+
+       OF_getpropintarray(phy_node, "reg", phy_reg, sizeof(phy_reg));
+
+       if (bus_space_map(sc->sc_iot, phy_reg[0], phy_reg[1], 0,
+           &sc->sc_ioh_phy))
+               panic("%s: bus_space_map failed!", __func__);
        if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, faa->fa_reg[0].size, 0,
-           &sc->sc_ioh))
+           &sc->sc_ioh_core))
+               panic("%s: bus_space_map failed!", __func__);
+       if (bus_space_map(sc->sc_iot, faa->fa_reg[1].addr, faa->fa_reg[1].size, 0,
+           &sc->sc_ioh_ctl))
                panic("%s: bus_space_map failed!", __func__);
 
-       rev = HREAD4(sc, 0x0);
+       rev = HREAD4(sc, sc->sc_ioh_ctl, 0x0);
        printf(": rev %d.%d\n", rev >> 4 &0xf, rev & 0xf);
-//     printf("%s: phys: 0x%08llx, size: %08llx\n", DEVNAME(sc), faa->fa_reg[0].addr,
-//         faa->fa_reg[0].size);
 }
 
 int