1 /* $OpenBSD: omap3.c,v 1.2 2013/11/06 19:03:07 syl Exp $ */
4 * Copyright (c) 2011 Uwe Stuehler <uwe@openbsd.org>
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #include <sys/types.h>
20 #include <sys/param.h>
22 #include <machine/bus.h>
24 #include <armv7/armv7/armv7var.h>
26 #define PRCM_ADDR 0x48004000
27 #define PRCM_SIZE 0x2000
29 #define INTC_ADDR 0x48200000
30 #define INTC_SIZE 0x200
32 #define GPTIMERx_SIZE 0x100
33 #define GPTIMER1_ADDR 0x48318000
34 #define GPTIMER1_IRQ 37
35 #define GPTIMER2_ADDR 0x49032000
36 #define GPTIMER2_IRQ 38
38 #define WD_ADDR 0x48314000
41 #define GPIOx_SIZE 0x1000
42 #define GPIO1_ADDR 0x48310000
43 #define GPIO2_ADDR 0x49050000
44 #define GPIO3_ADDR 0x49052000
45 #define GPIO4_ADDR 0x49054000
46 #define GPIO5_ADDR 0x49056000
47 #define GPIO6_ADDR 0x49058000
56 #define UARTx_SIZE 0x400
57 #define UART1_ADDR 0x4806A000
58 #define UART2_ADDR 0x4806C000
59 #define UART3_ADDR 0x49020000
65 #define HSMMCx_SIZE 0x200
66 #define HSMMC1_ADDR 0x4809c000
69 #define USBTLL_ADDR 0x48062000
70 #define USBTLL_SIZE 0x1000
72 struct armv7_dev omap3_devs
[] = {
75 * Power, Reset and Clock Manager
80 .mem
= { { PRCM_ADDR
, PRCM_SIZE
} },
84 * Interrupt Controller
89 .mem
= { { INTC_ADDR
, INTC_SIZE
} },
93 * General Purpose Timers
97 .unit
= 1, /* XXX see gptimer.c */
98 .mem
= { { GPTIMER1_ADDR
, GPTIMERx_SIZE
} },
99 .irq
= { GPTIMER1_IRQ
}
103 .unit
= 0, /* XXX see gptimer.c */
104 .mem
= { { GPTIMER2_ADDR
, GPTIMERx_SIZE
} },
105 .irq
= { GPTIMER2_IRQ
}
114 .mem
= { { GPIO1_ADDR
, GPIOx_SIZE
} },
120 .mem
= { { GPIO2_ADDR
, GPIOx_SIZE
} },
126 .mem
= { { GPIO3_ADDR
, GPIOx_SIZE
} },
132 .mem
= { { GPIO4_ADDR
, GPIOx_SIZE
} },
138 .mem
= { { GPIO5_ADDR
, GPIOx_SIZE
} },
144 .mem
= { { GPIO6_ADDR
, GPIOx_SIZE
} },
154 .mem
= { { WD_ADDR
, WD_SIZE
} }
163 .mem
= { { UART3_ADDR
, UARTx_SIZE
} },
173 .mem
= { { HSMMC1_ADDR
, HSMMCx_SIZE
} },
174 .irq
= { HSMMC1_IRQ
}
181 { .name
= "omusbtll",
183 .mem
= { { USBTLL_ADDR
, USBTLL_SIZE
} },
195 armv7_set_devs(omap3_devs
);