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1 | /* |
2 | * Copyright (c) 2017 Ian Sutton <ian@ce.gl> |
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3 | * Copyright (c) 2008 Hans Petter Selasky. All rights reserved. |
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4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
8 | * 1. Redistributions of source code must retain the above copyright |
9 | * notice, this list of conditions and the following disclaimer. |
10 | * 2. Redistributions in binary form must reproduce the above copyright |
11 | * notice, this list of conditions and the following disclaimer in the |
12 | * documentation and/or other materials provided with the distribution. |
13 | * |
14 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
15 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
16 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
17 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
18 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
19 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
20 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
21 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
22 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
23 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
24 | * SUCH DAMAGE. |
25 | */ |
26 | |
27 | #include <sys/param.h> |
28 | #include <sys/systm.h> |
29 | #include <sys/device.h> |
30 | #include <sys/kernel.h> |
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31 | #include <sys/rwlock.h> |
32 | |
33 | #include <machine/intr.h> |
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34 | |
35 | #include <dev/ofw/openfirm.h> |
36 | #include <dev/ofw/fdt.h> |
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37 | #include <machine/fdt.h> |
38 | |
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39 | #include <dev/usb/usb.h> |
40 | #include <dev/usb/usbdi.h> |
41 | #include <dev/usb/usbdivar.h> |
42 | #include <dev/usb/usb_mem.h> |
43 | #include <dev/usb/ehcireg.h> |
44 | #include <dev/usb/ehcivar.h> |
45 | |
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46 | #include <armv7/omap/prcmvar.h> |
47 | #include <armv7/omap/sitara_cm.h> |
48 | |
49 | #include <arm/simplebus/simplebusvar.h> |
50 | |
51 | #define DEVNAME(_s) ((_s)->sc_dev.dv_xname) |
52 | |
53 | #define AMMUSB_DEBUG /* XXX */ |
54 | |
55 | #ifdef AMMUSB_DEBUG |
56 | int ammusb_debug = 20; |
57 | #define DPRINTF(n,s) do { if ((n) <= ammusb_debug) printf s; } while (0) |
58 | #else |
59 | #define DPRINTF(n,s) do {} |
60 | #endif |
61 | |
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62 | #define HREAD4(sc, handle, reg) \ |
63 | (bus_space_read_4((sc)->sc_iot, (handle), (reg))) |
64 | #define HWRITE4(sc, handle, reg, val) \ |
65 | bus_space_write_4((sc)->sc_iot, (handle), (reg), (val)) |
66 | #define HSET4(sc, handle, reg, bits) \ |
67 | HWRITE4((sc), (handle), (reg), HREAD4((sc), (reg)) | (bits)) |
68 | #define HCLR4(sc, handle, reg, bits) \ |
69 | HWRITE4((sc), (handle), (reg), HREAD4((sc), (reg)) & ~(bits)) |
70 | |
71 | enum OTG_STATE { |
72 | OTG_HOST, |
73 | OTG_CLIENT, |
74 | }; |
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75 | |
76 | struct ammusb_softc { |
77 | struct device sc_dev; |
78 | bus_space_tag_t sc_iot; |
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79 | void *sc_ih; |
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80 | |
81 | bus_space_handle_t sc_ioh_ctl; |
82 | bus_size_t sc_ios_ctl; |
83 | bus_space_handle_t sc_ioh_core; |
84 | bus_size_t sc_ios_core; |
85 | bus_space_handle_t sc_ioh_phy; |
86 | bus_size_t sc_ios_phy; |
87 | |
88 | char sc_phys[32]; |
89 | enum OTG_STATE sc_otg_state; |
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90 | }; |
91 | |
92 | /* core decl */ |
93 | int ammusb_match(struct device *, void *, void *); |
94 | void ammusb_attach(struct device *, struct device *, void *); |
95 | int ammusb_detach(struct device *, int); |
96 | int ammusb_intr(void *); |
97 | void ammusb_reset(struct ammusb_softc *); |
98 | |
99 | /* debug decl */ |
100 | void ammusb_preg(uint32_t, char *, struct ammusb_softc *); |
101 | void ammusb_dumpregs(struct ammusb_softc *); |
102 | |
103 | /* core/iomux.c def */ |
104 | struct cfattach ammusb_ca = { |
105 | sizeof (struct ammusb_softc), ammusb_match, ammusb_attach, ammusb_detach |
106 | }; |
107 | |
108 | struct cfdriver ammusb_cd = { |
109 | NULL, "ammusb", DV_DULL |
110 | }; |
111 | |
112 | int |
113 | ammusb_match(struct device *parent, void *v, void *aux) |
114 | { |
115 | struct fdt_attach_args *faa = aux; |
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116 | return OF_is_compatible(faa->fa_node, "ti,musb-am33xx"); |
117 | } |
118 | |
119 | void |
120 | ammusb_attach(struct device *parent, struct device *self, void *args) |
121 | { |
122 | struct ammusb_softc *sc = (struct ammusb_softc *) self; |
123 | struct fdt_attach_args *faa = args; |
124 | |
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125 | uint32_t rev, phy_reg[2]; |
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126 | int phy_node = -1, irq; |
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127 | |
128 | sc->sc_iot = faa->fa_iot; |
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129 | |
130 | /* find our corresponding PHY regs */ |
131 | if ((phy_node = OF_getnodebyphandle(0x3c)) == -1) { |
132 | printf(": couldn't find PHY\n"); |
133 | return; |
134 | } |
135 | |
136 | OF_getpropintarray(phy_node, "reg", phy_reg, sizeof(phy_reg)); |
137 | |
138 | if (bus_space_map(sc->sc_iot, phy_reg[0], phy_reg[1], 0, |
139 | &sc->sc_ioh_phy)) |
140 | panic("%s: bus_space_map failed!", __func__); |
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141 | if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, faa->fa_reg[0].size, 0, |
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142 | &sc->sc_ioh_core)) |
143 | panic("%s: bus_space_map failed!", __func__); |
144 | if (bus_space_map(sc->sc_iot, faa->fa_reg[1].addr, faa->fa_reg[1].size, 0, |
145 | &sc->sc_ioh_ctl)) |
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146 | panic("%s: bus_space_map failed!", __func__); |
147 | |
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148 | irq = faa->fa_intr[0]; |
149 | sc->sc_ih = arm_intr_establish(irq, IPL_BIO, ammusb_intr, sc, DEVNAME(sc)); |
150 | |
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151 | /* not the right revision number XXX */ |
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152 | rev = HREAD4(sc, sc->sc_ioh_ctl, 0x0); |
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153 | printf(": rev %d.%d\n", rev >> 4 &0xf, rev & 0xf); |
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154 | |
155 | sc->sc_ih = arm_intr_establish_fdt(faa->fa_node, IPL_USB, ehci_intr, |
156 | &sc->sc_dev, DEVNAME(sc)); |
157 | |
158 | /* XXX set OTG state here */ |
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159 | } |
160 | |
161 | int |
162 | ammusb_detach(struct device *self, int flags) |
163 | { |
164 | return 0; /* XXX */ |
165 | } |
166 | |
167 | int |
168 | ammusb_intr(void * arg) |
169 | { |
170 | return 0; /* XXX */ |
171 | } |