add ammusb.h
[bbb-usb.git] / src / sys / arch / armv7 / omap / amusbss.c
CommitLineData
efe0ef7b 1/*
2 * Copyright (c) 2017 Ian Sutton <ian@ce.gl>
3 * Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
dd3fbf43 25 *
26 * USB subsystem driver for am335x. Derived from FreeBSD version.
efe0ef7b 27 */
28
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/device.h>
32#include <sys/kernel.h>
33
34#include <dev/ofw/openfirm.h>
35#include <dev/ofw/fdt.h>
36
37#include <machine/fdt.h>
38
39#include <arm/simplebus/simplebusvar.h>
40
41#include <armv7/omap/prcmvar.h>
42
43#define DEVNAME(_s) ((_s)->sc_dev.dv_xname)
44
45#define AMUSBSS_DEBUG /* XXX */
46
47#ifdef AMUSBSS_DEBUG
48int amusbss_debug = 20;
49#define DPRINTF(n,s) do { if ((n) <= amusbss_debug) printf s; } while (0)
50#else
51#define DPRINTF(n,s) do {}
52#endif
53
54#define HREAD4(sc, reg) \
55 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
56#define HWRITE4(sc, reg, val) \
57 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
58#define HSET4(sc, reg, bits) \
59 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
60#define HCLR4(sc, reg, bits) \
61 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
62
63#define USBSS_REVREG 0x00
64#define USBSS_SYSCONFIG 0x10
65#define USBSS_SYSCONFIG_SRESET 1
66
67#define USBCTRL_REV 0x00
68#define USBCTRL_CTRL 0x14
69#define USBCTRL_STAT 0x18
70#define USBCTRL_IRQ_STAT0 0x30
71#define IRQ_STAT0_RXSHIFT 16
72#define IRQ_STAT0_TXSHIFT 0
73#define USBCTRL_IRQ_STAT1 0x34
74#define IRQ_STAT1_DRVVBUS (1 << 8)
75#define USBCTRL_INTEN_SET0 0x38
76#define USBCTRL_INTEN_SET1 0x3C
77#define USBCTRL_INTEN_USB_ALL 0x1ff
78#define USBCTRL_INTEN_USB_SOF (1 << 3)
79#define USBCTRL_INTEN_CLR0 0x40
80#define USBCTRL_INTEN_CLR1 0x44
81#define USBCTRL_UTMI 0xE0
82#define USBCTRL_UTMI_FSDATAEXT (1 << 1)
83#define USBCTRL_MODE 0xE8
84#define USBCTRL_MODE_IDDIG (1 << 8)
85#define USBCTRL_MODE_IDDIGMUX (1 << 7)
86
87struct amusbss_softc {
88 struct device sc_dev;
efe0ef7b 89 bus_space_tag_t sc_iot;
dceeb2f4 90 void *sc_ih;
91 bus_dma_tag_t sc_dmat;
efe0ef7b 92 bus_space_handle_t sc_ioh;
dceeb2f4 93 bus_size_t sc_ios;
94 bus_space_handle_t sc_ioh_dma_ctl;
95 bus_size_t sc_ios_dma_ctl;
96 bus_space_handle_t sc_ioh_dma_sched;
97 bus_size_t sc_ios_dma_sched;
98 bus_space_handle_t sc_ioh_queue;
99 bus_size_t sc_ios_queue;
efe0ef7b 100};
101
dd3fbf43 102/* core decl */
efe0ef7b 103int amusbss_match(struct device *, void *, void *);
104void amusbss_attach(struct device *, struct device *, void *);
105int amusbss_detach(struct device *, int);
106void amusbss_reset(struct amusbss_softc *);
107
dceeb2f4 108void amusbss_map_dma(int);
109
dd3fbf43 110/* debug decl */
efe0ef7b 111void amusbss_preg(uint32_t, char *, struct amusbss_softc *);
112void amusbss_dumpregs(struct amusbss_softc *);
113
dd3fbf43 114/* core/iomux.c defs */
efe0ef7b 115struct cfattach amusbss_ca = {
116 sizeof (struct amusbss_softc), amusbss_match, amusbss_attach, amusbss_detach
117};
118
119struct cfdriver amusbss_cd = {
120 NULL, "amusbss", DV_DULL
121};
122
123int
124amusbss_match(struct device *parent, void *v, void *aux)
125{
126 struct fdt_attach_args *faa = aux;
efe0ef7b 127 return OF_is_compatible(faa->fa_node, "ti,am33xx-usb");
128}
129
130void
131amusbss_attach(struct device *parent, struct device *self, void *args)
132{
133 struct amusbss_softc *sc = (struct amusbss_softc *) self;
134 struct fdt_attach_args *faa = args;
efe0ef7b 135 int i, node;
136 uint32_t rev;
137
efe0ef7b 138 sc->sc_iot = faa->fa_iot;
139 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, faa->fa_reg[0].size, 0,
140 &sc->sc_ioh))
141 panic("%s: bus_space_map failed!", __func__);
142
dceeb2f4 143 sc->sc_ios = faa->fa_reg[0].size;
144
efe0ef7b 145 /* Enable device clocks */
146 prcm_enablemodule(PRCM_USB);
147
148 /* Reset USB subsystem, USB0 and USB1 */
149 HWRITE4(sc, USBSS_SYSCONFIG, USBSS_SYSCONFIG_SRESET);
150 delay(100);
151 i = 10;
152 while (HREAD4(sc, USBSS_SYSCONFIG) & USBSS_SYSCONFIG_SRESET) {
153 delay(100);
154 if (i-- == 0) {
155 printf(": reset timeout.\n");
156 return;
157 }
158 }
159
160 rev = HREAD4(sc, USBSS_REVREG);
161 printf(": rev %d.%d\n", rev >> 4 &0xf, rev & 0xf);
162
dceeb2f4 163 /* Walk FDT child nodes to attach ammusb devices, map DMA controllers */
164 for (node = OF_child(faa->fa_node); node > 0; node = OF_peer(node)) {
165 if (OF_is_compatible(node, "ti,am3359-cppi41")) {
166 amusbss_map_dma(node);
167 } else {
168 simplebus_attach_node(parent, node);
169 }
170 }
efe0ef7b 171}
172
173int
174amusbss_detach(struct device *self, int flags)
175{
dceeb2f4 176 struct amusbss_softc *sc = (struct amusbss_softc *) self;
177
178 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
179
180 if (sc->sc_ioh_dma_ctl)
181 bus_space_unmap(sc->sc_iot, sc->sc_ioh_dma_ctl, sc->sc_ios_dma_ctl);
182 if (sc->sc_ioh_dma_sched)
183 bus_space_unmap(sc->sc_iot, sc->sc_ioh_dma_sched, sc->sc_ios_dma_sched);
184 if (sc->sc_ioh_queue)
185 bus_space_unmap(sc->sc_iot, sc->sc_ioh_queue, sc->sc_ios_queue);
186
187 return 0;
efe0ef7b 188}
189
dceeb2f4 190void
191amusbss_map_dma(int node)
192{
193 /* XXX TODO */
194}