initial
[esdi.git] / esdi.runs / impl_1 / esdi_ctl_phy.tcl
1 #
2 # Report generation script generated by Vivado
3 #
4
5 proc create_report { reportName command } {
6 set status "."
7 append status $reportName ".fail"
8 if { [file exists $status] } {
9 eval file delete [glob $status]
10 }
11 send_msg_id runtcl-4 info "Executing : $command"
12 set retval [eval catch { $command } msg]
13 if { $retval != 0 } {
14 set fp [open $status w]
15 close $fp
16 send_msg_id runtcl-5 warning "$msg"
17 }
18 }
19 proc start_step { step } {
20 set stopFile ".stop.rst"
21 if {[file isfile .stop.rst]} {
22 puts ""
23 puts "*** Halting run - EA reset detected ***"
24 puts ""
25 puts ""
26 return -code error
27 }
28 set beginFile ".$step.begin.rst"
29 set platform "$::tcl_platform(platform)"
30 set user "$::tcl_platform(user)"
31 set pid [pid]
32 set host ""
33 if { [string equal $platform unix] } {
34 if { [info exist ::env(HOSTNAME)] } {
35 set host $::env(HOSTNAME)
36 }
37 } else {
38 if { [info exist ::env(COMPUTERNAME)] } {
39 set host $::env(COMPUTERNAME)
40 }
41 }
42 set ch [open $beginFile w]
43 puts $ch "<?xml version=\"1.0\"?>"
44 puts $ch "<ProcessHandle Version=\"1\" Minor=\"0\">"
45 puts $ch " <Process Command=\".planAhead.\" Owner=\"$user\" Host=\"$host\" Pid=\"$pid\">"
46 puts $ch " </Process>"
47 puts $ch "</ProcessHandle>"
48 close $ch
49 }
50
51 proc end_step { step } {
52 set endFile ".$step.end.rst"
53 set ch [open $endFile w]
54 close $ch
55 }
56
57 proc step_failed { step } {
58 set endFile ".$step.error.rst"
59 set ch [open $endFile w]
60 close $ch
61 }
62
63
64 start_step init_design
65 set ACTIVE_STEP init_design
66 set rc [catch {
67 create_msg_db init_design.pb
68 set_param chipscope.maxJobs 6
69 create_project -in_memory -part xc7z007sclg225-1
70 set_property board_part_repo_paths {C:/Users/kremlin/AppData/Roaming/Xilinx/Vivado/2019.1/xhub/board_store} [current_project]
71 set_property board_part em.avnet.com:minized:part0:1.2 [current_project]
72 set_property design_mode GateLvl [current_fileset]
73 set_param project.singleFileAddWarning.threshold 0
74 set_property webtalk.parent_dir S:/vivado-projects/esdi/esdi/esdi.cache/wt [current_project]
75 set_property parent.project_path S:/vivado-projects/esdi/esdi/esdi.xpr [current_project]
76 set_property ip_output_repo S:/vivado-projects/esdi/esdi/esdi.cache/ip [current_project]
77 set_property ip_cache_permissions {read write} [current_project]
78 add_files -quiet S:/vivado-projects/esdi/esdi/esdi.runs/synth_1/esdi_ctl_phy.dcp
79 link_design -top esdi_ctl_phy -part xc7z007sclg225-1
80 close_msg_db -file init_design.pb
81 } RESULT]
82 if {$rc} {
83 step_failed init_design
84 return -code error $RESULT
85 } else {
86 end_step init_design
87 unset ACTIVE_STEP
88 }
89
90 start_step opt_design
91 set ACTIVE_STEP opt_design
92 set rc [catch {
93 create_msg_db opt_design.pb
94 opt_design
95 write_checkpoint -force esdi_ctl_phy_opt.dcp
96 create_report "impl_1_opt_report_drc_0" "report_drc -file esdi_ctl_phy_drc_opted.rpt -pb esdi_ctl_phy_drc_opted.pb -rpx esdi_ctl_phy_drc_opted.rpx"
97 close_msg_db -file opt_design.pb
98 } RESULT]
99 if {$rc} {
100 step_failed opt_design
101 return -code error $RESULT
102 } else {
103 end_step opt_design
104 unset ACTIVE_STEP
105 }
106
107 start_step place_design
108 set ACTIVE_STEP place_design
109 set rc [catch {
110 create_msg_db place_design.pb
111 if { [llength [get_debug_cores -quiet] ] > 0 } {
112 implement_debug_core
113 }
114 place_design
115 write_checkpoint -force esdi_ctl_phy_placed.dcp
116 create_report "impl_1_place_report_io_0" "report_io -file esdi_ctl_phy_io_placed.rpt"
117 create_report "impl_1_place_report_utilization_0" "report_utilization -file esdi_ctl_phy_utilization_placed.rpt -pb esdi_ctl_phy_utilization_placed.pb"
118 create_report "impl_1_place_report_control_sets_0" "report_control_sets -verbose -file esdi_ctl_phy_control_sets_placed.rpt"
119 close_msg_db -file place_design.pb
120 } RESULT]
121 if {$rc} {
122 step_failed place_design
123 return -code error $RESULT
124 } else {
125 end_step place_design
126 unset ACTIVE_STEP
127 }
128
129 start_step route_design
130 set ACTIVE_STEP route_design
131 set rc [catch {
132 create_msg_db route_design.pb
133 route_design
134 write_checkpoint -force esdi_ctl_phy_routed.dcp
135 create_report "impl_1_route_report_drc_0" "report_drc -file esdi_ctl_phy_drc_routed.rpt -pb esdi_ctl_phy_drc_routed.pb -rpx esdi_ctl_phy_drc_routed.rpx"
136 create_report "impl_1_route_report_methodology_0" "report_methodology -file esdi_ctl_phy_methodology_drc_routed.rpt -pb esdi_ctl_phy_methodology_drc_routed.pb -rpx esdi_ctl_phy_methodology_drc_routed.rpx"
137 create_report "impl_1_route_report_power_0" "report_power -file esdi_ctl_phy_power_routed.rpt -pb esdi_ctl_phy_power_summary_routed.pb -rpx esdi_ctl_phy_power_routed.rpx"
138 create_report "impl_1_route_report_route_status_0" "report_route_status -file esdi_ctl_phy_route_status.rpt -pb esdi_ctl_phy_route_status.pb"
139 create_report "impl_1_route_report_timing_summary_0" "report_timing_summary -max_paths 10 -file esdi_ctl_phy_timing_summary_routed.rpt -pb esdi_ctl_phy_timing_summary_routed.pb -rpx esdi_ctl_phy_timing_summary_routed.rpx -warn_on_violation "
140 create_report "impl_1_route_report_incremental_reuse_0" "report_incremental_reuse -file esdi_ctl_phy_incremental_reuse_routed.rpt"
141 create_report "impl_1_route_report_clock_utilization_0" "report_clock_utilization -file esdi_ctl_phy_clock_utilization_routed.rpt"
142 create_report "impl_1_route_report_bus_skew_0" "report_bus_skew -warn_on_violation -file esdi_ctl_phy_bus_skew_routed.rpt -pb esdi_ctl_phy_bus_skew_routed.pb -rpx esdi_ctl_phy_bus_skew_routed.rpx"
143 close_msg_db -file route_design.pb
144 } RESULT]
145 if {$rc} {
146 write_checkpoint -force esdi_ctl_phy_routed_error.dcp
147 step_failed route_design
148 return -code error $RESULT
149 } else {
150 end_step route_design
151 unset ACTIVE_STEP
152 }
153