tashw-cache.lib

   1 EESchema-LIBRARY Version 2.4
   2 #encoding utf-8
   3 #
   4 # AM3358BZCZ100_AM3358BZCZ100
   5 #
   6 DEF AM3358BZCZ100_AM3358BZCZ100 U 0 40 Y Y 6 L N
   7 F0 "U" -800 900 50 H V L BNN
   8 F1 "AM3358BZCZ100_AM3358BZCZ100" -801 -1301 50 H V L BNN
   9 F2 "BGA324C80P18X18_1500X1500X140" 0 0 50 H I L BNN
  10 F3 "Unavailable" 0 0 50 H I L BNN
  11 F4 "Texas Instruments" 0 0 50 H I L BNN
  12 F5 "AM3358BZCZ100" 0 0 50 H I L BNN
  13 F6 "MPU AM335x RISC 32-Bit 1000MHz 1.8V/3.3V 324-Pin NFBGA" 0 0 50 H I L BNN
  14 F7 "NFBGA-324 Texas Instruments" 0 0 50 H I L BNN
  15 F8 "None" 0 0 50 H I L BNN
  16 DRAW
  17 P 2 1 0 10 -800 -1200 -800 900 N
  18 P 2 1 0 10 -800 900 1000 900 N
  19 P 2 1 0 10 1000 -1200 -800 -1200 N
  20 P 2 1 0 10 1000 900 1000 -1200 N
  21 P 2 2 0 10 -900 -1200 -900 1500 N
  22 P 2 2 0 10 -900 1500 1000 1500 N
  23 P 2 2 0 10 1000 -1200 -900 -1200 N
  24 P 2 2 0 10 1000 1500 1000 -1200 N
  25 P 2 3 0 10 -800 -800 -800 900 N
  26 P 2 3 0 10 -800 900 800 900 N
  27 P 2 3 0 10 800 -800 -800 -800 N
  28 P 2 3 0 10 800 900 800 -800 N
  29 P 2 4 0 10 -600 -1600 -600 1300 N
  30 P 2 4 0 10 -600 1300 600 1300 N
  31 P 2 4 0 10 600 -1600 -600 -1600 N
  32 P 2 4 0 10 600 1300 600 -1600 N
  33 P 2 5 0 10 -700 -1400 -700 1000 N
  34 P 2 5 0 10 -700 1000 700 1000 N
  35 P 2 5 0 10 700 -1400 -700 -1400 N
  36 P 2 5 0 10 700 1000 700 -1400 N
  37 P 2 6 0 10 -800 -1100 -800 1200 N
  38 P 2 6 0 10 -800 1200 800 1200 N
  39 P 2 6 0 10 800 -1100 -800 -1100 N
  40 P 2 6 0 10 800 1200 800 -1100 N
  41 X VSS A1 1200 -1100 200 L 40 40 1 0 W
  42 X VSS A18 1200 -1100 200 L 40 40 1 0 W
  43 X VDD_MPU_MON A2 -1000 500 200 R 40 40 1 0 W
  44 X VSS_RTC A5 1200 -1000 200 L 40 40 1 0 W
  45 X CAP_VBB_MPU C10 1200 -200 200 L 40 40 1 0 W
  46 X VDDS_SRAM_MPU_BB D10 1200 0 200 L 40 40 1 0 W
  47 X CAP_VDD_SRAM_MPU D11 1200 -500 200 L 40 40 1 0 W
  48 X CAP_VDD_RTC D6 1200 -300 200 L 40 40 1 0 W
  49 X VDDS_RTC D7 1200 500 200 L 40 40 1 0 W
  50 X VDDA_ADC D8 -1000 -300 200 R 40 40 1 0 W
  51 X CAP_VDD_SRAM_CORE D9 1200 -400 200 L 40 40 1 0 W
  52 X VDDSHV6 E10 -1000 -1000 200 R 40 40 1 0 W
  53 X VDDSHV6 E11 -1000 -1000 200 R 40 40 1 0 W
  54 X VDDSHV6 E12 -1000 -1000 200 R 40 40 1 0 W
  55 X VDDSHV6 E13 -1000 -1000 200 R 40 40 1 0 W
  56 X VDDS E14 1200 800 200 L 40 40 1 0 W
  57 X VDDS_DDR E5 1200 700 200 L 40 40 1 0 W
  58 X VDDS E6 1200 800 200 L 40 40 1 0 W
  59 X VDDS_PLL_DDR E7 1200 600 200 L 40 40 1 0 W
  60 X VSSA_ADC E8 1200 -700 200 L 40 40 1 0 W
  61 X VDDS_SRAM_CORE_BG E9 1200 200 200 L 40 40 1 0 W
  62 X VDD_MPU F10 -1000 400 200 R 40 40 1 0 W
  63 X VDD_MPU F11 -1000 400 200 R 40 40 1 0 W
  64 X VDD_MPU F12 -1000 400 200 R 40 40 1 0 W
  65 X VDD_MPU F13 -1000 400 200 R 40 40 1 0 W
  66 X VDDSHV6 F14 -1000 -1000 200 R 40 40 1 0 W
  67 X VDDS_DDR F5 1200 700 200 L 40 40 1 0 W
  68 X VDD_CORE F6 -1000 300 200 R 40 40 1 0 W
  69 X VDD_CORE F7 -1000 300 200 R 40 40 1 0 W
  70 X VSS F8 1200 -1100 200 L 40 40 1 0 W
  71 X VDDS F9 1200 800 200 L 40 40 1 0 W
  72 X VDD_CORE G10 -1000 300 200 R 40 40 1 0 W
  73 X VSS G11 1200 -1100 200 L 40 40 1 0 W
  74 X VSS G12 1200 -1100 200 L 40 40 1 0 W
  75 X VDD_MPU G13 -1000 400 200 R 40 40 1 0 W
  76 X VDDSHV6 G14 -1000 -1000 200 R 40 40 1 0 W
  77 X VDDS_DDR G5 1200 700 200 L 40 40 1 0 W
  78 X VDD_CORE G6 -1000 300 200 R 40 40 1 0 W
  79 X VDD_CORE G7 -1000 300 200 R 40 40 1 0 W
  80 X VSS G8 1200 -1100 200 L 40 40 1 0 W
  81 X VSS G9 1200 -1100 200 L 40 40 1 0 W
  82 X VSS H10 1200 -1100 200 L 40 40 1 0 W
  83 X VDD_CORE H11 -1000 300 200 R 40 40 1 0 W
  84 X VSS H12 1200 -1100 200 L 40 40 1 0 W
  85 X VDD_MPU H13 -1000 400 200 R 40 40 1 0 W
  86 X VDDSHV4 H14 -1000 -800 200 R 40 40 1 0 W
  87 X VDDS_PLL_MPU H15 1200 100 200 L 40 40 1 0 W
  88 X VDDS_DDR H5 1200 700 200 L 40 40 1 0 W
  89 X VSS H6 1200 -1100 200 L 40 40 1 0 W
  90 X VSS H7 1200 -1100 200 L 40 40 1 0 W
  91 X VSS H8 1200 -1100 200 L 40 40 1 0 W
  92 X VSS H9 1200 -1100 200 L 40 40 1 0 W
  93 X VSS J10 1200 -1100 200 L 40 40 1 0 W
  94 X VSS J11 1200 -1100 200 L 40 40 1 0 W
  95 X VDD_CORE J12 -1000 300 200 R 40 40 1 0 W
  96 X VDD_MPU J13 -1000 400 200 R 40 40 1 0 W
  97 X VDDSHV4 J14 -1000 -800 200 R 40 40 1 0 W
  98 X VDDS_DDR J5 1200 700 200 L 40 40 1 0 W
  99 X VSS J6 1200 -1100 200 L 40 40 1 0 W
 100 X VSS J7 1200 -1100 200 L 40 40 1 0 W
 101 X VSS J8 1200 -1100 200 L 40 40 1 0 W
 102 X VSS J9 1200 -1100 200 L 40 40 1 0 W
 103 X VSS K10 1200 -1100 200 L 40 40 1 0 W
 104 X VSS K11 1200 -1100 200 L 40 40 1 0 W
 105 X VDD_CORE K12 -1000 300 200 R 40 40 1 0 W
 106 X VDDS K13 1200 800 200 L 40 40 1 0 W
 107 X VDDSHV5 K14 -1000 -900 200 R 40 40 1 0 W
 108 X VDDS_DDR K5 1200 700 200 L 40 40 1 0 W
 109 X VDD_CORE K6 -1000 300 200 R 40 40 1 0 W
 110 X VSS K7 1200 -1100 200 L 40 40 1 0 W
 111 X VDD_CORE K8 -1000 300 200 R 40 40 1 0 W
 112 X VSS K9 1200 -1100 200 L 40 40 1 0 W
 113 X VSS L10 1200 -1100 200 L 40 40 1 0 W
 114 X VSS L11 1200 -1100 200 L 40 40 1 0 W
 115 X VSS L12 1200 -1100 200 L 40 40 1 0 W
 116 X VSS L13 1200 -1100 200 L 40 40 1 0 W
 117 X VDDSHV5 L14 -1000 -900 200 R 40 40 1 0 W
 118 X VDDS_DDR L5 1200 700 200 L 40 40 1 0 W
 119 X VDD_CORE L6 -1000 300 200 R 40 40 1 0 W
 120 X VDD_CORE L7 -1000 300 200 R 40 40 1 0 W
 121 X VDD_CORE L8 -1000 300 200 R 40 40 1 0 W
 122 X VDD_CORE L9 -1000 300 200 R 40 40 1 0 W
 123 X VSS M10 1200 -1100 200 L 40 40 1 0 W
 124 X VDD_CORE M11 -1000 300 200 R 40 40 1 0 W
 125 X VSS M12 1200 -1100 200 L 40 40 1 0 W
 126 X VDD_CORE M13 -1000 300 200 R 40 40 1 0 W
 127 X VSSA_USB M14 1200 -800 200 L 40 40 1 0 W
 128 X VPP M5 -1000 700 200 R 40 40 1 0 W
 129 X VSS M6 1200 -1100 200 L 40 40 1 0 W
 130 X VSS M7 1200 -1100 200 L 40 40 1 0 W
 131 X VSS M8 1200 -1100 200 L 40 40 1 0 W
 132 X VSS M9 1200 -1100 200 L 40 40 1 0 W
 133 X VSS N10 1200 -1100 200 L 40 40 1 0 W
 134 X VSS N11 1200 -1100 200 L 40 40 1 0 W
 135 X VDD_CORE N12 -1000 300 200 R 40 40 1 0 W
 136 X VDD_CORE N13 -1000 300 200 R 40 40 1 0 W
 137 X VSSA_USB N14 1200 -800 200 L 40 40 1 0 W
 138 X VDDA3P3V_USB0 N15 -1000 -100 200 R 40 40 1 0 W
 139 X VDDA1P8V_USB0 N16 -1000 100 200 R 40 40 1 0 W
 140 X VDDSHV6 N5 -1000 -1000 200 R 40 40 1 0 W
 141 X VDDS N6 1200 800 200 L 40 40 1 0 W
 142 X VSS N7 1200 -1100 200 L 40 40 1 0 W
 143 X VDD_CORE N8 -1000 300 200 R 40 40 1 0 W
 144 X VDD_CORE N9 -1000 300 200 R 40 40 1 0 W
 145 X VDDSHV2 P10 -1000 -600 200 R 40 40 1 0 W
 146 X VDDSHV2 P11 -1000 -600 200 R 40 40 1 0 W
 147 X VDDSHV3 P12 -1000 -700 200 R 40 40 1 0 W
 148 X VDDSHV3 P13 -1000 -700 200 R 40 40 1 0 W
 149 X VDDS P14 1200 800 200 L 40 40 1 0 W
 150 X VDDSHV6 P5 -1000 -1000 200 R 40 40 1 0 W
 151 X VDDSHV6 P6 -1000 -1000 200 R 40 40 1 0 W
 152 X VDDSHV1 P7 -1000 -500 200 R 40 40 1 0 W
 153 X VDDSHV1 P8 -1000 -500 200 R 40 40 1 0 W
 154 X VDDS P9 1200 800 200 L 40 40 1 0 W
 155 X VDDS_PLL_CORE_LCD R10 1200 300 200 L 40 40 1 0 W
 156 X VDDS_OSC R11 1200 400 200 L 40 40 1 0 W
 157 X VDDA3P3V_USB1 R15 -1000 -200 200 R 40 40 1 0 W
 158 X VDDA1P8V_USB1 R16 -1000 0 200 R 40 40 1 0 W
 159 X VSS V1 1200 -1100 200 L 40 40 1 0 W
 160 X VSS_OSC V11 1200 -900 200 L 40 40 1 0 W
 161 X VSS V18 1200 -1100 200 L 40 40 1 0 W
 162 X TDO A11 1200 700 200 L 40 40 2 0 O
 163 X TCK A12 -1100 700 200 R 40 40 2 0 I
 164 X XDMA_EVENT_INTR0 A15 -1100 -1100 200 R 40 40 2 0 B
 165 X SPI0_CS0 A16 -1100 -300 200 R 40 40 2 0 B
 166 X SPI0_SCLK A17 -1100 -200 200 R 40 40 2 0 B C
 167 X RTC_XTALOUT A4 1200 800 200 L 40 40 2 0 O
 168 X RTC_XTALIN A6 -1100 100 200 R 40 40 2 0 I
 169 X TRSTN B10 -1100 400 200 R 40 40 2 0 I
 170 X TDI B11 -1100 600 200 R 40 40 2 0 I
 171 X EMU1 B14 1200 -900 200 L 40 40 2 0 B
 172 X SPI0_D1 B16 -1100 -600 200 R 40 40 2 0 B
 173 X SPI0_D0 B17 -1100 -500 200 R 40 40 2 0 B
 174 X EXTINTN B18 1200 -1000 200 L 40 40 2 0 B
 175 X RTC_KALDO_ENN B4 -1100 200 200 R 40 40 2 0 I
 176 X ~RTC_PWRONRSTN~ B5 -1100 0 200 R 40 40 2 0 I
 177 X TMS C11 -1100 500 200 R 40 40 2 0 I
 178 X EMU0 C14 1200 -800 200 L 40 40 2 0 B
 179 X SPI0_CS1 C15 -1100 -400 200 R 40 40 2 0 B
 180 X I2C0_SCL C16 -1100 -800 200 R 40 40 2 0 B C
 181 X I2C0_SDA C17 -1100 -900 200 R 40 40 2 0 B
 182 X ECAP0_IN_PWM0_OUT C18 1200 -700 200 L 40 40 2 0 B
 183 X EXT_WAKEUP C5 1200 -1100 200 L 40 40 2 0 B
 184 X XDMA_EVENT_INTR1 D14 -1100 -1000 200 R 40 40 2 0 B
 185 X UART1_TXD D15 1200 1100 200 L 40 40 2 0 O
 186 X UART1_RXD D16 -1100 1100 200 R 40 40 2 0 I
 187 X UART1_RTSN D17 1200 900 200 L 40 40 2 0 O
 188 X UART1_CTSN D18 -1100 900 200 R 40 40 2 0 I
 189 X UART0_RXD E15 -1100 1200 200 R 40 40 2 0 I
 190 X UART0_TXD E16 1200 1200 200 L 40 40 2 0 O
 191 X UART0_RTSN E17 1200 1000 200 L 40 40 2 0 O
 192 X UART0_CTSN E18 -1100 1000 200 R 40 40 2 0 I
 193 X USB1_DRVVBUS F15 1200 -500 200 L 40 40 2 0 B
 194 X USB0_DRVVBUS F16 1200 200 200 L 40 40 2 0 B
 195 X USB0_CE M15 1200 500 200 L 40 40 2 0 B
 196 X USB0_DP N17 1200 0 200 L 40 40 2 0 B
 197 X USB0_DM N18 1200 300 200 L 40 40 2 0 B
 198 X USB0_VBUS P15 1200 400 200 L 40 40 2 0 B
 199 X USB0_ID P16 1200 100 200 L 40 40 2 0 B
 200 X USB1_ID P17 1200 -200 200 L 40 40 2 0 B
 201 X USB1_CE P18 1200 -100 200 L 40 40 2 0 B
 202 X USB1_DP R17 1200 -400 200 L 40 40 2 0 B
 203 X USB1_DM R18 1200 -600 200 L 40 40 2 0 B
 204 X USB1_VBUS T18 1200 -300 200 L 40 40 2 0 B
 205 X XTALOUT U11 1200 1400 200 L 40 40 2 0 O
 206 X XTALIN V10 -1100 1400 200 R 40 40 2 0 I
 207 X AIN3 A7 -1000 500 200 R 40 40 3 0 I
 208 X AIN6 A8 -1000 200 200 R 40 40 3 0 I
 209 X VREFN A9 -1000 0 200 R 40 40 3 0 I
 210 X AIN0 B6 -1000 800 200 R 40 40 3 0 I
 211 X AIN2 B7 -1000 600 200 R 40 40 3 0 I
 212 X AIN5 B8 -1000 300 200 R 40 40 3 0 I
 213 X VREFP B9 -1000 -100 200 R 40 40 3 0 I
 214 X AIN1 C7 -1000 700 200 R 40 40 3 0 I
 215 X AIN4 C8 -1000 400 200 R 40 40 3 0 I
 216 X AIN7 C9 -1000 100 200 R 40 40 3 0 I
 217 X LCD_DATA0 R1 1000 800 200 L 40 40 3 0 B
 218 X LCD_DATA1 R2 1000 700 200 L 40 40 3 0 B
 219 X LCD_DATA2 R3 1000 600 200 L 40 40 3 0 B
 220 X LCD_DATA3 R4 1000 500 200 L 40 40 3 0 B
 221 X LCD_HSYNC R5 -1000 -500 200 R 40 40 3 0 O
 222 X LCD_AC_BIAS_EN R6 -1000 -400 200 R 40 40 3 0 O
 223 X LCD_DATA4 T1 1000 400 200 L 40 40 3 0 B
 224 X LCD_DATA5 T2 1000 300 200 L 40 40 3 0 B
 225 X LCD_DATA6 T3 1000 200 200 L 40 40 3 0 B
 226 X LCD_DATA7 T4 1000 100 200 L 40 40 3 0 B
 227 X LCD_DATA15 T5 1000 -700 200 L 40 40 3 0 B
 228 X LCD_DATA8 U1 1000 0 200 L 40 40 3 0 B
 229 X LCD_DATA9 U2 1000 -100 200 L 40 40 3 0 B
 230 X LCD_DATA10 U3 1000 -200 200 L 40 40 3 0 B
 231 X LCD_DATA11 U4 1000 -300 200 L 40 40 3 0 B
 232 X LCD_VSYNC U5 -1000 -700 200 R 40 40 3 0 O
 233 X LCD_DATA12 V2 1000 -400 200 L 40 40 3 0 B
 234 X LCD_DATA13 V3 1000 -500 200 L 40 40 3 0 B
 235 X LCD_DATA14 V4 1000 -600 200 L 40 40 3 0 B
 236 X LCD_PCLK V5 -1000 -600 200 R 40 40 3 0 O C
 237 X DDR_A5 B1 -800 700 200 R 40 40 4 0 O
 238 X ~DDR_WEN~ B2 -800 -1400 200 R 40 40 4 0 O
 239 X DDR_BA2 B3 -800 -700 200 R 40 40 4 0 O
 240 X DDR_A9 C1 -800 300 200 R 40 40 4 0 O
 241 X DDR_A4 C2 -800 800 200 R 40 40 4 0 O
 242 X DDR_A3 C3 -800 900 200 R 40 40 4 0 O
 243 X DDR_BA0 C4 -800 -500 200 R 40 40 4 0 O
 244 X DDR_CKN D1 -800 -1100 200 R 40 40 4 0 O
 245 X DDR_CK D2 -800 -900 200 R 40 40 4 0 O
 246 X DDR_A15 D3 -800 -300 200 R 40 40 4 0 O
 247 X DDR_A8 D4 -800 400 200 R 40 40 4 0 O
 248 X DDR_A6 D5 -800 600 200 R 40 40 4 0 O
 249 X DDR_BA1 E1 -800 -600 200 R 40 40 4 0 O
 250 X DDR_A7 E2 -800 500 200 R 40 40 4 0 O
 251 X DDR_A12 E3 -800 0 200 R 40 40 4 0 O
 252 X DDR_A2 E4 -800 1000 200 R 40 40 4 0 O
 253 X ~DDR_CASN~ F1 -800 -800 200 R 40 40 4 0 O
 254 X DDR_A11 F2 -800 100 200 R 40 40 4 0 O
 255 X DDR_A0 F3 -800 1200 200 R 40 40 4 0 O
 256 X DDR_A10 F4 -800 200 200 R 40 40 4 0 O
 257 X DDR_ODT G1 -800 -1300 200 R 40 40 4 0 O
 258 X ~DDR_RESETN~ G2 800 -1400 200 L 40 40 4 0 O
 259 X DDR_CKE G3 -800 -1000 200 R 40 40 4 0 O
 260 X ~DDR_RASN~ G4 800 -1500 200 L 40 40 4 0 O
 261 X DDR_A1 H1 -800 1100 200 R 40 40 4 0 O
 262 X DDR_CSN0 H2 -800 -1200 200 R 40 40 4 0 O
 263 X DDR_A13 H3 -800 -100 200 R 40 40 4 0 O
 264 X DDR_A14 H4 -800 -200 200 R 40 40 4 0 O
 265 X DDR_D8 J1 800 400 200 L 40 40 4 0 B
 266 X DDR_DQM1 J2 800 -1300 200 L 40 40 4 0 O
 267 X DDR_VTP J3 800 -900 200 L 40 40 4 0 B
 268 X DDR_VREF J4 800 -1000 200 L 40 40 4 0 B
 269 X DDR_D9 K1 800 300 200 L 40 40 4 0 B
 270 X DDR_D10 K2 800 200 200 L 40 40 4 0 B
 271 X DDR_D11 K3 800 100 200 L 40 40 4 0 B
 272 X DDR_D12 K4 800 0 200 L 40 40 4 0 B
 273 X DDR_DQS1 L1 800 -600 200 L 40 40 4 0 B
 274 X DDR_DQSN1 L2 800 -800 200 L 40 40 4 0 B
 275 X DDR_D13 L3 800 -100 200 L 40 40 4 0 B
 276 X DDR_D14 L4 800 -200 200 L 40 40 4 0 B
 277 X DDR_D15 M1 800 -300 200 L 40 40 4 0 B
 278 X DDR_DQM0 M2 800 -1200 200 L 40 40 4 0 O
 279 X DDR_D0 M3 800 1200 200 L 40 40 4 0 B
 280 X DDR_D1 M4 800 1100 200 L 40 40 4 0 B
 281 X DDR_D2 N1 800 1000 200 L 40 40 4 0 B
 282 X DDR_D3 N2 800 900 200 L 40 40 4 0 B
 283 X DDR_D4 N3 800 800 200 L 40 40 4 0 B
 284 X DDR_D5 N4 800 700 200 L 40 40 4 0 B
 285 X DDR_DQS0 P1 800 -500 200 L 40 40 4 0 B
 286 X DDR_DQSN0 P2 800 -700 200 L 40 40 4 0 B
 287 X DDR_D6 P3 800 600 200 L 40 40 4 0 B
 288 X DDR_D7 P4 800 500 200 L 40 40 4 0 B
 289 X GPMC_AD13 R12 900 -700 200 L 40 40 5 0 B
 290 X GPMC_A0 R13 -900 900 200 R 40 40 5 0 O
 291 X GPMC_A4 R14 -900 500 200 R 40 40 5 0 O
 292 X GPMC_ADVN_ALE R7 -900 -1200 200 R 40 40 5 0 O
 293 X GPMC_AD2 R8 900 400 200 L 40 40 5 0 B
 294 X GPMC_AD6 R9 900 0 200 L 40 40 5 0 B
 295 X GPMC_AD9 T10 900 -1100 200 L 40 40 5 0 B
 296 X GPMC_AD10 T11 900 -1000 200 L 40 40 5 0 B
 297 X GPMC_AD12 T12 900 -800 200 L 40 40 5 0 B
 298 X GPMC_CSN3 T13 -900 -700 200 R 40 40 5 0 O
 299 X GPMC_A3 T14 -900 600 200 R 40 40 5 0 O
 300 X GPMC_A7 T15 -900 200 200 R 40 40 5 0 O
 301 X GPMC_A10 T16 -900 -100 200 R 40 40 5 0 O
 302 X GPMC_WAIT0 T17 900 900 200 L 40 40 5 0 I
 303 X GPMC_BEN0_CLE T6 -900 -1100 200 R 40 40 5 0 O
 304 X GPMC_OEN_REN T7 -900 -600 200 R 40 40 5 0 O
 305 X GPMC_AD3 T8 900 300 200 L 40 40 5 0 B
 306 X GPMC_AD7 T9 900 -100 200 L 40 40 5 0 B
 307 X GPMC_AD8 U10 900 -1200 200 L 40 40 5 0 B
 308 X GPMC_AD11 U12 900 -900 200 L 40 40 5 0 B
 309 X GPMC_AD15 U13 900 -500 200 L 40 40 5 0 B
 310 X GPMC_A2 U14 -900 700 200 R 40 40 5 0 O
 311 X GPMC_A6 U15 -900 300 200 R 40 40 5 0 O
 312 X GPMC_A9 U16 -900 0 200 R 40 40 5 0 O
 313 X GPMC_WPN U17 -900 -400 200 R 40 40 5 0 O
 314 X GPMC_BEN1 U18 -900 -1300 200 R 40 40 5 0 O
 315 X GPMC_WEN U6 -900 -500 200 R 40 40 5 0 O
 316 X GPMC_AD0 U7 900 600 200 L 40 40 5 0 B
 317 X GPMC_AD4 U8 900 200 200 L 40 40 5 0 B
 318 X GPMC_CSN1 U9 -900 -900 200 R 40 40 5 0 O
 319 X GPMC_CLK V12 900 -400 200 L 40 40 5 0 B C
 320 X GPMC_AD14 V13 900 -600 200 L 40 40 5 0 B
 321 X GPMC_A1 V14 -900 800 200 R 40 40 5 0 O
 322 X GPMC_A5 V15 -900 400 200 R 40 40 5 0 O
 323 X GPMC_A8 V16 -900 100 200 R 40 40 5 0 O
 324 X GPMC_A11 V17 -900 -200 200 R 40 40 5 0 O
 325 X GPMC_CSN0 V6 -900 -1000 200 R 40 40 5 0 O
 326 X GPMC_AD1 V7 900 500 200 L 40 40 5 0 B
 327 X GPMC_AD5 V8 900 100 200 L 40 40 5 0 B
 328 X GPMC_CSN2 V9 -900 -800 200 R 40 40 5 0 O
 329 X WARMRSTN A10 1000 300 200 L 40 40 6 0 B
 330 X MCASP0_ACLKX A13 -1000 -100 200 R 40 40 6 0 B
 331 X MCASP0_AHCLKX A14 -1000 0 200 R 40 40 6 0 B
 332 X RESERVED A3 1000 100 200 L 40 40 6 0 B
 333 X MCASP0_ACLKR B12 -1000 200 200 R 40 40 6 0 B
 334 X MCASP0_FSX B13 -1000 300 200 R 40 40 6 0 B
 335 X PWRONRSTN B15 -1000 900 200 R 40 40 6 0 I
 336 X MCASP0_AHCLKR C12 -1000 100 200 R 40 40 6 0 B
 337 X MCASP0_FSR C13 -1000 -200 200 R 40 40 6 0 B
 338 X PMIC_POWER_EN C6 1000 1000 200 L 40 40 6 0 O
 339 X MCASP0_AXR0 D12 -1000 -300 200 R 40 40 6 0 B
 340 X MCASP0_AXR1 D13 -1000 -400 200 R 40 40 6 0 B
 341 X MMC0_DAT3 F17 1000 -300 200 L 40 40 6 0 B
 342 X MMC0_DAT2 F18 1000 -200 200 L 40 40 6 0 B
 343 X MMC0_DAT1 G15 1000 -100 200 L 40 40 6 0 B
 344 X MMC0_DAT0 G16 1000 -400 200 L 40 40 6 0 B
 345 X MMC0_CLK G17 1000 -500 200 L 40 40 6 0 B C
 346 X MMC0_CMD G18 1000 -600 200 L 40 40 6 0 B
 347 X MII1_COL H16 -1000 1000 200 R 40 40 6 0 I
 348 X MII1_CRS H17 -1000 1100 200 R 40 40 6 0 I
 349 X RMII1_REF_CLK H18 1000 200 200 L 40 40 6 0 B C
 350 X MII1_RX_ER J15 -1000 -800 200 R 40 40 6 0 B
 351 X MII1_TX_EN J16 -1000 -700 200 R 40 40 6 0 B
 352 X MII1_RX_DV J17 -1000 -600 200 R 40 40 6 0 B
 353 X MII1_TXD3 J18 1000 500 200 L 40 40 6 0 O
 354 X MII1_TXD2 K15 1000 600 200 L 40 40 6 0 O
 355 X MII1_TXD1 K16 1000 700 200 L 40 40 6 0 O
 356 X MII1_TXD0 K17 1000 800 200 L 40 40 6 0 O
 357 X MII1_TX_CLK K18 -1000 -1000 200 R 40 40 6 0 B C
 358 X MII1_RXD1 L15 -1000 700 200 R 40 40 6 0 I
 359 X MII1_RXD2 L16 -1000 600 200 R 40 40 6 0 I
 360 X MII1_RXD3 L17 -1000 500 200 R 40 40 6 0 I
 361 X MII1_RX_CLK L18 -1000 -900 200 R 40 40 6 0 B C
 362 X MII1_RXD0 M16 -1000 800 200 R 40 40 6 0 I
 363 X MDIO M17 1000 -700 200 L 40 40 6 0 B
 364 X MDC M18 1000 1100 200 L 40 40 6 0 O
 365 ENDDRAW
 366 ENDDEF
 367 #
 368 # tassyms_snes_out
 369 #
 370 DEF tassyms_snes_out U 0 40 Y Y 1 F N
 371 F0 "U" 0 100 50 H V C CNN
 372 F1 "tassyms_snes_out" 50 0 50 H V C CNN
 373 F2 "" 0 0 50 H I C CNN
 374 F3 "" 0 0 50 H I C CNN
 375 DRAW
 376 S -150 50 300 -750 0 1 0 N
 377 X snes_5v ~ -250 -100 100 R 50 50 1 1 O
 378 X snes_clk ~ -250 -200 100 R 50 50 1 1 O
 379 X snes_data ~ -250 -400 100 R 50 50 1 1 O
 380 X snes_gnd ~ -250 -500 100 R 50 50 1 1 O
 381 X snes_latch ~ -250 -300 100 R 50 50 1 1 O
 382 X snes_nc1 ~ -250 -600 100 R 50 50 1 1 N
 383 X snes_nc2 ~ -250 -700 100 R 50 50 1 1 N
 384 ENDDRAW
 385 ENDDEF
 386 #
 387 #End Library