initial commit
[bbb-usb.git] / src / sys / arch / armv7 / omap / amusbss.c
1 /*
2 * Copyright (c) 2017 Ian Sutton <ian@ce.gl>
3 * Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/param.h>
28 #include <sys/systm.h>
29 #include <sys/device.h>
30 #include <sys/kernel.h>
31
32 #include <dev/ofw/openfirm.h>
33 #include <dev/ofw/fdt.h>
34
35 #include <machine/fdt.h>
36
37 #include <arm/simplebus/simplebusvar.h>
38
39 #include <armv7/omap/prcmvar.h>
40
41 #define DEVNAME(_s) ((_s)->sc_dev.dv_xname)
42
43 #define AMUSBSS_DEBUG /* XXX */
44
45 #ifdef AMUSBSS_DEBUG
46 int amusbss_debug = 20;
47 #define DPRINTF(n,s) do { if ((n) <= amusbss_debug) printf s; } while (0)
48 #else
49 #define DPRINTF(n,s) do {}
50 #endif
51
52 #define HREAD4(sc, reg) \
53 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
54 #define HWRITE4(sc, reg, val) \
55 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
56 #define HSET4(sc, reg, bits) \
57 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
58 #define HCLR4(sc, reg, bits) \
59 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
60
61 #define USBSS_REVREG 0x00
62 #define USBSS_SYSCONFIG 0x10
63 #define USBSS_SYSCONFIG_SRESET 1
64
65 #define USBCTRL_REV 0x00
66 #define USBCTRL_CTRL 0x14
67 #define USBCTRL_STAT 0x18
68 #define USBCTRL_IRQ_STAT0 0x30
69 #define IRQ_STAT0_RXSHIFT 16
70 #define IRQ_STAT0_TXSHIFT 0
71 #define USBCTRL_IRQ_STAT1 0x34
72 #define IRQ_STAT1_DRVVBUS (1 << 8)
73 #define USBCTRL_INTEN_SET0 0x38
74 #define USBCTRL_INTEN_SET1 0x3C
75 #define USBCTRL_INTEN_USB_ALL 0x1ff
76 #define USBCTRL_INTEN_USB_SOF (1 << 3)
77 #define USBCTRL_INTEN_CLR0 0x40
78 #define USBCTRL_INTEN_CLR1 0x44
79 #define USBCTRL_UTMI 0xE0
80 #define USBCTRL_UTMI_FSDATAEXT (1 << 1)
81 #define USBCTRL_MODE 0xE8
82 #define USBCTRL_MODE_IDDIG (1 << 8)
83 #define USBCTRL_MODE_IDDIGMUX (1 << 7)
84
85 struct amusbss_softc {
86 struct device sc_dev;
87 // struct simplebus_softc sc_dev;
88 bus_space_tag_t sc_iot;
89 bus_space_handle_t sc_ioh;
90 };
91
92 /* core decl */
93 int amusbss_match(struct device *, void *, void *);
94 void amusbss_attach(struct device *, struct device *, void *);
95 int amusbss_detach(struct device *, int);
96 void amusbss_reset(struct amusbss_softc *);
97
98 /* debug decl */
99 void amusbss_preg(uint32_t, char *, struct amusbss_softc *);
100 void amusbss_dumpregs(struct amusbss_softc *);
101
102 /* core/iomux.c def */
103 struct cfattach amusbss_ca = {
104 sizeof (struct amusbss_softc), amusbss_match, amusbss_attach, amusbss_detach
105 };
106
107 struct cfdriver amusbss_cd = {
108 NULL, "amusbss", DV_DULL
109 };
110
111 int
112 amusbss_match(struct device *parent, void *v, void *aux)
113 {
114 struct fdt_attach_args *faa = aux;
115 panic("its openbsd");
116 return OF_is_compatible(faa->fa_node, "ti,am33xx-usb");
117 }
118
119 void
120 amusbss_attach(struct device *parent, struct device *self, void *args)
121 {
122 struct amusbss_softc *sc = (struct amusbss_softc *) self;
123 struct fdt_attach_args *faa = args;
124
125 int i, node;
126 uint32_t rev;
127
128 // struct fdt_attach_args
129 // char *name
130
131 sc->sc_iot = faa->fa_iot;
132 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, faa->fa_reg[0].size, 0,
133 &sc->sc_ioh))
134 panic("%s: bus_space_map failed!", __func__);
135
136
137 /* Enable device clocks */
138 prcm_enablemodule(PRCM_USB);
139
140 /* Reset USB subsystem, USB0 and USB1 */
141 HWRITE4(sc, USBSS_SYSCONFIG, USBSS_SYSCONFIG_SRESET);
142 delay(100);
143 i = 10;
144 while (HREAD4(sc, USBSS_SYSCONFIG) & USBSS_SYSCONFIG_SRESET) {
145 delay(100);
146 if (i-- == 0) {
147 printf(": reset timeout.\n");
148 return;
149 }
150 }
151
152 rev = HREAD4(sc, USBSS_REVREG);
153 printf(": rev %d.%d\n", rev >> 4 &0xf, rev & 0xf);
154
155 /* Walk the OFW tree and attach top-level devices */
156 for (node = OF_child(faa->fa_node); node > 0; node = OF_peer(node)) {
157
158 }
159 }
160
161 int
162 amusbss_detach(struct device *self, int flags)
163 {
164 return 0; /* XXX */
165 }
166